JP2003133711A - Printed-wiring board and manufacturing method thereof, and packaging method of electronic component - Google Patents
Printed-wiring board and manufacturing method thereof, and packaging method of electronic componentInfo
- Publication number
- JP2003133711A JP2003133711A JP2001324721A JP2001324721A JP2003133711A JP 2003133711 A JP2003133711 A JP 2003133711A JP 2001324721 A JP2001324721 A JP 2001324721A JP 2001324721 A JP2001324721 A JP 2001324721A JP 2003133711 A JP2003133711 A JP 2003133711A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- pattern
- electronic component
- connection terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Wire Bonding (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、表面実装部品、特
にベアチップ等の電子部品を実装するプリント配線板と
その製造方法および電子部品の実装方法に関するもので
ある。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surface mount component, particularly a printed wiring board for mounting electronic components such as bare chips, a method for manufacturing the same, and a method for mounting electronic components.
【0002】[0002]
【従来の技術】従来のプリント配線板のパターン形成方
法は、大別するとサブトラクティブ法とアディティブ法
の二つがあり、サブトラクティブ法は量産性が高く、製
造コストを低減できることからプリント配線板のパター
ン形成方法として多用されている。2. Description of the Related Art A conventional printed wiring board pattern forming method is roughly classified into a subtractive method and an additive method. The subtractive method has high mass productivity and can reduce manufacturing cost. It is widely used as a forming method.
【0003】また近年アディティブ法についてもファイ
ンパターン対応として使用するところが増えてきてい
る。Further, in recent years, the number of places where the additive method is used for fine pattern is increasing.
【0004】図8はサブトラクティブ法によるパターン
形成の製造工程手順である。FIG. 8 shows a manufacturing process procedure of pattern formation by the subtractive method.
【0005】基材32と銅はく33からなる銅張り積層
板31(図8(A)参照)の表面にフォトプロセスによ
りエッチングレジスト34を形成した後(図8(B)参
照)、塩化第二銅などのエッチング液により不要な銅は
くを除去して所定のパターン35を形成したうえで(図
8(C)参照)、エッチングレジストを剥離してパター
ン形成が完了する(図8(D)参照)。After forming an etching resist 34 by a photo process on the surface of a copper clad laminate 31 (see FIG. 8A) consisting of a base material 32 and a copper foil 33 (see FIG. 8B), a chlorinated chloride Unnecessary copper foil is removed by an etching solution such as dicopper to form a predetermined pattern 35 (see FIG. 8C), and then the etching resist is peeled off to complete the pattern formation (FIG. 8D). )reference).
【0006】その後、必要に応じて配線基板の表面に部
品実装部分を残してソルダレジストを塗布することもあ
る。Thereafter, a solder resist may be applied on the surface of the wiring board, leaving a component mounting portion, if necessary.
【0007】最後に、仕上げ処理として、部品実装の
際、接続電極となるパターンの上に無電解ニッケルめっ
き層36、さらにその上に無電解金めっき層37を形成
する(図8(E)参照)。Finally, as a finishing treatment, an electroless nickel plating layer 36 is formed on a pattern to be a connection electrode when mounting a component, and an electroless gold plating layer 37 is further formed thereon (see FIG. 8E). ).
【0008】図9,10はアディティブ法のうちよく使
用されるセミアディティブ法によるパターン形成の製造
工程手順である。9 and 10 show a manufacturing process procedure of pattern formation by a semi-additive method which is often used among the additive methods.
【0009】配線基板31となる基材32(図9(A)
参照)の表面に無電解銅めっき層41を形成した後(図
9(B)参照)、フォトプロセスによりめっきレジスト
42を形成する(図9(C)参照)。A base material 32 to be the wiring board 31 (FIG. 9A)
After the electroless copper plating layer 41 is formed on the surface (see FIG. 9B) (see FIG. 9B), the plating resist 42 is formed by a photo process (see FIG. 9C).
【0010】次に、めっきレジスト42の非形成部に電
解銅めっき層43を形成する(図9(D)参照)。そし
てめっきレジスト42を水酸化ナトリウム等の溶液で剥
離する(図10(E)参照)。Next, an electrolytic copper plating layer 43 is formed on the non-formed portion of the plating resist 42 (see FIG. 9D). Then, the plating resist 42 is stripped with a solution of sodium hydroxide or the like (see FIG. 10E).
【0011】次に、硫酸と過酸化水素を主成分とする溶
液または塩化第二銅などのエッチング液により電解銅め
っき層43を形成していない部分の無電解銅めっき層4
1を除去する(図10(F)参照)。その後、必要に応
じて配線基板の表面に部品実装部分を残してソルダレジ
ストを塗布することもある。Next, the electroless copper plating layer 4 in the portion where the electrolytic copper plating layer 43 is not formed by a solution containing sulfuric acid and hydrogen peroxide as main components or an etching solution such as cupric chloride.
1 is removed (see FIG. 10F). Thereafter, a solder resist may be applied on the surface of the wiring board, leaving the component mounting portion, if necessary.
【0012】最後に、仕上げ処理として、部品実装の
際、接続電極となるパターンの上に無電解ニッケルめっ
き層36、さらにその上に無電解金めっき層37を形成
する(図10(G)参照)。Finally, as a finishing treatment, an electroless nickel plating layer 36 is formed on a pattern to be a connection electrode when mounting a component, and an electroless gold plating layer 37 is further formed thereon (see FIG. 10G). ).
【0013】[0013]
【発明が解決しようとする課題】ところが、上記従来の
製造方法であるサブトラクティブ法の場合、銅はく33
をエッチングする際、厚み方向だけではなく横方向にも
エッチングされパターン35の断面形状は上幅が細く、
下幅が太い台形状になる。However, in the case of the subtractive method which is the conventional manufacturing method, the copper foil 33 is used.
When etching is performed not only in the thickness direction but also in the lateral direction, the cross-sectional shape of the pattern 35 has a narrow upper width,
It has a trapezoidal shape with a thick bottom width.
【0014】このためファインパターン化が進み、パタ
ーン幅とパターン間隙が狭くなってくると隣接するパタ
ーン間の下幅において所定の間隙を保とうとすると上幅
が細くなってしまう。For this reason, as finer patterns are formed and the pattern width and the pattern gap become narrower, the upper width becomes narrower when trying to maintain a predetermined gap in the lower width between adjacent patterns.
【0015】このようにパターンの上幅が細くなるとパ
ターンの上に部品を実装する際、部品に配置された電極
をパターン上に載せる時の位置ずれに関する許容度が小
さいため、部品がパターンからずれ落ちたりして電気的
接続がとれないという問題があった。When the upper width of the pattern is reduced as described above, when a component is mounted on the pattern, the component is displaced from the pattern due to a small tolerance regarding positional displacement when the electrodes arranged on the component are placed on the pattern. There was a problem that it dropped and electrical connection could not be made.
【0016】これを具体的に説明すると図11(A)
(B)に示すように、ベアチップ44に配置された基板
との接続電極であるバンプ45が実装時の圧力によりパ
ターン35からずれ落ちてベアチップが傾き、接触不良
を起こすなどの不具合が発生していた。This will be specifically described with reference to FIG. 11 (A).
As shown in (B), the bump 45, which is a connection electrode for connecting to the substrate arranged on the bare chip 44, is displaced from the pattern 35 by the pressure during mounting, and the bare chip is tilted to cause a contact failure. It was
【0017】また上記従来の製造方法であるセミアディ
ティブ法の場合、電解銅めっき層43を形成する際、め
っき析出状態の断面形状は平坦に析出するのではなく、
丸みを帯びた状態で析出する。In the case of the semi-additive method, which is the conventional manufacturing method described above, when the electrolytic copper plating layer 43 is formed, the cross-sectional shape in the plating deposition state does not deposit flat, but
Precipitates in a rounded state.
【0018】この丸みの度合いはめっきの電流密度が高
い場合や、めっきレジストの疎水性が強いほど顕著にな
るものの、めっきは本来、丸みを帯びた状態で析出す
る。The degree of roundness becomes more remarkable when the current density of the plating is high and the hydrophobicity of the plating resist is stronger, but the plating is originally deposited in a rounded state.
【0019】またそれに加えて、その後の工程でエッチ
ング液により無電解銅めっき層41を除去する際、電解
銅めっき層43にもエッチング液がかかるため、まるみ
が更に助長されたパターンとなる。In addition to this, when the electroless copper plating layer 41 is removed by an etching solution in the subsequent step, the etching solution is also applied to the electrolytic copper plating layer 43, so that the pattern has a further enhanced roundness.
【0020】このようにパターンの上幅がまるみを帯び
た形状になるとパターンの上に部品を実装する際、部品
に配置された電極をパターン上に精度よく載せたとして
もパターンのまるみにより電極がパターン上を滑りやす
いため、部品がパターンから滑り落ちたりして電気的接
続がとれないという問題があった。When the upper width of the pattern has a rounded shape in this way, when the component is mounted on the pattern, even if the electrode arranged on the component is placed on the pattern with high precision, the electrode will be rounded due to the roundness of the pattern. There is a problem that parts are slipped off from the pattern and electrical connection cannot be made because the parts are easily slipped on the pattern.
【0021】これを具体的に説明すると図12(A)
(B)に示すように、ベアチップ44に配置された基板
との接続電極であるバンプ45が実装時の圧力によりパ
ターン35から滑り落ちてベアチップが傾き、接触不良
を起こすなどの不具合が発生していた。This will be specifically described with reference to FIG. 12 (A).
As shown in (B), the bump 45, which is a connection electrode with the substrate arranged on the bare chip 44, slides off the pattern 35 due to the pressure during mounting, and the bare chip is tilted, causing a contact failure. It was
【0022】[0022]
【課題を解決するための手段】上記従来の課題を解決す
るために本発明は、導体パターンを有する絶縁基板上の
全面に絶縁樹脂層を形成する工程と、前記絶縁樹脂層を
導体パターンの表面が露出するまで平滑に研磨し開口部
を形成する工程と、露出した導体パターン上面を所定の
深さまでエッチングする工程を有するプリント配線板の
製造方法を用いて、前記絶縁樹脂層に形成された開口部
を備え、前記開口部の下側は接続端子パターンが露出
し、かつ前記接続端子パターンの上面は前記絶縁樹脂層
表面よりも低い位置に形成されていることを特徴とする
プリント配線板を提供するものである。In order to solve the above-mentioned conventional problems, the present invention provides a step of forming an insulating resin layer on the entire surface of an insulating substrate having a conductor pattern, and the step of forming the insulating resin layer on the surface of the conductor pattern. The opening formed in the insulating resin layer is formed by using a method for manufacturing a printed wiring board including a step of polishing the surface of the exposed conductive pattern to a predetermined depth by polishing the surface until it is exposed. And a connection terminal pattern is exposed on a lower side of the opening, and an upper surface of the connection terminal pattern is formed at a position lower than a surface of the insulating resin layer. To do.
【0023】また、本発明のプリント配線板の接続端子
パターンに、凸状の接続電極を有する電子部品の前記接
続電極を接触させ、前記電子部品を加圧することによっ
て前記接続端子パターンと接続電極を電気的に接合する
電子部品の実装方法を提供し、実装時の不具合を解消す
ることを目的とするものである。Further, the connection terminal pattern of the printed wiring board of the present invention is brought into contact with the connection electrode of an electronic component having a convex connection electrode, and the electronic component is pressed to form the connection terminal pattern and the connection electrode. An object of the present invention is to provide a method for mounting an electronic component that is electrically joined, and to eliminate a problem at the time of mounting.
【0024】[0024]
【発明の実施の形態】上記目的を達成するために、本発
明は以下の構成を有する。BEST MODE FOR CARRYING OUT THE INVENTION To achieve the above object, the present invention has the following constitution.
【0025】本発明の請求項1、請求項2、及び請求項
7に記載の発明は、導体パターンを有する絶縁基板上の
全面に絶縁樹脂層を形成する工程と、前記絶縁樹脂層を
導体パターンの表面が露出するまで平滑に研磨し開口部
を形成する工程と、露出した導体パターン上面を所定の
深さまでエッチングする工程を有するプリント配線板の
製造方法を用いて、前記開口部直下に接続端子パターン
が部分的に露出し、かつ前記接続端子パターンの上面は
前記絶縁樹脂層表面よりも低い位置に形成されているプ
リント配線板を提供するものである。The invention according to claim 1, claim 2, and claim 7 of the present invention comprises a step of forming an insulating resin layer on the entire surface of an insulating substrate having a conductor pattern, and the step of forming the insulating resin layer in the conductor pattern. Using a method for manufacturing a printed wiring board, which comprises a step of polishing the surface of the conductor to form an opening by smoothing the exposed surface and a step of etching the exposed upper surface of the conductor pattern to a predetermined depth, the connection terminal is provided directly below the opening. The pattern is partially exposed, and the upper surface of the connection terminal pattern provides a printed wiring board formed at a position lower than the surface of the insulating resin layer.
【0026】これにより、電子部品の実装において、電
子部品に配置された凸状の電極を基板のパターン上に載
せる際、凸状の電極はプリント配線板の窪んだ状態で形
成された接続端子パターンに嵌合した形で位置決めされ
る。As a result, in mounting electronic components, when the convex electrodes arranged on the electronic components are placed on the pattern of the board, the convex electrodes are formed on the printed wiring board in a recessed connection terminal pattern. It is positioned so that it fits in.
【0027】また実装時に電子部品に圧力がかかって
も、電子部品の凸状の電極は横方向へ動くことがなく、
正常な接続状態を維持できるという作用を有するもので
ある。Even when pressure is applied to the electronic component during mounting, the convex electrodes of the electronic component do not move laterally,
It has an effect of maintaining a normal connection state.
【0028】さらに、接続端子パターンが部分的に露出
した状態、すなわち接続端子パターンの側縁が絶縁樹脂
層により覆われている状態となるため、ピール強度やプ
ル強度が大幅に向上するという効果を有するものであ
る。Further, since the connection terminal pattern is partially exposed, that is, the side edge of the connection terminal pattern is covered with the insulating resin layer, the peel strength and the pull strength are significantly improved. I have.
【0029】本発明の請求項3、請求項4、及び請求項
10に記載の発明は、露出した導体パターン上面を所定
の深さまでエッチングした後、絶縁樹脂層の開口部の縁
端に傾斜を設ける工程を用いて、開口部の縁端に逆円錐
状、すなわち開口部の上側が広く開口部の下側が狭い形
状の傾斜を設けたプリント配線板を提供するものであ
る。According to the third, fourth and tenth aspects of the present invention, after the exposed upper surface of the conductor pattern is etched to a predetermined depth, the edge of the opening of the insulating resin layer is inclined. (EN) A printed wiring board provided with an inverted conical slope at the edge of an opening, that is, a shape in which the upper side of the opening is wide and the lower side of the opening is narrow by using the step of providing.
【0030】これにより、電子部品の実装において、電
子部品に配置された凸状の電極を基板のパターン上に載
せる際、電子部品の実装位置のずれが生じても、接続端
子パターン直上の絶縁樹脂層の開口部の縁端には傾斜が
ついているため、実装における電子部品上方からの圧力
により電極は絶縁樹脂層上を横滑りし、凸状の電極はプ
リント配線板の窪んだ状態で形成された接続端子パター
ンに嵌合した形で位置決めされやすいという作用を有す
るものである。As a result, in mounting an electronic component, when the convex electrodes arranged on the electronic component are placed on the pattern of the substrate, even if the mounting position of the electronic component is deviated, the insulating resin directly above the connection terminal pattern is formed. Since the edge of the opening of the layer is inclined, the electrode slides over the insulating resin layer due to the pressure from above the electronic component during mounting, and the convex electrode is formed in the depressed state of the printed wiring board. It has an effect of being easily positioned by being fitted to the connection terminal pattern.
【0031】なお傾斜を設ける工程は、本発明の請求項
11に記載の如く、バフ研磨であって、酸化アルミニウ
ムまたは炭化ケイ素を研磨材として用い、前記研磨材の
研磨粒の大きさは#400〜#2500であることが望
ましい。The step of providing the inclination is buffing, as described in claim 11 of the present invention, in which aluminum oxide or silicon carbide is used as the abrasive, and the abrasive grain size of the abrasive is # 400. ~ # 2500 is desirable.
【0032】これにより、絶縁樹脂層の表面平坦部分は
極力研磨の影響を受けることなく、縁端部分のみを丸め
て傾斜を設けることができる。As a result, the flat surface portion of the insulating resin layer is not affected by polishing as much as possible, and only the edge portion can be rounded to provide the inclination.
【0033】本発明の請求項5、請求項8、及び請求項
9に記載の発明は、露出した導体パターン上面を所定の
深さまでエッチングした後、前記導体パターン表面にニ
ッケルめっき層及び金めっき層を形成する工程におい
て、所定の深さをニッケルめっき層と金めっき層の厚み
の和より大であることを特徴とする製造方法を用いて、
接続端子用の導体パターンの表面にニッケルおよび金め
っき層が形成されているプリント配線板を提供するもの
である。According to the fifth, eighth and ninth aspects of the present invention, the exposed upper surface of the conductor pattern is etched to a predetermined depth, and then a nickel plating layer and a gold plating layer are formed on the surface of the conductor pattern. In the step of forming, using a manufacturing method characterized in that the predetermined depth is greater than the sum of the thickness of the nickel plating layer and the gold plating layer,
The present invention provides a printed wiring board in which a nickel and gold plating layer is formed on the surface of a conductor pattern for a connection terminal.
【0034】これにより、電子部品の実装において、電
子部品に配置された凸状の電極を基板のパターン上に載
せる際、凸状の電極はプリント配線板の窪んだ状態で形
成された接続端子パターンに嵌合した形で位置決めされ
る。As a result, in mounting an electronic component, when the convex electrode arranged on the electronic component is placed on the pattern of the substrate, the convex electrode is formed on the connection terminal pattern formed in the depressed state of the printed wiring board. It is positioned so that it fits in.
【0035】さらに接続端子用の導体パターンの表層が
金めっき層であるため、電子部品の凸状の電極との接続
抵抗を低く抑え、正常な接続状態を維持できるという作
用を有するものである。Further, since the surface layer of the conductor pattern for the connection terminal is a gold plating layer, it has an effect that the connection resistance with the convex electrode of the electronic component can be kept low and the normal connection state can be maintained.
【0036】本発明の請求項6及び請求項12に記載の
発明は、アディティブ法を用いて本発明の請求項1に記
載の特徴を有するプリント配線板を提供するものであ
る。The invention described in claims 6 and 12 of the present invention provides a printed wiring board having the features of claim 1 of the present invention using an additive method.
【0037】これにより、導体パターンを無電解銅めっ
きで形成する際のめっきレジストは、絶縁樹脂層として
の役割を合わせ持つとともに、感光性レジストを採用す
ることで、細線、高密度の導体パターンを有するプリン
ト配線板を効率的に製造することができる。As a result, the plating resist used when the conductor pattern is formed by electroless copper plating also has a role as an insulating resin layer, and a photosensitive resist is used to form a thin wire and a high-density conductor pattern. It is possible to efficiently manufacture the printed wiring board having the same.
【0038】さらに多数の電極を有する電子部品の実装
において、電子部品に配置された凸状の電極を基板のパ
ターン上に載せる際、凸状の電極はプリント配線板の窪
んだ状態で形成された接続端子パターンに嵌合した形で
位置決めされるという作用を有する。In mounting an electronic component having a large number of electrodes, when the convex electrode arranged on the electronic component is placed on the pattern of the substrate, the convex electrode is formed in a depressed state of the printed wiring board. It has the effect of being positioned in a form fitted to the connection terminal pattern.
【0039】本発明の請求項13に記載の発明は、請求
項1記載のプリント配線板の接続端子パターンに、凸状
の接続電極を有する電子部品の前記接続電極を接触さ
せ、前記電子部品を加圧することによって前記接続端子
パターンと接続電極を電気的に接合することを特徴とす
る電子部品の実装方法というものであり、これにより、
部品実装において、部品に配置された凸状の接続電極を
基板の接続端子パターン上に載せる際、部品の凸状の接
続電極は窪んだ接続端子パターン上に落ちた状態となる
ため、さらに実装の圧力がかかっても、電極は動くこと
がなく、正常な接続が維持されるという作用効果が得ら
れる。According to a thirteenth aspect of the present invention, the connection terminal pattern of the printed wiring board according to the first aspect is brought into contact with the connection electrode of an electronic component having a convex connection electrode to form the electronic component. It is a method of mounting an electronic component, characterized in that the connection terminal pattern and the connection electrode are electrically joined by applying pressure.
In mounting components, when the convex connecting electrodes placed on the component are placed on the connecting terminal pattern of the board, the convex connecting electrodes of the component are dropped onto the recessed connecting terminal pattern, so that further mounting Even if pressure is applied, the electrodes do not move, and the effect that the normal connection is maintained is obtained.
【0040】本発明の請求項14に記載の発明は、請求
項1記載のプリント配線板の接続端子パターンと、電子
部品の凸状の接続電極を電気的に接合し、プリント配線
板と電子部品との隙間に封止樹脂を介在させる電子部品
の実装方法というものであり、これにより、従来の基板
ではボイドの発生を抑えるのは困難であったが、本発明
の基板においては絶縁樹脂により、基板表面が略平滑に
形成されていることからボイドの巻き込みを抑えながら
封止樹脂を高速で注入できるという作用効果が得られ
る。According to a fourteenth aspect of the present invention, the connection terminal pattern of the printed wiring board according to the first aspect and the convex connection electrode of the electronic component are electrically joined to each other to form the printed wiring board and the electronic component. It is a method of mounting an electronic component in which a sealing resin is interposed in the gap between, and thus, it was difficult to suppress the occurrence of voids in the conventional substrate, but in the substrate of the present invention, the insulating resin Since the substrate surface is formed to be substantially smooth, it is possible to obtain the effect that the sealing resin can be injected at high speed while suppressing the inclusion of voids.
【0041】本発明の請求項15に記載の発明は、請求
項1記載のプリント配線板の接続端子パターン上または
その近傍に硬化性樹脂を配置し、接続端子パターンに、
電子部品の凸状の接続電極を接触させ、前記硬化性樹脂
を硬化する電子部品の実装方法としたものであり、これ
により、従来の基板ではボイドの発生を抑えるのは困難
であったが、本発明の基板においては絶縁樹脂により、
基板表面が略平滑に形成されていることからボイドのな
い接続信頼性の高い実装方法を実現できるという作用効
果が得られる。According to a fifteenth aspect of the present invention, a curable resin is disposed on or near the connection terminal pattern of the printed wiring board according to the first aspect, and the connection terminal pattern has
The convex connecting electrodes of the electronic component are brought into contact with each other, and the mounting method of the electronic component is such that the curable resin is cured. Therefore, it is difficult to suppress the occurrence of voids in the conventional substrate. In the substrate of the present invention, due to the insulating resin,
Since the substrate surface is formed to be substantially smooth, it is possible to obtain a working effect that a mounting method with high connection reliability without voids can be realized.
【0042】本発明の請求項16に記載の発明は、請求
項1記載のプリント配線板の接続端子パターンと、電子
部品の接続電極をはんだ、またははんだボールを溶融し
て電気的に接合することを特徴とする電子部品の実装方
法というものであり、これにより、はんだ、またははん
だボールは窪んだ接続端子パターンから位置ずれするこ
とはなく接続信頼性の高い実装方法が可能となる。また
接続端子パターンの側面が絶縁樹脂に覆われ、かつ窪ん
でいるので接合に使うはんだ量を削減できるとともには
んだによるショートも減少するという作用効果が得られ
る。According to a sixteenth aspect of the present invention, the connection terminal pattern of the printed wiring board according to the first aspect is electrically connected to the connection electrode of the electronic component by melting solder or solder balls. This is a method of mounting an electronic component, which allows a solder or solder ball to be mounted with high connection reliability without being displaced from the recessed connection terminal pattern. In addition, since the side surface of the connection terminal pattern is covered with the insulating resin and is recessed, it is possible to reduce the amount of solder used for joining and to reduce the short circuit due to the solder.
【0043】(実施の形態1)以下本発明の実施の形態
について図面を参照しながら説明する。(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings.
【0044】図1,2は本発明の実施の形態1における
プリント配線板の製造工程図である。1 and 2 are manufacturing process diagrams of the printed wiring board according to Embodiment 1 of the present invention.
【0045】図1,2において、本実施の形態では配線
基板1として、基材には例えばガラスエポキシ樹脂積層
板である絶縁基板2の両面に接続端子パターン5が形成
されたものを使用している。この導体パターンの形成方
法としてはサブトラクティブ法、セミアディティブ法な
どどの方法でもよい(図1(A)参照)。In FIGS. 1 and 2, as the wiring substrate 1 in the present embodiment, a substrate having a connection terminal pattern 5 formed on both surfaces of an insulating substrate 2 which is, for example, a glass epoxy resin laminated plate is used. There is. As a method of forming this conductor pattern, any method such as a subtractive method or a semi-additive method may be used (see FIG. 1A).
【0046】この配線基板1の表面に絶縁樹脂層3を形
成する。この絶縁樹脂層の材料としては、熱硬化型のエ
ポキシ系樹脂を使用し、スクリーン印刷機、カーテンコ
ータ、スロットコータなどで塗布した後、熱硬化炉で指
触乾燥の状態にしたうえで、配線基板1の裏面側にも同
様に絶縁樹脂材料を塗布して、熱硬化炉で両面同時に硬
化させる(図1(B)参照)。An insulating resin layer 3 is formed on the surface of the wiring board 1. As the material for this insulating resin layer, a thermosetting epoxy resin is used, which is applied with a screen printing machine, curtain coater, slot coater, etc., and then dried in a heat curing oven, and then the wiring. Similarly, an insulating resin material is applied to the back surface of the substrate 1 and both surfaces are simultaneously cured in a heat curing furnace (see FIG. 1B).
【0047】次に、硬化した絶縁樹脂層3を研磨する。
研磨装置としては例えばベルトサンダーやバフ研磨機な
どを使用し、接続端子パターン5が表面に露出されるま
で平滑に研磨する(図1(C)参照)。これにより、絶
縁樹脂層3には開口部4が現れる。Next, the cured insulating resin layer 3 is polished.
As a polishing device, for example, a belt sander or a buffing machine is used, and the surface is smoothed until the connection terminal pattern 5 is exposed (see FIG. 1C). As a result, the opening 4 appears in the insulating resin layer 3.
【0048】次に、この表面が平坦になった配線基板1
に対して硫酸と過酸化水素を主成分とする溶液または塩
化第二銅などのエッチング液により接続端子パターン5
をソフトエッチングして周囲の絶縁樹脂層3に対して接
続端子パターン5の上面が低い位置、すなわち窪んだ状
態とする。これにより、絶縁樹脂層3の開口部4の下側
に接続端子パターン5が露出した状態となる。Next, the wiring board 1 having a flat surface
On the other hand, the connection terminal pattern 5 is formed by using a solution containing sulfuric acid and hydrogen peroxide as main components or an etching solution such as cupric chloride.
Is soft-etched to a position where the upper surface of the connection terminal pattern 5 is lower than the surrounding insulating resin layer 3, that is, a depressed state. As a result, the connection terminal pattern 5 is exposed below the opening 4 of the insulating resin layer 3.
【0049】なおソフトエッチング量としてはその後に
実施する仕上げ処理である無電解ニッケルめっき層と無
電解金めっき層の厚みの和(通常3〜8μm)より大と
なるような値、すなわち10〜30μmの所定の深さに
なるように設定する(図1(D)参照)。この深さは電
子部品の電極であるバンプの高さの30〜60%の値と
なり、実装効率を高める上でも好ましい。The soft etching amount is larger than the sum of the thicknesses of the electroless nickel plating layer and the electroless gold plating layer (usually 3 to 8 μm) which is the finishing treatment to be performed thereafter, that is, 10 to 30 μm. Is set to a predetermined depth (see FIG. 1D). This depth has a value of 30 to 60% of the height of the bump which is the electrode of the electronic component, which is preferable also from the viewpoint of enhancing the mounting efficiency.
【0050】次に、配線基板1の表面にできた絶縁樹脂
層3の縁端のエッジ部7をバフ研磨などの研磨装置を用
いて研磨することにより丸める。研磨材としては酸化ア
ルミニウムや炭化ケイ素などを使用し、研磨粒の大きさ
はメッシュで#400〜#2500のものを使用して、
絶縁樹脂層3の平坦な部分は極力研磨せずにエッジ部7
のみを丸めて傾斜をつける(図2(E)参照)。傾斜の
形状は、図に示すように、開口部の上側が広く開口部の
下側が狭い形状、すなわち逆円錐状となる。Next, the edge portion 7 at the edge of the insulating resin layer 3 formed on the surface of the wiring board 1 is rounded by polishing with a polishing device such as buffing. Aluminum oxide or silicon carbide is used as the abrasive, and the size of the abrasive grains is # 400 to # 2500.
The flat portion of the insulating resin layer 3 is not polished as much as possible, and the edge portion 7
Roll only the chisel and make an inclination (see FIG. 2 (E)). As shown in the figure, the inclined shape is a shape in which the upper side of the opening is wide and the lower side of the opening is narrow, that is, an inverted conical shape.
【0051】これにより電子部品の実装位置のずれが生
じても、接続端子パターン直上の絶縁樹脂層の開口部の
縁端には傾斜がついているため、実装における電子部品
上方からの圧力により電極は絶縁樹脂層上を横滑りし、
凸状の電極はプリント配線板の窪んだ状態で形成された
接続端子パターンに嵌合した形で位置決めされやすくな
る。As a result, even if the mounting position of the electronic component is deviated, the edge of the opening of the insulating resin layer immediately above the connection terminal pattern is inclined, so that the electrode is not attached due to the pressure from above the electronic component during mounting. Slide over the insulating resin layer,
The convex electrode is easily positioned by being fitted to the connection terminal pattern formed in the depressed state of the printed wiring board.
【0052】その後、必要に応じて配線基板1の表面に
部品実装部分を残してソルダレジストを塗布することも
ある(図4(B)参照)。Thereafter, a solder resist may be applied to the surface of the wiring board 1 leaving the component mounting portion as needed (see FIG. 4B).
【0053】最後に、仕上げ処理として、部品実装の
際、接続電極となるパターンの上に無電解ニッケルめっ
き層16、さらにその上に無電解金めっき層17を形成
する(図2(F)参照)。Finally, as a finishing treatment, an electroless nickel plating layer 16 is formed on a pattern which will be a connection electrode when mounting a component, and an electroless gold plating layer 17 is further formed thereon (see FIG. 2 (F)). ).
【0054】これにより、電子部品の電極との接続抵抗
を低く抑えることができる。As a result, the connection resistance with the electrode of the electronic component can be kept low.
【0055】<本実施形態の利点>このように本実施の形
態におけるプリント配線板の構成および製造方法によれ
ば、次のような効果が得られる。<Advantages of this Embodiment> As described above, according to the configuration and manufacturing method of the printed wiring board of this embodiment, the following effects can be obtained.
【0056】(1)電子部品の実装において、電子部品
に配置された凸状の電極15を配線基板の接続端子パタ
ーン上に載せる際、図3(A)(B)に示すように位置
ずれがあってもパターン周辺の絶縁樹脂層の縁端のエッ
ジ部7は研磨により傾斜がついているため、実装時の上
からの圧力により電極は樹脂上を滑り落ちて周囲より窪
んだ状態で形成された接続端子パターンの上に載る。(1) When mounting the electronic component, when the convex electrode 15 arranged on the electronic component is placed on the connection terminal pattern of the wiring board, a positional deviation occurs as shown in FIGS. 3 (A) and 3 (B). Even if there is, since the edge portion 7 at the edge of the insulating resin layer around the pattern is inclined by polishing, the electrode was formed by sliding down on the resin due to pressure from the top during mounting and recessed from the surroundings. Mount on the connection terminal pattern.
【0057】その後、さらに圧力がかかっても、電子部
品の凸状の電極は窪んだ接続端子パターン上に仮固定さ
れた状態であるため横方向へ動くことはなく、正常な接
続が維持される。After that, even if pressure is further applied, since the convex electrodes of the electronic component are temporarily fixed on the recessed connection terminal pattern, they do not move laterally and normal connection is maintained. .
【0058】(2)ソルダレジスト18を形成する場合
でも、図4(A)に示すように従来の基板であればパタ
ーン間隙で印刷かすれによるソルダレジスト18の未着
19やボイド20が発生する。特に今後、ファインパタ
ーン化が進み、パターンの間隙が狭くなると顕著にな
る。(2) Even when the solder resist 18 is formed, as shown in FIG. 4A, in the case of the conventional substrate, the non-attachment 19 of the solder resist 18 and the void 20 occur due to the print gap in the pattern gap. In particular, it will become remarkable as the pattern becomes finer and the gap between the patterns becomes narrower in the future.
【0059】本実施の形態では図4(B)に示すように
絶縁樹脂層3で基板が平坦化されているため、未着19
やボイド20の発生もないばかりか薄く、均一に塗布で
きる。In this embodiment, since the substrate is flattened by the insulating resin layer 3 as shown in FIG.
No voids or voids 20 are formed, and it is thin and can be applied uniformly.
【0060】(3)ベアチップを基板にフリップチップ
実装する際のアンダフィル材の注入が容易でボイドの発
生がない。(3) When the bare chip is flip-chip mounted on the substrate, the underfill material can be easily injected and voids are not generated.
【0061】図5に示すようにフリップチップ実装にお
いてはベアチップ14と基板1の隙間に接続信頼性向上
のため、封止樹脂28を注入することが多い。この注入
工程では、パターンの狭ピッチ化が進むなか、いかにボ
イドの巻きこみをなくして早く注入させられるかが大き
な課題となっている。As shown in FIG. 5, in flip chip mounting, a sealing resin 28 is often injected into the gap between the bare chip 14 and the substrate 1 in order to improve connection reliability. In this implantation step, how to eliminate void entrapment and to perform rapid implantation is a major issue as the pattern pitch becomes narrower.
【0062】従来の基板では図5(A)に示すようにボ
イド20の発生を抑えるのは困難であったが、本実施の
形態では図5(B)に示すように絶縁樹脂層3により基
板表面が平坦化されているため、ボイドの発生が格段に
減少し、注入の時間が大幅に短縮される。In the conventional substrate, it was difficult to suppress the generation of the voids 20 as shown in FIG. 5A, but in the present embodiment, the insulating resin layer 3 is used for the substrate as shown in FIG. 5B. Since the surface is flattened, the generation of voids is significantly reduced and the implantation time is greatly shortened.
【0063】なお、この封止樹脂の代わりに樹脂の硬化
収縮を利用してベアチップと基板の電気接続を保つ圧接
工法の場合で、樹脂がペースト状以外にフィルム状のも
の、あるいは樹脂に導電粒子を含むもの、含まないもの
を使用する場合も同様の効果がある。Incidentally, in the case of the pressure welding method for maintaining the electrical connection between the bare chip and the substrate by utilizing the curing shrinkage of the resin instead of the sealing resin, the resin is in the form of film other than paste, or the resin is conductive particles. The same effect is obtained when using the one containing or not containing.
【0064】(4)高密度基板やベアチップ基板として
汎用されているビルドアップ配線基板は絶縁樹脂上に析
出させた銅めっき層によって、配線パターンおよび部品
実装パターンを形成していることから、銅はくのピール
強度やプル強度が低いため、基板からの部品脱落が問題
となっている。(4) Since the build-up wiring board, which is generally used as a high-density board or bare chip board, has the wiring pattern and the component mounting pattern formed by the copper plating layer deposited on the insulating resin, Due to the low peel strength and pull strength, detachment of parts from the substrate has become a problem.
【0065】本実施の形態による配線基板1は、接続端
子パターン5が部分的に露出した状態、すなわち接続端
子パターン5の側縁が絶縁樹脂層3により覆われている
ため、ピール強度やプル強度が大幅に向上する。In the wiring board 1 according to the present embodiment, the connection terminal pattern 5 is partially exposed, that is, the side edge of the connection terminal pattern 5 is covered with the insulating resin layer 3, so that the peel strength and the pull strength are obtained. Is greatly improved.
【0066】これにより、従来より耐熱性が要求される
多数の電極を有する電子部品の実装においてもプリント
配線板としての品質を維持することができる。As a result, the quality as a printed wiring board can be maintained even when mounting an electronic component having a large number of electrodes, which have been required to have heat resistance as compared with the prior art.
【0067】(実施の形態2)図6,7は本発明の実施
の形態2におけるプリント配線板の製造工程図であり、
フルアディティブ法により導体パターンを形成したもの
である。(Second Embodiment) FIGS. 6 and 7 are manufacturing process diagrams of a printed wiring board according to a second embodiment of the present invention.
The conductor pattern is formed by the full additive method.
【0068】図6,7において、本実施の形態では配線
基板21として、触媒入りガラスエポキシ樹脂積層板の
絶縁基板22と接着剤層23からなる配線基板21(図
6(A)参照)の表面にフォトプロセスによりめっきレ
ジスト25を形成する。6 and 7, in the present embodiment, as the wiring board 21, the surface of the wiring board 21 (see FIG. 6A), which is composed of the insulating substrate 22 of the glass epoxy resin laminated plate containing the catalyst and the adhesive layer 23. Then, a plating resist 25 is formed by a photo process.
【0069】なお、このめっきレジスト25はパターン
形成完了後も剥離せず、永久マスクとして使用する(図
6(B)参照)。The plating resist 25 does not peel off even after the pattern formation is completed and is used as a permanent mask (see FIG. 6B).
【0070】次に、めっきレジスト25の非形成部とな
る開口部24に無電解銅めっき層26を形成する(図6
(C)参照)。Next, an electroless copper-plated layer 26 is formed in the opening 24 which will be the non-formed portion of the plating resist 25 (FIG. 6).
(See (C)).
【0071】次に、めっきレジスト25を研磨する。研
磨装置としては例えばベルトサンダーやバフ研磨機など
を使用し、無電解銅めっき層とめっきレジストが同一高
さになり、かつ導体パターンである無電解銅めっき層の
上幅が平坦になるまで研磨する(図6(D)参照)。Next, the plating resist 25 is polished. For example, a belt sander or a buffing machine is used as the polishing device, and the polishing is performed until the electroless copper plating layer and the plating resist are at the same height and the upper width of the electroless copper plating layer that is the conductor pattern is flat. (See FIG. 6D).
【0072】次に、この表面が平坦になった配線基板2
1に対して硫酸と過酸化水素を主成分とする溶液または
塩化第二銅などのエッチング液により接続端子パターン
5となる無電解銅めっき層をソフトエッチングして周囲
のめっきレジスト25に対して接続端子パターン5の上
面が低い位置、すなわち窪んだ状態にする。これによ
り、絶縁樹脂層としてめっきレジスト25の開口部24
の下側に接続端子パターン5が露出した状態となる。Next, the wiring board 2 having a flat surface
1 to 1 is soft-etched with a solution containing sulfuric acid and hydrogen peroxide as a main component or an etching solution such as cupric chloride to soft-etch the electroless copper plating layer to be the connection terminal pattern 5 and connected to the surrounding plating resist 25. The upper surface of the terminal pattern 5 is in a low position, that is, in a depressed state. As a result, the opening 24 of the plating resist 25 serves as an insulating resin layer.
The connection terminal pattern 5 is exposed on the lower side.
【0073】なおソフトエッチング量としてはその後に
実施する仕上げ処理である無電解ニッケルめっき層と無
電解金めっき層の厚みの和より多くなるように設定する
(図7(E)参照)。The soft etching amount is set to be larger than the sum of the thicknesses of the electroless nickel plating layer and the electroless gold plating layer, which is the finishing treatment to be performed thereafter (see FIG. 7E).
【0074】次に、配線基板10の表面にできためっき
レジストのエッジ部27をバフ研磨などの研磨装置を用
いて研磨することにより丸める。研磨材としては酸化ア
ルミニウムや炭化ケイ素などを使用し、研磨粒の大きさ
はメッシュで#400〜#2500のものを使用して、
めっきレジスト25の平坦な部分は極力研磨せずにエッ
ジ部27のみを丸めて逆円錐状の傾斜をつける(図7
(F)参照)。Next, the edge portion 27 of the plating resist formed on the surface of the wiring board 10 is rounded by polishing with a polishing device such as buffing. Aluminum oxide or silicon carbide is used as the abrasive, and the size of the abrasive grains is # 400 to # 2500.
The flat portion of the plating resist 25 is not polished as much as possible, and only the edge portion 27 is rounded to form an inverted conical inclination (FIG. 7).
(See (F)).
【0075】その後、必要に応じて配線基板の表面に部
品実装部分を残してソルダレジストを塗布することもあ
る。After that, a solder resist may be applied on the surface of the wiring board, leaving the component mounting portion, if necessary.
【0076】最後に、仕上げ処理として、部品実装の
際、接続電極となるパターンの上に無電解ニッケルめっ
き層16、さらにその上に無電解金めっき層17を形成
する(図7(G)参照)。Finally, as a finishing treatment, an electroless nickel plating layer 16 is formed on a pattern which will be a connecting electrode when mounting a component, and an electroless gold plating layer 17 is further formed thereon (see FIG. 7G). ).
【0077】<本実施形態の利点>本実施の形態における
プリント配線板の構成は実施の形態1における絶縁樹脂
層16が永久マスクとなるめっきレジスト25に置き換
わったものであるため、実施の形態1と同様の効果が得
られるとともに、めっきレジスト25に感光性レジスト
を採用することで、細線、高密度の導体パターンを有す
るプリント配線板を効率的に製造することができる。<Advantages of this Embodiment> In the structure of the printed wiring board in this embodiment, the insulating resin layer 16 in Embodiment 1 is replaced with the plating resist 25 serving as a permanent mask. In addition to obtaining the same effect as above, by adopting a photosensitive resist for the plating resist 25, it is possible to efficiently manufacture a printed wiring board having fine lines and a high-density conductor pattern.
【0078】[0078]
【発明の効果】以上のように、本発明によれば、基板上
に形成された平滑な絶縁樹脂面より低い位置に導体パタ
ーンがあり、かつ導体パターン周辺の絶縁樹脂に傾斜を
つけたプリント配線板により、部品を実装する際に位置
ずれが発生しても部品の電極は傾斜のついた絶縁樹脂上
を滑り落ちて窪んだ導体パターンの上に載ることになる
ため、接触不良の抑制に有効な優れたプリント配線板を
実現できるものである。As described above, according to the present invention, a printed wiring having a conductor pattern at a position lower than a smooth insulating resin surface formed on a substrate and inclining the insulating resin around the conductor pattern. With the plate, even if misalignment occurs when mounting the component, the electrode of the component slides down on the sloping insulating resin and is placed on the recessed conductor pattern, which is effective in suppressing contact failure. It is possible to realize an excellent printed wiring board.
【図1】本発明の実施の形態1におけるプリント配線板
の製造方法を示す工程断面図FIG. 1 is a process sectional view showing a method of manufacturing a printed wiring board according to a first embodiment of the present invention.
【図2】同実施の形態1におけるプリント配線板の製造
方法を示す工程断面図FIG. 2 is a process cross-sectional view showing the method for manufacturing a printed wiring board according to the first embodiment.
【図3】本発明の実施の形態1における電子部品の実装
状態を示す断面図FIG. 3 is a sectional view showing a mounted state of the electronic component according to the first embodiment of the present invention.
【図4】本発明の実施の形態1におけるソルダレジスト
の形成状態を比較するための断面図FIG. 4 is a cross-sectional view for comparing the formation states of the solder resist according to the first embodiment of the present invention.
【図5】本発明の実施の形態1における電子部品の実装
状態を比較するための断面図FIG. 5 is a sectional view for comparing mounting states of electronic components according to the first embodiment of the present invention.
【図6】本発明の実施の形態2におけるプリント配線板
の製造方法を示す工程断面図FIG. 6 is a process sectional view showing a method of manufacturing a printed wiring board according to a second embodiment of the present invention.
【図7】同実施の形態2におけるプリント配線板の製造
方法を示す工程断面図FIG. 7 is a process sectional view showing the method of manufacturing the printed wiring board in the second embodiment.
【図8】従来のプリント配線板の製造方法を示す工程断
面図FIG. 8 is a process sectional view showing a conventional method for manufacturing a printed wiring board.
【図9】従来のプリント配線板の製造方法を示す工程断
面図FIG. 9 is a process sectional view showing a conventional method for manufacturing a printed wiring board.
【図10】同従来のプリント配線板の製造方法を示す工
程断面図FIG. 10 is a process cross-sectional view showing the conventional method for manufacturing a printed wiring board.
【図11】従来のプリント配線板への電子部品の実装状
態を示す断面図FIG. 11 is a sectional view showing a mounting state of electronic components on a conventional printed wiring board.
【図12】従来のプリント配線板への電子部品の実装状
態を示す断面図FIG. 12 is a cross-sectional view showing a mounting state of electronic components on a conventional printed wiring board.
【符号の説明】 1、21 配線基板 2、22 絶縁基板 3 絶縁樹脂層 4、24 開口部 5 接続端子パターン 7 エッジ部 14 ベアチップ 15 電極 16 無電解ニッケルめっき層 17 無電解金めっき層 18 ソルダレジスト 20 ボイド 23 接着層 25 めっきレジスト 26 無電解銅めっき層[Explanation of symbols] 1,21 Wiring board 2.22 insulating substrate 3 Insulating resin layer 4, 24 openings 5 connection terminal pattern 7 Edge part 14 bare chips 15 electrodes 16 Electroless nickel plating layer 17 Electroless gold plating layer 18 Solder resist 20 voids 23 Adhesive layer 25 Plating resist 26 Electroless copper plating layer
─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───
【手続補正書】[Procedure amendment]
【提出日】平成14年9月18日(2002.9.1
8)[Submission date] September 18, 2002 (2002.9.1)
8)
【手続補正1】[Procedure Amendment 1]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】0077[Correction target item name] 0077
【補正方法】変更[Correction method] Change
【補正内容】[Correction content]
【0077】<本実施形態の利点>本実施の形態におけ
るプリント配線板の構成は実施の形態1における絶縁樹
脂層3が永久マスクとなるめっきレジスト25に置き換
わったものであるため、実施の形態1と同様の効果が得
られるとともに、めっきレジスト25に感光性レジスト
を採用することで、細線、高密度の導体パターンを有す
るプリント配線板を効率的に製造することができる。<Advantages of this Embodiment> In the structure of the printed wiring board in this embodiment, the insulating resin layer 3 in Embodiment 1 is replaced with the plating resist 25 serving as a permanent mask. In addition to obtaining the same effect as above, by adopting a photosensitive resist for the plating resist 25, it is possible to efficiently manufacture a printed wiring board having fine lines and a high-density conductor pattern.
【手続補正2】[Procedure Amendment 2]
【補正対象書類名】図面[Document name to be corrected] Drawing
【補正対象項目名】図6[Name of item to be corrected] Figure 6
【補正方法】変更[Correction method] Change
【補正内容】[Correction content]
【図6】 [Figure 6]
【手続補正3】[Procedure 3]
【補正対象書類名】図面[Document name to be corrected] Drawing
【補正対象項目名】図7[Name of item to be corrected] Figure 7
【補正方法】変更[Correction method] Change
【補正内容】[Correction content]
【図7】 [Figure 7]
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H05K 1/02 H05K 1/09 C 1/09 3/22 B 3/22 3/24 D 3/24 3/32 C 3/32 H01L 23/12 Q Fターム(参考) 4E351 AA01 BB01 BB23 BB24 BB26 BB33 BB35 CC06 DD04 DD06 DD19 GG13 GG15 5E319 AA03 AB05 AC01 AC18 AC20 BB01 BB04 CC12 CC22 CD04 CD25 GG09 5E338 AA02 AA03 AA16 BB04 BB19 BB25 BB63 BB75 CC01 CD03 CD33 EE22 EE32 EE51 5E343 AA02 AA12 BB03 BB09 BB17 BB23 BB24 BB44 BB61 BB71 CC61 DD43 DD75 EE33 EE52 ER11 ER49 GG18 GG20 5F044 KK02 KK17 KK19 LL01 ─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. 7 Identification code FI theme code (reference) H05K 1/02 H05K 1/09 C 1/09 3/22 B 3/22 3/24 D 3/24 3 / 32 C 3/32 H01L 23/12 QF term (reference) 4E351 AA01 BB01 BB23 BB24 BB26 BB33 BB35 CC06 DD04 DD06 DD19 GG13 GG15 5E319 AA03 AB05 AC01 AC18 AC20 BB01 BB04 CC12 CC22 CD04 CD25 GG09 5E338 A16AA02 A03 A16 AA02 BB63 BB75 CC01 CD03 CD33 EE22 EE32 EE51 5E343 AA02 AA12 BB03 BB09 BB17 BB23 BB24 BB44 BB61 BB71 CC61 DD43 DD75 EE33 EE52 ER11 ER49 GG18 GG20 5F044 KK02 KK17 KK19 LL01
Claims (16)
絶縁基板及び導体パターン上に形成された平滑な絶縁樹
脂層と、前記絶縁樹脂層に形成された開口部を備え、前
記開口部の下側は接続端子パターンが露出し、かつ前記
接続端子パターンの上面は前記絶縁樹脂層表面よりも低
い位置に形成されていることを特徴とするプリント配線
板。1. A smooth insulating resin layer having a conductor pattern on an insulating substrate and formed on the insulating substrate and the conductor pattern, and an opening formed in the insulating resin layer. A printed wiring board, wherein the connection terminal pattern is exposed on the lower side, and the upper surface of the connection terminal pattern is formed at a position lower than the surface of the insulating resin layer.
いることを特徴とする請求項1に記載のプリント配線
板。2. The printed wiring board according to claim 1, wherein the connection terminal pattern is partially exposed.
とする請求項1に記載のプリント配線板。3. The printed wiring board according to claim 1, wherein an inclination is provided at an edge of the opening.
請求項3に記載のプリント配線板。4. The printed wiring board according to claim 3, wherein the slope has an inverted conical shape.
ケルおよび金めっき層が形成されていることを特徴とす
る請求項1に記載のプリント配線板。5. The printed wiring board according to claim 1, wherein a nickel and gold plating layer is formed on the surface of the conductor pattern for the connection terminal.
ターンは無電解銅めっきで構成され、絶縁樹脂層はめっ
きレジストとして用いられたものであることを特徴とす
る請求項1に記載のプリント配線板。6. The print according to claim 1, wherein the insulating substrate is a substrate containing a catalyst, the conductor pattern is formed by electroless copper plating, and the insulating resin layer is used as a plating resist. Wiring board.
に絶縁樹脂層を形成する工程と、前記絶縁樹脂層を導体
パターンの表面が露出するまで平滑に研磨し開口部を形
成する工程と、露出した導体パターン上面を所定の深さ
までエッチングする工程を有するプリント配線板の製造
方法。7. A step of forming an insulating resin layer on the entire surface of an insulating substrate having a conductor pattern, a step of smoothly polishing the insulating resin layer until the surface of the conductor pattern is exposed, and forming an opening. Of manufacturing the printed wiring board having a step of etching the upper surface of the conductor pattern to a predetermined depth.
までエッチングした後、前記導体パターン表面にニッケ
ルめっき層及び金めっき層を形成する工程を備えた請求
項7に記載のプリント配線板の製造方法。8. The method of manufacturing a printed wiring board according to claim 7, further comprising a step of forming a nickel plating layer and a gold plating layer on the surface of the conductor pattern after etching the exposed upper surface of the conductor pattern to a predetermined depth. .
っき層の厚みの和より大であることを特徴とする請求項
8に記載のプリント配線板の製造方法。9. The method of manufacturing a printed wiring board according to claim 8, wherein the predetermined depth is larger than the sum of the thicknesses of the nickel plating layer and the gold plating layer.
さまでエッチングした後、絶縁樹脂層の開口部の縁端に
傾斜を設ける工程を備えたことを特徴とする請求項7に
記載のプリント配線板の製造方法。10. The printed wiring board according to claim 7, further comprising a step of forming a slope on the edge of the opening of the insulating resin layer after etching the exposed upper surface of the conductor pattern to a predetermined depth. Manufacturing method.
て、酸化アルミニウムまたは炭化ケイ素を研磨材として
用い、前記研磨材の研磨粒の大きさは#400〜#25
00であることを特徴とする請求項10に記載のプリン
ト配線板の製造方法。11. The step of providing an inclination is buffing, wherein aluminum oxide or silicon carbide is used as an abrasive, and the abrasive grains have a size of # 400 to # 25.
The method for manufacturing a printed wiring board according to claim 10, wherein the method is 00.
を形成する工程と、前記めっきレジストの非形成部に無
電解銅めっきにより導体パターンを形成する工程と、前
記導体パターンの上面が露出しかつ平坦になる深さまで
前記めっきレジストと導体パターンを研磨する工程と、
露出した導体パターン上面を所定の深さまでエッチング
する工程を有するプリント配線板の製造方法。12. A step of forming a plating resist on an insulating substrate containing a catalyst, a step of forming a conductive pattern by electroless copper plating on a portion where the plating resist is not formed, and an upper surface of the conductive pattern is exposed and flat. A step of polishing the plating resist and the conductor pattern to a depth of
A method of manufacturing a printed wiring board, comprising a step of etching the exposed upper surface of a conductor pattern to a predetermined depth.
端子パターンに、凸状の接続電極を有する電子部品の前
記接続電極を接触させ、前記電子部品を加圧することに
よって前記接続端子パターンと接続電極を電気的に接合
することを特徴とする電子部品の実装方法。13. The connection terminal pattern of the printed wiring board according to claim 1, the connection electrode of an electronic component having a convex connection electrode is brought into contact with the connection terminal pattern, and the electronic component is pressed to connect to the connection terminal pattern. A method for mounting an electronic component, which comprises electrically connecting electrodes.
端子パターンと、凸状の接続電極を有する電子部品の前
記接続電極を電気的に接合する工程と、前記プリント配
線板と前記電子部品との隙間に封止樹脂を介在させる工
程を有する電子部品の実装方法。14. A step of electrically connecting the connection terminal pattern of the printed wiring board according to claim 1 and the connection electrode of an electronic component having a convex connection electrode, the printed wiring board and the electronic component. An electronic component mounting method including a step of interposing a sealing resin in the gap.
するプリント配線板上の前記接続端子パターン上または
その近傍に硬化性樹脂を配置する工程と、前記接続端子
パターンに、凸状の接続電極を有する電子部品の前記接
続電極を接触させる工程と、前記硬化性樹脂を硬化する
工程を有する電子部品の実装方法。15. A step of disposing a curable resin on or in the vicinity of the connection terminal pattern on the printed wiring board having the connection terminal pattern according to claim 1, and a convex connection electrode on the connection terminal pattern. A method of mounting an electronic component, comprising: a step of bringing the connecting electrode of the electronic component into contact; and a step of curing the curable resin.
端子パターンと、電子部品の接続電極をはんだ、または
はんだボールを溶融して電気的に接合することを特徴と
する電子部品の実装方法。16. A method of mounting an electronic component, which comprises electrically connecting a connecting terminal pattern of the printed wiring board according to claim 1 and a connecting electrode of an electronic component by soldering or melting a solder ball.
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Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001324721A JP2003133711A (en) | 2001-10-23 | 2001-10-23 | Printed-wiring board and manufacturing method thereof, and packaging method of electronic component |
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