JP2003133587A - Light emitting diode - Google Patents

Light emitting diode

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Publication number
JP2003133587A
JP2003133587A JP2001331139A JP2001331139A JP2003133587A JP 2003133587 A JP2003133587 A JP 2003133587A JP 2001331139 A JP2001331139 A JP 2001331139A JP 2001331139 A JP2001331139 A JP 2001331139A JP 2003133587 A JP2003133587 A JP 2003133587A
Authority
JP
Japan
Prior art keywords
emitting diode
light emitting
crystal substrate
semiconductor layer
single crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001331139A
Other languages
Japanese (ja)
Inventor
Chiaki Domoto
千秋 堂本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2001331139A priority Critical patent/JP2003133587A/en
Publication of JP2003133587A publication Critical patent/JP2003133587A/en
Pending legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a light emitting diode of high luminance capable of improving light take-out efficiency. SOLUTION: The light emitting diode is composed by successively stacking a one-conductivity type semiconductor layer 2 and an opposite-conductivity type semiconductor layer 3 on one main surface of a single crystal substrate 1, attaching one electrode 4 on the opposite-conductivity type semiconductor layer 3 and attaching the other electrode 5 composed of metal on the other main surface of the single crystal substrate 1. On the other main surface of the single crystal substrate 1, a number of recesses 6 whose cross sectional shapes are roughly V-shaped are formed at the density of 400 pieces/mm<2> to 40,000 pieces/mm<2> , for instance.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、プリンタ用光源、
DVD記録用光源、リモコン用光源、照明用光源、交通
信号機、ディスプレイ、インジケータ等の発光デバイス
として用いられる発光ダイオードに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light source for a printer,
The present invention relates to a light emitting diode used as a light emitting device such as a DVD recording light source, a remote control light source, an illumination light source, a traffic signal, a display, and an indicator.

【0002】[0002]

【従来の技術】従来より、LED(Light Emitting Dio
de)アレイヘッド等のプリンタ用光源として発光ダイオ
ードが用いられている。
2. Description of the Related Art Conventionally, LEDs (Light Emitting Dio)
de) A light emitting diode is used as a light source for a printer such as an array head.

【0003】かかる従来の発光ダイオードとしては、例
えば、図2に示す如く、GaAs等から成る単結晶基板
11の一主面に、n型半導体層12とp型半導体層13
とを順次、エピタキシャル成長させて、この両者間にp
n接合を形成するとともに、前記p型半導体層13の上
面に一方の電極14を部分的に設け、また単結晶基板1
1の他主面に他方の電極15を形成した構造のものが知
られており、両電極間に所定の電力を印加して、n型半
導体層12中の電子とp型半導体層13中の正孔とをp
n接合付近で再結合させるとともに、該結合に伴って生
じたエネルギーを光に変換し、得られた光をp型半導体
層13の上面を介して外部へ放出させることによって発
光ダイオードとして機能する。
As such a conventional light emitting diode, for example, as shown in FIG. 2, an n-type semiconductor layer 12 and a p-type semiconductor layer 13 are provided on one main surface of a single crystal substrate 11 made of GaAs or the like.
And are sequentially grown epitaxially and p
While forming an n-junction, one electrode 14 is partially provided on the upper surface of the p-type semiconductor layer 13, and the single crystal substrate 1
There is known a structure in which the other electrode 15 is formed on the other main surface of 1, and electrons in the n-type semiconductor layer 12 and p-type semiconductor layer 13 in the n-type semiconductor layer 12 are applied by applying a predetermined power between the two electrodes. Holes and p
It functions as a light emitting diode by recombining near the n-junction, converting the energy generated by the coupling into light, and emitting the obtained light to the outside through the upper surface of the p-type semiconductor layer 13.

【0004】[0004]

【発明か解決しようとする課題】しかしながら、上述し
た従来の発光ダイオードを発光させた際、pn接合付近
で発生した光は、その全てが発光ダイオードの真上に出
射されるわけでなく、一部の光は下方に向かうようにな
っている。このような光の一部は、他方の電極との界面
で反射されて、発光ダイオードの上面より斜めに出射し
たり、或いは、内部で反射を繰り返すうちに吸収されて
しまったりすることから、その分、輝度が低下すること
となり、所望する特性を得ることが不可になるという欠
点を有していた。
However, when the conventional light emitting diode described above is caused to emit light, not all the light generated in the vicinity of the pn junction is emitted directly above the light emitting diode. Light is directed downward. Some of such light is reflected at the interface with the other electrode and is emitted obliquely from the upper surface of the light emitting diode, or is absorbed while repeating reflection inside, so that As a result, the brightness is lowered and it is impossible to obtain desired characteristics.

【0005】そこで上記欠点を解消するために、単結晶
基板とn型半導体層との間にDBR(Distibuted Bragg
Reflector)と呼ばれる光反射用の多層膜を介在させ、
この多層膜で光を上方へ反射させることにより、光の取
り出し効率を向上させることが提案されている。
Therefore, in order to solve the above-mentioned drawback, a DBR (Distibuted Bragg) is provided between the single crystal substrate and the n-type semiconductor layer.
Interposing a multilayer film for light reflection called Reflector),
It has been proposed to improve the light extraction efficiency by reflecting light upward with this multilayer film.

【0006】しかしながら、上記多層膜は、その膜面に
対して垂直に入射する光の反射率が最適化されるように
形成したものであって、発光ダイオードを発光させた場
合、多層膜に対して斜めに入射する光は殆ど反射されな
くなっている。それ故、多層膜に対して斜めに入射する
光の多くが多層膜を透過してしまうこととなり、これら
の透過光を輝度の向上に供することができないという不
都合があった。
However, the above-mentioned multilayer film is formed so that the reflectance of light incident perpendicularly to the film surface is optimized, and when the light emitting diode is made to emit light, The light that is obliquely incident is almost not reflected. Therefore, most of the light obliquely incident on the multilayer film is transmitted through the multilayer film, and there is a disadvantage that these transmitted lights cannot be used for improving the brightness.

【0007】本発明は上記欠点に鑑み案出されたもの
で、その目的は、光の取り出し効率を向上させることが
可能な高輝度の発光ダイオードを提供することにある。
The present invention has been devised in view of the above-mentioned drawbacks, and an object thereof is to provide a high-luminance light emitting diode capable of improving the light extraction efficiency.

【0008】[0008]

【課題を解決するための手段】本発明の発光ダイオード
は、単結晶基板の一主面に一導電型半導体層及び逆導電
型半導体層を順次積層するとともに、該逆導電型半導体
層上に一方の電極を、前記単結晶基板の他主面に金属か
ら成る他方の電極を被着させてなる発光ダイオードにお
いて、前記単結晶基板の他主面に、断面形状が略V字状
の凹部を多数、形成したことを特徴とするものである。
A light emitting diode according to the present invention comprises a single crystal substrate, a semiconductor layer of one conductivity type and a semiconductor layer of opposite conductivity type, which are sequentially laminated on one main surface of the single crystal substrate, and one layer of semiconductor layer on the opposite conductivity type. In the light emitting diode in which the other electrode made of metal is adhered to the other main surface of the single crystal substrate, the other main surface of the single crystal substrate has a large number of recesses having a substantially V-shaped cross section. , Is formed.

【0009】また本発明の発光ダイオードは、前記一導
電型半導体層−逆導電型半導体層の界面近傍で発生する
光の波長が850nm〜950nmであることを特徴と
するものである。
The light emitting diode of the present invention is characterized in that the wavelength of light generated near the interface between the one conductivity type semiconductor layer and the opposite conductivity type semiconductor layer is 850 nm to 950 nm.

【0010】更に本発明の発光ダイオードは、前記他方
の電極の一部が単結晶基板他主面の凹部内に充填されて
いることを特徴とするものである。
Further, the light emitting diode of the present invention is characterized in that a part of the other electrode is filled in a concave portion of the other main surface of the single crystal substrate.

【0011】また更に本発明の発光ダイオードは、前記
単結晶基板の他主面の面方位が、(100)面と合致、
もしくは、(100)面をX°(0<X≦5)だけ傾斜
させて設定されることを特徴とするものである。
Furthermore, in the light emitting diode of the present invention, the plane orientation of the other main surface of the single crystal substrate matches the (100) plane,
Alternatively, it is characterized in that the (100) plane is tilted by X ° (0 <X ≦ 5).

【0012】更にまた本発明の発光ダイオードは、前記
凹部の底角θが60°〜80°、開口幅wが5μm〜5
0μmに設定されていることを特徴とするものである。
Furthermore, in the light emitting diode of the present invention, the base angle θ of the recess is 60 ° to 80 °, and the opening width w is 5 μm to 5 °.
It is characterized by being set to 0 μm.

【0013】また更に本発明の発光ダイオードは、前記
凹部が単結晶基板の他主面に20本/mm〜200本/
mmの密度でストライプ状に形成されていることを特徴
とするものである。
Still further, in the light emitting diode of the present invention, the recesses are formed on the other main surface of the single crystal substrate at 20 lines / mm to 200 lines / mm.
It is characterized in that it is formed in a stripe shape with a density of mm.

【0014】更にまた本発明の発光ダイオードは、前記
凹部が単結晶基板の他主面に400個/mm2〜400
00個/mm2の密度で形成されていることを特徴とす
るものである。
Furthermore, in the light emitting diode of the present invention, the recesses are 400 / mm 2 to 400 on the other main surface of the single crystal substrate.
It is characterized in that it is formed at a density of 00 pieces / mm 2 .

【0015】本発明の発光ダイオードによれば、pn接
合が設けられている単結晶基板の一主面とは反対側の面
(他主面)に断面V字状の凹部を多数、形成したことか
ら、発光ダイオードを発光させた際、pn接合付近で発
生した光のうち、下方に向かう光は、その多くが凹部の
内面で良好に反射され、これら反射光の多くを発光ダイ
オードの上面を介して外部へ放出させることができる。
従って、発光ダイオードの輝度が向上し、光の取り出し
効率を大幅に向上させることができる。
According to the light emitting diode of the present invention, a large number of concave portions having a V-shaped cross section are formed on the surface (other main surface) opposite to the one main surface on which the pn junction is provided. Therefore, of the light generated near the pn junction when the light emitting diode emits light, most of the light traveling downward is well reflected on the inner surface of the recess, and most of these reflected light is transmitted through the upper surface of the light emitting diode. Can be released to the outside.
Therefore, the brightness of the light emitting diode is improved, and the light extraction efficiency can be significantly improved.

【0016】また本発明の発光ダイオードによれば、他
方の電極の一部を単結晶基板他主面の凹部内に充填さ
せ、他方の電極を凹部内面に密着させておくことによ
り、他方の電極と単結晶基板との被着面積が十分に広く
確保されるようになる。従って、他方の電極を単結晶基
板の他主面に対して強固に被着させておくことができる
とともに、電極の電気抵抗(配線抵抗)を小さく抑え、
発光ダイオードに供給される電力の損失を低減すること
もできる。
Further, according to the light emitting diode of the present invention, a part of the other electrode is filled in the recess of the other main surface of the single crystal substrate, and the other electrode is brought into close contact with the inner surface of the recess, whereby the other electrode As a result, a sufficiently large area can be secured to the single crystal substrate. Therefore, the other electrode can be firmly adhered to the other main surface of the single crystal substrate, and the electric resistance (wiring resistance) of the electrode can be suppressed to be small.
It is also possible to reduce the loss of power supplied to the light emitting diode.

【0017】更に本発明の発光ダイオードによれば、単
結晶基板の他主面の面方位を、(100)面と合致させ
るか、もしくは、(100)面をX°(0<X≦5)だ
け傾斜させるように設定することで、上述した凹部を従
来周知の異方性エッチング等によって簡単に形成するこ
とができ、発光ダイオードの生産性が高く維持される利
点もある。
Further, according to the light emitting diode of the present invention, the plane orientation of the other main surface of the single crystal substrate is made to coincide with the (100) plane, or the (100) plane is X ° (0 <X ≦ 5). By setting so as to incline only, it is possible to easily form the above-mentioned concave portion by conventionally well-known anisotropic etching or the like, and there is also an advantage that the productivity of the light emitting diode is kept high.

【0018】[0018]

【発明の実施の形態】以下、本発明を添付図面に基づい
て詳細に説明する。図1は本発明の一実施形態に係る発
光ダイオードの断面図であり、図中の1は単結晶基板、
2は一導電型半導体層としてのn型半導体層、3は逆導
電型半導体層としてのp型半導体層、4は一方の電極、
5は他方の電極、6は単結晶基板に設けた凹部である。
DETAILED DESCRIPTION OF THE INVENTION The present invention will be described below in detail with reference to the accompanying drawings. FIG. 1 is a sectional view of a light emitting diode according to an embodiment of the present invention, in which 1 is a single crystal substrate,
2 is an n-type semiconductor layer as one conductivity type semiconductor layer, 3 is a p-type semiconductor layer as an opposite conductivity type semiconductor layer, 4 is one electrode,
Reference numeral 5 is the other electrode, and 6 is a recess provided in the single crystal substrate.

【0019】前記単結晶基板1の材質としては、例えば
n型GaAs等の化合物半導体が用いられ、かかる単結
晶基板1の一主面にはn型半導体層2、p型半導体層3
及び一方の電極4が、他主面には他方の電極5が設けら
れ、これらを支持する支持母材として機能する。
As the material of the single crystal substrate 1, for example, a compound semiconductor such as n-type GaAs is used, and the n-type semiconductor layer 2 and the p-type semiconductor layer 3 are formed on one main surface of the single crystal substrate 1.
One electrode 4 and the other electrode 5 are provided on the other main surface, and function as a support base material that supports these.

【0020】また前記単結晶基板1は、他主面の面方位
が(100)面と合致、もしくは、(100)面をX°
(0<X≦5)だけ傾斜させて形成されており、該他主
面には、断面略V字状の凹部6が、例えば、400個/
mm2〜40000個/mm2の密度でマトリクス状もし
くはランダムに多数、形成されている。
In addition, in the single crystal substrate 1, the plane orientation of the other principal plane matches the (100) plane, or the (100) plane is X °.
It is formed to be inclined by (0 <X ≦ 5), and the other main surface has, for example, 400 recesses 6 each having a substantially V-shaped cross section.
A large number are formed in a matrix or randomly at a density of mm 2 to 40,000 / mm 2 .

【0021】これらのV字状凹部6は、各々の底角θが
例えば60°〜80°に、開口幅wが例えば5μm〜5
0μmの範囲内に設定され、その内部には後述する他方
の電極5の一部が充填され、凹部内面に照射される光を
上方(単結晶基板1の一主面側)に反射させる作用を為
す。
These V-shaped recesses 6 have a base angle θ of, for example, 60 ° to 80 ° and an opening width w of, for example, 5 μm to 5 μm.
It is set within the range of 0 μm, and a part of the other electrode 5 described later is filled therein, and has an action of reflecting the light irradiated to the inner surface of the recess upward (on the one main surface side of the single crystal substrate 1). Do

【0022】このような単結晶基板1は、GaAsから
成る場合、従来周知のバーチカル・ブリッジマン法(V
B法)等によって形成したGaAsのインゴット(塊)
を所定厚みにスライスし、表面研磨することによってG
aAs製の板体を形成し、得られた板体の他主面に従来
周知のフォトエッチングを採用し、断面V字状の凹部6
を所定の密度で多数、形成することによって製作され
る。
When such a single crystal substrate 1 is made of GaAs, the well-known vertical Bridgman method (V
GaAs ingot (lump) formed by the B method)
Is sliced to a specified thickness and the surface is ground to G
A plate made of aAs is formed, and conventionally well-known photo-etching is applied to the other main surface of the obtained plate, and a concave portion 6 having a V-shaped cross section is formed.
It is manufactured by forming a large number at a predetermined density.

【0023】この場合、単結晶基板1の他主面の面方位
は、(100)面と合致、もしくは、(100)面をX
°(0<X≦5)だけ傾斜させるように設定されている
ため、従来周知の異方性エッチング等を採用して凹部6
を形成すれば、極めて簡単かつ高精度に凹部6を形成す
ることができるようになり、発光ダイオードの生産性が
高く維持される。
In this case, the plane orientation of the other main surface of the single crystal substrate 1 coincides with the (100) plane, or the (100) plane is X-oriented.
Since it is set to be inclined by 0 (0 <X ≦ 5), the well-known anisotropic etching or the like is used to form the recess 6
By forming the above, the concave portion 6 can be formed extremely easily and highly accurately, and the productivity of the light emitting diode can be kept high.

【0024】尚、前記凹部6の開口幅が、5μmよりも
小さいと、pn接合付近で発生する光を上方に向かって
十分に反射させることが難しくなり、開口幅が50μm
を超えると、凹部6が深くなりすぎて、搬送時の振動等
によって単結晶基板1に割れを生じる恐れがある。従っ
て、凹部6の開口幅は5μm〜50μmに設定しておく
ことが好ましい。
If the opening width of the recess 6 is smaller than 5 μm, it becomes difficult to sufficiently reflect the light generated near the pn junction upward, and the opening width is 50 μm.
When it exceeds, the concave portion 6 becomes too deep, and the single crystal substrate 1 may be cracked due to vibration during transportation. Therefore, it is preferable to set the opening width of the recess 6 to 5 μm to 50 μm.

【0025】また前記単結晶基板1の一主面に順次、設
けられているn型半導体層2及びp型半導体層3は、い
ずれもGaAs系の化合物半導体、具体的には、GaA
sやAlGaAs,InGaAs,InXAlYGa
1-X-YAs等によって形成され、これらの半導体層3,
4には、キャリア(電子,正孔)を発生させるための不
純物が所定の濃度でドーピングされている。
The n-type semiconductor layer 2 and the p-type semiconductor layer 3 which are sequentially provided on one main surface of the single crystal substrate 1 are both GaAs type compound semiconductors, specifically, GaA.
s, AlGaAs, InGaAs, In X Al Y Ga
1-XY As and the like, these semiconductor layers 3,
4 is doped with impurities for generating carriers (electrons, holes) at a predetermined concentration.

【0026】例えば、n型半導体層2にはSi(珪素)
が2×1018個/cm3〜5×101 8個/cm3の密度
で、p型半導体層3にはZn(亜鉛)が2×1018個/
cm3〜5×1018個/cm3の密度でそれぞれドーピン
グされ、このような半導体層間2−3にpn接合が形成
されている。
For example, the n-type semiconductor layer 2 is made of Si (silicon).
There 2 × 10 18 atoms / cm 3 to 5 at a density of × 10 1 8 atoms / cm 3, the p-type semiconductor layer 3 Zn (zinc) is 2 × 10 18 atoms /
Each is doped at a density of cm 3 to 5 × 10 18 pieces / cm 3 , and a pn junction is formed between the semiconductor layers 2-3.

【0027】従って、後述する一方の電極4と他方の電
極5との間に所定の電力が印加されると、n型半導体層
2中に電子が、p型半導体層3中に正孔がそれぞれ注入
され、これらの電子と正孔とをpn接合付近で再結合さ
せることによって発光ダイオードが発光する。
Therefore, when a predetermined electric power is applied between one electrode 4 and the other electrode 5 which will be described later, electrons in the n-type semiconductor layer 2 and holes in the p-type semiconductor layer 3 respectively. The light-emitting diode emits light by injecting and recombining these electrons and holes near the pn junction.

【0028】尚、上述したn型半導体層2やp型半導体
層3は、例えば、従来周知のMOCVD法(Metal Orga
nic Chemical Vapor Deposition)法等を採用し、Al
GaAs等のGaAs系単結晶薄膜を単結晶基板1の一
主面上に順次、エピタキシャル成長させることによって
形成され、各半導体層2,3には同時にSiやZn等の
不純物が所定量だけドーピングされる。また、このよう
な薄膜形成プロセスにおいては、トリメチルガリウム
(TMG)、トリメチルアルミニウム(TMA)、アル
シン(AsH3)等が原料として用いられる。
The n-type semiconductor layer 2 and the p-type semiconductor layer 3 described above are formed by, for example, the well-known MOCVD method (Metal Orga).
nic Chemical Vapor Deposition) method, etc.
It is formed by sequentially epitaxially growing a GaAs single crystal thin film such as GaAs on one main surface of the single crystal substrate 1, and the semiconductor layers 2 and 3 are simultaneously doped with a predetermined amount of impurities such as Si and Zn. . Further, in such a thin film forming process, trimethylgallium (TMG), trimethylaluminum (TMA), arsine (AsH3) and the like are used as raw materials.

【0029】そして上述したp型半導体層3の上面には
一方の電極4が部分的に設けられ、単結晶基板1の他主
面には他方の電極5が、その一部を凹部6内に充填させ
た状態で被着・形成される。
One electrode 4 is partially provided on the upper surface of the p-type semiconductor layer 3 described above, and the other electrode 5 is provided on the other main surface of the single crystal substrate 1, and a part thereof is placed in the recess 6. It is deposited and formed in the filled state.

【0030】前記電極4,5は、p型半導体層3、単結
晶基板1にそれぞれオーミック接続されており、この両
電極4,5を介して先に述べた半導体層2,3に例えば
100A/cm2以上の電流密度で電流を流すと、n型
半導体層2中に電子が、p型半導体層3中に正孔が注入
され、この両者をpn接合付近で再結合させることによ
って発光ダイオードが例えば波長850nm〜950n
mの光(赤外線)を発生する。
The electrodes 4 and 5 are respectively ohmic-connected to the p-type semiconductor layer 3 and the single crystal substrate 1, and the semiconductor layers 2 and 3 described above are connected to the semiconductor layers 2 and 3 through the electrodes 4 and 5, for example, at 100 A / A. When a current is applied at a current density of cm 2 or more, electrons are injected into the n-type semiconductor layer 2 and holes are injected into the p-type semiconductor layer 3, and the two are recombined in the vicinity of the pn junction to form a light emitting diode. For example, a wavelength of 850 nm to 950 n
Generates m light (infrared rays).

【0031】このとき、単結晶基板1の他主面には、前
述したように断面V字状の凹部6が多数、形成されてお
り、pn接合付近で発生した光のうち、下方に向かう光
は、その多くが凹部6の内面で上方(単結晶基板1の一
主面側)に向かって良好に反射されるため、これら反射
光の多くを発光ダイオードの上面を介して外部へ放出さ
せることができ、発光ダイオードの輝度を向上させて、
光の取り出し効率を大幅に改善することができる。
At this time, a large number of concave portions 6 having a V-shaped cross section are formed on the other main surface of the single crystal substrate 1 as described above, and of the light generated in the vicinity of the pn junction, light directed downward. Since most of them are well reflected upward on the inner surface of the recess 6 (on the one main surface side of the single crystal substrate 1), most of these reflected lights should be emitted to the outside through the upper surface of the light emitting diode. And improve the brightness of the light emitting diode,
The light extraction efficiency can be significantly improved.

【0032】またこの場合、単結晶基板1の他主面に被
着させてある他方の電極5は、その一部が凹部6内に充
填され、凹部内面に密着させてあるため、他方の電極6
と単結晶基板1との被着面積は十分に広く確保されてお
り、他方の電極5を単結晶基板1の他主面に対して強固
に被着させておくことができるとともに、電極5の電気
抵抗(配線抵抗)を小さく抑え、発光ダイオードに供給
される電力の損失を低減することもできる。
In this case, the other electrode 5 adhered to the other main surface of the single crystal substrate 1 is partially filled in the recess 6 and closely adhered to the inner surface of the recess, so that the other electrode 5 6
The adhesion area between the single crystal substrate 1 and the single crystal substrate 1 is sufficiently wide so that the other electrode 5 can be firmly adhered to the other main surface of the single crystal substrate 1 and It is also possible to suppress the electric resistance (wiring resistance) to be small and reduce the loss of the power supplied to the light emitting diode.

【0033】このような一方の電極4や他方の電極5
は、例えばCr(クロム)とAuGe(金・ゲルマニウ
ム合金)とAu(金)とを順次積層した3層構造の積層
体(厚み:0.3μm〜0.6μm)により形成されて
おり、かかる導電材料を従来周知のスパッタリングや真
空蒸着等によって所定厚みに被着させ、これを従来周知
のフォトリソグラフィー及びエッチング等にて微細加工
することにより所定パターンに形成される。
Such one electrode 4 and the other electrode 5
Is formed of, for example, a laminated body (thickness: 0.3 μm to 0.6 μm) having a three-layer structure in which Cr (chromium), AuGe (gold / germanium alloy), and Au (gold) are sequentially laminated. The material is deposited to have a predetermined thickness by conventionally known sputtering, vacuum evaporation, or the like, and finely processed by conventionally well-known photolithography, etching, or the like to form a predetermined pattern.

【0034】尚、本発明は上述の実施形態に限定される
ものではなく、本発明の要旨を逸脱しない範囲において
種々の変更、改良等が可能である。
The present invention is not limited to the above-mentioned embodiments, and various changes and improvements can be made without departing from the gist of the present invention.

【0035】例えば上述の実施形態においては、単結晶
基板1をn型のGaAsで形成するようにしたが、これ
に代えて、単結晶基板1をGaP、GaN、InP、I
nAs等の他の化合物半導体で形成するようにしても構
わない。
For example, in the above-mentioned embodiment, the single crystal substrate 1 is formed of n-type GaAs, but instead of this, the single crystal substrate 1 is GaP, GaN, InP, I.
It may be made of other compound semiconductor such as nAs.

【0036】また上述の実施形態においては、凹部6を
単結晶基板1の他主面に400個/mm2〜40000
個/mm2の密度でマトリクス状もしくはランダムに多
数、形成するようにしたが、これに代えて、V溝状の凹
部6を20本/mm〜200本/mmの密度(ピッチ)
でストライプ状に形成するようにしても構わない。
Further, in the above-described embodiment, the recesses 6 are formed on the other main surface of the single crystal substrate 1 at 400 / mm 2 to 40,000.
Although a large number are formed in a matrix or randomly at a density of pcs / mm 2 , instead of this, the V-groove shaped recesses 6 have a density (pitch) of 20 pcs / mm to 200 pcs / mm.
It may be formed in a stripe shape.

【0037】更に上述の実施形態において、n型半導体
層2とp型半導体層3との間に同種の化合物半導体から
成る活性層を介在させたり、或いは、p型半導体層3に
対する電極4のオーミック接続を良好となすためにp型
半導体層3−電極4間にGaAs系の化合物半導体から
成るコンタクト層を介在させるようにしても構わない。
Further, in the above-described embodiment, an active layer made of the same kind of compound semiconductor is interposed between the n-type semiconductor layer 2 and the p-type semiconductor layer 3, or the ohmic contact of the electrode 4 with respect to the p-type semiconductor layer 3 is performed. A contact layer made of a GaAs-based compound semiconductor may be interposed between the p-type semiconductor layer 3 and the electrode 4 for good connection.

【0038】また更に上述の実施形態においては、半導
体層2,3を単結晶基板1上にエピタキシャル成長させ
るのにMOCVD法を採用するようにしたが、これ以外
の方法、例えばMBE(Molecular Beam Epitaxy)法等
により半導体層2,3を単結晶基板1上にエピタキシャ
ル成長させるようにしても構わない。
Furthermore, in the above-mentioned embodiment, the MOCVD method is adopted to epitaxially grow the semiconductor layers 2 and 3 on the single crystal substrate 1, but other methods such as MBE (Molecular Beam Epitaxy) are used. The semiconductor layers 2 and 3 may be epitaxially grown on the single crystal substrate 1 by a method or the like.

【0039】更にまた上述の実施形態においては、一導
電型半導体層としてn型半導体層2を、逆導電型半導体
層としてp型半導体層3を用いるようにしたが、その反
対、即ち、一導電型半導体層としてp型半導体層を、逆
導電型半導体層としてn型半導体層を用いるようにして
も構わない。
Furthermore, in the above-described embodiment, the n-type semiconductor layer 2 is used as the one conductivity type semiconductor layer and the p-type semiconductor layer 3 is used as the opposite conductivity type semiconductor layer. A p-type semiconductor layer may be used as the type semiconductor layer and an n-type semiconductor layer may be used as the opposite conductivity type semiconductor layer.

【0040】また更に上述の実施形態において、n型半
導体層2やp型半導体層3,電極4等の表面を酸化シリ
コン等から成る透明な保護膜で被覆しても良いことは言
うまでもない。
Furthermore, it goes without saying that the surfaces of the n-type semiconductor layer 2, the p-type semiconductor layer 3, the electrodes 4 and the like may be covered with a transparent protective film made of silicon oxide or the like in the above-mentioned embodiments.

【0041】[0041]

【発明の効果】本発明の発光ダイオードによれば、pn
接合が設けられている単結晶基板の一主面とは反対側の
面(他主面)に断面V字状の凹部を多数、形成したこと
から、発光ダイオードを発光させた際、pn接合付近で
発生した光のうち、下方に向かう光は、その多くが凹部
の内面で良好に反射され、これら反射光の多くを発光ダ
イオードの上面を介して外部へ放出させることができ
る。従って、発光ダイオードの輝度が向上し、光の取り
出し効率を大幅に向上させることができる。
According to the light emitting diode of the present invention, the pn
Since a large number of concave portions having a V-shaped cross section were formed on the surface (other main surface) opposite to the main surface of the single crystal substrate on which the junction was provided, when the light emitting diode was caused to emit light, the vicinity of the pn junction was observed. Of the light generated in (2), most of the light traveling downward is well reflected by the inner surface of the recess, and most of these reflected light can be emitted to the outside through the upper surface of the light emitting diode. Therefore, the brightness of the light emitting diode is improved, and the light extraction efficiency can be significantly improved.

【0042】また本発明の発光ダイオードによれば、他
方の電極の一部を単結晶基板他主面の凹部内に充填さ
せ、他方の電極を凹部内面に密着させておくことによ
り、他方の電極と単結晶基板との被着面積が十分に広く
確保されるようになる。従って、他方の電極を単結晶基
板の他主面に対して強固に被着させておくことができる
とともに、電極の電気抵抗(配線抵抗)を小さく抑え、
発光ダイオードに供給される電力の損失を低減すること
もできる。
Further, according to the light emitting diode of the present invention, a part of the other electrode is filled in the concave portion of the other main surface of the single crystal substrate, and the other electrode is brought into close contact with the inner surface of the concave portion, so that the other electrode As a result, a sufficiently large area can be secured to the single crystal substrate. Therefore, the other electrode can be firmly adhered to the other main surface of the single crystal substrate, and the electric resistance (wiring resistance) of the electrode can be suppressed to be small.
It is also possible to reduce the loss of power supplied to the light emitting diode.

【0043】更に本発明の発光ダイオードによれば、単
結晶基板の他主面の面方位を、(100)面と合致させ
るか、もしくは、(100)面をX°(0<X≦5)だ
け傾斜させるように設定することで、上述した凹部を従
来周知の異方性エッチング等によって簡単に形成するこ
とができ、発光ダイオードの生産性が高く維持される利
点もある。
Further, according to the light emitting diode of the present invention, the plane orientation of the other main surface of the single crystal substrate is made to coincide with the (100) plane, or the (100) plane is X ° (0 <X ≦ 5). By setting so as to incline only, it is possible to easily form the above-mentioned concave portion by conventionally well-known anisotropic etching or the like, and there is also an advantage that the productivity of the light emitting diode is kept high.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施形態に係る発光ダイオードの断
面図である。
FIG. 1 is a cross-sectional view of a light emitting diode according to an exemplary embodiment of the present invention.

【図2】従来の発光ダイオードの断面図である。FIG. 2 is a cross-sectional view of a conventional light emitting diode.

【符号の説明】[Explanation of symbols]

1・・・単結晶基板、2・・・n型半導体層、3・・・
p型半導体層、4・・・一方の電極、5・・・他方の電
極、6・・・凹部
1 ... Single crystal substrate, 2 ... N-type semiconductor layer, 3 ...
p-type semiconductor layer, 4 ... one electrode, 5 ... other electrode, 6 ... recess

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】単結晶基板の一主面に一導電型半導体層及
び逆導電型半導体層を順次積層するとともに、該逆導電
型半導体層上に一方の電極を、前記単結晶基板の他主面
に金属から成る他方の電極を被着させてなる発光ダイオ
ードにおいて、前記単結晶基板の他主面に、断面形状が
略V字状の凹部を多数、形成したことを特徴とする発光
ダイオード。
1. A single-conductivity-type semiconductor layer and a reverse-conductivity-type semiconductor layer are sequentially stacked on one main surface of a single-crystal substrate, and one electrode is provided on the opposite-conductivity-type semiconductor layer to the other main surface of the single-crystal substrate. A light-emitting diode having a surface coated with another electrode made of a metal, wherein a large number of concave portions having a substantially V-shaped cross section are formed on the other main surface of the single crystal substrate.
【請求項2】前記一導電型半導体層−逆導電型半導体層
の界面近傍で発生する光の波長が850nm〜950n
mであることを特徴とする請求項1に記載の発光ダイオ
ード。
2. The wavelength of light generated near the interface between the one conductivity type semiconductor layer and the opposite conductivity type semiconductor layer is 850 nm to 950 n.
The light emitting diode according to claim 1, wherein m is m.
【請求項3】前記他方の電極の一部が単結晶基板他主面
の凹部内に充填されていることを特徴とする請求項1ま
たは請求項2に記載の発光ダイオード。
3. The light emitting diode according to claim 1, wherein a part of the other electrode is filled in a recess in the other main surface of the single crystal substrate.
【請求項4】前記単結晶基板の他主面の面方位が、(1
00)面と合致、もしくは、(100)面をX°(0<
X≦5)だけ傾斜させて設定されることを特徴とする請
求項1乃至請求項3のいずれかに記載の発光ダイオー
ド。
4. The plane orientation of the other main surface of the single crystal substrate is (1
00 or the (100) plane at X ° (0 <
The light emitting diode according to any one of claims 1 to 3, wherein the light emitting diode is set to be inclined by X ≤ 5).
【請求項5】前記略V字状凹部の底角θが60°〜80
°、開口幅wが5μm〜50μmに設定されていること
を特徴とする請求項1乃至請求項4のいずれかに記載の
発光ダイオード。
5. The bottom angle θ of the substantially V-shaped recess is 60 ° to 80.
5. The light emitting diode according to claim 1, wherein the opening width w is set to 5 μm to 50 μm.
【請求項6】前記凹部が単結晶基板の他主面に20本/
mm〜200本/mmの密度でストライプ状に形成され
ていることを特徴とする請求項1乃至請求項5のいずれ
かに記載の発光ダイオード。
6. The number of the recesses on the other main surface of the single crystal substrate is 20 /
The light emitting diode according to any one of claims 1 to 5, wherein the light emitting diode is formed in a stripe shape with a density of mm to 200 lines / mm.
【請求項7】前記凹部が単結晶基板の他主面に400個
/mm2〜40000個/mm2の密度で形成されている
ことを特徴とする請求項1乃至請求項5のいずれかに記
載の発光ダイオード。
7. The method according to claim 1, wherein the concave portions are formed on the other main surface of the single crystal substrate at a density of 400 / mm 2 to 40,000 / mm 2. The light emitting diode described.
JP2001331139A 2001-10-29 2001-10-29 Light emitting diode Pending JP2003133587A (en)

Priority Applications (1)

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JP2001331139A JP2003133587A (en) 2001-10-29 2001-10-29 Light emitting diode

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JP2001331139A JP2003133587A (en) 2001-10-29 2001-10-29 Light emitting diode

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Publication Number Publication Date
JP2003133587A true JP2003133587A (en) 2003-05-09

Family

ID=19146761

Family Applications (1)

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Country Link
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005047718A (en) * 2003-07-28 2005-02-24 Kyocera Corp Single crystal sapphire substrate for semiconductor element, its manufacturing method, and semiconductor light-emitting device
KR100610639B1 (en) 2005-07-22 2006-08-09 삼성전기주식회사 Vertically structured gan type led device and method of manufacturing the same
JP2007287757A (en) * 2006-04-12 2007-11-01 Rohm Co Ltd Nitride semiconductor light-emitting element and its manufacturing method
US7408199B2 (en) 2004-04-02 2008-08-05 Nichia Corporation Nitride semiconductor laser device and nitride semiconductor device
JP2008277871A (en) * 2008-08-22 2008-11-13 Showa Denko Kk Led lamp

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005047718A (en) * 2003-07-28 2005-02-24 Kyocera Corp Single crystal sapphire substrate for semiconductor element, its manufacturing method, and semiconductor light-emitting device
JP4593890B2 (en) * 2003-07-28 2010-12-08 京セラ株式会社 Manufacturing method of semiconductor light emitting device
US7408199B2 (en) 2004-04-02 2008-08-05 Nichia Corporation Nitride semiconductor laser device and nitride semiconductor device
US7813397B2 (en) 2004-04-02 2010-10-12 Nichia Corporation Nitride semiconductor laser device
KR100610639B1 (en) 2005-07-22 2006-08-09 삼성전기주식회사 Vertically structured gan type led device and method of manufacturing the same
JP2007287757A (en) * 2006-04-12 2007-11-01 Rohm Co Ltd Nitride semiconductor light-emitting element and its manufacturing method
JP2008277871A (en) * 2008-08-22 2008-11-13 Showa Denko Kk Led lamp

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