JP2003133369A - Method and device for shaping metal bump - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shape the form of a metal bump which serves as a connection conductor into a drum type with a simple configuration, in relation to the shaping method/device of the metal bump. SOLUTION: Two connected semiconductor substrates 8 and 10 are fixed to a tool, which can move in a direction vertical with respect to the main faces of the substrates. When the metal bump 9, which makes joints the two semiconductor substrates 8 and 10 face and then melt, the semiconductor substrate 8 or 10 is moved in a direction of the gap between the semiconductor substrates 8 and 10 becoming large, and the metal bump 9 is enlarged and shaped by limiting the amount of movement of the tool.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a metal bump shaping method and a metal bump shaping apparatus, and
A metal bump characterized by a method for shaping the shape of a metal bump to be a connection conductor for preventing disconnection or crosstalk due to thermal fatigue caused by thermal cycles in a hybrid semiconductor device operated at liquid nitrogen temperature such as an infrared detector And a metal bump shaping device.

[0002]

2. Description of the Related Art Conventionally, as an infrared detecting device for detecting infrared rays in the vicinity of 10 μm band, a pn junction diode formed in a HgCdTe layer having a Cd composition ratio of about 0.2 is used as a photodiode. Are arranged in a one-dimensional array or a two-dimensional array, and the infrared photodiode array substrate and the Si signal processing circuit substrate are bonded by bumps of metal such as In to make electrical contact with the readout circuit. (Flip chip bonding) structure is adopted.

A conventional infrared detecting device will be described with reference to FIG. 6. FIG. 6 (a) shows an infrared photodiode array and a Si signal processing circuit board (SiROIC: Si).
FIG. 6B is a perspective view of a cutaway portion of the infrared detection device, and FIG. 6B is a perspective view of the cutaway portion of the infrared detection device.

Referring to FIGS. 6 (a) and 6 (b), this conventional infrared photodiode array 51 first uses a non-doped p-type on a CdZnTe substrate 52 in a Te-rich melt by using a closed tube chipping method. HgCd
After the Te layer 53 is grown by liquid phase epitaxial growth, Hg
By heat treatment in steam at a temperature of 200 to 400 ° C. to fill Hg vacancies with Hg atoms, p-type H
The hole concentration of the gCdTe layer 53 is 0.5 to 5 × 10 ¹⁶ cm
Control to ^-3 .

Next, alumina polishing is performed to flatten the surface and make the thickness uniform, and then p-type HgCdTe is formed.
After controlling the thickness of the layer 53 to 15 to 25 μm, B ions are selectively ion-implanted to form an n ⁺ type region 54 to form a photodiode.

Next, a ZnS surface protective film 55 is provided on the entire surface, and then the ZnS surface protective film 55 is formed in a N ₂ atmosphere at a temperature of 100 to 200 ° C.
Annealing is performed for about a time to diffuse Hg liberated from the lattice position by ion implantation, that is, Hg interstitial atoms into the p-type HgCdTe layer 53.

Next, after forming a contact hole in the ZnS surface protective film 55, In is applied to the n ⁺ type region 54.
A contact electrode 56 is provided, and an Au contact electrode 57 is provided for the sub-contact region of the p-type HgCdTe layer 53.
To provide.

Next, the Si signal processing circuit board 6 provided with the horizontal shift register 62, the vertical shift register 63 and the like.
Using the In bump 58 provided at the predetermined position of No. 1, the infrared photodiode array 51 is cold connected by pressure at room temperature (cold weld), and then heated to a temperature higher than the melting point of In and melted to bond them. The infrared detector is completed by combining them.

An infrared image is detected by irradiating infrared rays 64 in the vicinity of the 10 μm band from the back surface side of the CdZnTe substrate 52 of the infrared photodiode array 51 of this infrared detecting device.

[0010]

[Problems to be Solved by the Invention]
In an infrared detector that detects infrared rays in the vicinity of the μm band, the storage temperature is room temperature, while the temperature during use is 7
Since the temperature is near 7K (liquid nitrogen temperature), stress due to the difference in thermal expansion coefficient between HgCdTe and Si acts on the bump or chip.

In this case, if the In bump is melt-shaped by a usual method, it is spheroidized due to the surface tension during heat melting,
The In bump becomes a barrel type as shown in the figure because it solidifies while maintaining its shape even when cooled.
In the case of the type, the stress becomes maximum near the root of the bump, and particularly, the characteristics of the HgCdTe photodiode having low mechanical strength are adversely affected. For example, due to the stress acting, the In bump may be broken or may be laterally deformed to come into contact with the adjacent In bump, and the signal charge may be mixed.

That is, the shear strain due to the difference between the thermal expansion coefficients of HgCdTe and Si has a radial distribution that increases in proportion to the distance from the center when the center of the substrate is 0. When the strain is applied, the In bump 58 in the peripheral portion of the substrate is largely deformed in the lateral direction, and in the extreme case, the wire breaks.

In order to solve such a problem, it is sufficient to make the In bump high and to make the shape thereof a catenoid shape so as to reduce the thermal stress acting on the infrared photodiode array. However, there is a problem in that it is difficult to perform a minute height control of 10 μm which is equivalent to the bump size.

For example, when the bump height is controlled using a bonding device for bonding (flip chip bonder), most of the components of the device are metal, and HgCdT is used.
Since it has a coefficient of thermal expansion larger than that of semiconductors of e and Si by one digit or more, there is a problem that the amount of displacement of the device due to thermal expansion becomes equal to the amount of bump height to be controlled.

Further, even if the In bump is melted and the height is controlled again after the joining, the movement amount of the jig to be used must be controlled to be equal to the bump height, and the difficulty remains unchanged.

On the other hand, if the bump extension amount is controlled by the load instead of the jig movement amount, it becomes more difficult. That is, the In bump extends and the load range that does not break is very narrow.

Therefore, it is an object of the present invention to shape the shape of a metal bump to be a connection conductor into a drum shape with a simple structure.

[0018]

FIG. 1 is an explanatory view of the principle configuration of the present invention, and means for solving the problems in the present invention will be described with reference to FIG. In order to solve the above problems, in the present invention, in the method of shaping a metal bump 9 in which two semiconductor substrates 8 and 10 are opposed to each other and bonded, the two bonded semiconductor substrates 8 and 10 are bonded together. , Fixed to a jig that is movable in a direction perpendicular to the main surface of the substrate, and when the metal bumps 9 melt,
It is characterized in that one of the metal bumps 10 is moved in a direction in which the gap between the two semiconductor substrates 8 and 10 is opened and the movement amount of the jig is limited so that the metal bump 9 is stretched and shaped.

As described above, the semiconductor substrates 8 and 10 are formed by the simple process of moving the substrate when the metal bumps 9 are melted.
And the members constituting the jig, usually, the height of the metal bumps 9 can be accurately made constant regardless of the difference in the coefficient of thermal expansion from the metal, whereby a hybrid type semiconductor device such as an infrared detection device. The reliability of can be improved. In this case, the semiconductor substrate 8 may be moved by its own weight or a spring member that pushes or pulls the jig downward.

Further, by sandwiching the dummy substrate 6 on which the metal bumps 7 are formed, it is possible to accurately move the jig by the height of the metal bumps 7 of the molten dummy substrate 6. In this case, the height of the metal bump 9 can be accurately controlled by providing a groove that facilitates the outflow of the molten bump metal.

The present invention also provides a metal bump shaping device,
An upper block 2 for holding one of the semiconductor substrates 8 and 10 and a base block 1 for holding and fixing the dummy substrate 6 on which the metal bumps 7 are formed, and fixing the upper block 2 and the base block 1 at a constant interval. A block support member 4, and a load block 5 that is vertically movably inserted between the upper block 2 and the base block 1 and holds and fixes the other semiconductor substrate 8 on the surface facing the upper block 2. It is characterized in that it is configured.

In this case, in order to suppress the influence of thermal expansion of each member constituting the jig, all of the upper block 2, the base block 1, the block support member 4, and the load block 5 have a thermal expansion coefficient. It is desirable to use members having the same number. It is desirable that the holding means for holding the semiconductor substrate 10 in the upper block 2 is constituted by a suction means using the suction holes 3 from the viewpoint of simplifying the structure.

In this case, the block support member 4 is provided with a guide groove for vertically guiding the protrusion of the load block 5, so that the in-plane distribution of the distance between the two semiconductor substrates 8 and 10 facing each other is substantially uniform. be able to.

Alternatively, the load block 5 is constituted by a substrate fixing block for holding and fixing the other semiconductor substrate 8 and a parallelism maintaining block whose opposing surface to the substrate fixing block is a convex curved surface. The in-plane distribution of the distance between the two semiconductor substrates 8 and 10 can be made substantially uniform.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Here, a manufacturing process of an infrared detection device according to an embodiment of the present invention will be described with reference to FIGS. Referring to FIG. 2, first, a dummy chip 19 made of Si having a thickness of, for example, 400 μm in which the In bump 20 is formed on the base block 11 made of stainless steel is mounted, and the upper surface thereof has a convex curved surface. Stainless steel parallelism maintaining block 1
Place 6 gently. Then, a cylindrical block support member 14 made of stainless is covered, and the side surface is fixed to the base block 11 with a screw 15.

Then, the In bump 22 is formed by cold connection.
Si signal processing circuit chip 2 which is joined to face each other by
1 and HgCdTe photodiode array chip 23
Among them, the chip support block 17 in which the Si signal processing circuit chip 21 is held and fixed by the pair of fixing claw members 18,
It is placed on the parallelism maintaining block 16 so as not to give an impact. In this case, it is desirable to provide a recess on the upper surface of the chip support block 17 so that tweezers can be caught so that the chip support block 17 does not have to be dropped.

Next, the upper block 12 having the suction holes 13 is formed on the HgCdTe photodiode array chip 23.
After gently placing it on the top of the block support member 1 with screws 15.
4, and then the HgCdTe photodiode array chip 23 is sucked onto the upper block 12 by sucking through the suction holes 13. In this case, since the parallelism maintaining block 16 whose upper surface is a convex curved surface is used, the adsorption surface of the upper block 12 and HgCdTe are
Since the photodiode array chip 23 and the photodiode array chip 23 can be parallel to each other, they can be surely adsorbed.

See FIG. 3A. FIG. 3A is an explanatory view of the state of each chip constituting the infrared detection device in FIG. 2, and the HgCdTe photodiode array chip 23 is a p-type diode provided on a CdZnTe substrate 24. An n ⁺ type region 26 forming a photodiode is provided in the type HgCdTe layer 25, an n-side electrode 28 made of In is provided by using a protective film 27 made of a ZnS film, a CdZnTe substrate 24 and a p-type HgCdTe are provided. The combined thickness with the layer 25 is, for example, 500 μm.
Although not shown, the p-type HgCdTe layer 25
Also for p in the sub-contact region made of Au
A side electrode is formed.

On the other hand, in the Si signal processing circuit chip 21 having a thickness of, for example, 400 μm in which the horizontal shift register and the vertical register are formed, the n-side electrode 28 and the p-side electrode (not shown) of the HgCdTe photodiode array chip 23 are formed. A connection pad (not shown) is provided at a position facing (not shown), an In bump 22 is formed on the connection pad by a lift-off method, and the In bump 22 cold-connects both chips (cold weld). ing.

FIG. 3B is a perspective view of an essential part for explaining the state of the dummy chip 19. The surface of the dummy chip 19 made of Si having a thickness of, for example, 400 μm is Height is 1
In bumps 22 of 0 μm are provided and I
Around the n-bump 22, parallel grooves 29 are provided along the In-bump row.

Next, referring to FIG. 4, the jig on which the semiconductor chip is set is, for example, V
PS (Vapor Phase Soldering)
The jig is put in an apparatus, and the entire jig is uniformly heated to a temperature equal to or higher than the melting point of the In bumps 20 and 22, for example, 200 ° C. to melt the In bumps 20 and 22.

When the In bumps 20 and 22 are melted, the In bump 20 provided on the dummy chip 19 is crushed by the weight of the chip support block 17 and the parallelism maintaining block 16, and the chip support block 17 and the parallelism maintaining block are correspondingly crushed. Since 16 is lowered, the In bump 22 is stretched.

In this case, the groove 2 is formed on the surface of the dummy chip 19.
Since 9 is provided, the melted In quickly flows into the groove 29, and the amount of movement of the jig is exactly the height of the In bump 20.

[0034]

[Table 1]

In this case, since the size and the coefficient of thermal expansion of each constituent member are as shown in Table 1, the increase in the distance due to the thermal expansion at room temperature of 25 ° C. and bump melting temperature (200 ° C.) is about 2.0 μm. Therefore, the amount of bump extension is about 10 μm
It can be seen that the value becomes small and the control becomes sufficiently possible.

That is, the expansion due to the thermal expansion of the dummy chip 19, the Si signal processing circuit chip 21, and the HgCdTe photodiode array chip 23 is about 0.5 μm.
[≈ (200-25) x 3.9 x 10 ^-6 x 500 + (2
00-25) x 1.2 x 10 ^-6 x 400 x 2],
On the other hand, the dummy chip 19 of the block support member 14, Si
The elongation of the signal processing circuit chip 21 and the portion corresponding to the HgCdTe photodiode array chip 23 due to thermal expansion is about 2.5 μm [≈ (200-25) × 1.1.
× 10 ⁻⁵ × (500 + × 400 × 2)], and the difference is about 0.5 μm. Since all the jigs are made of stainless steel, the base block 11 and the parallelism maintaining block 1
6, chip support block 17, and upper block 12
The thermal expansion in the height direction is canceled by the thermal expansion of the corresponding portion of the block support member 14 made of the same stainless steel.

FIG. 5A is an explanatory view of a state of each chip constituting the infrared detection device in FIG. 4, and the In bump 22 has about 10 parts.
It is extended by μm to form a catenoid (hand drum) shape, and by cooling in this state, the hourglass-shaped In bump 22 can be formed.

FIG. 5B is a perspective view of a main part for explaining the state of the dummy chip 19, and the melted molten In 30 is the dummy chip 1.
9 flows into the groove 29 provided in the groove 9, and flows out from the end of the dummy chip 19 to the outside.

As described above, in the embodiment of the present invention, the base block 11 and the upper block 12 screwed to the cylindrical block support member 14, the tip support block 17 and the parallelism maintaining block inserted between them. 16
Since the jig is constituted by a simple structure consisting of, the Si signal processing circuit chip 21 and the HgC can be formed simply by inserting a dummy substrate provided with In bumps of a required height.
The shape of the In bump 22 connecting to the dTe photodiode array chip 23 can be made into a drum shape, which can prevent disconnection of the In bump 22 and crosstalk due to contact between the In bumps 22.

Although the embodiments of the present invention have been described above, the present invention is not limited to the configurations described in the embodiments, and various modifications can be made. For example, in the description of each embodiment, the dummy substrate is made of the same Si as the SiROIC, but it is not necessarily the same substrate, and Cd that constitutes the photodiode array is not necessarily required.
ZnTe may be used, or GaAs or other III-
A group V compound semiconductor may be used, and further, it may be formed of a metal or the like.

Further, in the above embodiment, the parallelism maintaining block and the chip supporting block are inserted between the base block and the upper block, but the parallelism maintaining block is not always necessary. If it has no parallelism and is excellent in parallelism, only the chip support block may be used as shown in the principle configuration of FIG.

Further, in the above embodiment, the parallelism maintaining block and the chip supporting block are moved naturally by their own weight, but they may be moved by using a spring member. For example, a spring extending between the base block and the chip support block may be provided and the spring may be moved by the pulling force of the spring. Alternatively, a compressed spring may be provided between the upper block and the chip support substrate and moved by the pressing force of the spring.

Further, in the above embodiment, the parallelism maintaining block and the chip support block are moved naturally, but a projection is partially provided around the chip support block and a cylindrical block support member is provided. A guide groove corresponding to the protrusion may be provided, so that the parallelism maintaining block and the chip supporting block can be smoothly moved, and furthermore, the chip supporting block can be smoothly placed during assembly. be able to.

Further, in the above embodiment, the cylindrical block support member is used, but it is not always required to be cylindrical, and for example, a pair of parallel flat plate members may be used. Alternatively, a pair of parallel plate members serving as block supporting members and a base block may be integrally configured so that each block or substrate is inserted from the lateral direction.

Further, in the above embodiment, Si
Although the ROIC is fixed by the fixing claw member, a suction hole may be provided to fix and support the ROIC by suction.

Generally, the area of SiROIC is H
Since it is larger than the gCdTe photodiode array chip, in the above-described embodiment, H on the upper block side.
Although the gCdTe photodiode array chip is fixed, if the suction support is also used in the chip support block, the SiROIC may be fixed to the upper block side.

Further, in the above-described embodiment, the metal bumps provided on the dummy substrate are formed by SiROIC and HgCdT.
Although the same metal bump as that used for joining the e photodiode array chip is formed of In, it is not necessarily the same, and a metal having a slightly higher melting point than that of the metal bump used for joining the SiROIC and the HgCdTe photodiode array chip is used. The semiconductor substrate moves together with the jig after the In bumps are completely left, so that the In bumps are not separated.

In the above embodiment, the electrodes are shaped at the chip stage, but they may be shaped at the wafer stage. In that case, CdZnT is used.
The pitch of the photodiode array chips provided on the e-wafer must be the same as the pitch of the signal processing circuit chips provided on the Si substrate.

Further, in the above-mentioned embodiment, the infrared detecting device having a large thermal fatigue due to the thermal cycle is described as an example, but the bonding method of the present invention is not limited to the infrared detecting device and various flips are used. It is applied to chip bonding, and the target hybrid type semiconductor device is not limited.

Now, referring again to FIG. 1, detailed features of the present invention will be described. See FIG. 1 (Supplementary Note 1) In a method for shaping a metal bump 9 in which two semiconductor substrates 8 and 10 are opposed to each other and bonded, the two bonded semiconductor substrates 8 and 10 are aligned in a direction perpendicular to a main surface of the substrate. It is fixed to a movable jig, and when the metal bumps 9 are melted, one of the semiconductor substrates 8 and 10 is
A method of shaping a metal bump, characterized in that the metal bump 9 is stretched and shaped by moving the gap 10 in a direction of opening and limiting the movement amount of the jig. (Supplementary Note 2) The method for shaping a metal bump according to Supplementary Note 1, wherein the semiconductor substrate 8 is moved in a direction perpendicular to the main surface by the weight of the jig. (Supplementary Note 3) The method for shaping a metal bump according to Supplementary Note 1, wherein the movement along the direction perpendicular to the main surface of the semiconductor substrate 8 is performed by a spring member that pushes or pulls the jig downward. (Supplementary Note 4) The amount of movement of the jig is limited by sandwiching the dummy substrate 6 on which the metal bumps 9 are formed in the jig and moving the jig by the height of the metal bumps 9 of the melted dummy substrate 6. The method for shaping a metal bump according to any one of appendices 1 to 3, characterized in that. (Supplementary Note 5) The metal bump according to any one of Supplementary Notes 1 to 4, wherein the dummy substrate 6 has a groove in the periphery of the metal bump 9 for flowing out the molten bump metal. Shaping method. (Supplementary Note 6) An upper block 2 for holding one semiconductor substrate 10 and a dummy substrate 6 on which metal bumps 9 are formed are held.
A fixed base block 1, a block support member 4 that fixes the upper block 2 and the base block 1 at a constant distance, and is vertically movably inserted between the upper block 2 and the base block 1, A metal bump shaping device comprising at least a load block (5) for holding and fixing the other semiconductor substrate (8) on a surface facing the upper block (2). (Supplementary Note 7) The metal bump shaping device according to Supplementary Note 6, wherein the block support member 4 has a guide groove for vertically guiding the protrusion of the load block 5. (Supplementary Note 8) The load block 5 is composed of a substrate fixing block that holds and fixes the other semiconductor substrate 8 and a parallelism maintaining block in which a surface facing the substrate fixing block is a convex curved surface. Appendix 6 characterized by
The described metal bump shaping device. (Supplementary Note 9) The metal bump shaping device according to any one of supplementary notes 6 to 8, wherein the upper block 2 has a suction mechanism that holds the one semiconductor substrate 8. (Supplementary note 10) The metal bump according to any one of supplementary notes 6 to 9, wherein the upper block, the base block, the block support member, and the load block are configured by members having the same thermal expansion coefficient. Shaping device.

[0051]

According to the present invention, since the metal bump shaping device having a simple block structure is used at the time of flip-chip bonding, the extension of the space between the SiROIC and the photodiode array substrate is extended to the dummy bump substrate. The height can be accurately controlled, and the shape of the metal bumps serving as the connecting conductors can be made into a drum shape. Therefore, a highly reliable hybrid semiconductor device without disconnection or crosstalk of the metal bumps can be provided. Can be realized.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of a principle configuration of the present invention.

FIG. 2 is an explanatory diagram of a manufacturing process up to the middle of the embodiment of the present invention.

FIG. 3 is an explanatory diagram of a state of each chip in FIG.

FIG. 4 is an explanatory diagram of the manufacturing process after FIG. 2 according to the embodiment of the present invention.

5 is an explanatory diagram of a state of each chip in FIG.

FIG. 6 is an explanatory diagram of a conventional infrared detection device.

[Explanation of symbols]

1 Base Block 2 Top Block 3 Suction Hole 4 Block Support Member 5 Load Block 6 Dummy Board 7 Metal Bump 8 Semiconductor Board 9 Metal Bump 10 Semiconductor Substrate 11 Base Block 12 Top Block 13 Suction Hole 14 Block Support Member 15 Screw 16 Parallelism Maintenance Block 17 Chip support block 18 Fixing tab member 19 Dummy chip 20 In bump 21 Si signal processing circuit chip 22 In bump 23 HgCdTe photodiode array chip 24 CdZnTe substrate 25 p-type HgCdTe layer 26 n ⁺ type region 27 protective film 28 n side Electrode 29 Groove 30 Molten In 51 Infrared photodiode array 52 CdZnTe substrate 53 p-type HgCdTe layer 54 n ⁺ type region 55 ZnS surface protective film 56 In contact electrode 57 Au contact electrode 58 In bump 61 Si signal processing circuit board 62 Horizontal shift register 63 Vertical shift register 64 Infrared

Claims (5)

[Claims] 1. A method for shaping a metal bump, in which two semiconductor substrates are opposed to each other and bonded, the two bonded semiconductor substrates are fixed to a jig movable in a direction perpendicular to a main surface of the substrates, When the metal bumps are melted, one of the semiconductor substrates is moved in a direction in which a gap between the two semiconductor substrates is opened, and the movement amount of the jig is limited so that the metal bumps are stretched and shaped. How to shape metal bumps. 2. A jig moving amount is limited by sandwiching a dummy substrate having metal bumps formed on the jig and moving the jig by the height of the metal bumps of the molten dummy substrate. The method for shaping a metal bump according to claim 1, which is characterized in that. 3. The method of shaping a metal bump according to claim 1, wherein the dummy substrate has a groove in the periphery of the metal bump, through which the molten bump metal flows out. 4. A base block that holds and fixes an upper block that holds one semiconductor substrate and a dummy substrate on which metal bumps are formed, and a block support member that fixes the upper block and the base block at a constant interval. And a load block which is vertically movably inserted between the upper block and the base block and has a load block for holding and fixing the other semiconductor substrate on a surface facing the upper block. Shaping device. 5. The load block is configured by a substrate fixing block that holds and fixes the other semiconductor substrate, and a parallelism maintaining block whose opposing surface to the substrate fixing block is a convex curved surface. Claim 4 characterized by the above-mentioned.
The described metal bump shaping device.