JP2003111432A - Method for diagnosing fault of inverter - Google Patents

Method for diagnosing fault of inverter

Info

Publication number
JP2003111432A
JP2003111432A JP2001307433A JP2001307433A JP2003111432A JP 2003111432 A JP2003111432 A JP 2003111432A JP 2001307433 A JP2001307433 A JP 2001307433A JP 2001307433 A JP2001307433 A JP 2001307433A JP 2003111432 A JP2003111432 A JP 2003111432A
Authority
JP
Japan
Prior art keywords
drive signal
circuit
semiconductor switching
inverter
state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001307433A
Other languages
Japanese (ja)
Other versions
JP3788591B2 (en
Inventor
Yoshihiro Matsumoto
吉弘 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP2001307433A priority Critical patent/JP3788591B2/en
Publication of JP2003111432A publication Critical patent/JP2003111432A/en
Application granted granted Critical
Publication of JP3788591B2 publication Critical patent/JP3788591B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a method for automating the decision whether a plurality of semiconductor switching elements for forming an inverter main circuit of an inverter is respectively normal or not. SOLUTION: A drive signal for diagnosing a fault is, for example, outputted from a CPU circuit 11 to an IGBT2 according to a command from a touch panel or the like, a comparison calculation of a logic level output from a state detector 13 for detecting on or off state of the IGBT2 with a logic level of the drive signal is conducted by the CPU circuit 11, and its arithmetic result is displayed on a display unit of the touch panel. Equivalent circuits to a gate drive circuit 12 and the state detector 13 are respectively provided in the IGBT1, and the IGBTs3 to 6, and the same operations as that in the above circuit are conducted.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】この発明は、インバータ主回
路を構成する複数個の半導体スイッチング素子それぞれ
をオン,オフさせることにより所望の周波数,電圧の交
流電力を負荷に供給するインバータ装置の故障診断方法
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of diagnosing a failure in an inverter device, which supplies AC power of a desired frequency and voltage to a load by turning on and off each of a plurality of semiconductor switching elements forming an inverter main circuit. Regarding

【0002】[0002]

【従来の技術】この種の従来のインバータ装置において
は、特にインバータ主回路を構成する複数個の半導体ス
イッチング素子が正常か否かを判定するための診断機能
を該インバータ装置内部に備えているものが見当たら
ず、従って、前記半導体スイッチング素子が正常か否か
はサービスマンによるチェックが一般的であった。
2. Description of the Related Art A conventional inverter device of this type is provided with a diagnostic function for determining whether or not a plurality of semiconductor switching elements forming an inverter main circuit are normal, in the inverter device. Therefore, a serviceman generally checked whether or not the semiconductor switching element is normal.

【0003】[0003]

【発明が解決しようとする課題】従来のインバータ装置
に故障が発生した場合で、インバータ主回路を構成する
複数個の半導体スイッチング素子それぞれが正常か否か
を判定する必要が生じたときには、このインバータ装置
の該当する構成部品を予め分解してチェックを行うこと
が一般的であり、この分解作業は熟練した技術を要し、
故障部品の解明に時間を要するという難点があった。
When a failure occurs in the conventional inverter device and it is necessary to determine whether each of the plurality of semiconductor switching elements forming the inverter main circuit is normal, the inverter is used. It is common to disassemble and check the relevant components of the device in advance, and this disassembling work requires skilled technology,
The problem is that it takes time to clarify the defective parts.

【0004】この発明の目的は、上記難点を解消するイ
ンバータ装置の故障診断方法を提供することにある。
An object of the present invention is to provide a method of diagnosing a failure in an inverter device that solves the above-mentioned difficulties.

【0005】[0005]

【課題を解決するための手段】この第1の発明は、イン
バータ主回路を構成する複数個の半導体スイッチング素
子それぞれをオン,オフさせることにより所望の周波
数,電圧の交流電力を負荷に供給するインバータ装置の
故障診断方法において、前記半導体スイッチング素子そ
れぞれへの故障診断用の駆動信号を生成し、この駆動信
号に対応する前記半導体スイッチング素子のオン,オフ
状態を検知し、この検知したオン,オフ状態と前記故障
診断用の駆動信号との比較演算を行うことを特徴とす
る。
According to a first aspect of the present invention, an inverter for supplying alternating current power having a desired frequency and voltage to a load by turning on and off each of a plurality of semiconductor switching elements which constitute an inverter main circuit. In a device failure diagnosis method, a drive signal for failure diagnosis is generated for each of the semiconductor switching elements, an ON / OFF state of the semiconductor switching element corresponding to the drive signal is detected, and the detected ON / OFF state is detected. Is compared with the drive signal for fault diagnosis.

【0006】また第2の発明は、インバータ主回路を構
成する複数個の半導体スイッチング素子それぞれをオ
ン,オフさせることにより所望の周波数,電圧の交流電
力を負荷に供給しつつ、前記半導体スイッチング素子へ
の駆動信号それぞれに対応する前記半導体スイッチング
素子それぞれのオン,オフ状態に基づいて前記駆動信号
それぞれの波形を補正する動作も行うインバータ装置の
故障診断方法において、前記半導体スイッチング素子そ
れぞれへの故障診断用の駆動信号を生成し、この駆動信
号に対応する前記半導体スイッチング素子のオン,オフ
状態を検知し、この検知したオン,オフ状態と前記故障
診断用の駆動信号との比較演算を行うことを特徴とす
る。
A second aspect of the invention is to turn on and off each of a plurality of semiconductor switching elements constituting an inverter main circuit to supply AC power of a desired frequency and voltage to a load, and to the semiconductor switching element. A fault diagnosing method for an inverter device that also performs an operation of correcting the waveform of each of the drive signals based on the ON / OFF state of each of the semiconductor switching devices corresponding to each of the drive signals of Drive signal is generated, the ON / OFF state of the semiconductor switching element corresponding to the drive signal is detected, and the detected ON / OFF state is compared with the drive signal for fault diagnosis. And

【0007】この発明によれば、インバータ主回路を構
成する複数個の半導体スイッチング素子それぞれが正常
か否かを判定する機能をインバータ装置に内蔵させたの
で、この機能を動作させることにより、故障した半導体
スイッチング素子を特定する際の分解作業が不要にな
る。
According to the present invention, the inverter device has a built-in function of determining whether each of the plurality of semiconductor switching elements forming the inverter main circuit is normal. Therefore, by operating this function, a failure occurs. Disassembling work for specifying the semiconductor switching element is unnecessary.

【0008】[0008]

【発明の実施の形態】図1は、この発明の第1の実施の
形態を示すインバータ装置の回路構成図であり、なお、
図1では、以下の説明を簡単にするために、この発明に
関係する一部の構成要素を図示しており、他の構成要素
の図示は省略をしている。
FIG. 1 is a circuit configuration diagram of an inverter device showing a first embodiment of the present invention.
In FIG. 1, in order to simplify the following description, some of the components related to the present invention are shown, and the other components are not shown.

【0009】すなわち図1において、このインバータ装
置には、一例として、IGBT1〜IGBT6それぞれ
を半導体スイッチング素子とした3相ブリッジ接続のイ
ンバータ主回路1と、マイクロプロセッサなどから構成
され、このインバータ装置の制御,保護,監視動作を司
るCPU回路11と、CPU回路11からの駆動信号に
基づきIGBT2をオン,オフさせるためのゲート駆動
回路12と、IGBT2のオン,オフ状態を検出する状
態検出回路13とを備えている。
That is, in FIG. 1, the inverter device is composed of, for example, an inverter main circuit 1 of a three-phase bridge connection in which each of IGBT1 to IGBT6 is a semiconductor switching element, a microprocessor, and the like. , A CPU circuit 11 that controls the protection and monitoring operations, a gate drive circuit 12 that turns on and off the IGBT 2 based on a drive signal from the CPU circuit 11, and a state detection circuit 13 that detects the on / off state of the IGBT 2. I have it.

【0010】この状態検出回路13はIGBT2のコレ
クタ電位をCPU回路11の論理レベルに変換するため
のレベルシフト回路などで構成され、例えば、IGBT
2がオン状態にあるときには状態検出回路13は論理
「H」レベルを出力し、また、IGBT2がオフ状態に
あるときには状態検出回路13は論理「L」レベルを出
力するものとする。同様に、CPU回路11からIGB
T2への駆動信号が論理「H」レベルのときIGBT2
がオン状態になり、また、CPU回路11からIGBT
2への駆動信号が論理「L」レベルのときIGBT2が
オフ状態になるものとする。
The state detection circuit 13 is composed of a level shift circuit or the like for converting the collector potential of the IGBT 2 into the logic level of the CPU circuit 11, and, for example, the IGBT.
It is assumed that the state detection circuit 13 outputs a logic "H" level when 2 is in the on state, and the state detection circuit 13 outputs a logic "L" level when the IGBT 2 is in the off state. Similarly, from the CPU circuit 11 to the IGB
IGBT2 when the drive signal to T2 is logic "H" level
Is turned on, and the CPU circuit 11 causes the IGBT
It is assumed that the IGBT 2 is turned off when the drive signal to 2 is at the logic "L" level.

【0011】なお、図1ではIGBT2のみにゲート駆
動回路12および状態検出回路13を設け、上記ではI
GBT2のみについて説明をしているが、残りのIGB
T1,IGBT3〜IGBT6についてもゲート駆動回
路12および状態検出回路13と同等回路をそれぞれ備
えており、IGBT2と同様の動作が行われる。
In FIG. 1, the gate drive circuit 12 and the state detection circuit 13 are provided only in the IGBT 2, and in the above, I
Only GBT2 is explained, but the remaining IGB
The T1 and the IGBT3 to the IGBT6 are also provided with circuits equivalent to the gate drive circuit 12 and the state detection circuit 13, respectively, and the same operation as that of the IGBT2 is performed.

【0012】従って、図1に示したインバータ装置に何
らかの故障が発生し、インバータ主回路1を構成する各
IGBT1〜IGBT6が正常か否かを判定する必要が
生じたときには、図示しないタッチパネルなどを操作し
て故障診断機能を動作させることにより、CPU回路1
1からIGBT1〜IGBT6それぞれへの故障診断用
の駆動信号を出力し、このときIGBT2ではこの駆動
信号に対応して状態検出回路13が出力する論理レベル
と前記駆動信号の論理レベルとの比較演算をCPU回路
11が行い、この故障診断の結果を前記タッチパネルの
表示器に表示させる。ここで、通常の運転時では駆動信
号のパルスの繰り返し速度が早いため、両論理レベルの
比較演算は困難であるから、前記故障診断用の駆動信号
は、例えば、通常の運転時の駆動信号のパルス幅よりも
広いパルス幅とすると共に、全てのIGBTについて、
順次故障診断用の駆動信号を与えて両論理レベルの比較
演算を行うものとする。すなわち、インバータ主回路1
を構成する全てIGBTについて、順次、上述の動作を
CPU回路11が行うようにしておけば、例えば、IG
BT1〜IGBT6それぞれの接続を取り除くことなく
チェックすることができる。
Therefore, when some failure occurs in the inverter device shown in FIG. 1 and it is necessary to determine whether each of the IGBT1 to IGBT6 constituting the inverter main circuit 1 is normal, a touch panel or the like not shown is operated. Then, the CPU circuit 1 is operated by operating the failure diagnosis function.
1 outputs a drive signal for fault diagnosis to each of the IGBT1 to the IGBT6, and at this time, in the IGBT2, a comparison operation is performed between the logic level output from the state detection circuit 13 and the logic level of the drive signal corresponding to the drive signal. The CPU circuit 11 performs this, and displays the result of this failure diagnosis on the display of the touch panel. Here, since the repetition rate of the pulse of the drive signal is high during normal operation, it is difficult to compare the two logic levels. Therefore, the drive signal for fault diagnosis is, for example, the drive signal for normal operation. With a pulse width wider than the pulse width, for all IGBTs,
It is assumed that a drive signal for fault diagnosis is sequentially given to perform a comparison operation of both logic levels. That is, the inverter main circuit 1
If the CPU circuit 11 is made to sequentially perform the above-mentioned operation for all of the IGBTs constituting
It can be checked without removing the connection of each of BT1 to IGBT6.

【0013】図2は、この発明の第2の実施の形態を示
すインバータ装置の回路構成図であり、なお、図2で
は、以下の説明を簡単にするために、この発明に関係す
る一部の構成要素を図示しており、他の構成要素の図示
は省略をしている。
FIG. 2 is a circuit configuration diagram of an inverter device showing a second embodiment of the present invention, and in FIG. 2, a part related to the present invention is shown in order to simplify the following description. The constituent elements are illustrated, and the other constituent elements are omitted.

【0014】すなわち図2において、このインバータ装
置には図1に示した構成要素と同一機能のイバータ主回
路1,ゲート駆動回路12,状態検出回路13の他に、
マイクロプロセッサなどから構成され、このインバータ
装置の制御,保護,監視動作を司るCPU回路21と、
該インバータ装置の制御性能を高めるためにCPU回路
21からのIGBT2への駆動信号と状態検出回路13
からの検出信号とのパルス幅がほぼ等しくなるように補
正した新たな駆動信号を生成し、この新たな駆動信号を
ゲート駆動回路12へ出力するパルス幅補正回路22と
を備えている。
That is, in FIG. 2, in addition to the inverter main circuit 1, the gate drive circuit 12, the state detection circuit 13 having the same function as the constituent elements shown in FIG.
A CPU circuit 21 composed of a microprocessor and the like, which controls the inverter device, protects it, and monitors it;
In order to improve the control performance of the inverter device, a drive signal from the CPU circuit 21 to the IGBT 2 and a state detection circuit 13
A pulse width correction circuit 22 for generating a new drive signal corrected so that the pulse width thereof is substantially equal to that of the detection signal from, and outputting the new drive signal to the gate drive circuit 12.

【0015】また、図2に示したCPU回路21からパ
ルス幅補正回路22への駆動信号が論理「H」レベルの
ときIGBT2がオン状態になり、また、CPU回路2
1からパルス幅補正回路22への駆動信号が論理「L」
レベルのときIGBT2がオフ状態になるものとする。
Further, when the drive signal from the CPU circuit 21 shown in FIG. 2 to the pulse width correction circuit 22 is at the logic "H" level, the IGBT 2 is turned on, and the CPU circuit 2 is turned on.
The drive signal from 1 to the pulse width correction circuit 22 is logic "L".
When the level is set, the IGBT 2 is turned off.

【0016】なお、図2ではIGBT2のみにパルス幅
補正回路22とゲート駆動回路12と状態検出回路13
とを設け、上記ではIGBT2のみについて説明をして
いるが、残りのIGBT1,IGBT3〜IGBT6に
ついてもパルス幅補正回路22,ゲート駆動回路12,
状態検出回路13それぞれと同等回路をそれぞれ備えて
おり、IGBT2と同様の動作が行われる。
In FIG. 2, only the IGBT 2 has a pulse width correction circuit 22, a gate drive circuit 12, and a state detection circuit 13.
In the above description, only the IGBT2 is described. However, the remaining IGBT1, IGBT3 to IGBT6, pulse width correction circuit 22, gate drive circuit 12,
Each of the state detection circuits 13 is provided with an equivalent circuit, and the same operation as that of the IGBT 2 is performed.

【0017】従って、図2に示したインバータ装置に何
らかの故障が発生し、インバータ主回路1を構成する各
IGBT1〜IGBT6が正常か否かを判定する必要が
生じたときには、図示しないタッチパネルなどを操作し
て故障診断機能を動作させることにより、CPU回路2
1から各IGBT1〜IGBT6への故障診断用の駆動
信号を出力し、このときIGBT2ではこの駆動信号に
対応して状態検出回路13が出力する論理レベルと前記
駆動信号の論理レベルとの比較演算をCPU回路21が
行い、この故障診断の結果を前記タッチパネルの表示器
に表示させる。ここで、通常の運転時では駆動信号のパ
ルスの繰り返し速度が早いため、両論理レベルの比較演
算は困難であるから、前記故障診断用の駆動信号は、例
えば、通常の運転時の駆動信号のパルス幅よりも広いパ
ルス幅とすると共に、全てのIGBTについて、順次故
障診断用の駆動信号を与えて両論理レベルの比較演算を
行うものとする。すなわち、インバータ主回路1を構成
する全てIGBTについて、順次、上述の動作をCPU
回路21が行うようにしておけば、例えば、IGBT1
〜IGBT6それぞれの接続を取り除くことなくチェッ
クすることができ、また、このインバータ装置の場合に
は新たなハード部品の追加設置は不要である。
Therefore, when some failure occurs in the inverter device shown in FIG. 2 and it is necessary to determine whether each of the IGBT1 to IGBT6 constituting the inverter main circuit 1 is normal, a touch panel or the like (not shown) is operated. The CPU circuit 2 is operated by operating the failure diagnosis function.
1 outputs a drive signal for fault diagnosis to each of the IGBT1 to IGBT6. At this time, in the IGBT2, a comparison operation is performed between the logic level output from the state detection circuit 13 and the logic level of the drive signal corresponding to the drive signal. The CPU circuit 21 performs this, and displays the result of this failure diagnosis on the display of the touch panel. Here, since the repetition rate of the pulse of the drive signal is high during normal operation, it is difficult to compare the two logic levels. Therefore, the drive signal for fault diagnosis is, for example, the drive signal for normal operation. The pulse width is wider than the pulse width, and a drive signal for fault diagnosis is sequentially applied to all the IGBTs to perform a comparison operation of both logic levels. That is, the above operation is sequentially performed by the CPU for all the IGBTs that configure the inverter main circuit 1.
If the circuit 21 does so, for example, the IGBT 1
~ It can be checked without removing the connection of each IGBT6, and in the case of this inverter device, additional installation of new hardware parts is not required.

【0018】なお、上述の第1,第2の実施の形態回路
での説明ではインバータ装置に故障が発生したときにつ
いて述べたが、このインバータ装置に運転指令が与えら
れた時毎に通常の起動に先立って、故障診断用の駆動信
号を出力するこの発明の診断方法を行わせ、その結果、
インバータ装置の故障が発見されれば、その故障を表示
することもできる。
In the description of the circuits of the above first and second embodiments, the case where a failure occurs in the inverter device has been described. However, a normal start-up is performed every time an operation command is given to this inverter device. Prior to the above, the diagnostic method of the present invention for outputting a drive signal for fault diagnosis is performed, and as a result,
If a failure of the inverter device is found, the failure can be displayed.

【0019】[0019]

【発明の効果】この発明によれば、インバータ装置に故
障が発生し、インバータ主回路を構成する複数個の半導
体スイッチング素子それぞれが正常か否かを判定する必
要が生じたときには、前記半導体スイッチング素子それ
ぞれへの故障診断用の駆動信号を生成し、この駆動信号
に基づいて前記半導体スイッチング素子のチェックを自
動的に行うことが可能になる。
According to the present invention, when a failure occurs in the inverter device and it is necessary to determine whether each of the plurality of semiconductor switching elements forming the inverter main circuit is normal, the semiconductor switching element is It becomes possible to generate a drive signal for failure diagnosis for each and automatically check the semiconductor switching element based on this drive signal.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の第1の実施の形態を示すインバータ
装置の回路構成図
FIG. 1 is a circuit configuration diagram of an inverter device showing a first embodiment of the present invention.

【図2】この発明の第2の実施の形態を示すインバータ
装置の回路構成図
FIG. 2 is a circuit configuration diagram of an inverter device showing a second embodiment of the present invention.

【符号の説明】 1…インバータ主回路、11…CPU回路、12…ゲー
ト駆動回路、13…状態検出回路、21…CPU回路、
22…パルス幅補正回路。
[Explanation of Codes] 1 ... Inverter main circuit, 11 ... CPU circuit, 12 ... Gate drive circuit, 13 ... State detection circuit, 21 ... CPU circuit,
22 ... Pulse width correction circuit.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 インバータ主回路を構成する複数個の半
導体スイッチング素子それぞれをオン,オフさせること
により所望の周波数,電圧の交流電力を負荷に供給する
インバータ装置の故障診断方法において、 前記半導体スイッチング素子それぞれへの故障診断用の
駆動信号を生成し、この駆動信号に対応する前記半導体
スイッチング素子のオン,オフ状態を検知し、この検知
したオン,オフ状態と前記故障診断用の駆動信号との比
較演算を行うことを特徴とするインバータ装置の故障診
断方法。
1. A fault diagnosing method for an inverter device, which supplies AC power of a desired frequency and voltage to a load by turning on and off each of a plurality of semiconductor switching elements forming an inverter main circuit, wherein the semiconductor switching element A drive signal for failure diagnosis is generated for each of them, an ON / OFF state of the semiconductor switching element corresponding to the drive signal is detected, and the detected ON / OFF state is compared with the drive signal for failure diagnosis. A method of diagnosing a failure in an inverter device, which comprises performing a calculation.
【請求項2】 インバータ主回路を構成する複数個の半
導体スイッチング素子それぞれをオン,オフさせること
により所望の周波数,電圧の交流電力を負荷に供給しつ
つ、前記半導体スイッチング素子への駆動信号それぞれ
に対応する前記半導体スイッチング素子それぞれのオ
ン,オフ状態に基づいて前記駆動信号それぞれの波形を
補正する動作も行うインバータ装置の故障診断方法にお
いて、 前記半導体スイッチング素子それぞれへの故障診断用の
駆動信号を生成し、この駆動信号に対応する前記半導体
スイッチング素子のオン,オフ状態を検知し、この検知
したオン,オフ状態と前記故障診断用の駆動信号との比
較演算を行うことを特徴とするインバータ装置の故障診
断方法。
2. A plurality of semiconductor switching elements forming an inverter main circuit are turned on and off to supply alternating current power of a desired frequency and voltage to a load, and to drive signals to the semiconductor switching elements respectively. A method for diagnosing a failure in an inverter device, which also performs an operation of correcting the waveform of each of the drive signals based on the on / off state of each of the corresponding semiconductor switching elements, wherein a drive signal for failure diagnosis for each of the semiconductor switching elements is generated. However, an ON / OFF state of the semiconductor switching element corresponding to the drive signal is detected, and a comparison operation is performed between the detected ON / OFF state and the drive signal for fault diagnosis. Failure diagnosis method.
JP2001307433A 2001-10-03 2001-10-03 Inverter device failure diagnosis method Expired - Fee Related JP3788591B2 (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006042557A (en) * 2004-07-29 2006-02-09 Hitachi Ltd Power converter
KR100721111B1 (en) 2006-08-03 2007-05-23 주식회사 만도 Circuit for determining status and fault diagnosis of three state switch
JP2011244519A (en) * 2010-05-14 2011-12-01 Denso Corp Discharge control apparatus for power conversion system
JP7372019B2 (en) 2021-02-16 2023-10-31 東芝三菱電機産業システム株式会社 Power converter and testing system

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006042557A (en) * 2004-07-29 2006-02-09 Hitachi Ltd Power converter
JP4488824B2 (en) * 2004-07-29 2010-06-23 株式会社日立製作所 Power converter
KR100721111B1 (en) 2006-08-03 2007-05-23 주식회사 만도 Circuit for determining status and fault diagnosis of three state switch
JP2011244519A (en) * 2010-05-14 2011-12-01 Denso Corp Discharge control apparatus for power conversion system
US8525371B2 (en) 2010-05-14 2013-09-03 Denso Corporation Discharge control apparatus arranged in power conversion system
JP7372019B2 (en) 2021-02-16 2023-10-31 東芝三菱電機産業システム株式会社 Power converter and testing system

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