JP2003110213A5 - - Google Patents

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JP2003110213A5
JP2003110213A5 JP2001305664A JP2001305664A JP2003110213A5 JP 2003110213 A5 JP2003110213 A5 JP 2003110213A5 JP 2001305664 A JP2001305664 A JP 2001305664A JP 2001305664 A JP2001305664 A JP 2001305664A JP 2003110213 A5 JP2003110213 A5 JP 2003110213A5
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Prior art keywords
mounting structure
conductive
substrate
conductive member
wiring board
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JP2001305664A
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JP2003110213A (en
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Priority to JP2001305664A priority Critical patent/JP2003110213A/en
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Description

次に本発明の第2番目の実装構造体は、複数の配線基板が間隙をもって相互に電気的に接続されて積層化された実装構造体であって、前記配線基板の上層基板および下層基板から選ばれる少なくとも一つの配線基板には、各基板表面に形成された両配線基板の接続用の導電端子と同一面でかつ前記導電端子以外の領域に実装された第1の電子部品と、前記上層の配線基板と下層の配線基板の対向する導電端子を接続する第2の電子部品と、前記導電端子と前記第2の電子部品とを電気的に接続するための接続材料とを含み、前記上層と下層の配線基板の対向する導電端子が第2の電子部品の端子電極を介して接続されていることを特徴とする。
Next, a second mounting structure according to the present invention is a mounting structure in which a plurality of wiring boards are electrically connected to each other with a gap and laminated, and from the upper layer substrate and the lower layer substrate of the wiring substrate The first electronic component mounted on the same surface as the conductive terminal for connection of both wiring substrates formed on the surface of each substrate and in the region other than the conductive terminal on at least one wiring substrate selected, and the upper layer A second electronic component connecting the opposing conductive terminals of the wiring substrate of the lower layer and the wiring substrate in the lower layer, and a connection material for electrically connecting the conductive terminals and the second electronic component ; The present invention is characterized in that the opposing conductive terminals of the lower wiring substrate are connected via the terminal electrodes of the second electronic component.

なお、本発明の実施例、比較例においては、実装構造体の例として、簡単のために、配線基板を2層積層した構成のみを説明したが、それ以上を積層しても良い。また、メモリーカードの基板間実装だけでなく、パッケージ部品、電解コンデンサ、ダイオード、スイッチ類などのチップ部品やリード部品、またICのベア実装など、あらゆる部品の実装に用いることができる。また、導電性接着剤のバインダ樹脂、導電性粒子の種類、電極金属の種類についても、前記実施例に記載したものに限定されない。 In the embodiment and the comparative example of the present invention, only the configuration in which the wiring board is stacked in two layers is described as an example of the mounting structure for the sake of simplicity, but more layers may be stacked. Moreover, it can be used not only for mounting between memory boards, but also for mounting all kinds of parts such as package parts, electrolytic capacitors, chip parts such as diodes and switches, lead parts, and bare mounting of ICs. Further, the binder resin of the conductive adhesive, the type of the conductive particles, and the type of the electrode metal are not limited to those described in the examples.

Claims (13)

複数の配線基板が間隙をもって相互に電気的に接続されて積層化された実装構造体であって、
前記配線基板の上層基板および下層基板から選ばれる少なくとも一つの配線基板には、各基板表面に形成された両配線基板の接続用の導電端子と同一面でかつ前記導電端子以外の領域に実装された電子部品と、
前記上層の配線基板と下層の配線基板の対向する導電端子を接続する導電部材と、
前記導電端子と前記導電部材品とを電気的に接続するための接続材料とを含むことを特徴とする実装構造体。
A mounting structure in which a plurality of wiring boards are electrically connected to each other with a gap and stacked,
The at least one wiring substrate selected from the upper layer substrate and the lower layer substrate of the wiring substrate is mounted on the same surface as the conductive terminal for connection of both wiring substrates formed on the surface of each substrate and in a region other than the conductive terminal Electronic components,
A conductive member for connecting opposing conductive terminals of the upper layer wiring board and the lower layer wiring board;
A mounting structure comprising: a connecting material for electrically connecting the conductive terminal and the conductive member product.
複数の配線基板が間隙をもって相互に電気的に接続されて積層化された実装構造体であって、前記配線基板の上層基板および下層基板から選ばれる少なくとも一つの配線基板には、各基板表面に形成された両配線基板の接続用の導電端子と同一面でかつ前記導電端子以外の領域に実装された第1の電子部品と、前記上層の配線基板と下層の配線基板の対向する導電端子を接続する第2の電子部品と、前記導電端子と前記第2の電子部品とを電気的に接続するための接続材料とを含み、前記上層と下層の配線基板の対向する導電端子が第2の電子部品の端子電極を介して接続されていることを特徴とする実装構造体。A mounting structure in which a plurality of wiring boards are electrically connected to each other with a gap and laminated, wherein at least one wiring board selected from the upper layer substrate and the lower layer substrate of the wiring substrate has a surface on each substrate A first electronic component mounted in the same plane as the conductive terminals for connection of both formed wiring boards and in a region other than the conductive terminals, and a conductive terminal facing the wiring board in the upper layer and the wiring board in the lower layer A second electronic component to be connected, and a connection material for electrically connecting the conductive terminal and the second electronic component , wherein the conductive terminals facing the upper and lower wiring boards are the second A mounting structure characterized by being connected through terminal electrodes of an electronic component. 電子部品はチップ部品である請求項2に記載の実装構造体。  The mounting structure according to claim 2, wherein the electronic component is a chip component. 導電部材が上下方向に外部接続端子を有するチップ部品である請求項2に記載の実装構造体。  The mounting structure according to claim 2, wherein the conductive member is a chip component having an external connection terminal in the vertical direction. 導電部材がセラミック素体表面に端子電極のみを形成したチップ部品である請求項2に記載の実装構造体。  The mounting structure according to claim 2, wherein the conductive member is a chip component in which only the terminal electrode is formed on the surface of the ceramic body. 前記導電部材が、表裏に外部接続端子を有する半導体部品である請求項2に記載の実装構造体。  The mounting structure according to claim 2, wherein the conductive member is a semiconductor component having external connection terminals on the front and back. 前記接続材料がはんだである請求項1から6のいずれかに記載の実装構造体。  The mounting structure according to any one of claims 1 to 6, wherein the connection material is a solder. 導電部材と第1の配線基板との接続材料、または導電部材と第2の配線基板との接続材料のいずれか一方に用いられるはんだの融点が、他方に用いられるはんだの融点より高い請求項7に記載の実装構造体。  The melting point of the solder used for any one of the connection material of the conductive member and the first wiring board or the connection material of the conductive member and the second wiring board is higher than the melting point of the solder used for the other. The mounting structure described in. 前記接続材料が導電性接着剤である請求項1から6のいずれかに記載の実装構造体。  The mounting structure according to any one of claims 1 to 6, wherein the connection material is a conductive adhesive. 導電部材と上層の配線基板との接続材料、または導電部材と下層の配線基板との接続材料のいずれか一方が導電性接着剤であり、他方がはんだである請求項1から6のいずれかに記載の実装構造体。  7. The method according to claim 1, wherein one of the connecting material of the conductive member and the upper layer wiring board or the connecting material of the conductive member and the lower layer wiring board is a conductive adhesive, and the other is a solder. Implementation structure described. 複数の配線基板が厚み方向に電気的に接続されて積層化されたカード型電子機器に用いられる実装構造体であって、
前記配線基板の上層基板および下層基板から選ばれる少なくとも一つの配線基板には、各基板表面に形成された導電端子と同一面でかつ前記導電端子以外の領域に実装された電子部品と、
前記上層の配線基板と下層の配線基板の対向する導電端子を接続する導電部材と、
前記導電端子と前記導電部材品とを電気的に接続するための接続材料とを含むことを特徴とするカード型電子機器用実装構造体。
A mounting structure used for a card-type electronic device in which a plurality of wiring boards are electrically connected in a thickness direction and stacked,
At least one wiring substrate selected from the upper layer substrate and the lower layer substrate of the wiring substrate, an electronic component mounted on the same surface as the conductive terminal formed on the surface of each substrate and in a region other than the conductive terminal;
A conductive member for connecting opposing conductive terminals of the upper layer wiring board and the lower layer wiring board;
A mounting structure for a card type electronic device, comprising a connecting material for electrically connecting the conductive terminal and the conductive member product.
導電部材はチップ部品である請求項11に記載のカード型電子機器用実装構造体。  The mounting structure for a card-type electronic device according to claim 11, wherein the conductive member is a chip part. 前記導電部材が、セラミック素体表面に端子電極のみを形成したチップ部品である請求項11に記載のカード型電子機器用実装構造体。  The mounting structure for a card-type electronic device according to claim 11, wherein the conductive member is a chip component in which only the terminal electrode is formed on the surface of the ceramic body.
JP2001305664A 2001-10-01 2001-10-01 Mounting structure and mounting structure for card- shaped electronic equipment Withdrawn JP2003110213A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001305664A JP2003110213A (en) 2001-10-01 2001-10-01 Mounting structure and mounting structure for card- shaped electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001305664A JP2003110213A (en) 2001-10-01 2001-10-01 Mounting structure and mounting structure for card- shaped electronic equipment

Publications (2)

Publication Number Publication Date
JP2003110213A JP2003110213A (en) 2003-04-11
JP2003110213A5 true JP2003110213A5 (en) 2005-05-12

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JP2001305664A Withdrawn JP2003110213A (en) 2001-10-01 2001-10-01 Mounting structure and mounting structure for card- shaped electronic equipment

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010199171A (en) * 2009-02-24 2010-09-09 Shinko Electric Ind Co Ltd Chip component mounted wiring board

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