WO2012129118A1

WO2012129118A1 - Circuit protection device

Info

Publication number: WO2012129118A1
Application number: PCT/US2012/029534
Authority: WO
Inventors: Luis A. Navarro; Anthony Vranicar; Alan B. GLENDINNING
Original assignee: Tyco Electronics Corporation
Priority date: 2011-03-18
Filing date: 2012-03-16
Publication date: 2012-09-27
Also published as: CN102683327A

Abstract

The present invention discloses a circuit protection device containing a PTC chip (130) having a first electrode surface and a second electrode surface opposite to the first electrode surface; a diode chip (140) having a first electrode surface which is a cathode and a second electrode surface which is an anode opposite to the first electrode surface; and at least two substrates (111, 121), on surfaces of which three different conductors (112, 113, 122) and three different external terminals (1, 2, 3) corresponding to the three different conductors are formed. The PTC chip, the diode chip and the at least two substrates are laminated to each other. An insulation protection package is formed between the at least two substrates to cover the PTC chip and the diode chip. Three conductive vias (101, 102, 103) are formed in the at least two substrates and the insulation protection package to electrically connect the three different conductors to the corresponding three different external terminals. One electrode surface of the PTC chip and the first electrode surface of the diode chip both are electrically connected to one of the external terminals through one of the conductors and one of the vias, and the other electrode surface of the PTC chip and the second electrode surface of the diode chip, respectively, are electrically connected to the other two of the external terminals through the other two of the conductors and the other two of the vias.

Description

CIRCUIT PROTECTION DEVICE

BACKGROUND OF THE INVENTION Field of the Invention

The present invention relates to a circuit protection device, more particularly, a circuit protection device comprising a PTC (Positive Temperature Coefficient) chip.

Description of the Related Art

Fig. 1 is an illustrative structure view of a conventional circuit protection device 280 comprising a PTC chip 242; and Fig. 2 is a cross-section view taken in a longitudinal direction of the circuit protection device 280 of Fig. 1.

As shown in Fig. 1 and Fig. 2, the PTC chip 242 includes a layer of PTC material 246 having a first metal electrode layer 248 covering a first side and a second metal electrode layer 250 covering a second (i.e., opposite) side. The metal electrode layers 248 and 250 are respectively coated with an insulating film 249 and 251. A portion of the insulating film 251 is missing at one end of the PTC chip 242, exposing a portion of the metal electrode layer 250, which forms a first terminal 262 of the circuit protection device 280.

Referring to Fig. 1 and Fig. 2, a rectangular window 252 is provided in the insulating film 249 proximate the opposite end of the PTC chip 242 from the first terminal 262, exposing a portion of the metal electrode layer 248 upon which a regulator 244 is attached by a solder bond 253. The regulator 244 includes a single silicon die 254. The drain terminal of the die 254 is electrically coupled to the first metal electrode layer 248 of the PTC chip 242 via a heat sink 256 and the solder bond 253, and the heat sink 256 is also electrically coupled to an external lead 258 extending away from the regulator 244. The source terminal of the die 254 is electrically coupled to a second external lead 259 extending away from the regulator 244. Leads 258 and 259 form respective second and third terminals of the circuit protection device 280.

The conventional circuit protection device 280 shown in Fig. 1 and Fig. 2 needs external leads 258 and 259 soldered to the circuit protection device 280, therefore, increasing costs and materials, and reducing production efficiency. SUMMARY OF THE INVENTION

The present invention has been made to overcome or alleviate at least one aspect of the above mentioned disadvantages.

Accordingly, it is an object of the present invention to provide a circuit protection device, which can eliminate the need for high cost processing, high equipment capital costs and materials.

Accordingly, it is another object of the present invention to provide a circuit protection device with a thinner thickness than before.

According to an aspect of the present invention, there is provided a circuit protection device, comprising a PTC chip having a first electrode surface and a second electrode surface opposite to the first electrode surface; a diode chip having a first electrode surface which is a cathode and a second electrode surface which is an anode opposite to the first electrode surface; and at least two substrates, on surfaces of which three different conductors and three different external terminals corresponding to the three different conductors are formed. The PTC chip, the diode chip and the at least two substrates are laminated on each other. An insulation protection package is formed between the at least two substrates to cover the PTC chip and the diode chip. Three conductive vias are formed in the at least two substrates and the insulation protection package to electrically connect the three different conductors to the corresponding three different external terminals. One electrode surface of the PTC chip and the first electrode surface of the diode chip both are electrically connected to one of the external terminals through one of the conductors and one of the vias, the other electrode surface of the PTC chip and the second electrode surface of the diode chip, respectively, are electrically connected to the other two of the external terminals through the other two of the conductors and the other two of the vias.

In the present invention, the circuit protection device is formed by laminating the PTC chip, the diode chip and substrates; therefore, all terminals of the circuit protection device can be connected to leads by conductors and external terminals printed on the substrates (e.g. printed circuit boards (PCBs)), instead of by additional external leads. Thereby, the present invention can eliminate leads and lead frames of the conventional circuit protection device, reducing costs and materials. Furthermore, such a circuit protection device based on laminated PCB can efficiently reduce its thickness. BRIEF DESCRIPTION OF THE DRAWINGS

Fig. lFig. 1 is an illustrative structure view of a conventional circuit protection device comprising a PTC chip;

Fig. 2 is a cross-section view taken in a longitudinal direction of the circuit protection device of Fig. 1;

Fig. 3 is an illustrative exploded view of a circuit protection device according to a first exemplary embodiment of the present invention, showing upper surfaces of respective components of the circuit protection device;

Fig. 4 is an illustrative exploded view of a circuit protection device according to a first exemplary embodiment of the present invention, showing lower surfaces of respective components of the circuit protection device;

Fig. 5 is an illustrative exploded view of a circuit protection device according to a second exemplary embodiment of the present invention, showing upper surfaces of respective components of the circuit protection device;

Fig. 6 is an illustrative exploded view of a circuit protection device according to a second exemplary embodiment of the present invention, showing lower surfaces of respective components of the circuit protection device;

Fig. 7 is an illustrative exploded view of a circuit protection device according to a third exemplary embodiment of the present invention, showing upper surfaces of respective components of the circuit protection device; and

Fig. 8 is an illustrative exploded view of a circuit protection device according to a third exemplary embodiment of the present invention, showing lower surfaces of respective components of the circuit protection device.

DETAILED DESCRIPTION OF THE INVENTION

Exemplary embodiments of the present disclosure will be described hereinafter in detail with reference to the attached drawings, wherein the like reference numerals refer to the like elements. The present disclosure may, however, be embodied in many different forms and should not be construed as being limited to the embodiment set forth herein; rather, these embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the concept of the disclosure to those skilled in the art. First Exemplary Embodiment

Fig. 3 and Fig. 4 show the illustrative exploded view of the circuit protection device according to the first exemplary embodiment of the present invention.

As shown in Fig. 3 and Fig. 4, in the exemplary embodiment of the present invention, the circuit protection device mainly comprises a PTC chip 130, a diode chip 140, a top substrate 121, and a bottom substrate 111.

Referring to Fig. 3 and Fig. 4, the PTC chip 130 has a first electrode surface (for example, a positive electrode) and a second electrode surface (for example, a negative electrode) opposite to the first electrode surface. The diode chip 140 has a first electrode surface (for example, a positive electrode) and a second electrode surface (for example, a negative electrode) opposite to the first electrode surface.

As shown in Fig. 3 and Fig. 4, the PTC chip 130 and the diode chip 140 are disposed in a same layer between the top substrate 121 and the bottom substrate 111. Accordingly, in the exemplary embodiment of Figs. 3 and 4, stacking the PTC chip 130 and the diode chip 140 in a same layer between the top substrate 121 and the bottom substrate 111 can efficiently reduce the total thickness of the circuit protection device.

As shown in Fig. 3, a first conductor (for example, a printed conductive thin layer or a soldered conductive thin sheet) 112 and a second conductor (for example, a printed conductive thin layer or a soldered conductive thin sheet) 113 are separately formed on an upper surface of the bottom substrate 111. As shown in Fig. 4, first, second and third external terminals 1, 2, 3 are separately formed on a lower surface of the bottom substrate 111.

Referring to Fig. 4, a third conductor (for example, a printed conductive thin layer or a soldered conductive thin sheet) 122 being formed on a lower surface of the top substrate 121. As shown in Fig. 3, first, second and third external terminals 1, 2, 3 are separately formed on an upper surface of the top substrate 121.

In Fig. 3, the first electrode surface (for example, the positive electrode) of the PTC chip 130 is electrically soldered on the first conductor 112 in a surface mount (SMT) manner by a solder paste, a conductive adhesive, or other suitable material. As shown in Fig. 4, the second electrode surface (for example, the negative electrode) of the PTC chip 130 is electrically soldered on the third conductor 122 in a SMT manner by a solder paste, a conductive adhesive, or other suitable material.

Similarly, as shown in Fig. 4, the first electrode surface (for example, the positive electrode) of the diode chip 140 is electrically soldered on the third conductor 122 in a SMT manner by a solder paste, a conductive adhesive, or other suitable materials.

Referring to Fig. 3, the second electrode surface (for example, the negative electrode) of the diode chip 140 is electrically soldered on the second conductor 113 in a SMT manner by a solder paste, a conductive adhesive, or other suitable material.

In this way, according to the exemplary embodiment shown in Figs. 3 and 4, the positive electrode of the diode chip 140 and the negative electrode of the PTC chip 130 both are electrically coupled to the third conductor 122 on the lower surface of the top substrate 121, and the positive electrode of the PTC chip 130 and the negative electrode of the diode chip 140 are electrically coupled to the first conductor 112 and the second conductor 113 on the upper surface of the bottom substrate 111, respectively. Thereby, in this exemplary embodiment, the PTC chip 130 and the diode chip 140 are electrically coupled in series.

Referring to Figs. 3 and 4, the PTC chip 130 and the diode chip 140 are laminated on the upper surface of the bottom substrate 111, and the top substrate 121 is laminated on surfaces of the PTC chip 130 and the diode chip 140. Although it is not shown, after laminating or stacking the PTC chip 130, the diode chip 140 and two substrates 111 and 121, insulation paste (for example, liquid, B-stageable epoxy) may be injected between the top substrate 121 and the bottom substrate 111 to form an insulation protection package covering the PTC chip 130 and the diode chip 140.

As shown Figs. 3 and 4, in the exemplary embodiment of the present invention, first, second and third conductive vias 101, 102, 103 are formed and extended through the top substratel21, the insulation protection package and the bottom substrate 111 so as to electrically couple the first, second and third conductors 112, 113, 122 to the first, second and third external terminals 1, 2, 3, respectively.

In one exemplary embodiment of the present invention, the PTC chip 130 and the diode chip 140 have substantially the same thickness. In this way, the electrical connections of the PTC chip 130 and the diode chip 140 to conductors 112, 113, 122 can be improved.

In one exemplary embodiment of the present invention, the substrates 111, 121 may be PCBs, and the conductors 112, 113, 122 and the external terminals 1, 2, 3 may be wirings or conductive patterns printed on the PCBs. In this way, all terminals of the circuit protection device can be connected to leads by wirings or conductive patterns printed on the PCBs, instead of by additional external leads. Thereby, the present invention eliminates the leads and lead frames of the conventional circuit protection device, reducing costs and materials.

In another exemplary embodiment of the present invention, the conductors 112, 113, 122 or/and the external terminals 1, 2, 3 may be conductive sheets or strips on the substrates 111, 121. In another exemplary embodiment of the present invention, each of the conductors 112, 113, 122 is shaped substantially the same as the respective electrode surfaces coupled thereon, for example, in a SMT manner. Second Exemplary Embodiment

Fig. 5 and Fig. 6 show the illustrative exploded view of the circuit protection device according to the second exemplary embodiment of the present invention.

As shown in Fig. 5 and Fig. 6, in the exemplary embodiment of the present invention, the circuit protection device mainly comprises a PTC chip 240, a diode chip 250, a top substrate 231, a middle substrate 221 and a bottom substrate 211.

Referring to Fig. 5 and Fig. 6, the PTC chip 240 has a first electrode surface (for example, positive electrode) and a second electrode surface (for example, negative electrode) opposite to the first electrode surface. The diode chip 250 has a first electrode surface (for example, positive electrode) and a second electrode surface (for example, negative electrode) opposite to the first electrode surface.

As shown in Fig. 5 and Fig. 6, a window 223 is formed in the middle substrate 221. The diode chip 250 is disposed in the window 223 of the middle substrate 221 so that the diode chip 250 and the middle substrate 221 both are located in a same layer. Accordingly, the total thickness of the circuit protection device can be reduced.

As shown in Fig. 5, a first conductor (for example, a printed conductive thin layer or a soldered conductive thin sheet) 212 is formed on an upper surface of the bottom substrate 211. As shown in Fig. 6, first, second and third external terminals 1, 2, 3 are separately formed on a lower surface of the bottom substrate 211.

Referring to Fig. 6, a second conductor (for example, a printed conductive thin layer or a soldered conductive thin sheet) 222 is formed on a lower surface of the middle substrate 221.

As shown in Fig. 6, a third conductor (for example, a printed conductive thin layer or a soldered conductive thin sheet) 232 is formed on a lower surface of the top substrate 231. As shown in Fig. 5, first, second and third external terminals 1, 2, 3 are separately formed on an upper surface of the top substrate 231.

Referring to Fig. 5, the first electrode surface (for example, the positive electrode) of the PTC chip 240 is electrically soldered on the first conductor 212 in a SMT manner by a solder paste, a conductive adhesive, or other suitable material. As shown in Fig. 6, the second electrode surface (for example, the negative electrode) of the PTC chip 240 is electrically soldered on the second conductor 222 in a SMT manner by a solder paste, a conductive adhesive, or other suitable material. As shown in Fig. 6, the first electrode surface (for example, the positive electrode) of the diode chip 250 directly contacts the second electrode surface (for example, the negative electrode) of the PTC chip 240 through the window 223 and is electrically coupled to the second electrode surface (for example, the negative electrode) of the PTC chip 240. Referring to Fig. 6, the second electrode surface (for example, the negative electrode) of the diode chip 250 is electrically soldered on the third conductor 232 in a SMT manner by a solder paste, a conductive adhesive, or other suitable material.

In this way, according to the exemplary embodiment shown in Figs. 5 and 6, the positive electrode of the diode chip 250 and the negative electrode of the PTC chip 240 both are electrically coupled to the second conductor 222 on the lower surface of the middle substrate 221 ; the positive electrode of the PTC chip 240 is electrically coupled to the first conductor 212 on the upper surface of the bottom substrate 211 ; and the negative electrode of the diode chip 250 is electrically coupled to the second conductor 232 on the lower surface of the top substrate 231. Thereby, in this exemplary embodiment, the PTC chip 240 and the diode chip 250 are electrically coupled in series.

Referring to Figs. 5 and 6, the PTC chip 240 is laminated on the upper surface of the bottom substrate 211, the middle substrate 221 and the diode chip 250 both are laminated on an upper surface of the PTC chip 240, and the top substrate 231 is laminated on upper surfaces of the middle substrate 221 and the diode chip 250. Although it is not shown, after laminating or stacking these components 211, 240, 221, 250 and 231, insulation paste (for example, liquid, B-stageable epoxy) may be injected between the top substrate 231, the middle substrate 221 and the bottom substrate 211 to form insulation protection packages covering the PTC chip 240 and the diode chip 250.

As shown Figs. 5and 6, in the exemplary embodiment of the present invention, first, second and third conductive vias 201, 202, 203 are formed and extended through the top substrate 231, the insulation protection package (not shown), the middle substrate 221, the insulation protection package (not shown), and the bottom substrate 211 so as to electrically couple the first, second and third conductors 212, 222, 232 to the first, second and third external terminals 1, 2, 3, respectively.

In one exemplary embodiment of the present invention, the middle substrate 221 and the diode chip 250 have substantially the same thickness. In this way, it can improve the electrical connections of the diode chip 250 to the PTC chip 240 and the third conductor 232.

In one exemplary embodiment of the present invention, the substrates 211, 221, 231 may be PCBs, and the conductors 212, 222, 232 and the external terminals 1, 2, 3 may be wirings or conductive patterns printed on the PCBs. In this way, all terminals of the circuit protection device can be leaded out by wirings or conductive patterns printed on the PCBs, instead of by additional external leads. Thereby, the present invention eliminates leads and lead frames of the conventional circuit protection device, reducing costs and materials.

In another exemplary embodiment of the present invention, the conductors 212,

222, 232 or/and the external terminals 1, 2, 3 may be conductive sheets or strips on the substrates 211, 221, 231.

In another exemplary embodiment of the present invention, the conductors 212, 222, 232 each may be shaped substantially same as respective electrode surfaces coupled thereon, for example, in SMT manner.

Third Exemplary Embodiment

Fig. 7 and Fig. 8 show the illustrative exploded view of the circuit protection device according to the third exemplary embodiment of the present invention.

As shown in Fig. 7 and Fig. 8, in the exemplary embodiment of the present invention, the circuit protection device mainly comprises a PTC chip 340, a diode chip 350, a top substrate 331, a middle substrate 321 and a bottom substrate 311.

Referring to Fig. 7 and Fig. 8, the PTC chip 340 has a first electrode surface (for example, positive electrode) and a second electrode surface (for example, negative electrode) opposite to the first electrode surface. The diode chip 350 has a first electrode surface (for example, positive electrode) and a second electrode surface (for example, negative electrode) opposite to the first electrode surface.

As shown in Fig. 7, a first conductor (for example, a printed conductive thin layer or a soldered conductive thin sheet) 312 is formed on an upper surface of the bottom substrate 311. As shown in Fig. 8, first, second and third external terminals 1, 2, 3 are separately formed on a lower surface of the bottom substrate 311.

Referring to Fig. 8, a second conductor (for example, a printed conductive thin layer or a soldered conductive thin sheet) 322b is formed on a lower surface of the middle substrate 321.

As shown in Fig. 8, a third conductor (for example, a printed conductive thin layer or a soldered conductive thin sheet) 332 is formed on a lower surface of the top substrate 331. As shown in Fig. 7, first, second and third external terminals 1, 2, 3 are separately formed on an upper surface of the top substrate 331.

Referring to Fig. 7 and Fig. 8, at least one via 323 is formed in the middle substrate 321 and extends through the middle substrate 321 and the second conductor 322b. As shown in Fig. 7, the first electrode surface (for example, the positive electrode) of the PTC chip 340 is electrically soldered on the first conductor 312 in a SMT manner by a solder paste, a conductive adhesive, or other suitable material. As shown in Fig. 8, the second electrode surface (for example, the negative electrode) of the PTC chip 340 is electrically soldered on the second conductor 322b in a SMT manner by a solder paste, a conductive adhesive, or other suitable material.

As shown in Fig. 8, the first electrode surface (for example, the positive electrode) of the diode chip 350 is electrically connected to the second electrode surface of the PTC chip 340 by the at least one via 323. In Fig. 8, the second electrode surface (for example, the negative electrode) of the diode chip 350 is electrically soldered on the third conductor 332 in a SMT manner by a solder paste, a conductive adhesive, or other suitable material.

In this way, according to the exemplary embodiment shown in Figs. 7 and 8, the positive electrode of the diode chip 350 and the negative electrode of the PTC chip 340 both are electrically coupled to the second conductor 322b on the lower surface of the middle substrate 321; the positive electrode of the PTC chip 340 is electrically coupled to the first conductor 312 on the upper surface of the bottom substrate 311; and the negative electrode of the diode chip 350 is electrically coupled to the second conductor 332 on the lower surface of the top substrate 331. Thereby, in this exemplary embodiment, the PTC chip 340 and the diode chip 350 are electrically coupled in series.

Referring to Figs. 7 and 8, the PTC chip 340 is laminated on the upper surface of the bottom substrate 311, the middle substrate 321 is laminated on the upper surface of the PTC chip 340, the diode chip 350 is laminated on the upper surface of the middle substrate 321, and the top substrate 331 is laminated on the upper surface of the diode chip 350. Although it is not shown, after laminating or stacking these components 311, 340, 321, 350 and 331, insulation paste (for example, liquid, B-stageable epoxy) may be injected between the top substrate 331, the middle substrate 321 and the bottom substrate 311 to form insulation protection packages covering the PTC chip 340 and the diode chip 350.

As shown Figs. 7 and 8, in the exemplary embodiment of the present invention, first, second and third conductive vias 301, 302, 303 are formed and extended through the top substrate 331, the insulation protection package (not shown), the middle substrate 321, the insulation protection package (not shown), and the bottom substrate 311 so as to electrically couple the first, second and third conductors 312, 322b, 332 to the first, second and third external terminals 1, 2, 3, respectively.

In one exemplary embodiment of the present invention, as shown in Fig. 7, a fourth conductor 322a is formed on the upper surface of the middle substrate 321. The at least one via 323 extends through the fourth conductor 322a. The first electrode surface (the lower surface) of the diode chip 350 is electrically connected to the fourth conductor 322a.

Referring to Fig. 7, in one exemplary embodiment of the present invention, the fourth conductor 322a also is electrically connected to the second external terminal 2 by the second conductive via 302.

In one exemplary embodiment of the present invention, the substrates 311, 321, 331 may be PCBs, and the conductors 312, 322a, 322b, 332 and the external terminals 1, 2, 3 may be wirings or conductive patterns printed on the PCBs. In this way, all terminals of the circuit protection device can be connected to leads by wirings or conductive patterns printed on the PCBs, instead of by additional external leads. Thereby, the present invention eliminates the leads and lead frames of the conventional circuit protection device, reducing costs and materials.

In another exemplary embodiment of the present invention, the conductors 312, 322a, 322b, 332 or/and the external terminals 1, 2, 3 may be conductive sheets or strips on the substrates 311, 321, 331.

In another exemplary embodiment of the present invention, the conductors 312, 322a, 322b, 332 each may be shaped substantially the same as respective electrode surfaces coupled thereon, for example, in SMT manner.

Although several exemplary embodiments have been shown and described, it would be appreciated by those skilled in the art that various changes or modifications may be made in these embodiments without departing from the principles and spirit of the disclosure, the scope of which is defined in the claims and their equivalents.

Claims

What is claimed is,

1. A circuit protection device, comprising:

a PTC chip (130) having a first electrode surface and a second electrode surface opposite to the first electrode surface;

a diode chip (140) having a first electrode surface which is a cathode and a second electrode surface which is an anode opposite to the first electrode surface; and at least two substrates (111, 121), on surfaces of which three different conductors (112, 113, 122) and three different external terminals (1, 2, 3) corresponding to the three different conductors are formed, the PTC chip, the diode chip and the at least two substrates being laminated to each other,

an insulation protection package being formed between the at least two substrates to cover the PTC chip and the diode chip,

three conductive vias (101, 102, 103) being formed in the at least two substrates and the insulation protection package to electrically connect the three different conductors to the corresponding three different external terminals, and

one electrode surface of the PTC chip and the first electrode surface of the diode chip being electrically connected to one of the external terminals through one of the conductors and one of the vias, the other electrode surface of the PTC chip and the second electrode surface of the diode chip, respectively, being electrically connected to other two of the external terminals through the other two of the conductors and the other two of the vias.

2. The circuit protection device according to claim 1, wherein each of the electrode surfaces of the PTC chip and the diode chip are electrically soldered on the

corresponding conductor in a surface mounting manner.

3. The circuit protection device according to claim 1, wherein the device comprises a bottom substrate (111) and a top substrate (121);

a first conductor (112) and a second conductor (113) are separately formed on an upper surface of the bottom substrate (111), and a first external terminal (1), a second external terminal (2) and a third external terminal (3) are separately formed on a lower surface of the bottom substrate (111); a third conductor (122) is formed on a lower surface of the top substrate (121), and a first external terminal (1), a second external terminal (2) and a third external terminal (3) are separately formed on an upper surface of the top substrate (121);

the PTC chip (130) and the diode chip (140) are laminated between the bottom substrate (111) and the top substrate (121),

a first conductive via (101), a second conductive via (102) and a third conductive via (103) are formed in the bottom and the top substrates to electrically connect the first, the second and the third conductors to the first, the second and the third external terminals respectively,

the first electrode surface of the PTC chip is electrically connected to the first conductor (112), the second electrode surface of the diode chip is electrically connected to the second conductor (113), and the second electrode surface of the PTC chip and the first electrode surface of the diode chip both are electrically connected to the third conductor (122).

4. The circuit protection device according to claim 3, wherein the PTC chip and the diode chip have a substantially same thickness.

5. The circuit protection device according to claim 1, wherein the device comprises a bottom substrate (211), a middle substrate (221) and a top substrate (231);

a first conductor (212) is formed on an upper surface of the bottom substrate (211), and a first external terminal (1), a second external terminal (2) and a third external terminal (3) are separately formed on a lower surface of the bottom substrate (211); a second conductor (222) is formed on a lower surface of the middle substrate (221), and a window (223) is formed in the middle substrate;

a third conductor (232) is formed on a lower surface of the top substrate (231), and a first external terminal (1), a second external terminal (2) and a third external terminal (3) is separately formed on an upper surface of the top substrate (231);

a first conductive via (201), a second conductive via (202) and a third conductive via (203) are formed in the substrates (211, 221, 231) to electrically connect the first, the second and the third conductors to the first, the second and the third external terminals respectively;

the PTC chip is laminated between the bottom substrate (211) and the middle substrate (221), and the first and the second electrode surfaces of the PTC chip are electrically connected to the first and the second conductors; and the diode chip is disposed in the window of the middle substrate (221) so that the first electrode surface of the diode chip is electrically connected to the second electrode surface of the PTC chip, and the second electrode surface of the diode chip is electrically connected to the third conductor.

6. The circuit protection device according to claim 5, wherein the diode chip and the middle substrate have a substantially same thickness.

7. The circuit protection device according to claim 1, wherein the device comprises a bottom substrate (311), a middle substrate (321) and a top substrate (331);

a first conductor (312) is formed on an upper surface of the bottom substrate (311), and a first external terminal (1), a second external terminal (2) and a third external terminals (3) are separately formed on a lower surface of the bottom substrate (311); a second conductor (322b) is formed on a lower surface of the middle substrate (321), and at least one via (323) is formed in the middle substrate and extends through the middle substrate and the second conductor;

a third conductor (332) is formed on a lower surface of the top substrate (331), and a first external terminal (1), a second external terminal (2) and a third external terminal (3) is separately formed on an upper surface of the top substrate (331);

a first conductive via (301), a second conductive via (302) and a third conductive via (303) is formed in the substrates (311, 321, 331) to electrically connect the first, the second and the third conductors to the first, the second and the third external terminals respectively;

the PTC chip (340) is laminated between the bottom substrate (311) and the middle substrate (321), and the first and the second electrode surfaces of the PTC chip (340) are electrically connected to the first and the second conductors (312, 322b);

the diode chip (350) is laminated between the middle substrate (321) and the top substrate (331) so that the first electrode surface of the diode chip (350) is electrically connected to the second electrode surface of the PTC chip (340) by the at least one via (323), and the second electrode surface of the diode chip (350) is electrically connected to the third conductor.

8. The circuit protection device according to claim 7, wherein

a fourth conductor (322a) is formed on an upper surface of the middle substrate (321), the at least one via (323) extends through the fourth conductor (322a), and the first electrode surface of the diode chip (350) is electrically connected to the fourth conductor (322a).

9. The circuit protection device according to claim 8, wherein the fourth conductor (322a) is electrically connected to the second external terminal (2) by the second conductive via (302).

10. The circuit protection device according to any one of the preceding claims, wherein the substrates are printed circuit boards (PCBs), and the conductors and the external terminals are wirings on the PCBs.

11. The circuit protection device according to any one of claims 1 to 9, wherein the substrates are printed circuit boards (PCBs), and the conductors are conducting strips on the PCBs, each of the conducting strips being substantially the same as the respective electrode surface in shape.

12. The circuit protection device according to any one of claims 3 to 9, wherein the substrates are PCBs, the external terminals on the lower surface of the bottom substrate and/or on the upper surface of the top substrate are conducting strips on the PCB.

13. The circuit protection device according to claim 12, wherein each of the conducting strips is shaped and adapted to be mounted in a surface mounting manner.