JP2003100984A - Circuit module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To three-dimensionally mount semiconductor chips in a circuit module. SOLUTION: A semiconductor module 40 mounted with LSI 31 and chips 36 are mounted on a conductive foil pattern 39. Second-surface chips 36 are mounted on a second conductive foil pattern 39 formed in the semiconductor module 40. The semiconductor module 40 is mounted as facing upward, and electrical connection between the semiconductor module and the conductive foil pattern 39 is provided by metal thin wires 34. The second-surface chips 36 are mounted as facing downward. Thus, semiconductor chips can be three- dimensionally mounted in the circuit module 30. The semiconductor module 40 uses as a supporting board what is obtained by bonding together a first conductive pattern 41 and a second conductive pattern 37 with an interlayer insulating film in-between. Therefore, the semiconductor module 40 internally mounted is of thin type and obviates a mounting board.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit module, and more particularly to a circuit module that allows three-dimensional mounting of semiconductor elements inside the circuit module.

[0002]

2. Description of the Related Art Conventionally, a circuit module set in an electronic device has been used in a mobile phone, a portable computer, etc., and thus has been required to be small, thin and lightweight.

For example, when a semiconductor device is taken as an example of a circuit module, there is a package type semiconductor device sealed by a conventional transfer mold as a general semiconductor device. This semiconductor device is mounted on a printed circuit board PS as shown in FIG.

Further, in this package type semiconductor device, the periphery of the semiconductor chip 2 is covered with a resin layer 3, and lead terminals 4 for external connection are led out from the side portions of the resin layer 3.

However, this package type semiconductor device 1 is
Since the lead terminal 4 is out of the resin layer 3, the overall size is large, and the reduction in size, thickness, and weight are not satisfied.

[0006] Therefore, each company has developed various structures in order to competitively realize downsizing, thinning, and weight reduction, and recently, a wafer scale CSP called a CSP (chip size package), which is equivalent to a chip size, Alternatively, a CSP having a size slightly larger than the chip size has been developed.

FIG. 16 shows a CS having a glass epoxy substrate 5 as a supporting substrate and slightly larger than the chip size.
It shows P6. Here, glass epoxy substrate 5
The description will be made assuming that the transistor chip T is mounted on.

A first electrode 7, a second electrode 8 and a die pad 9 are formed on the front surface of the glass epoxy substrate 5, and a first back surface electrode 10 and a second back surface electrode 11 are formed on the back surface.
Are formed. And through the through hole TH,
The first electrode 7 and the first back surface electrode 10 are electrically connected, and the second electrode 8 and the second back surface electrode 11 are electrically connected. The bare transistor chip T is fixed to the die pad 9, and the emitter electrode of the transistor and the first electrode 7 are attached.
Are connected via a metal thin wire 12, and the base electrode of the transistor and the second electrode 8 are connected via a metal thin wire 12. Further, a resin layer 13 is provided on the glass epoxy substrate 5 so as to cover the transistor chip T.

The CSP 6 adopts the glass epoxy substrate 5, but unlike the wafer scale CSP, it has a simple structure of extending from the chip T to the backside electrodes 10 and 11 for external connection, and has an advantage that it can be manufactured at low cost. Have.

The CSP 6 is mounted on a printed circuit board PS as shown in FIG. The printed circuit board PS has
The CSP is provided with electrodes and wiring that form an electric circuit.
6, the package type semiconductor device 1, the chip resistor CR, the chip capacitor CC, etc. are electrically connected and fixed.

The circuit composed of this printed circuit board is mounted in various sets.

Next, a method of manufacturing this CSP will be described with reference to FIGS.

First, a glass epoxy substrate 5 is prepared as a base material (supporting substrate), and C is formed on both surfaces of the glass epoxy substrate 5 via an insulating adhesive.
The u foils 20 and 21 are pressure bonded. (Refer to FIG. 17 (A) above) Subsequently, the first electrode 7, the second electrode 8, the die pad 9, the first back surface electrode 10 and the second back surface electrode 11 corresponding to the corresponding Cu foils 20 and 21 are resistant. Etching resist 22
And Cu foils 20 and 21 are patterned. still,
The patterning may be separate for the front and back (see FIG. 1 above).
7 (B)) Subsequently, a hole for the through hole TH is formed in the glass epoxy substrate by using a drill or a laser, and the hole is plated to form the through hole TH. Due to the through holes TH, the first electrode 7 and the first back surface electrode 10, the second electrode 8 and the second back surface electrode 10 are formed.
Are electrically connected. Although not shown in the drawing, the first electrode 7 and the second electrode 8 serving as the bonding posts are plated with Au, and the die pad 9 serving as the die bonding post is Au-plated, although not shown in the drawing.
Plating is performed, and the transistor chip T is die-bonded.

Finally, the emitter electrode of the transistor chip T and the first electrode 7, and the base electrode of the transistor chip T and the second electrode 8 are connected via a thin metal wire 12 and covered with a resin layer 13. (Refer to FIG. 17 (D) above) By the above manufacturing method, the CSP type electric element employing the supporting substrate 5 is completed. This manufacturing method is the same when a flexible sheet is used as the supporting substrate.

[0015]

In FIG. 16, the transistor chip T, the connecting means 7 to 12 and the resin layer 13 are provided.
Is a necessary component for electrical connection with the outside and protection of the transistor, but it was difficult to provide a circuit element that achieves downsizing, thinning, and weight saving with only these components. .

Further, the glass epoxy substrate 5 serving as the supporting substrate is essentially unnecessary as described above. However, because of the manufacturing method, since the electrodes are bonded together, they are used as a supporting substrate, and the glass epoxy substrate 5 cannot be eliminated.

Therefore, by adopting this glass epoxy substrate 5, the cost rises, and further, since the glass epoxy substrate 5 is thick, it becomes thick as a circuit element,
There were limits to miniaturization, thinning, and weight reduction.

Furthermore, in the conventional circuit module, the semiconductor elements are planarly mounted on the mounting board, and it is difficult to improve the mounting density.

[0019]

SUMMARY OF THE INVENTION The circuit module of the present invention is made in view of the above-mentioned problems, and firstly, it is provided via a first conductive pattern and an interlayer insulating film embedded in an insulating resin. A semiconductor module having a support substrate formed of a second conductive pattern, the semiconductor module having a semiconductor element fixed to the first conductive pattern by flip-chip bonding, and the semiconductor module having the second conductive pattern on the upper side. Insulating resin in which the conductive foil pattern adhered and fixed is embedded, the back surface chip component mounted on the second conductive pattern, the extraction electrode of the semiconductor module, and the conductive foil pattern are electrically connected. The solution is to have the thin metal wire and the external connection electrode formed on the conductive foil pattern.

By providing the back surface chip component on the second conductive pattern of the semiconductor module, the semiconductor elements can be arranged three-dimensionally inside the circuit module. Therefore, the packaging density of the circuit module can be improved.

Secondly, the back surface chip component is a capacitor, a resistor, a transistor, a diode or an LSI, which is a solution.

Third, a solution is to mount a capacitor, a resistor, a transistor, a diode or an LSI on the second conductive foil pattern in addition to the semiconductor module.

Fourth, the first conductive pattern, the second conductive foil pattern and the conductive foil pattern are formed by using copper, aluminum or iron-nickel as a main material. is there.

Fifth, the extraction electrode is provided by being provided in the peripheral portion of the semiconductor module.

Sixth, the semiconductor device is solved by being an LSI.

Seventh, a support substrate formed of a first conductive pattern embedded in an insulating resin and a second conductive pattern provided via an interlayer insulating film is provided, and the first conductive pattern is formed on the support substrate. A semiconductor module having a semiconductor element fixed by flip chip bonding, a third conductive pattern embedded in an insulating resin layer, and a fourth conductive pattern provided via an interlayer insulating film are provided. The support substrate fixed to the third conductive pattern with the second conductive pattern on the upper side, the back surface chip component mounted on the second conductive pattern, the extraction electrode of the semiconductor module, and the third conductive pattern. A thin metal wire for electrically connecting with a pattern, and covering the semiconductor module, the backside chip component and the thin metal wire,
In addition, the problem is solved by having an insulating resin that supports the whole and an external connection electrode formed on the fourth conductive pattern.

Eighthly, the problem is solved by mounting a capacitor, a resistor, a transistor, a diode or an LSI on the third conductive pattern in addition to the semiconductor module.

Ninth, the first conductive pattern, the second conductive pattern, the third conductive pattern, and the fourth conductive pattern are composed mainly of copper, aluminum, or iron-nickel. The solution is to be solved.

Tenth, the problem is solved by the fact that the back surface chip component is a capacitor, a resistor, a transistor, a diode or an LSI.

Eleventh, the circuit module according to claim 7, wherein the extraction electrode is provided in a peripheral portion of the semiconductor module.

Twelfth, the semiconductor element is solved by being an LSI.

[0032]

BEST MODE FOR CARRYING OUT THE INVENTION First Embodiment for Explaining the Structure of a Circuit Module First, a circuit module 30 of the present invention will be described with reference to FIG. FIG. 1A shows a circuit module 30.
FIG. 1 (B) is a top view thereof. In the present embodiment, a circuit module 30 having a conductive foil pattern 39 of single-layer wiring in which a conductive foil pattern 39 is embedded in an insulating resin 35 will be described.

Referring to FIG. 1A, a circuit module 30 according to the present invention includes a conductive foil pattern 39, a chip component 33 and a semiconductor module 40 mounted on the conductive foil pattern 39, and a semiconductor module 40. The back surface chip component 36 mounted on the second conductive pattern, the thin metal wire 34 for electrically connecting the extraction electrode 42 of the semiconductor module 40 and the conductive foil pattern 39, and the above elements are covered and supported as a whole. Insulating resin 35 is used.

Each element constituting the above circuit module 30 will be described.

The semiconductor module 40 is constructed by mounting the LSI 31 on the first conductive pattern 41 by flip chip. The semiconductor module 40 is mounted face up on the conductive foil pattern 39 using an insulating adhesive. Electrical connection between the extraction electrode 42 of the semiconductor module 40 and the conductive foil pattern 39 is made by a thin metal wire 40. In addition, the back surface chip component 36 is mounted on the second conductive pattern 37 of the semiconductor module 40, and also functions as a mounting substrate. Semiconductor module 40
The detailed configuration and manufacturing method will be described later.

As the conductive foil pattern 39, a conductive foil mainly made of Cu, a conductive foil mainly made of Al, or F
A conductive foil made of an alloy such as e-Ni can be used. Of course, other conductive materials are also possible, and in particular, a conductive material that can be etched and a conductive material that evaporates with a laser are preferable.

As the chip parts 33, capacitors, resistors, transistors, diodes or LSIs are mounted face down on the conductive foil pattern 39. Here, the chip component 33 may be electrically connected to the semiconductor module 40 or may be electrically independent.

As the backside chip component 36, like the chip component 33, a capacitor, a resistor, a transistor, a diode or an LSI is adopted. Then, the back surface chip component 36 is mounted face down on the second conductive pattern 37 of the semiconductor module 40. in this way,
By mounting the backside chip component 36 on the backside of the semiconductor module 40, the mounting density of the circuit module 30 can be improved. Therefore, the circuit module 3
0 can be made smaller and thinner.

Here, the chip component 33 and the back surface chip component 36 are connected using a metal connecting plate, a conductive ball made of a brazing material, a brazing material such as solder, and a conductive paste such as Ag paste.

As the insulating resin 35, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide resin or polyphenylene sulfide can be used. Further, as the insulating resin, any resin can be adopted as long as it is a resin that can be hardened using a mold, a resin that can be coated by dipping or coating. In the present invention, the insulating resin 35 not only seals the semiconductor element and the like but also has a function of supporting the entire circuit module.

With reference to FIG. 1B, the extraction electrode 42
Are provided in the peripheral portion of the semiconductor module 40. The semiconductor module 40 and the conductive foil pattern 39 are electrically connected by the thin metal wire 34 via the extraction electrode 42. Although there are about 20 extraction electrodes 42 in this figure, a large number of extraction electrodes 42 are actually provided.

Next, referring to FIG. 2, the conductive foil pattern 3 is formed.
The structure of the semiconductor module 40 mounted on the No. 9 will be described. 2A is a sectional view of the semiconductor module 40, FIG. 2B is a top view thereof, and FIG. 2C is a rear view thereof.

Referring to FIG. 2A, the semiconductor module 40 includes a first conductive pattern 4 embedded in an insulating resin.
1, the second conductive pattern 37 provided via the interlayer insulating film 38, and the LSI 31 fixed to the first conductive pattern
And the backside chip component 3 fixed to the second conductive pattern
6 and the extraction electrode 4 formed of the second conductive pattern
2 and.

Next, each element constituting the semiconductor module 40 built in the circuit module 30 will be described.

The interlayer insulating film 38 is preferably made of polyimide resin, epoxy resin or the like. In the case of a casting method in which a paste is applied to form a sheet, the film thickness is 10 μm
It is about 100 μm. When formed as a sheet, the commercially available one has a minimum film thickness of 25 μm. Further, a filler may be mixed in considering the thermal conductivity. As the material, glass, Si oxide, aluminum oxide, Al nitride, Si carbide, boron nitride or the like is used. The first conductive pattern 41 and the second conductive pattern 37 are joined via this interlayer insulating film 38 and have a function of a supporting substrate. Therefore, since the mounting board used in the conventional semiconductor device is not required, the semiconductor module 40 is thin and lightweight.

The LSI 31 is flip-chip mounted on the connection electrode 43 formed of the second conductive pattern 37. The size of the support substrate 46 on which the backside chip component 36 is mounted is determined by the size of the LSI 31. Therefore, as the LSI 31, the largest one among the circuit elements mounted on the circuit module 30 is adopted. As a result, a larger number of chip components can be mounted on the support substrate 46, and the mounting density of the circuit modules 30 can be improved.

Referring to FIG. 2B, second conductive pattern 37 forms pad 45 on which a backside chip is mounted and extraction electrode 42. Further, a pattern for electrically connecting the pad 45 and the extraction electrode 42 is also formed.
Further, a pattern for electrically connecting the connection electrode 43 provided on the opposite surface and the extraction electrode 42 is also provided. This pattern is electrically connected through the through hole 44. This makes it possible to create a more complicated conductive pattern.

Referring to FIG. 2C, the first conductive pattern mainly forms the connection electrode 43 for flip-chip mounting the LSI 31. In addition, the backside chip component 36
Also, a pattern for electrically connecting the extraction electrode 42 with the extraction electrode 42 is formed. As the material of the first conductive pattern 41 and the second conductive pattern 37, a conductive foil mainly made of Cu, a conductive foil mainly made of Al, a conductive foil made of an alloy such as Fe-Ni, or the like. Is used. Further, in order to prevent the first conductive pattern 41 from short-circuiting with the LSI 31, the first conductive pattern 41 is partially covered with an insulating resin. Here, since the support substrate 46 has a certain degree of mechanical strength, the position of the connection electrode 43 can be set arbitrarily.

A feature of the circuit module 30 according to the present invention is that semiconductor elements are three-dimensionally mounted as shown in FIG.

This feature will be specifically described. The semiconductor module 40 has the LSI 31 built therein and further has a second conductive pattern 37 on the back surface thereof. Therefore, the chip component 36 can be mounted on the pad formed by the second conductive pattern 37. That is, the backside chip component 36 can be further mounted on the semiconductor module 40 mounted on the conductive foil pattern 39. For this reason, in the past, semiconductor elements were mounted on a mounting substrate in a plane, but the circuit module 30 of the present invention has semiconductor elements built in three-dimensionally.

Further, since the support substrate of the semiconductor module 40 has the first conductive pattern 41 and the second conductive pattern 37, it is possible to form a multi-layer wiring and form a complicated conductive pattern. This makes it possible to employ a semiconductor element such as an LSI having many input / output terminals as the backside chip component 36.

Furthermore, since the circuit module 30 of the present invention is wholly supported by the insulating resin 35, it is formed of the minimum necessary constituent elements.

From the above, the circuit module 30 of the present invention is thin and lightweight.

Further, referring to FIG. 1A, the LSI 31
The semiconductor module 40 on which is mounted is mounted face up on the conductive foil pattern 39. In the prior art, since the glass epoxy substrate 5 was used as the mounting substrate as in the CSP 6 shown in FIG. 16, the heat dissipation of the heat generated from the transistor T was very poor. On the other hand, in the circuit module 30, since the LSI 31 is directly fixed to the conductive foil pattern 39, the heat generated from the LSI 31 is radiated to the outside through the conductive foil pattern 39. From this, it can be said that the circuit module 30 according to the present invention has a very excellent heat dissipation property.

Here, the LSI 31 has a conductive foil pattern 39.
While heat can be released to the outside via the backside chip component 36, it is not easy to release heat because the back surface chip component 36 is sealed by the insulating resin 35. Therefore, by adopting a small-signal type semiconductor element having a small heat generation amount as the backside chip component 36 and a power type semiconductor element having a large heat generation amount as the LSI 31, the heat dissipation of the circuit module 30 can be further improved. it can. Second Embodiment Explaining Structure of Circuit Module A circuit module 50 of the present invention will be described with reference to FIG. 3A is a cross-sectional view of the circuit module 50, and FIG. 3B is a top view thereof. Here, in FIG. 3, the parts denoted by the same reference numerals as those in FIG. 1 represent the same things.

In the present embodiment, a circuit module 50 having a third conductive pattern 51 and a fourth conductive pattern 52 provided with an interlayer insulating film 53 interposed therebetween will be described.

Referring to FIG. 3A, a circuit module 50 according to the present invention has a third conductive pattern 51 and a fourth conductive pattern 52 provided with an interlayer insulating film 53 interposed therebetween.
, The chip component 33 and the semiconductor module 40 mounted on the third conductive pattern 51, the back surface chip component 36 mounted on the second conductive pattern of the semiconductor module 40, and the extraction electrode 42 of the semiconductor module 40. And a thin metal wire 34 for electrical connection with the third conductive pattern 51, and an insulating resin 35 for covering the above elements and supporting the whole.

As described above, the constituent elements of the circuit module 50 are the circuit module 30 described in the first embodiment.
Is basically the same as The point of the circuit module 50 lies in the third conductive pattern 51 and the fourth conductive pattern 52 provided via the interlayer insulating film 53. Therefore, in this embodiment, only this point will be described, and description of other elements will be omitted.

The interlayer insulating film 53 is preferably made of polyimide resin, epoxy resin or the like. In the case of a casting method in which a paste is applied to form a sheet, the film thickness is 10 μm
It is about 100 μm. When formed as a sheet, the commercially available one has a minimum film thickness of 25 μm. Further, a filler may be mixed in considering the thermal conductivity. As the material, glass, Si oxide, aluminum oxide, Al nitride, Si carbide, boron nitride or the like is used.

The third conductive pattern 51 is formed by etching a sheet-shaped conductive film. The first conductive film is formed to have a thickness of about 5 to 35 μm, and bonding pads and wirings are formed by etching. Regarding the number of bonding pads, the finer the pattern, the more the number of the extraction electrodes 42 of the semiconductor module 40 increases. In addition, a portion of the third conductive pattern that is connected to the metal fine wire 34 or the electrode of the chip component 33 is plated with gold or silver so that bonding can be performed.

Similar to the third conductive pattern 51, the fourth conductive pattern 52 is formed by etching a sheet-shaped conductive film. The thickness of the fourth conductive pattern 52 is 70 μm.
m to 200 μm, which is not suitable for a fine pattern, but the external connection electrode 32 is mainly formed,
Multi-layer wiring is formed if necessary.

The semiconductor module 40 is fixed on the insulating resin 54 covering the third conductive pattern 51 with an adhesive, and the semiconductor module 40 and the third conductive pattern 51 are electrically insulated. As a result, the fine conductive third conductive pattern 51 can be freely arranged below the semiconductor module 40, and the degree of freedom of wiring is significantly increased.

Although the circuit module 50 shown in FIG. 3 has a multilayer wiring of two layers, it is possible to provide a conductive pattern of three or more layers if necessary. By increasing the number of conductive pattern layers, it is possible to form a more complicated conductive pattern and improve the packaging density of circuit modules. Third Embodiment Explaining Method of Manufacturing Circuit Module Next, a method of manufacturing the circuit module 30 will be described with reference to FIGS. Here, steps for manufacturing the semiconductor module 40 that is a mounting component and further manufacturing the circuit module 30 will be described.

In this embodiment, a method of manufacturing the circuit module 30 shown in FIG. 1 will be described. The method of manufacturing the circuit module 50 shown in FIG. 3 is also the same as the circuit module 30 of FIG. 1 except for the step of manufacturing the conductive foil pattern 39.

FIG. 4 shows a flow for manufacturing a circuit module. As shown in this flow, the semiconductor module is manufactured by the flow of the semiconductor module. The conductive foil pattern is formed by three flows of Cu foil, Ag plating, and half etching. In the die-bonding flow, the semiconductor module and chip parts are fixed to each mounting part. At the same time, the backside chip component is mounted on the backside of the semiconductor module. In the wire bonding flow, the semiconductor module and the conductive foil pattern are electrically connected. In the transfer molding flow, common molding is performed using an insulating resin. In the flow of removing the backside Cu foil, the entire backside of the conductive foil is etched until the insulating resin is exposed. In the flow of measurement, non-defective products and characteristic ranks of the semiconductor elements incorporated in each mounting part are determined. In the dicing flow, the insulating resin is separated into individual circuit modules by dicing.

Each step of manufacturing the circuit module of the present invention will be described below with reference to FIGS.

The first step is to manufacture the semiconductor module 40 incorporated in the circuit module 30, as shown in FIGS.

In this step, first, referring to FIG.
Support substrate 4 having first conductive pattern 41 and second conductive pattern 37 adhered via interlayer insulating film 38
Prepare 6. Although the first conductive pattern 41 is overcoated with the resin layer, this overcoat is not always necessary. Then, the first conductive pattern 4
The surface of the external connection electrode 43 formed of 1 is plated for electrical connection with the LSI 31.

Next, referring to FIG. 5B, the supporting substrate 4
The LSI 31 is mounted on 6 via an insulating adhesive. Here, the electrical connection between the LSI 31 and the support substrate 46 is L
This is performed by joining the electrode of SI31 and the connection electrode 31 of the supporting substrate.

Next, referring to FIG. 6A, the LSI 31
The supporting substrate 46 on which the dicing blade 49 is mounted.
Are used to separate the individual semiconductor modules 40.

Finally, referring to FIG. 6B, the semiconductor module 40 is completed. The semiconductor module 40 is mounted on the conductive foil pattern 39 in a later step. Also, the second
The back surface chip component is mounted on the conductive foil pattern 37.

In the second step, as shown in FIGS. 7 to 9, the conductive foil 60 is prepared, and at least the conductive foil pattern 39 for forming a large number of mounting portions of the semiconductor module 40 and the chip parts 33 is removed. Conductive foil 60 to conductive foil 60
This is to form a conductive foil pattern 39 by forming a separation groove shallower than the thickness of the conductive foil pattern by chemical etching.

In this step, first, as shown in FIG. 7A, a sheet-shaped conductive foil 60 is prepared. The material of the conductive foil 60 is selected in consideration of the adhesiveness, the bonding property, and the plating property of the brazing material, and the material is a conductive foil containing Cu as a main material, a conductive foil containing Al as a main material, or Fe. -A conductive foil or the like made of an alloy such as Ni is adopted.

The thickness of the conductive foil is preferably about 10 μm to 300 μm in consideration of later etching. However, as will be described later, the separation groove 61 that is shallower than the thickness of the conductive foil 60.
Any thickness is acceptable as long as it can be formed.

The sheet-shaped conductive foil 60 has a predetermined width,
For example, it may be prepared by being rolled into a roll of 45 mm and conveyed to each step described below, or a strip-shaped conductive foil 60 cut into a predetermined size may be prepared and conveyed to each step described below. May be.

Specifically, as shown in FIG. 7B, a block 6 in which a large number of mounting portions are formed on a strip-shaped conductive foil 60.
2 to 4 are arranged apart from each other. Slits 63 are provided between the blocks 62 to absorb the stress of the conductive foil 60 generated by the heat treatment in the molding process or the like. In addition, index holes 64 are provided at the upper and lower peripheral ends of the conductive foil 60 at regular intervals and are used for positioning in each step.

Subsequently, a conductive foil pattern is formed.

First, as shown in FIG. 8, a conductive foil 60 is formed by forming a photoresist (etching resistant mask) PR on a Cu foil 60 and excluding a region to be a conductive foil pattern 39.
The photoresist PR is patterned so that the photoresist is exposed. Then, the conductive foil 60 is selectively etched through the photoresist PR.

Specifically, the depth of the separation groove formed by this chemical etching is, for example, 50 μm, the side surface becomes a rough surface, and since it is etched non-anisotropically, the side surface has a curved structure. Therefore, the adhesiveness with the insulating resin 35 is improved.

Note that, in FIG. 8, a conductive film (not shown) having corrosion resistance to an etching solution may be selectively coated instead of the photoresist. When the conductive film is selectively deposited on the part to be the conductive path, the conductive film serves as an etching protection film, and the separation groove can be etched without using a resist. The material considered as the conductive coating is A
g, Ni, Au, Pt, or Pd. Moreover, these corrosion-resistant conductive coatings have the feature that they can be used as they are as die pads and bonding pads.

For example, the Ag coating adheres not only to Au but also to the brazing material. Therefore, if the back surface of the chip is covered with the Au film, the chip can be directly thermocompression-bonded to the Ag film on the conductive foil pattern 39, and the chip can be fixed via a brazing material such as solder. Further, since the Au thin wire can be adhered to the Ag conductive film, wire bonding is also possible. Therefore, there is a merit that these conductive coatings can be directly used as a die pad and a bonding pad.

FIG. 9 shows a specific conductive foil pattern. This drawing corresponds to an enlarged one of the blocks 62 shown in FIG. One of the parts painted in black is one mounting part 65, which constitutes the conductive foil pattern 39, and a large number of mounting parts 65 are arranged in a matrix in one block 62, and each mounting part 65 is the same. The conductive foil pattern 39 is provided. A frame-shaped pattern 6 around each block
6 is provided, and an alignment mark 67 at the time of dicing is provided at a position slightly separated from it. The frame-shaped pattern 66 is used for fitting with a molding die, and also has a function of reinforcing the insulating resin 35 after the back surface of the conductive foil 60 is etched.

In the above description, the method of forming a single-layer conductive foil pattern has been described, but the conductive pattern may be a multi-layered one using an interlayer insulating film.

In the third step, as shown in FIG. 10, the semiconductor module 40 is formed on the desired conductive foil pattern 39 of each mounting portion.
The chip component 36 is fixed, and the back surface chip component 36 is mounted on the back surface of the semiconductor module 40. FIG. 10A is a plan view of one mounting portion.
0 (B) is a cross-sectional view taken along the line AA of FIG. 10 (A).

The semiconductor module 40 is mounted face up. Then, as the chip component 33, a capacitor, a resistor, a transistor, a diode or an LSI is mounted. Here, the semiconductor module 40 is mounted on the conductive foil pattern 39 with an insulating adhesive, and the chip component 3
3 is a brazing material such as solder or a conductive paste, and is fixed to the conductive foil pattern 39.

Referring to FIG. 10B, the point of the present invention is to mount the back surface chip component 36 on the semiconductor module 40. The support substrate, which is the mounting substrate of the semiconductor module 40, has the second conductive pattern 3 on the back surface thereof.
Have 7. The second conductive pattern is the backside chip component 36.
Has a pad for mounting the back surface chip component 36 on this pad. From this, in the circuit module 30 of the present invention, semiconductor elements can be three-dimensionally mounted therein.

As shown in FIG. 11, the fourth step is to wire-bond the lead-out electrode 42 of the semiconductor module 40 of each mounting portion 65 and the desired conductive foil pattern 39. 11A is a plan view of one mounting portion, and FIG. 11B is a cross-sectional view taken along the line AA of FIG. 11A.

In this step, the lead-out electrodes 42 of the semiconductor module 40 on each mounting portion in the block 62 and the desired conductive foil pattern 39 are collectively wire-bonded by ball bonding by thermocompression bonding and wedge bonding by ultrasonic waves. .

Further, according to the present invention, wire bonding can be performed extremely efficiently, as compared with the conventional circuit device manufacturing method in which the clamper is used for each mounting portion to perform wire bonding.

In the fifth step, as shown in FIG. 12, the semiconductor modules 40 and the like of each mounting portion 65 are collectively covered and are commonly molded with the insulating resin 35 so as to fill the separation groove 61. is there.

In this step, as shown in FIG.
The insulating resin 35 is used for the semiconductor module 40 and the chip component 3.
3 and the back surface chip component 36 are completely covered, and the isolation groove 61 between the conductive foil patterns 39 is filled with the insulating resin 35, and the insulating resin 35 is fitted and firmly bonded to the curved structure on the side surface of the conductive foil pattern. The conductive foil pattern 39 is supported by the insulating resin 35.

Further, this step can be realized by transfer molding, injection molding or potting. As the resin material, a thermosetting resin such as an epoxy resin can be realized by transfer molding, and a thermoplastic resin such as a polyimide resin or polyphenylene sulfide can be realized by injection molding.

Further, when transfer molding or injection molding is performed in this step, as shown in FIG.
As shown in (B), each block 62 accommodates the mounting portion 65 in one common molding die, and performs common molding with one insulating resin 35 for each block. Therefore, the amount of resin can be significantly reduced as compared with the conventional method of individually molding each mounting portion such as transfer molding.

Insulating resin 3 coated on the surface of the conductive foil 60
The thickness of No. 5 is adjusted so that about 100 μm is covered from the top of the thin metal wire 34. This thickness can be increased or decreased in consideration of strength.

The feature of this step is that the conductive foil 60 which becomes the conductive foil pattern 39 serves as a support substrate until the insulating resin 35 is covered. In the present invention, the conductive foil 60 serving as the supporting substrate is a material required as an electrode material. Therefore, there is a merit that the constituent materials can be omitted as much as possible, and the cost can be reduced.

Further, since the separation groove 61 is formed to be shallower than the thickness of the conductive foil, the conductive foil 60 is formed by the conductive foil pattern 3.
Not individually separated as 9. Therefore, the sheet-shaped conductive foil 60 can be handled integrally, and when it is molded with the insulating resin 35, it is very easy to carry it to the mold and to mount it on the mold.

The sixth step is as shown in FIG.
This is to etch the entire back surface of the conductive foil 60 until the insulating resin 35 is exposed.

In this step, the back surface of the conductive foil 60 is chemically and / or physically removed to separate it as the conductive foil pattern 39. This step is performed by polishing, grinding, etching, laser metal evaporation, or the like.

In the experiment, the entire surface was ground to about 30 μm by a polishing device or a grinding device, and the insulating resin 35
Is exposed. This exposed surface is shown by a dotted line in FIG. As a result, the conductive foil pattern 39 having a thickness of about 40 μm is separated. Alternatively, the entire surface of the conductive foil 60 may be wet-etched before the insulating resin 35 is exposed, and then the entire surface may be ground by a polishing or grinding device to expose the insulating resin 35. Furthermore, the entire surface of the conductive foil 60 is wet-etched to the position shown by the dotted line,
The insulating resin 35 may be exposed.

As a result, the back surface of the conductive foil pattern 39 is exposed on the insulating resin 35. That is, the surface of the insulating resin 35 with which the separation groove 61 is filled and the surface of the conductive foil pattern 39 substantially coincide with each other. Therefore, since the circuit module 30 of the present invention does not have a step like the conventional back electrodes 10 and 11 shown in FIG. 16, it can be moved horizontally by the surface tension of solder or the like during mounting and self-aligned. Have.

Further, the back surface of the conductive foil pattern 39 is processed to obtain a circuit module 30 as shown in FIG.

The seventh step is, as shown in FIG. 13, to measure the characteristics of the semiconductor elements of the mounting portions 65 which are molded together with the insulating resin 35.

After the back surface of the conductive foil 60 is etched in the previous step, each block 62 is separated from the conductive foil 60. Since this block 62 is connected to the remaining portion of the conductive foil 60 by the insulating resin 35, it can be achieved by mechanically peeling it from the remaining portion of the conductive foil 60 without using a cutting die.

As shown in FIG. 13, the back surface of the conductive foil pattern 39 is exposed on the back surface of each block 62, and the respective mounting portions 65 are arranged in the same matrix as in the formation of the conductive foil pattern 39. . This conductive foil pattern 39
The probe 68 is applied to the external connection electrode 32 exposed from the insulating resin 35, the characteristic parameters and the like of the circuit module 30 are individually measured to determine good / bad, and defective products are marked with magnetic ink or the like. .

In this step, the circuit modules 30 of the respective mounting portions 65 are integrally supported by the insulating resin 35 for each block 62, so that they are not individually separated.
Therefore, the blocks 62 placed on the mounting table of the tester perform pitch feeding in the vertical and horizontal directions by the size of the mounting portion 65 as indicated by the arrows, so that the circuit of each mounting portion 65 of the block 62 can be extremely quickly mass-produced. The module 30 can be measured. That is, since it is not necessary to distinguish between the front and back of the semiconductor device and recognize the positions of the electrodes, which are conventionally required, the measurement time can be significantly shortened.

The eighth step, as shown in FIG. 14, is to separate the insulating resin 35 for each mounting portion 65 by dicing.

In this step, the block 62 is vacuum-sucked to the mounting table of the dicing machine, and the dicing blade 69
Then, the insulating resin 35 in the separation groove 61 is diced along the dicing line 70 between the mounting portions 65 to separate the individual circuit modules 30.

In this step, the dicing blade 69 is preferably cut to a depth to cut the insulating resin 35, and after taking out the block 62 from the dicing device, it is advisable to break the chocolate with a roller. At the time of dicing, the alignment marks 67 facing each other inside the frame-shaped pattern 66 around each block provided in the first step described above are recognized in advance, and dicing is performed based on this. As is well known, in dicing, after dicing all the dicing lines 70 in the vertical direction, the mounting table is rotated by 90 degrees to perform dicing in accordance with the horizontal dicing lines 70.

One of the merits of the above-described manufacturing method is the existing technology and equipment, and the circuit module 3 of the present invention.
0 can be manufactured. In other words, with the existing technology and equipment, three-dimensional L
SI can be arranged. As a result, the packaging density of the circuit module 30 can be improved.
Therefore, it is possible to reduce the thickness and weight of the circuit module.

[0110]

According to the circuit module of the present invention, the following effects can be obtained.

First, the semiconductor element can be three-dimensionally mounted by mounting the backside chip component on the backside of the semiconductor module mounted face-up on the conductive foil pattern. The semiconductor module has a support substrate in which a first conductive pattern and a second conductive pattern are bonded by an interlayer insulating film, and an LSI is mounted on the first conductive pattern. Therefore, a plurality of back surface chip components can be mounted on the second conductive pattern. From this,
The packaging density of the circuit module can be improved, and further, the circuit module can be made smaller and lighter.

Second, since the semiconductor module is mounted on the conductive foil pattern with the LSI facing downward, the heat generated from the LSI can be efficiently dissipated. Therefore, the heat dissipation of the circuit module according to the present invention can be improved.

Thirdly, the circuit module of the present invention is wholly supported by the insulating resin that covers the semiconductor module and the like, and is thin and lightweight without using a mounting substrate. As a result, the circuit module can be made thinner and lighter.

[Brief description of drawings]

FIG. 1 is a diagram illustrating a circuit module of the present invention.

FIG. 2 is a diagram illustrating a semiconductor module that constitutes a circuit module of the present invention.

FIG. 3 is a diagram illustrating a circuit module of the present invention.

FIG. 4 is a flowchart illustrating a method for manufacturing a circuit module of the present invention.

FIG. 5 is a diagram illustrating a method for manufacturing a semiconductor module that constitutes the circuit module of the present invention.

FIG. 6 is a diagram illustrating a method for manufacturing a semiconductor module that constitutes the circuit module of the present invention.

FIG. 7 is a diagram illustrating a method for manufacturing a circuit module of the present invention.

FIG. 8 is a diagram illustrating a method for manufacturing a circuit module of the present invention.

FIG. 9 is a diagram illustrating a method for manufacturing a circuit module of the present invention.

FIG. 10 is a diagram illustrating a method for manufacturing a circuit module of the present invention.

FIG. 11 is a diagram illustrating a method for manufacturing a circuit module of the present invention.

FIG. 12 is a diagram illustrating a method for manufacturing a circuit module of the present invention.

FIG. 13 is a diagram illustrating a method for manufacturing a circuit module of the present invention.

FIG. 14 is a diagram illustrating a method for manufacturing a circuit module of the present invention.

FIG. 15 is a diagram illustrating a conventional circuit module.

FIG. 16 is a diagram illustrating a conventional circuit module.

FIG. 17 is a diagram illustrating a conventional method of manufacturing a circuit module.

FIG. 18 is a flowchart illustrating a conventional method of manufacturing a circuit module.

[Explanation of symbols]

30 circuit modules 31 LSI 40 Semiconductor module 33 Chip parts 36 Backside chip parts 38 Interlayer insulation film

Claims (12)

[Claims] 1. A flip chip having a support substrate formed of a first conductive pattern embedded in an insulating resin and a second conductive pattern provided via an interlayer insulating film, wherein the first conductive pattern has a flip chip. A semiconductor module having a semiconductor element fixed by bonding, an insulating resin in which a conductive foil pattern fixed by the semiconductor module is fixed with the second conductive pattern on the upper side, and mounted on the second conductive pattern. A backside chip component, a take-out electrode of the semiconductor module, a thin metal wire for electrically connecting the conductive foil pattern, and an external connection electrode formed on the conductive foil pattern. module. 2. The circuit module according to claim 1, wherein the backside chip component is a capacitor, a resistor, a transistor, a diode or an LSI. 3. The circuit module according to claim 1, wherein a capacitor, a resistor, a transistor, a diode, or an LSI is mounted on the second conductive foil pattern in addition to the semiconductor module. 4. The first conductive pattern, the second conductive foil pattern and the conductive foil pattern are made of copper, aluminum or iron-nickel as a main material. The described circuit module. 5. The circuit module according to claim 1, wherein the extraction electrode is provided in a peripheral portion of the semiconductor module. 6. The circuit module according to claim 1, wherein the semiconductor element is an LSI. 7. A flip chip having a support substrate formed of a first conductive pattern embedded in an insulating resin and a second conductive pattern provided via an interlayer insulating film, wherein the first conductive pattern has a flip chip. A semiconductor module having a semiconductor element fixed by bonding, a third conductive pattern embedded in an insulating resin layer, and a fourth conductive pattern provided via an interlayer insulating film, wherein the semiconductor module is a second module. Support substrate fixed to the third conductive pattern with the conductive pattern on the upper side, the back surface chip component mounted on the second conductive pattern, the extraction electrode of the semiconductor module, and the third conductive pattern A thin metal wire for electrical connection with the semiconductor module, the backside chip component and the thin metal wire, and supporting the whole. Circuit module, comprising: an insulating resin, and an external connection electrode formed on the fourth conductive pattern. 8. The third conductive pattern includes, in addition to the semiconductor module, a capacitor, a resistor, a transistor,
The circuit module according to claim 7, wherein a diode or an LSI is mounted. 9. The first conductive pattern, the second conductive pattern, the third conductive pattern, and the fourth conductive pattern are composed mainly of copper, aluminum, or iron-nickel. The circuit module according to claim 7, wherein: 10. The backside chip component is a capacitor,
The circuit module according to claim 7, which is a resistor, a transistor, a diode, or an LSI. 11. The extraction electrode is provided in a peripheral portion of the semiconductor module.
The described circuit module. 12. The circuit module according to claim 7, wherein the semiconductor element is an LSI.