JP2003088104A - Power supply control circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power supply control circuit that changes over a controlling method in accordance with the switching of the operation modes of an electronic equipment, and that suppresses power consumption under a light load. SOLUTION: This power supply control circuit comprises: a voltage-boosting coil L1; a transistor TR5; diodes D1, D2 comprising a charge pump circuit, a capacitor C3, a boosting capacitor C2, a transistor TR1, a transistor TR2, a capacitor C1; a load mode switching circuit 11; and a PWM control circuit. With this structure, the induced voltage of the coil L1 is utilized to boost a secondary power source voltage VO under an ordinary load, and a control by a charge pump is performed to boost the secondary power source voltage VO under the light load. Also, current loss that occurs when switching the coil L1 can be suppressed effectively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply control circuit, and more particularly to a step-up type power supply control circuit that obtains an output voltage higher than a battery voltage.

[0002]

2. Description of the Related Art In recent years, in portable electronic equipment with a DC motor which uses a battery as a power source, it operates with a small number of batteries,
Moreover, a chopper type switching power supply is used to extend the battery life. The above conventional switching power supply will be described below with reference to the drawings.

FIG. 12 is a circuit diagram showing a conventional switching power supply circuit. As shown in the figure, the conventional switching power supply circuit has a primary power supply E1 that outputs an input voltage.
And a coil for boosting L1 connected to the primary side power source E1
And a boosting transistor TR5 that stores or releases energy of the coil L1, and a rectifying diode D1 whose anode side is connected to the coil L1 and the transistor TR5.
A switching power supply circuit having a capacitor C1 for smoothing the secondary power supply voltage VO and a PWM control circuit 12 for controlling the transistor TR5 so as to keep the secondary power supply voltage VO constant.

When the secondary power supply voltage VO rises above the set voltage, the PWM control circuit 12 controls the duty of the transistor TR5 so as to suppress energy storage in the coil C1 and set the secondary power supply voltage VO to the set voltage. To control. Further, when the secondary power supply voltage VO drops below the set voltage, the duty of the transistor TR5 is expanded to expand the energy storage of the coil L1 and the secondary power supply voltage VO is controlled to become the set voltage. As described above, even if the secondary-side power supply voltage VO fluctuates due to load fluctuations or the like, it is possible to control the voltage to be constant with almost no change from the set voltage.

[0005]

In a DC motor built-in electronic device in which the above switching power supply circuit is used, the load becomes extremely light in the sleep mode. Then, in the chopper type switching power supply circuit of the conventional example, it is necessary to perform the switching operation of the transistor TR5 in order to store energy in the coil L1 even when the load current is zero, and the switching operation causes power loss. Cause This power loss has been an obstacle to reducing the power consumption of electronic devices.

An object of the present invention is to provide a power supply control circuit capable of operating with a large load current and suppressing power consumption when operating with a small load current.

[0007]

The power supply control circuit of the present invention switches the operations of a chopper type switching power supply circuit and a charge pump circuit provided on a power supply wiring leading from a power supply to a load circuit, and outputs the secondary side output. A power supply control circuit for controlling the supply of voltage to the load circuit connected to a node, wherein the booster coil is provided in the power supply wiring in order from the upstream side, and the direction from the upstream side to the downstream side is in order. Direction rectifying means and a first transistor connected between a connection point between the boosting coil and the first rectifying means and a low voltage supply section, and supplies the load circuit to the load circuit. The chopper type switching power supply circuit for boosting the voltage, the error amplifier for detecting the voltage level of the secondary side output node, the oscillator, the output signal of the error amplifier and the output signal of the oscillator. It has a comparator to compare,
A PWM control circuit for controlling a duty ratio of the chopper type switching power supply circuit, a charge pump circuit for boosting a voltage supplied to the load circuit, and an operation of the chopper type switching power supply circuit according to an operation mode of the load circuit. , And a load mode switching circuit for selectively switching the operation of the charge pump circuit.

Thus, when the operation mode of the load circuit is the normal mode, the chopper type switching power supply circuit having the boosting coil functions, and when the operation mode is the light load mode, the load mode switching circuit causes the charge pump circuit to operate. Since the switching is performed so as to function, it is possible to eliminate the power loss when switching the boosting coil, which is a problem of the conventional technology. That is, by using the power supply circuit of the present invention, power consumption in the sleep mode of the electric device can be suppressed.

Further, the load mode switching circuit has an output signal from the comparator, an output signal from the oscillator, and an external signal switching between a high level and a low level in accordance with an operation mode of the load mode switching circuit. And are entered,
The load mode switching circuit controls the switching between the operation of the chopper type switching power supply circuit and the operation of the charge pump circuit according to the external signal, whereby the operation mode corresponding to the external signal can be switched. .

A load detection circuit that detects the duty of the output signal from the comparator and outputs a load signal that switches between a high level and a low level according to the operation mode of the load circuit to the load mode switching circuit. Further, the load mode switching circuit performs control to switch between the operation of the chopper type switching power supply circuit and the operation of the charge pump circuit according to the load signal, so that the load mode switching circuit can be operated accurately regardless of an external signal. Since various operation modes can be switched, it is not necessary to provide a pin for an external signal when the circuit is integrated.

Further, the load state of the load circuit is detected from the output signal from the error amplifier and the output signal from the oscillator, and the load is switched between a high level and a low level according to the operation mode of the load circuit. A load detection circuit that outputs a signal to the load mode switching circuit is further provided, and the load mode switching circuit switches between operation of the chopper type switching power supply circuit and operation of the charge pump circuit according to the load signal. The operation mode can also be switched by performing the operation regardless of the signal from the outside.

The charge pump circuit is provided in a portion of the power supply wiring upstream of the boosting coil and has a forward direction from the upstream side to the downstream side.
Rectifying means, a second branch wiring branched from the secondary side output node and connected to the low voltage supply section, and a boosting capacitor provided on the second branch wiring in order from the high potential side, a p-channel type second transistor and an n-channel type third transistor; an intermediate connection between the second transistor and the third transistor; and a portion on the upstream side of the first rectifying means. By having a second capacitor connected between, in the light load mode,
The booster coil can boost the voltage on the load circuit side without consuming electric power.

A fourth transistor is further provided between the terminals of the boosting coil, and the fourth transistor is turned on / off in accordance with the operation mode of the load circuit by the external signal or the load signal. It is possible to reduce power loss due to the induced voltage in the boost coil.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION (First Embodiment) A power supply control circuit according to a first embodiment of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block circuit diagram showing the configuration of the power supply control circuit in the first embodiment, and FIG. 2 is a block circuit diagram showing the configuration of the load mode switching circuit 11, FIG.
FIG. 4 is a block circuit diagram showing the configuration of the PWM control circuit 12.

As shown in FIG. 1, the power supply control circuit of this embodiment has a rectifier diode D2 having an anode connected to the positive voltage side of the primary power supply E1 and a rectifier diode D2.
Coil L1 for boosting, one end of which is connected to the cathode of 2,
An n-channel transistor TR5 having a drain connected to the other end of the coil L1 and a source connected to ground (low voltage supply unit), and an anode connected to the other end of the coil L1
A rectifier diode D1 for rectifying the energy emitted from the coil L1, a capacitor (capacitor) C1 connected in parallel with the load circuit 16 for smoothing the secondary power supply voltage, a cathode of the rectifier diode D1 and a primary power supply E1. A p-channel transistor TR2 connected to the source and an n-channel transistor TR3 connected to the ground
And a capacitor C3 connected between the point where the drains of the transistors TR2 and TR3 are commonly connected and the anode of the rectifier diode D2, the output signal SG1 at the gate of the transistor TR5, and the output signal SG2 at the gate of the transistor TR2. , A load mode switching circuit 11 for supplying and controlling the output signal SG3 to the gate of the transistor TR1, and a PWM control circuit 12 including a comparator 29, an oscillator 14, an error amplifier 15 and a reference voltage source 26.
It consists of and.

Further, the external signal EXT and the output signals SG4 and SG5 output from the PWM control circuit 12 are input to the load switching circuit as will be described later and the transistor TR is input.
5. Control the transistor TR2 and the transistor TR1. The external signal EXT is low (LO when the load is normal).
W), and high (HIGH) when the load is light.

The boosting capacitor C2, the diode D1 and the capacitor C1 are connected to a load circuit 16 for operating the electronic equipment when a light load signal is applied.

In this circuit, the transistors TR1 and T
R2, boosting capacitors C2, C3, diodes D1 and D2
Constitutes a charge pump circuit CP, and the coil L1, the transistor TR5, the diode D1 and the capacitor C1 constitute a chopper type switching power supply circuit UC.

As will be described later, the transistor TR5
Is always off, the output signal SG2 (see FIG. 5) that alternately switches the transistors TR1 and TR2.
(See (B)) and the output signal SG3 (see FIG. 5C) are sent to drive the charge pump circuit CP. When the transistor TR1 is on and the transistor TR2 is off, the charge pump circuit CP operates to accumulate charges from the primary side power source E1 through the diode D1 and the coil L1 in the capacitor C3. Next, when the transistor TR1 is off and the transistor TR2 is on, the potential of the electrode on the low potential side of the capacitor C3 (the intermediate connection point between the transistor TR1 and the transistor TR2) should swing from 0 V to the voltage of the primary side power source E1. Thus, the charge accumulated in the capacitor C3 is pumped to the boosting capacitor C2 through the diode D1. This operation is repeated at the frequency set by the oscillator 14 that creates the PWM signal, and is supplied to the load circuit 16. The charge pump circuit CP is driven when the light load signal is applied as the external signal EXT.

When both the transistors TR1 and TR2 are normally off, the output signal SG1 (see FIG. 4B1) is sent to the transistor TR5 to drive the chopper type switching power supply circuit UC. In the chopper type switching power supply circuit UC, the transistor TR5 is used.
The current from the primary side power supply E1 is supplied to the coil L1 through the diode D2 during the period when is on, and energy is accumulated in the coil L1. While the transistor TR5 is off, energy is emitted from the coil L1 and is smoothed by the capacitance C1 through the diode D1. This current is transmitted to the load circuit 16. The chopper type switching power supply circuit UC is driven when the normal load signal is applied as the external signal EXT at the high level.

As will be described later, the PWM control circuit 12 compares the output signal SG6 of the error amplifier 15 and the output signal SG5 of the oscillator 14 inside the circuit and compares them with the secondary power supply voltage V.
The output signal SG4 for PWM-controlling the transistor TR5 is output so that O becomes the set voltage of the reference power supply 26. Further, the transistors TR1 and TR2 are alternately driven by the output signal SG5 from the oscillator 14 in the PWM control circuit 12.

Next, as shown in FIG. 2, the load mode switching circuit 11 receives the output signal SG4 output from the PWM control circuit 12 and the external signal EXT and outputs the output signal SG.
NOR gate 17 for outputting 1 and PWM control circuit 12
Inverter 1 for inverting the output signal SG5 output from
8, an inverter 19 that inverts the output signal from the inverter 18 again, an inverter 22 that inverts the external signal EXT, an output signal from the inverter 22 and the inverter 1
From the OR gate 20 which receives the output signal from 9 and outputs the output signal SG2, and the NOR gate 21 which receives the output signal from the inverter 18 and the output signal from the inverter 22 and outputs the output signal SG3. It is configured.

As will be described later, the load mode switching circuit 11 switches between driving the charge pump circuit CP and the chopper type switching power supply circuit UC depending on the state of the external signal EXT. Output signal SG1 (B) and output signal SG2 shown in FIG.
(C) and the output signal SG3 (D) are output. At the time of a light load signal, the output signal SG1 having a waveform as shown in FIG.
(D), output signal SG2 (B) and output signal SG3
(C) is output.

In the load mode switching circuit 11, when the external signal EXT is at the L (LOW) level as a normal load signal, the external signal E is input to one of the inputs of the NOR gate 17.
Since the L level of XT is input, the output signal SG1 obtained by inverting the output signal SG4 from the other PWM control circuit 12 is input.
Is output from the NOR gate 17. In addition, the external signal E
The output signal from the inverter 22 that inverts XT is H (H
IGH) level, the output signal from the OR gate 20 is at H level and the output signal from the NOR gate 21 is at L level.
Since it is fixed at the level, the output signal SG2 is at the H level,
The output signal SG3 becomes L level, and the transistor TR
1 and the transistor TR2 are both turned off.

When the external signal EXT is at the H level as a light load signal, the NOR gate 17 is supplied with the H level of the external signal EXT.
Since the output signal of 7 is fixed at the L level, the output signal SG
1 also becomes L level, and the transistor TR5 is turned off. Further, since the output signal of the inverter 22 that inverts the external signal EXT becomes L level, the OR gate 20 outputs the output signal SG2 having the same logic as the output signal SG5, and the NOR gate 21 also has the same logic as the output signal SG5. The output signal SG3 is output to drive the transistors TR1 and TR2 so as to perform on / off operations which are opposite to each other.

FIG. 3 is a circuit diagram showing the configuration of the PWM control circuit. As shown in the figure, the oscillator 14 in the PWM control circuit includes a current source 34, a resistor 35 and a resistor 36 connected in series between the current source 34 and the ground, and a resistor 35 connected in parallel with the resistor 36. Transistor 37 connected to ground
A current source 31, a current source 32 having one end connected to the current source 31 and the other end connected to ground, a comparator 33, and a capacitor 30 having one end connected to ground. The connection point between the current source 34 and the resistor 35 is connected to the (−) terminal of the comparator 33, and the connection point between the current sources 31 and 32 is the comparator 33.
Connected to the (+) terminal of. The output signal from the comparator 33 is branched into two, one of which is the current source 3 connected in series.
Current source 32 connected in parallel with capacitance 30
On / off of the transistor 37
Is input to the gate of the transistor 37 to control ON / OFF of the transistor 37. The connection point between the current sources 31 and 32 has an output signal SG
5 and is connected to the (+) terminal of the comparator 29.

The error amplifier 15 has a resistor 27 and a resistor 28 connected in series with each other, a reference voltage source 26,
The positive side of the reference voltage source 26 is connected to the (+) terminal, and the connection point of the resistors 27 and 28 is connected to the (−) terminal, and the (−) terminal and the output terminal of the operational amplifier 25 are connected. It is composed of a resistor 24 and a capacitor 23 connected in series. Then, the comparator 29 outputs the triangular wave SG5 from the oscillator 14 and the output signal S of the error amplifier 15.
Compare with G6. The output signal from the comparator 29 is the output signal SG4 for driving the transistor TR5.

Next, details of the PWM control circuit 12 will be described.

First, the oscillator 14 outputs the triangular wave SG5 shown in FIGS. 4 (A) and 5 (A). SG5 is generated by repeating charging and discharging of the capacity 30. When the output signal of the comparator 33 is at the L level, the current source 32 is off, the capacity 30 is positively charged by the current from the current source 31, and the terminal voltage of the capacity 30 gradually rises. At this time, the transistor 37 is turned off, and the voltage V2 of (current value of current source 34) × (resistor 35 + resistor 36) is applied to the (−) terminal of the comparator 33. The terminal voltage of the capacitor 30 is input to the (+) terminal of the comparator 33 and is the level of the (−) terminal (the current source 3
When the voltage V2 of (current value of 4) × (resistor 35 + resistor 36) is exceeded, the output signal from the comparator 33 becomes H level. At this time, the transistor 37 is turned on, and the (−) terminal of the comparator 33 has (current value of the current source 34) × (resistor 35).
Voltage V1 is applied. Then, when the output signal from the comparator 33 becomes the H level, the current source 32 that generates a current value larger than the current value of the current source 34 is turned on, so that the capacitance 30
On the contrary, the terminal voltage of the capacitor 30 gradually decreases.
When the voltage of the (−) terminal of the comparator 33 is lower than the voltage V1 of (current value of the current source 34) × (resistor 35), the output signal from the comparator 33 becomes L level and the current source 32 is turned off. Therefore, the capacitance 30 is charged again by the current from the current source 31. By repeating the above operation, a triangular wave is generated at the terminal of the capacitor 30, and the same waveform is output as the output signal SG5 of the oscillator 14.

Next, the error amplifier 15 will be described. The secondary power supply voltage VO is divided by the resistors 27 and 28, and the differential voltage between the divided voltage and the reference voltage 26 is amplified by the operational amplifier 25. The purpose of forming a feedback loop with a series circuit of the capacitor 23 and the resistor 27 is to stabilize the circuit operation by increasing the low-frequency gain to reduce the steady-state deviation and limiting the high-frequency gain with the value of the resistor 24. To prevent oscillation. Next, the output signal SG6 from the operational amplifier 25 is compared by the comparator 29 with the triangular wave output signal SG5 which is the output signal from the oscillator 14, and the comparator 29 outputs the pulsed output signal SG4.
When the output signal SG4 is a normal load signal, the output signal SG4 passes through the load mode switching circuit 11 and PWM-drives the transistor TR5.

FIGS. 4A to 4D are waveform diagrams of the respective parts of the switching power supply at the time of the normal load signal.

In FIG. 3A, the output signal SG5 is the output waveform of the oscillator 14. The output signal SG6 is
The output waveform of the error amplifier 15, that is, the output signal SG1 shown in FIG.
The output waveform is inverted by the R gate 17. The output signal SG2 shown in FIG. 4C is an output waveform of the load mode switching circuit 11 (OR gate 20) at the time of normal load, and FIG.
The output signal SG3 shown in is the output waveform of the load mode switching circuit 11 (NOR gate 21) under normal load.

As shown in FIGS. 4C and 4D, during the normal load signal, the output signal SG2 from the load mode switching circuit 11 is always at H level and the output signal SG3 is always at L level. Further, when the level of the output signal SG5 which is a triangular wave is higher than that of the output signal SG6, the output signal SG4 from the comparator 29 becomes the H level, so the output signal SG1 which is the inverted output signal SG4 becomes the L level, and the output signal SG1 in FIG. The pulse waveform is as shown in).

The waveforms of the signals shown in FIGS. 4 (A) to 4 (D) are the same when the power supply control circuit of the following embodiments has a normal load signal.

Further, FIGS. 5A to 5D are waveform diagrams of the respective parts of the switching power supply when a light load signal is applied.

In FIG. 7A, the output signal SG5 is the output waveform of the oscillator 14. The output signal SG6 is
The output waveform of the error amplifier 15, VT is the inverter 1
8 threshold levels. Output signal SG of FIG. 5 (B)
2 is an output waveform of the load mode switching circuit 11 (OR gate 20) at the time of a light load, and the output signal SG3 of FIG.
Is an output waveform of the load mode switching circuit 11 (NOR gate 21) at the time of a light load signal. Output signal SG of FIG. 5 (D)
1 is an output waveform of the load mode switching circuit 11 (NOR gate 17) at the time of a light load signal. At the time of the light load signal, the output signal SG2 of the load mode switching circuit 11 becomes the H level when the output signal SG5 which is a triangular wave is higher than VT, and FIG.
The pulse waveform is as shown in FIG. Output signal SG3
Becomes H level when the output signal SG5 is higher than VT, and has a pulse waveform shown in FIG. 5 (C). in this way,
The output signal SG2 and the output signal SG3 have the same waveform.
The output signal SG1 from the load mode switching circuit 11 is shown in FIG.
(As shown in D, it is always at L level.

The waveforms of the signals shown in FIGS. 5 (A) to 5 (D) are the same even when a light load signal is applied to the power supply control circuit of the following embodiments.

As described above, according to the power supply control circuit of this embodiment, in addition to the operation of the switching power supply for boosting the secondary power supply voltage VO from the voltage of the primary power supply E1 at the time of the normal load signal, the light load is also added. When the signal load is extremely light (the load current is small), the step-up circuit is switched from the operation of the chopper type switching circuit UC including the coil L1 to the operation of the charge pump circuit. It is not necessary to store energy in L1, and a power supply control circuit that suppresses the loss of operating current can be configured. Therefore, by using the power supply control circuit of this embodiment, the power consumption of the electronic device can be suppressed.

In the present embodiment, the signals that operate in the opposite directions are given to the transistor TR1 and the transistor TR2 at the time of the light load signal.
In order to prevent the through current from flowing through the transistor 1 and the transistor TR2 for a moment at the same time, a timing circuit for simultaneously turning off may be provided.

(Second Embodiment) FIG. 6 shows a second embodiment of the present invention.
3 is a block circuit diagram of a power supply control circuit in the embodiment of FIG.

As shown in the figure, in this embodiment, the diode D included in the power supply control circuit shown in FIG.
2 and the diode D1 to reduce the loss due to the forward diode voltage, an n-channel type transistor TR6 is used instead of the diode D2 and a p-channel type transistor TR7 is used instead of the diode D1.
In addition, the power supply control circuit of the present embodiment uses the transistor TR
6, a control mode switching circuit 38 for outputting the output signal SG7 and the output signal SG8 for driving the transistor TR7 is further provided. Here, the control mode switching circuit 38
It is driven by a voltage boosted higher than the voltage of the primary side power source E1 (for example, secondary side power source voltage), and when it is at H level, it is high enough to turn on or off the transistors TR6 and TR7. Supply the voltage of.

The control mode switching circuit 38 includes an inverter 46 that inverts the output signal SG1 from the load mode switching circuit 11 and an inverter 48 that inverts the output signal SG2.
An inverter 47 that inverts the output signal SG3, a NAND gate 41 that outputs the output signal SG7 that controls the transistor TR6 by receiving the external signal EXT and the output signal from the inverter 47, and the inverter 47 that inverts the external signal EXT. The inverter 42 and the NAN to which the output signal from the inverter 42 and the output signal from the inverter 46 are input
D gate 44, NAND gate 43 to which external signal EXT and the output signal from inverter 48 are input, and NA
The output signal from the ND gate 43 and the output signal from the NAND gate 44 are input and the AND gate 45 outputs the output signal SG8 for controlling the transistor TR7.

At the time of a normal load signal, the external signal EXT becomes L level and one of the two inputs has a transistor TR.
The output signal from the inverter 47 that inverts the logic of the output signal SG3 that drives 1 is input, and the output signal of the NAND gate 41 to which the external signal EXT is input is fixed to the H level. Therefore, the transistor T
The drive signal SG7 of R6 is also always at H level, and the transistor TR6 becomes conductive.

Next, at the time of a light load signal, the external signal EXT becomes H level, and a signal having the same waveform as the output signal SG3 for driving the transistor TR1 forming the charge pump circuit is output as the output signal SG7 of the NAND gate 41, and the transistor The TR1 and the transistor TR6 are repeatedly turned on and off in synchronization with each other.

Transistor TR1 and transistor TR
When 6 is turned on, the charging current flows into the capacitor C3 for boosting the secondary power supply voltage VO, and the primary power supply E1
The electric charge which becomes almost the same voltage as is stored.

Since the output of the NAND gate 44 is always at the H level due to the output from the inverter 42 which inverts the logic of the external signal EXT, the output signal SG8 of the AND gate 45 has the same logic as the signal SG2 driving the transistor TR2. Is output, and the transistors TR2 and TR7 are repeatedly turned on / off in synchronization with each other. When the transistors TR1 and TR6 are off, the transistors TR2 and TR7 are turned on,
At this time, the electric charge accumulated in the capacitor C3 is discharged toward the capacitor C2, and the electric charge having the same voltage as the voltage across the capacitor C3 is accumulated in the capacitor C2.

On the other hand, if the external signal EXT is at the L level when it is the normal load signal, the output signal from the NAND gate 43 is always at the H level, and therefore the AND gate has the same logic as the output signal SG1 for driving the transistor TR5. The output signal SG8 from 45 is output, and the transistors TR5 and TR7 are turned on and off in reverse to each other to reduce the loss due to the forward diode voltage that was present when the diode D1 was used.

As described above, in the present embodiment, the transistors TR6 and TR function as the rectifying means performed by the diode D1 and the diode D2 in the first embodiment.
7 are playing respectively. However, the transistor TR6
When the transistor TR7 and the transistor TR7 become conductive at the same time,
Since the wiring on the next side is directly connected and short-circuited, it is necessary to control so that the transistors TR6 and TR7 do not conduct at the same time.

Since the on-voltages of the transistors TR6 and TR7 are smaller than the forward diode voltage of the diodes D1 and D2, the power supply control circuit of this embodiment can reduce the power consumption during the switching operation. . Therefore, by using the power supply control circuit of this embodiment, it is possible to save the power of the electronic device.

In the present embodiment, the signals for causing the transistors TR5 and TR7 to operate in reverse are given to the transistor TR5 and the transistor TR7 at the time of the normal load signal.
A timing circuit may be provided to turn off the two transistors at the same time in order to prevent the through current from flowing by turning on the R5 and the transistor TR7 for a moment.

In the power supply control circuit of this embodiment, the load mode is switched by using the external signal. Instead of the external signal, as in the embodiments described below, P
It is also possible to adopt a configuration in which the load mode is switched by a signal from the WM control circuit.

(Third Embodiment) FIG. 7 shows a third embodiment of the present invention.
3 is a block circuit diagram of a power supply control circuit in the embodiment of FIG.

In the power supply control circuit of this embodiment, as shown in FIG. 5, an n-channel type transistor TR8 is further added in order to reduce the loss due to the induced voltage in the coil L1. The other circuits are the same as those of the power supply control circuit of the second embodiment.

In the power supply control circuit of this embodiment, the coil L
1 and the transistor TR8 are connected in parallel. Further, the transistor TR8 outputs the output signal SG11 from the control mode switching circuit 38 which is the inverted logic of the external signal EXT.
It is driven by (the output signal of the inverter 42).

Here, the control mode switching circuit 38 has a voltage boosted higher than the voltage of the primary power source E1 (for example, 2).
It is driven by the secondary power supply voltage, etc.), and when it is at the H level, it supplies a voltage high enough to turn on / off the transistor TR6, the transistor TR7 or the transistor TR8.

When the external signal EXT is at the L level when it is a normal load signal, the transistor TR8 is always turned off at this time to permit the boosting operation by the energy storage and discharge of the coil L1. When the signal is light, the external signal E
XT becomes H level, the transistor TR8 is always turned on, and both ends of the coil L1 are short-circuited by the ON voltage of the transistor TR8, so that the efficiency of the charging voltage to the capacitor C3 forming the charge pump circuit is improved.

Thus, by using the power supply control circuit of this embodiment, it is possible to further reduce the power consumption of electric equipment.

(Fourth Embodiment) FIG. 8 shows a fourth embodiment of the present invention.
FIG. 9 is a block circuit diagram of the power supply control circuit in the embodiment of the present invention, and FIG. 9 is a block circuit diagram showing the load detection circuit 49.

In the power supply control circuit of the first embodiment, the load state of the circuit is transmitted by the external signal EXT. However, in the power supply control circuit of the present embodiment, as shown in FIG.
Output signal SG from the comparator 29 included in the control circuit 12
The duty of 4 is detected to determine whether it is a light load signal or a normal load signal. Therefore, the power supply control circuit of this embodiment is provided with the load detection circuit 49.

The load detection circuit 49 includes a PWM control circuit 12
When the duty of the output signal SG4 becomes almost 100% (in the operating state in which the off period of the transistor TR5 is long and the on period of the transistor TR5 is short), it is determined as a light load, and the L level load signal LDT is set to the load mode. It is output to the switching circuit 11, and when the duty of the output signal SG4 falls below a predetermined ratio (for example, 70%), it is determined as a normal load signal,
The H-level load signal LDT is output to the load mode switching circuit 11. As a result, a configuration that does not require the external signal EXT can be realized.

As shown in FIG. 9, the load detection circuit 49
A current source 50, a current source 53, a resistor 55 and a resistor 56 connected in series between the current source 53 and the ground, and a current source 5
The connection point between the capacitor 52 connected to 0 and the current source 53 and the resistor 55 is connected to the (−) terminal, and the current source 50 and the capacitor 52 are connected.
A comparator 54 whose connection point to and is connected to the (+) terminal, and an n-channel type transistor 57 whose one end is connected to the connection point between the resistor 55 and the resistor 56 and whose other end is connected to ground,
From an inverter 59 that inverts the logic of the output signal SG4 from the PWM control circuit 12, and an n-channel transistor 58 whose one end is connected to the connection point between the current source 50 and the capacitor 52 and whose other end is connected to ground. It is configured. Here, the output signal LTD from the comparator 54 is branched into two, one is output to the load mode switching circuit 11 as the load signal LDT, and the other is output to the gate of the transistor 57 to turn on / off the transistor 57. Control.

Under normal load, the output signal S of the comparator 29
Since G4 drives the transistor TR5 via the NOR gate 17 (see FIG. 2), it drives the transistor 58 through the inverter 59, so that the transistor 58
And the duty of the transistor TR5 is controlled correspondingly.

Under normal load, the duty of the output signal SG4 of the PWM control circuit 12 is about 50%, and the capacity 52
Since the terminal voltage of is at L level, the output signal from the comparator 54 is at L level and the transistor 57 is turned off. The (−) terminal of the comparator 54 is connected to the (current source 5
A high voltage V4 determined by (current value of 3) × (resistance value of resistor 55 + resistance value of resistor 56) is applied. Also,
The voltage at the capacitor 52 is applied to the (+) terminal of the comparator 54. As the load becomes lighter, the transistor TR5
Duty approaches 100%, the OFF period of the transistor 58 becomes longer. Then, the period in which the capacitor 52 is charged by the current source 50 becomes longer, and the terminal voltage of the capacitor 52 gradually increases. When this voltage exceeds the voltage V4 applied to the (−) terminal, the comparator 54 outputs an H level output signal (light load signal LDT). At this time, the transistor 57 is turned on, and a voltage V3 of (current value of current source 53) × (resistance value of resistor 55) is applied to the (−) terminal of the comparator 54. As the load changes from light to normal,
Since the duty of the transistor TR5 decreases from 100%, the off period of the transistor 58 becomes short,
The charging period of the capacitor 52 by the current source 50 is shortened and the voltage gradually drops. At this time, the voltage applied to the (−) terminal of the comparator 54 is (current value of the current source 53) × (resistance 55)
When the voltage drops below the voltage V4, the output signal of the comparator 54 becomes L level, and the L level load signal LDT is output as a signal during normal load. At this time, since the output signal of the comparator 54 is at the L level, the transistor 57 is turned off, and the (−) terminal of the comparator 54 again has (current value of the current source 53) × (resistance of the resistor 55). A voltage V4 which is (value + resistance value of the resistor 56) is applied.

According to the power supply control circuit of the present embodiment, the load mode can be switched without the external signal EXT, so that it is not necessary to output the pin to the outside when the circuit is integrated, for example. Therefore, it is advantageous for circuit integration.

(Fifth Embodiment) FIG. 10 is a block circuit diagram of a power supply control circuit according to a fifth embodiment of the present invention, and FIG. 11 is a block diagram showing an oscillator 61 and a load detection circuit 60. .

In the power supply control circuit of the first embodiment shown in FIG. 1, the load state is judged based on the external signal EXT, but in the power supply control circuit of the present embodiment shown in FIG. 10, the load detection circuit 60 is used. Is added to detect the level of the output signal SG6 of the error amplifier 15 in the PWM control circuit 12 to determine whether the operating state is a light load or a normal load.

That is, the output signal SG6 of the error amplifier 15
Of the output signal S whose level determines the lower limit of the amplitude of the oscillator 61.
When it goes below G9, the load detection circuit 60 judges that it is a light load, inputs the H-level load signal LDT to the load mode switching circuit 11, and the level of the output signal SG6 is the oscillator 6
When the output signal SG10 is slightly higher than the lower limit value of the amplitude of 1, the load signal LDT is determined to be a normal load signal and the L-level load signal LDT is input to the load mode switching circuit 11.
As a result, a configuration that does not require the external signal EXT can be realized.

Next, specific examples of the oscillator 61 and the load detection circuit 60 used in the power supply control circuit of this embodiment will be described.

As shown in FIG. 11, the oscillator 61 includes a current source 65, a resistor 66, a resistor 67 and a resistor 68 connected in series between the current source 65 and the ground, a current source 65 and a resistor 66. N-channel transistor 63 whose one end is connected to the connection point of, n-channel transistor 64 whose one end is connected to the connection point of resistors 67 and 68, current source 31, and one end of which is connected to the ground Current source 32,
A comparator 33 having a (−) terminal connected to a connection point between the transistors 63 and 64 and a (+) terminal connected to a connection point between the current sources 31 and 32, an inverter 62, and a current source. 32 and a capacitor 30 connected in parallel. The output signal from the comparator 33 is branched into three, one for controlling the on / off of the current source 32 and the other for
One drives a transistor 63 via an inverter 62. The other output signal from the comparator 33 drives the transistor 64.

At the connection point between the resistance 67 and the resistance 68, the output signal SG9 that determines the lower limit of the amplitude of the oscillator 61 is output to the load detection circuit 60, and at the connection point between the resistance 66 and the resistance 67. The output signal SG10 that exceeds the lower limit of the amplitude by the hysteresis width is output to the load detection circuit 60. The output signal SG5 from the oscillator 61 is
It is generated by repeating charging and discharging of the capacity 30.

Further, the load detection circuit 60 has an n-channel type transistor 70 whose one end receives the output signal SG9 from the oscillator 61, an n-channel type transistor 72 whose end receives the output signal SG10, and a transistor. The (+) terminal is connected to the connection point between the transistor 70 and the transistor 72, and the output signal S from the error amplifier 15 is connected to the (-) terminal.
It is composed of a comparator 69 to which G6 is input and an inverter 71. The output from the comparator 69 is branched into three, one is output to the load mode switching circuit 11 as a load signal LDT, and the other is input to the inverter 71 to drive the transistor 70. The other of the output signals of the comparator 69 drives the transistor 72.

In the oscillator 61, when the output signal of the comparator 33 is at L level, the current source 32 is turned off, the capacity 30 is charged by the current from the current source 31, and the voltage gradually rises. At this time, the transistor 63 is turned on and the transistor 64 is turned off. Therefore, the (−) terminal of the comparator 33 has (current value of the current source 65) × (resistance value of the resistor 66 + resistance value of the resistor 67+ Resistance value of the resistor 68)
The voltage V2 required by the above is applied. Since the capacitor 30 is connected to the (+) terminal of the comparator 33, when the terminal voltage of the capacitor 30 rises due to charging and exceeds the value of the voltage V2 which is the (-) terminal level, the output signal of the comparator 33. Becomes H level. At this time, the transistor 63 is turned off,
The transistor 64 is turned on, and the (-) of the comparator 33 is turned on.
A voltage V1 obtained by (current value of current source 65) × (resistance value of resistor 68) is applied to the terminal. Further, the comparator 33
When the output signal of is at H level, the current source 32 that generates a current value larger than the current value of the current source 31 is turned on, the capacitor 30 is discharged, and the voltage of the capacitor 30 gradually decreases. When the voltage of the capacitor 30 falls below the voltage V1 which is the level of the (−) terminal of the comparator 33, the output signal of the comparator 33 becomes L level and the current source 32 is turned off.
0 is charged by the current from the current source 31. By repeating the above operation, the oscillator 61 outputs the triangular wave output signal SG5.

In the load detection circuit 60, the output signal of the comparator 69 is at the L level when the load is normal, and the transistor 70 is on and the transistor 72 is off at this time, so that the (+) terminal of the comparator 69 is connected. Is applied with a voltage V1 of (current value of current source 65) × (resistance value of resistor 68). The error amplifier 1 is connected to the (-) terminal of the comparator 69.
Since the output signal SG6 from 5 is input and the secondary side power supply voltage VO gradually increases as the load becomes lighter, the output signal SG6 of the error amplifier 15 gradually decreases in voltage. Then, the output signal SG applied to the (-) terminal
When the voltage of 6 becomes less than the voltage V1 applied to the (-) terminal,
The output signal of the comparator 69 becomes H level. At this time, the transistor 70 is turned off, the transistor 72 is turned on, and the (+) terminal of the comparator 69 is (current value of the current source 65) x (resistance value of the resistor 67 + resistance value of the resistor 68). The required voltage V5 is applied. At this time, the comparator 69 outputs an H level load signal LDT indicating a light load.

Next, as the load becomes heavier, the secondary side power supply voltage VO decreases, the output signal SG6 of the error amplifier 15 gradually increases, and the output signal SG6 applied to the (-) terminal of the comparator 69 is increased. When the voltage becomes equal to or higher than the voltage V5 obtained by (current value of current source 65) × (resistance value of resistor 67 + resistance value of resistor 68) applied to the (+) terminal of the comparator 69, the comparator 69
Outputs an L level load signal LDT indicating a normal load. At this time, since the transistor 70 is turned on and the transistor 72 is turned off, the voltage V1 obtained by (current value of current source 65) × (resistance value of resistor 68) is applied to the (+) terminal of the comparator 69 again. .

The power supply control circuit of this embodiment can also detect the load of the circuit without an external signal. Therefore, it is not necessary to provide a terminal to the outside when the circuit is integrated, which is advantageous for the integration.

The n-channel type transistor used in the power supply control circuit of the above embodiment can be replaced with an npn-type bipolar transistor.
The p-channel type transistor can be implemented by replacing it with a pnp type bipolar transistor. If the bias condition of the power supply voltage is reversed, the n-channel transistor and the p-channel transistor can be replaced with each other.

[0078]

According to the power supply control circuit of the present invention, the chopper type power supply circuit section is made to function at the time of normal load to perform the switching operation for storing energy in the coil, and the charge pump circuit is made to function at the time of light load. Since the energy accumulated in the coil can be reduced, the required current loss can be reduced.

[Brief description of drawings]

FIG. 1 is a block circuit diagram showing a configuration of a power supply control circuit according to a first embodiment of the present invention.

FIG. 2 is a block circuit diagram showing a configuration of a load mode switching circuit in the power supply control circuit according to the first embodiment of the present invention.

FIG. 3 is a block circuit diagram showing a configuration of a PWM control circuit in the power supply control circuit according to the first embodiment of the present invention.

4A to 4D are waveform charts showing respective output signals of the power supply control circuits according to the first to fifth embodiments of the present invention under normal load.

5A to 5D are waveform diagrams showing respective output signals of the power supply control circuits according to the first to fifth embodiments of the present invention when the load is light.

FIG. 6 is a block circuit diagram showing a configuration of a power supply control circuit according to a second embodiment of the present invention.

FIG. 7 is a block circuit diagram showing a configuration of a power supply control circuit according to a third embodiment of the present invention.

FIG. 8 is a block circuit diagram showing a configuration of a power supply control circuit according to a fourth embodiment of the present invention.

FIG. 9 is a block circuit diagram showing a configuration of a load detection circuit in a power supply control circuit according to a fourth embodiment of the present invention.

FIG. 10 is a block circuit diagram showing a configuration of a power supply control circuit according to a fifth embodiment of the present invention.

FIG. 11 is a block circuit diagram showing configurations of a load detection circuit 60 and an oscillator 61 in a power supply control circuit according to a fifth embodiment of the present invention.

FIG. 12 is a block circuit diagram showing a configuration of a conventional power supply control circuit.

[Explanation of symbols]

11 load mode switching circuit 12 PWM control circuit 14, 61 oscillator 15 error amplifier 16 load circuit 17, 21 NOR gate 18, 19, 22 inverter 20 OR gate 23 capacitance 24, 27, 28, 35, 36 resistor 25 operational amplifier 26 reference Voltage 29,33 Comparator 30 Capacitance 31, 32,34 Current source 38 Control mode switching circuit 41,43,44 NAND gate 42,46,47,48 Inverter 49,60 Load detection circuit 50,53 Current source 52 Capacity 54, 69 comparators 57, 58, 63, 64, 70, 72 transistors 59, 62, 71 inverters 66, 67, 68 resistance E1 primary side power supply VO secondary side power supply voltage D1, D2 diodes C1, C2, C3 capacitance L1 coil TR1, TR2, TR5, TR6, TR7, TR8 Transistor LDT Load Issue

Claims (6)

[Claims] 1. The operation of a chopper type switching power supply circuit and a charge pump circuit provided on a power supply wiring leading from a power supply to a load circuit is switched to change the voltage to the load circuit connected to a secondary side output node. A power supply control circuit for controlling supply, comprising a boosting coil provided in the power supply wiring in order from the upstream side, a first rectifying unit having a forward direction from an upstream side to a downstream side, and the boosting circuit. A chopper type switching power supply circuit having a first transistor connected between a connection point of a coil and the first rectifying means and a low voltage supply section, and boosting a voltage supplied to the load circuit; The error amplifier for detecting the voltage level of the secondary side output node, an oscillator, and a comparator for comparing the output signal of the error amplifier and the output signal of the oscillator are included. A PWM control circuit for controlling the duty ratio of the chopper type switching power supply circuit, a charge pump circuit for boosting the voltage supplied to the load circuit, and an operation of the chopper type switching power supply circuit according to the operation mode of the load circuit. And a load mode switching circuit for selectively switching the operation of the charge pump circuit. 2. The power supply control circuit according to claim 1, wherein the load mode switching circuit corresponds to an output signal from the comparator, an output signal from the oscillator, and an operation mode of the load mode switching circuit. An external signal for switching between a high level and a low level is input, and the load mode switching circuit controls to switch between the operation of the chopper type switching power supply circuit and the operation of the charge pump circuit according to the external signal. A power supply control circuit characterized by the above. 3. The power supply control circuit according to claim 1, wherein the duty of the output signal from the comparator is detected, and a load signal that switches between a high level and a low level in accordance with an operation mode of the load circuit is detected. A load detection circuit for outputting to the load mode switching circuit is further provided, and the load mode switching circuit performs control for switching between operation of the chopper type switching power supply circuit and operation of the charge pump circuit according to the load signal. A power supply control circuit characterized by the above. 4. The power supply control circuit according to claim 1, wherein a load state of the load circuit is detected from an output signal from the error amplifier and an output signal from the oscillator to correspond to an operation mode of the load circuit. And a load detection circuit for outputting a load signal that switches between a high level and a low level to the load mode switching circuit, wherein the load mode switching circuit operates the chopper type switching power supply circuit according to the load signal. , A power supply control circuit for controlling the operation of the charge pump circuit. 5. The power supply control circuit according to claim 1, wherein the charge pump circuit is provided in a portion of the power supply wiring upstream of the boosting coil. Second rectifying means having a forward direction from the upstream side to the downstream side; second branch wiring branched from the secondary side output node and connected to the low voltage supply section; and the second branch. A step-up capacitor, a p-channel type second transistor and an n-channel type third transistor, which are provided on the wiring in order from the high potential side, and an intermediate connection portion between the second transistor and the third transistor. And a second capacitor connected between the upstream side portion of the first rectifying means and the second capacitor. 6. The power supply control circuit according to claim 1, further comprising a fourth transistor provided between terminals of the boosting coil, the fourth transistor being provided by the external signal or the load signal. A power supply control circuit, wherein a fourth transistor is turned on / off according to an operation mode of the load circuit.