JP2003087001A - Mounting structure of antenna switching circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shift resonance frequency to a sufficiently higher frequency to have no influence on the reception, the resonance frequency being generated due to transmission characteristics, in a combination with a low-pass filter as much as possible to reduce own internal stray capacitance of a switch diode. SOLUTION: A first switch diode 4 is connected between a first and second conductor patterns 1a, 1b, an inductance element 5a is connected between the first conductor pattern 1a and a third conductor pattern 1c, a first capacitance element 5c is connected between the third conductor pattern 1c and a fourth conductor pattern 1d, a second switch diode 8 is composed of a bare chip 8a and this chip 8a is mounted on the fourth pattern 1d, with its cathode electrode being connected to this pattern 1d and its anode electrode being connected to the third conductor pattern 1c through a bonding wire 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting structure of an antenna switching circuit in a transceiver.

[0002]

2. Description of the Related Art As shown in FIG. 6, an antenna switching circuit in a transmitter / receiver has a first switch diode 33 connected between an input / output terminal 31 connected to an antenna (not shown) and an output terminal of a transmission circuit 32. A π-type low-pass filter 35 provided between the input / output terminal 31 and the input terminal of the receiving circuit 34, and a second switch diode 36 connected between the input terminal of the receiving circuit 34 and the ground. Have.
The low-pass filter 35 includes a first capacitive element 35a connected between the input end of the receiving circuit 34 and the ground, and an inductance element 35b interposed between the input end of the receiving circuit 34 and the input / output end 31. , A second capacitance element 35c connected between the input / output terminal 31 and the ground. The cathode of the first switch diode 33 is DC-connected to the anode of the second switch diode 36 via the inductance element 35b.

In the above configuration, in the transmission mode, the two switch diodes 33 and 36 are turned on, and both ends of the first capacitance element 35a are connected to the second switch diode 36.
And the input end of the receiving circuit 34 is shunted to the ground. As a result, the inductance element 35b and the second capacitance element 35c form a parallel resonance circuit.
It is almost equal to the frequency of the transmission signal output from. Then, the transmission signal is the first switch diode 33.
Is output to the input / output terminal 31 via. At this time, since the input end of the reception circuit 34 is shunted to the ground, the transmission signal is not input to the reception circuit 34.

Further, since the two switch diodes 33 and 36 are turned off in the reception mode, the reception signal input to the input / output terminal 31 is input to the reception circuit 34 via the low pass filter 35. The reception signal is not input to the transmission circuit 32 because the first switch diode 33 is off.

A conventional mounting structure of the antenna switching circuit having the above configuration is shown in FIG. On the insulating substrate 41 on which the reception circuit 32 and the transmission circuit 35 described above are provided, an island-shaped first conductor pattern 41a to be the input / output end 31, and an island-shaped first conductor pattern 41a connected to the output end of the transmission circuit 32. The second conductor pattern 41b, the island-shaped third conductor pattern 41c connected to the input end of the receiving circuit 34, and the first conductor pattern 41.
A fourth conductor pattern 41d is provided so as to face and be close to a and the third conductor pattern 41c and connected to a grounded metal case (not shown). These conductor patterns are formed by etching a copper foil deposited on the insulating substrate 41.

The first switch diode 33 is connected between the first conductor pattern 41a and the second conductor pattern 41b, and the inductance is provided between the first conductor pattern 41a and the third conductor pattern 41c. Element 35b
Are connected, the first capacitance element 35a and the second switch diode 36 are connected between the third conductor pattern 41c and the fourth conductor pattern 41d, and the first conductor pattern 41a and the fourth conductor are connected. The second capacitive element 35c is connected to the pattern 41d.

The first and second capacitance elements 35a and 35c and the inductance element 35b each have a so-called chip component shape having electrodes for connection at both ends.
Further, the first and second switch diodes 33 and 36 have the shape of resin molded parts with connecting terminals protruding at both ends. The electrodes of the capacitance elements 35a and 35c and the inductance element 35b and the switch diodes 3 are
Terminals 3 and 36 are conductor patterns 41a to 4 respectively.
The mounting structure of the antenna switching circuit is configured by being connected to 1d.

[0008]

In the above configuration,
Although the second switch diode 36 is turned off in the reception mode, the second switch diode 36 in the off state has an equivalent circuit as shown in FIG. In FIG. 8, Cj is the equivalent capacitance between the PN junctions, Lw is the equivalent inductance of the bonding wire connecting the P layer or N layer and the connection terminal, and Ll is the equivalent inductance of the connection terminal. The equivalent inductance Ll of the connecting terminal is significantly larger than the equivalent inductance Lw of the bonding wire. Cs is an internal equivalent stray capacitance, which is connected in parallel to the series circuit of the equivalent capacitance Cj between junctions and the equivalent inductance Lw of the bonding wire.

In the above equivalent circuit, the low-pass filter 3
Above the cutoff frequency Fc of 5 (approximately 2800 MHz), a series resonance frequency and a parallel resonance frequency higher than that appear due to the presence of the stray capacitance Cs. Then, each resonance frequency moves to the lower side due to the equivalent inductance Ll of the connection terminal and the capacitance of the first capacitive element 35a. Therefore, the entire transmission characteristics including the low pass filter 35 and the switch diode 36 in the off state are attenuated at the series resonance frequency Fs and peaked at the parallel resonance frequency Fp, as shown in FIG. The parallel resonance frequency Fp is about twice the reception frequency (approximately 4800 MHz) when calculated using the constants of the equivalent circuit of the second switch diode 36 in the off state. For this reason,
There is a problem that signals existing in the vicinity of this are input to the receiving circuit and cause reception interference.

Therefore, in the present invention, the internal stray capacitance of the switch diode itself is made as small as possible, and the resonance frequency generated by the transmission characteristics in combination with the low-pass filter is moved to a higher level so that reception is not affected. With the goal.

[0011]

In order to solve the above problems, an insulating substrate provided with a transmitting circuit, a receiving circuit, and an antenna switching circuit is provided, and the first substrate connected to the antenna is provided on the insulating substrate. A conductor pattern, a second conductor pattern connected to the output end of the transmitter circuit, a third conductor pattern connected to the input end of the receiver circuit, and a fourth conductor grounded close to the third conductor pattern. And a first switch diode connected between the first conductor pattern and the second conductor pattern, at least the first conductor pattern and the third A low-pass filter having an inductance element connected between a conductor pattern and a capacitance element connected between the third conductor pattern and the fourth conductor pattern, A second switch diode that is connected between the third conductor pattern and the fourth conductor pattern and is turned on or off together with the first switch diode. Of the switch diode is a bare chip, the bare chip is placed on the fourth conductor pattern, the electrode on the lower surface thereof is connected to the fourth conductor pattern, and the electrode on the upper surface is bonded by the bonding wire. Connected to the conductor pattern.

The capacitive element may include the third conductor pattern, a dielectric layer formed in a film shape on the third conductor pattern, and a conductor layer formed in a film shape on the dielectric layer. And connecting the conductor layer to the fourth conductor pattern and positioning the bonding wire above the conductor layer.

The dielectric layer and the conductor layer are formed by thick film printing means or thin film vapor deposition means.

[0014]

1 and 2 show a mounting structure of an antenna switching circuit according to the present invention. 1 is a plan view and FIG.
2 is a sectional view taken along line 2-2 in FIG. 1 and 2, an insulating substrate 1 is connected to an antenna (not shown), and is connected to an island-shaped first conductor pattern 1a serving as an input / output end and an output end of a transmission circuit 2 (see FIG. 3). The connected island-shaped second conductor pattern 1b and the island-shaped third conductor pattern 1 connected to the input end of the receiving circuit 3 (see FIG. 3).
c, the first conductor pattern 1a and the third conductor pattern 1
A fourth conductor pattern 1d is provided so as to face and be close to c and be connected to a grounded metal case (not shown). These conductors are formed by a method such as etching a copper foil deposited on the insulating substrate 1.

A first switch diode 4 is provided between the first conductor pattern 1a and the second conductor pattern 1b. The first switch diode 4 has an anode terminal 4a for connection and a cathode terminal 4b for projecting at both ends.
The anode terminal 4a is connected to the second conductor pattern 1b, and the cathode terminal 4b is connected to the first conductor pattern 1a.
Connected to. In addition, an inductance element 5a in the form of a chip component is provided between the first conductor pattern 1a and the third conductor pattern 1c, and the electrodes at each end have the first conductor pattern 1a and the third conductor pattern 1c. Connected to. Furthermore, the first conductor pattern 1a and the fourth conductor pattern 1
A second capacitor element 5b in the form of a chip component is provided between the first and second conductor patterns 1a and 1d, and electrodes at each end are connected to the first conductor pattern 1a and the fourth conductor pattern 1d.

Further, as shown in FIG. 2, a dielectric layer 6 is formed on the third conductor pattern 1c by thick film printing or thin film deposition, and on the dielectric layer 6 is film printing or thin film deposition. The conductor layer 7 is formed. Then, the conductor layer 7 is connected to the fourth conductor pattern 1d. As a result, the third conductor pattern 1c, the dielectric layer 6, and the conductor layer 7 constitute the first capacitive element 5c.

Further, a bare chip 8a, which will be the second switch diode 8, is mounted on the fourth conductor pattern 1d at a position facing the third conductor pattern 1c, and the electrode (cathode electrode) on the lower surface thereof is the first. The electrode (anode electrode) on the upper surface is connected to the fourth conductor pattern 1d and is also connected to the third conductor pattern 1c by the bonding wire 9. The bonding wire 9 is located above the conductor layer 7. As a result, the stray capacitance between the bonding wire 9 and the third conductor pattern 1c which is one of the electrodes forming the first capacitance element 5c is reduced.

The above-mentioned mounting structure constitutes the transmission / reception circuit shown in FIG. 3, and the inductance element 5a, the second capacitance element 5b, and the first capacitance element 5c form the low-pass filter 5. Further, since the cathode of the first switch diode 4 is connected to the anode of the second switch diode 8 via the inductance element 5a and the bonding wire 9, both of the two switch diodes 4 and 8 are turned on or off. It will be easy.

With the above structure, in the transmission mode, the first and second switch diodes 4 and 8 are turned on, both ends of the first capacitive element 5c are short-circuited by the second switch diode 8, and the receiving circuit is received. The input end of 3 is shunted to ground. As a result, the inductance element 5
The parallel resonant circuit is configured by a and the second capacitive element 5b, and the resonant frequency is substantially equal to the frequency of the transmission signal output from the transmission circuit 2. Then, the transmission signal is output to the first conductor pattern 1a via the first switch diode 4. At this time, since the input end of the receiving circuit 3 is shunted to the ground, the transmission signal is not input to the receiving circuit 3.

In the receiving mode, the two switch diodes 4 and 8 are turned off, so the first conductor pattern 1
The received signal input to a is input to the receiving circuit 3 via the low pass filter 5. The reception signal is not input to the transmission circuit 2 because the first switch diode 4 is off.

Further, in the above mounting structure, when the equivalent inductance of the bonding wire 9 is Lw and the equivalent capacitance between the PN junctions when the bare chip 8a is off is Cj, the third conductor pattern 1c and the fourth conductor are used. An equivalent circuit configured between the pattern 1d and the pattern 1d is as shown in FIG. 4, and the stray capacitance Cs formed between the anode electrode of the bare chip 8a and the third conductor pattern 1c is a conductor existing between them. Due to layer 7, it is very small and negligible.

Accordingly, the series resonance frequency and the parallel resonance frequency due to the equivalent inductance Lw of the bonding wire 9, the equivalent capacitance Cj between the PN junctions of the bare chip 8a when the bare chip 8a is off, and the stray capacitance Cs become extremely high, and Since the second switch diode 8 does not have an equivalent inductance due to a connecting terminal, the series resonance frequency including the first capacitive element 5c and the parallel resonance circuit are much higher than in the conventional case, and as shown in FIG. , The series resonance frequency Fs is about 900 MHz, and the parallel resonance frequency Fp is about 1500.
It becomes MHz. Since the level at the parallel resonance frequency Fp is high, the level becomes much lower than before, and reception interference by other signals existing near this frequency is avoided.

[0023]

As described above, in the present invention, the antenna switching circuit has the first switch diode connected between the first conductor pattern and the second conductor pattern, and at least the first conductor pattern and the first conductor pattern. A low-pass filter having an inductance element connected between the third conductor pattern and the third conductor pattern and a capacitance element connected between the fourth conductor pattern, and the third conductor pattern and the fourth conductor pattern. A second switch diode that is connected between the conductor pattern and is turned on or off together with the first switch diode; the second switch diode is a bare chip; and the bare chip is a fourth chip. On the lower conductor pattern, connect the lower electrode to the fourth conductor pattern, and connect the upper electrode to the third conductor pattern with a bonding wire. Having connected over emissions, stray capacitance of the second switching diode is reduced, the higher the resonance frequency due to the stray capacitance, reception interference is reduced. Moreover, since the second switch diode is formed on the fourth conductor pattern, the area of the insulating substrate can be reduced.

Further, the capacitive element is provided with a third conductor pattern,
A dielectric layer formed in a film shape on the third conductor pattern,
Stray capacitance is further reduced because it is composed of a conductor layer formed in a film shape on the dielectric layer, the conductor layer is connected to the fourth conductor pattern, and the bonding wire is located above the conductor layer. . Moreover, since the capacitive element can be formed on the third conductor pattern, the insulating substrate can be made smaller.

Further, since the dielectric layer and the conductor layer are formed by the thick film printing means or the thin film vapor deposition means, the second capacitive element has no inductance component and does not generate unnecessary self-resonance.

[Brief description of drawings]

FIG. 1 is a plan view showing a mounting structure of an antenna switching circuit of the present invention.

FIG. 2 is a cross-sectional view of essential parts showing a mounting structure of the antenna switching circuit of the present invention.

FIG. 3 is a circuit diagram showing a configuration of an antenna switching circuit of the present invention.

FIG. 4 is an equivalent circuit diagram of a main part of the antenna switching circuit of the present invention.

FIG. 5 is a transmission characteristic diagram of the antenna switching circuit of the present invention.

FIG. 6 is a circuit diagram showing a configuration of a conventional antenna switching circuit.

FIG. 7 is a plan view showing a mounting structure of a conventional antenna switching circuit.

FIG. 8 is an equivalent circuit diagram of a main part of a conventional antenna switching circuit.

FIG. 9 is a transmission characteristic diagram of a conventional antenna switching circuit.

[Explanation of symbols]

1 Insulation board 1a First conductor pattern 1b Second conductor pattern 1c Third conductor pattern 1d Fourth conductor pattern 2 Transmitter circuit 3 Receiver circuit 4 First switch diode 5 Low pass filter 5a Inductance element 5b Second capacitive element 5c First capacitive element 6 Dielectric layer 7 Conductor layer 8 Second switch diode 8a bare chip 9 Bonding wire

Claims (3)

[Claims] 1. An insulating substrate provided with a transmitting circuit, a receiving circuit, and an antenna switching circuit, wherein a first conductor pattern connected to the antenna and an output end of the transmitting circuit are provided on the insulating substrate. A second conductor pattern, a third conductor pattern connected to the input end of the receiving circuit, and a fourth conductor pattern which is close to the third conductor pattern and grounded, and the antenna switching circuit Is a first switch diode connected between the first conductor pattern and the second conductor pattern, and an inductance element connected at least between the first conductor pattern and the third conductor pattern A low-pass filter having a capacitive element connected between the third conductor pattern and the fourth conductor pattern, the third conductor pattern and the fourth conductor pattern A second switch diode that is connected between the first switch diode and the first switch diode and is turned on or off together with the first switch diode, the second switch diode being a bare chip, and the bare chip being a bare chip. Is placed on the fourth conductor pattern, the lower surface electrode is connected to the fourth conductor pattern, and the upper surface electrode is connected to the third conductor pattern by a bonding wire. Mounting structure of antenna switching circuit. 2. The capacitive element, the third conductor pattern, a dielectric layer formed in a film shape on the third conductor pattern, and a conductor layer formed in a film shape on the dielectric layer. The mounting structure for an antenna switching circuit according to claim 1, wherein the mounting layer is connected to the fourth conductor pattern, and the bonding wire is located above the conductor layer. . 3. The mounting structure for an antenna switching circuit according to claim 2, wherein the dielectric layer and the conductor layer are formed by a thick film printing means or a thin film vapor deposition means.