JP2003077853A - Method of manufacturing p-type semiconductor and semiconductor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a p-type semiconductor which provides low-contact resistance for electrode and assures superior transmission efficiency. SOLUTION: A p-GaN layer 5 as III-nitride-system compound or the like is formed on a sapphire substrate 1 with the MOVPE method, and a first metal layer 6 composed of Co/Au is formed on the layer 5. Thereafter, the first metal layer 6 is irradiated with electron beam with a surface electron irradiation apparatus, utilizing plasma. Accordingly, a damage layer is prevented from being formed on the surface layer, and the resistivity of the p-GaN layer 5 can be lowered. Next, a second metal layer 10 (Ni) is formed on the first metal layer 6. Thereafter, the first metal layer 6 is etched with nitric fluoric acid via the second metal layer 6. Accordingly, the first metal layer is removed almost completely. Thereafter, a light transmitting p-electrode 7 composed of Co/Au is formed thereon. Thereby, a p-type semiconductor having lower contact resistance and low-drive voltage can be formed, and the light transmission efficiency thereof can also be improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of lowering the resistivity of a semiconductor to which p-type impurities have been added by electron beam irradiation, and a semiconductor device using the p-type semiconductor having the lowered resistivity. In particular, the present invention relates to a method of irradiating an electron beam through a metal layer to surely reduce the resistivity, and further removing the metal layer to form an electrode to reduce the driving voltage. The present invention also relates to a semiconductor device having a reduced driving voltage. The present invention provides an optical semiconductor that requires a low driving voltage and high light transmittance, for example, a light emitting element such as an LED or a semiconductor laser, an optical device such as a solar cell or a light receiving element, or another transistor, FET, HEMT, thyristor, It is applied to electronic devices such as gas sensors.

[0002]

2. Description of the Related Art As a method of lowering the resistivity of a p-type semiconductor which has been made p-type by adding impurities, for example, "Applied Physics, Vol.65, No.7, 1996: The method using the electron beam irradiation apparatus described in “Current status and future” and the like are generally widely known. These electron beam irradiators that have been generally proposed in the past have a method of arranging a sample (electron beam irradiation target such as a semiconductor) in a vacuum and irradiating an electron beam in the vacuum to lower the resistivity of the semiconductor. is there. In recent years, since it takes a lot of time to evacuate the chamber, planar irradiation has been proposed in which a large number of electrons are generated and the electron beam is planarly irradiated in substantially the atmosphere. For example, Japanese Patent Application No. 2000-253424 and Japanese Patent Application No. 2 of the present inventor
000-254306.

[0003]

However, there is a problem that the surface condition of the semiconductor is slightly deteriorated even when the electron beam is irradiated in a plane shape. Therefore, the present inventors formed a thin metal layer on the surface thereof in order to prevent the influence of electron beam irradiation on a semiconductor to which p-type impurities have been added,
We newly invented a method of electron beam irradiation through the metal layer. As a result, a low resistivity was realized without forming a damaged layer on the surface of the semiconductor (Japanese Patent Application No. 2000-2).
54306).

However, although this method can further lower the resistivity, the problem remains that the metal layer after electron beam irradiation is oxidized and is not completely removed by the subsequent etching step. That is, when an electrode is formed on this semiconductor, the contact resistance increases and the drive voltage cannot be sufficiently reduced. Further, when this is applied to an optical element such as an LED, a laser element, a light receiving element, the light transmittance is also lowered.

The present invention has been made to solve the above problems, and an object thereof is to form a metal layer on the surface of a semiconductor to which a p-type impurity is added, and to irradiate the electron beam through the metal layer. By doing so, the surface state of the semiconductor is prevented from deteriorating. Further, the metal layer is almost completely removed by a method described later, and an electrode is formed on the metal layer to reduce the contact resistance of the electrode, thereby reducing the driving voltage. Also, by removing the metal layer almost completely, the light transmittance of the surface of the optical element is improved. That is, it is possible to improve the energy efficiency of a semiconductor element that exhibits a light emitting action or a light receiving action, thereby providing a semiconductor element having good light emitting efficiency and light receiving efficiency. Also, by this, the transistor, FE
It is to improve the performance of a wide variety of general electronic devices such as electronic devices such as T, HEMT, thyristors, and gas sensors, light emitting elements such as LEDs and lasers, light receiving elements such as solar cells and optical sensors. The above-mentioned objects should not be construed as attaining all the objects of the individual inventions, but should be understood to be the respective goals of the respective inventions.

[0006]

In order to solve the above-mentioned problems, the following means are effective. That is, the first invention is a method of lowering the resistivity of a semiconductor to which a p-type impurity has been added, which comprises forming a first metal layer on the surface of a semiconductor to which a p-type impurity has been added. The p-type impurity-added semiconductor is irradiated with an electron beam through the layers, a second metal layer is formed on the first metal layer after the electron beam irradiation, and the first metal layer is formed together with the second metal layer by an etching process. A p-type semiconductor manufacturing method characterized by removing the p-type semiconductor. Examples of the semiconductor to which the p-type impurity is added include group III nitride compound semiconductors. For _{example, Al x Ga y In 1-} xy N (0
≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1).

The second invention is based on the first invention.
The second metal layer is formed after etching the surface of the first metal layer. For etching the surface of the first metal layer, for example, an iodine-based etching solution is used.
A third invention is the first or second invention, wherein the first metal layer is made of cobalt (Co), nickel (Ni), aluminum (Al), copper (Cu), palladium (Pd), manganese. (Mn),
It is characterized by being composed of vanadium (V), gold (Au), or an alloy containing at least one of these metals.

A fourth invention is that, in any one of the first to third inventions, the second metal layer is made of nickel or cobalt.

A fifth aspect of the invention is the invention of any one of the first to fourth aspects of the invention, wherein the etchant used in the etching step after forming the second metal layer is hydrofluoric acid and nitric acid. It is a mixed solution of water. Further, the sixth invention is
In any one of the first to fifth inventions,
A semiconductor to which p-type impurities are added is to be a group III nitride compound semiconductor. For example, III-nitride compound semiconductors, and more specifically, _{"Al x Ga y In 1-xy} N (0
≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) ”represented by the general formula: ternary (GaN, InN, AlN), ternary (GaIn
N, AlInN, AlGaN), or quaternary (AlGaInN) III
Group nitride compound semiconductors and the like.

A seventh invention is that the p-type impurity in the invention of any one of the first to sixth inventions is magnesium (Mg). The impurities may be known p-type impurities such as zinc (Zn), beryllium (Be) and calcium (Ca). Further, magnesium may be added to the semiconductor in which beryllium is implanted. Furthermore, even if a plurality of p-type impurities are added, n-type impurities may be added to such an extent that the p-type is not hindered. An eighth invention is that in any one of the first invention to the seventh invention, the film thickness of the first metal layer is 5Å to 10000Å.

Further, a ninth aspect of the invention is to claim 1 to claim 7.
In any one of the above inventions, the thickness of the first metal layer is 5Å ~
That is 100Å. The tenth invention is the first invention.
In any one of the inventions from 9 to 9,
That is, the film thickness of the metal layer is 100 Å to 6000 Å.

The eleventh invention is the first invention through the first invention.
In any one of the inventions of No. 0 to No. 0, the electric potential of the first metal layer is kept substantially constant by grounding or the like during electron beam irradiation. A twelfth aspect of the present invention is a semiconductor device in which a plurality of semiconductor layers made of a group III nitride compound semiconductor are stacked on a substrate by crystal growth, and at least a part of the semiconductor layers forming the semiconductor device is provided. It has a p-type semiconductor formed by the method of any one of the first invention (Claim 1) to the eleventh invention (Claim 11).

A thirteenth invention is the twelfth invention including a layer formed on the uppermost layer of the group III nitride compound semiconductor device, and an electrode is newly formed on the p-type semiconductor of the uppermost layer. It is to be. A fourteenth invention is that in the thirteenth invention, the electrode formed on the surface of the p-type semiconductor has a multilayer structure.

A fifteenth invention is the same as the thirteenth invention or the fourteenth invention, wherein the electrodes are cobalt (Co), nickel (N).
i), aluminum (Al), copper (Cu), palladium (Pd), manganese (Mn), vanadium (V), gold (Au), or at least one of these metals is formed. That is. The sixteenth invention is the thirteenth invention to the fifteenth invention.
In the invention of any one of Claims 1 to 4, the electrode is made of cobalt (C
o), nickel (Ni), aluminum (Al), copper (Cu), palladium (Pd), manganese (Mn), vanadium (V), gold (Au) at least two kinds of alloys are alloyed. It is to be an electrode. A seventeenth invention is that in the fifteenth invention or the sixteenth invention, the alloying is performed in a gas atmosphere containing oxygen. The gas atmosphere containing oxygen is a gas atmosphere containing oxygen atoms, oxygen molecules, oxygen ions, oxygen radicals and the like. It may be a pure oxygen atmosphere, a mixed gas of oxygen and another inert gas such as nitrogen or argon, or an air, or a mixed gas of oxygen and air. The above-mentioned problems can be solved by the above means.

[0015]

FIG. 2 shows an electron beam irradiation apparatus 100 for reducing the resistance of a semiconductor doped with p-type impurities.
In brief, first, in this apparatus, the plasma chamber 1
Helium gas is sealed in 05, and a helium ion gas (He ⁺ ) is generated by the plasma power source and the wire 106.
That is, the helium gas is brought into a plasma state. The plasma voltage is, for example, about 200 kV. As a result, the plasmatized He ⁺ is accelerated by the high electric field, and the vacuum chamber 10
It collides with the cathode (cold cathode) 103 in 1 at high speed. At this time, a large amount of electrons are emitted from the cathode 103 due to the collision, and are accelerated in the opposite direction by the high electric field to irradiate a p-type doped semiconductor (p-GaN). This is usually done in about atmospheric air. This irradiation (collision of electrons with the surface of the semiconductor) lowers the resistivity of the semiconductor to which the p-type impurity is added.

However, at this time, several hundred liters of the surface layer of the semiconductor to which the p-type impurity is added is damaged and the resistance is not lowered. This damage is considered to be a damage such as electrostatic breakdown due to a high electric field locally generated by charging up the semiconductor surface by irradiating the semiconductor with a large amount of electrons. In addition, for electron beam irradiation, there is another scanning type method performed in a vacuum (conventional method). Since the electron beam irradiation by this method is local irradiation, there is a problem that the crystallinity of the semiconductor surface is deteriorated or the crystallinity is made non-uniform depending on the current value fluctuation, the acceleration voltage fluctuation, and the vacuum degree fluctuation.

Therefore, according to the first invention, the first metal layer is formed on the surface of the semiconductor to which the p-type impurity has been added, and the electron beam is applied to the semiconductor to which the p-type impurity has been added through the first metal layer. Irradiate. Since the electrons accelerated by the high electric field pass through the first metal layer which is a thin film, they reach the semiconductor to which the p-type impurity is added as usual, and the resistance is lowered (the resistivity is lowered). On the other hand, since the first metal layer formed on the surface of the semiconductor prevents charge-up, damage on the surface of the semiconductor is suppressed, so that the problem of not lowering the resistivity does not occur. That is, if the surface of the semiconductor is directly irradiated with an electron beam without providing the first metal layer, a problem of charging (charge-up) occurs, but if the electron beam is irradiated through the first metal layer. However, this problem disappears and the electron beam is uniformly irradiated. That is, the resistivity is uniformly reduced.

Next, in the first invention, after the electron beam irradiation, a second metal layer is formed on the first metal layer by, for example, a vapor deposition method. If only the first metal layer is used, the electron beam irradiation causes
The first metal layer is oxidized and cannot be completely removed in the subsequent etching process. By using the second metal layer, it is easy to remove the first metal layer and the second metal layer by etching.

In the present invention, a second metal layer such as nickel (Ni) or cobalt (Co) is formed on the first metal layer.
For example, if the first metal layer is an alloy of cobalt (Co) and gold (Au), it is easy to etch gold (Au) or cobalt (Co) or their alloys through nickel (electrons of nickel). To do. That is, the first metal layer is easily removed via the second metal layer. Of course, the second metal layer itself is also removed by the etching process. As a result, the resistivity of the semiconductor to which the p-type impurity is added is reduced and the surface thereof is clean. That is, when an electrode is formed on this p-type impurity-added semiconductor to form a semiconductor element,
Since the surface is clean, it is possible to form an optimum electrode having a good ohmic property and a small contact resistance on the semiconductor element. Therefore, the driving voltage of the semiconductor element can be reduced. Further, the light transmittance of the p-type semiconductor surface from which the first metal layer and the second metal layer are completely removed is improved. Also, this p
Unnecessary metal layer when used as an optical element such as a light emitting element such as an LED or a laser element or a light receiving element such as a solar cell or an optical sensor having a semiconductor surface to which a type impurity is added as a light output surface or an input surface Does not remain, the luminous efficiency and the light receiving efficiency can be improved as compared with the conventional method. That is, the optimum p for the optical element
It becomes a manufacturing method of a type semiconductor.

According to the second invention, the first etching is performed.
The second metal layer is formed after removing the metal layer as much as possible. That is, the adhesion between the first metal layer and the second metal layer is improved. This makes it possible to more reliably remove the first metal layer via the second metal layer in the subsequent etching step.

According to the third invention, the first metal layer is made of cobalt.
(Co), nickel (Ni), aluminum (Al), copper (Cu), palladium (Pd), manganese (Mn), vanadium (V), gold (Au),
Alternatively, an alloy containing at least one of these metals is used. By this means, formation of a damaged layer on the surface of the semiconductor to which the p-type impurity has been added is reliably prevented. Further, by using an alloy containing at least one of the above metal components or metal components for the first metal layer, it is possible to reliably reduce the resistivity.

According to the fourth invention, the second metal layer is composed of nickel (Ni) or cobalt (Co). By this means, it is possible to reliably prevent the formation of the damaged layer on the surface of the semiconductor to which the p-type impurity is added, and it is possible to reduce the resistivity. Further, in the etching step described below, the first metal layer can be reliably removed by forming the second metal layer from the above metal. That is, the semiconductor surface can be surely cleaned.

Further, according to the fifth aspect of the invention, since the etching solution in the etching step is a mixed solution of hydrofluoric acid, nitric acid and water, the first solution formed on the surface of the p-type semiconductor is formed.
The metal layer and the second metal layer can be removed almost completely.

According to the sixth aspect of the invention, the semiconductor to which the p-type impurity is added is a group III nitride compound semiconductor. These p-type impurity added semiconductors are
The above effect can be effectively obtained by using a group III nitride compound.

According to the seventh invention, the p-type impurity is magnesium (Mg). If Mg is used as an impurity, the resistivity can be easily lowered by electron beam irradiation. still,
The impurity is preferably magnesium (Mg), but in addition,
Well-known p-type impurities such as zinc (Zn) and beryllium (Be) may be used.

Further, according to the eighth invention, the film thickness of the first metal layer is set to 5Å to 10000Å. If the first metal layer is formed to have a film thickness of 5Å to 10000Å, the resistivity of the semiconductor to which the p-type impurity is added can be effectively reduced. From the viewpoint of obtaining a low-resistance p-type in which damage to the layer to which the p-type impurity is added is suppressed, 100Å to 5000Å is preferable, and more preferably 500Å to 3000Å.
Particularly, it has been confirmed that the film thickness of the first metal layer is approximately 100 Å, which is the most effective. Further, if the film thickness is too thicker than 10000Å, it takes time to form the film, which is not desirable. If it is thinner than 5Å, the effect of preventing formation of a damaged layer on the surface of the semiconductor is reduced, which is not desirable.
Further, from the viewpoint of completely removing the first metal layer to reduce the contact resistance with respect to the semiconductor to which the p-type impurity is added and to improve the light transmittance, the first metal layer is
The desired thickness of the metal layer is in the range of 5Å to 100Å.
In particular, a desirable range is 10Å to 100Å, and a more desirable range is 50Å to 100Å. When the electron beam irradiation treatment is performed with the first metal layer at about 70Å, the p-type impurity-added semiconductor in which the first metal layer was formed after removing the first metal layer together with the second metal layer Light transmittance is 94% (at wavelength 375 nm) to 96% (at wavelength 52
(At 0 nm). However, the light transmittance of the semiconductor before the first metal layer and the second metal layer are not provided is set to 100% and is used as a reference. Similarly, when the thickness of the first metal layer is 200 Å, the light transmittance of the p-type semiconductor is 8
5% (at wavelength 375 nm) to 88% (at wavelength 520 nm)
It was). From this, it is considered that the thickness of the first metal layer is preferably 100 Å or less in order to obtain a light transmittance of 90% to 92% or more. The decrease in the light transmittance means that the first metal layer remains, and the contact resistance increases when the metal electrode is formed thereafter, and the light transmittance decreases. It means that the light output is reduced. Therefore, from the viewpoint of completely removing the first metal layer, or from the viewpoint of completely removing the first metal layer to reduce the contact resistance between the metal electrode and the semiconductor layer that is subsequently formed, Alternatively, from the viewpoint of improving the light transmittance and thus improving the external quantum efficiency in the light emitting element and improving the light receiving sensitivity in the light receiving element, the thickness of the first metal layer is in the range of 5Å to 100Å, particularly preferably It can be said that 50Å to 100Å is desirable. Further, if the first metal layer is too thin, it does not function as a protective film, so 5 Å or more is desirable.

When the thickness of the second metal layer is 100 to 6000Å as in the tenth invention, the first metal layer can be removed more effectively in the etching process.
More preferably, the thickness of the second metal layer is 500Å to 300
About 0Å is good. Furthermore, it is preferably 1000Å to 2
000Å is good. For example, if it is less than 100Å by the vapor deposition method, the second metal layer may be formed in an island shape. In that case, the first metal layer cannot be uniformly removed in the etching step, which is not desirable. Also, 6000
When it is Å or more, the etching process time becomes long, which is not efficient. Therefore, the thickness of the second metal layer should be 100Å
It is desirable to set it up to 6000Å. When the film thickness of the second metal layer was 1000 Å to 2000 Å, the first metal layer could be most efficiently and completely removed.

Examples of the metal forming the first metal layer include cobalt (Co), nickel (Ni), aluminum (Al), copper (Cu), palladium (Pd), manganese (Mn) and vanadium. (V), gold (Au), or an alloy containing at least one of these metals is preferably used. When the first metal layer is formed of an alloy, the combination of cobalt (Co) and gold (Au) is the best. As a result, the above-described action and effect of lowering the resistivity can be obtained above a certain level. Further, the metal is almost completely removed by the etching process using the second metal layer as a medium.

According to the eleventh invention, the potential of the first metal layer is kept substantially constant by grounding or the like during electron beam irradiation. As described above, if the potential of the first metal layer, that is, the semiconductor to which the p-type impurity is added is kept substantially constant by grounding or the like, the charging of the semiconductor to which the p-type impurity is added can be prevented or alleviated. This makes it possible to prevent or reduce damage to the surface (electron beam irradiation surface) of the semiconductor to which the p-type impurity is added due to electron beam irradiation, and the low resistivity of the semiconductor to which the p-type impurity is added. It is effective for For example, as shown in FIG. 3, the substrate holder is made of a conductive material and is connected to the first metal layer on the surface of a p-type doped semiconductor (eg, p-GaN). Thereby, the potential of the semiconductor to which the p-type impurity is added can be maintained at the ground potential. Therefore, the low-energy electrons from the plasma flow to the ground, and the formation of a damaged layer on the surface of the semiconductor to which the p-type impurity has been added is reliably prevented.

According to the twelfth aspect of the invention, at least a part of the semiconductor layer constituting the semiconductor element has a p resistivity reduced by the method according to any one of claims 1 to 11.
Type semiconductor is used. The group III nitride compound semiconductor (p-type semiconductor) having a low resistivity is, for example, L
It is useful for p-type contact layers such as light emitting elements such as EDs and semiconductor lasers, light receiving elements and other p layers. That is, if a p-type semiconductor having a sufficiently low resistivity is used for a semiconductor element,
The drive voltage can be reduced as compared with the conventional one. In addition, the p-type semiconductor from which the first metal layer has been sufficiently removed as described above has an improved light transmittance on its surface. Therefore, the present invention is useful for an optical semiconductor device that emits and receives light.

According to the thirteenth invention, in the twelfth invention, the p-type semiconductor includes a layer formed on the uppermost layer of the group III nitride compound semiconductor device, and the p-type semiconductor of the uppermost layer is included. An electrode is newly formed on the top. P according to the invention
Since the mold semiconductor is formed cleanly, an electrode having good ohmic property and a stronger electrode can be formed on the mold semiconductor by selecting film forming conditions and the like. That is, an optimal electrode can be formed according to the application. For example, it is possible to manufacture a semiconductor element that is optimal for mounting on a vehicle.

According to the fourteenth invention, the electrode formed on the surface of the p-type semiconductor has a multilayer structure. With the multi-layer structure, a metal having good adhesion to the surface of the p-type semiconductor can be used as the lower layer, and a metal that can be easily wire-bonded can be used as the upper layer. Also, by selecting the type of metal for the lower and upper layers, it is possible to make the electrodes of the semiconductor element difficult to oxidize, reduce the contact resistance between the electrodes and the p-type semiconductor, and make the electrodes less susceptible to deterioration over time. You can

According to the fifteenth invention, the electrodes are made of cobalt (Co), nickel (Ni), aluminum (Al), copper (Cu), palladium (Pd), manganese (Mn), vanadium (V), Gold (Au)
Or at least one of these metals is formed. This can improve the adhesion to the p-type semiconductor and reduce the contact resistance. That is, the driving voltage of the semiconductor element can be reduced.

According to the sixteenth aspect of the invention, the electrodes are made of cobalt (Co), nickel (Ni), aluminum (Al), copper (Cu), palladium (Pd), manganese (Mn), vanadium (V), Gold (Au)
At least two kinds of the above metals are alloyed to form an alloy electrode. By alloying the electrode, the ohmic property with the p-type semiconductor can be improved. For example, when the alloy is formed of Ni / Au, some Au atoms are also distributed in the p-type semiconductor surface layer. That is, the contact resistance is further reduced. Thereby, the drive voltage can be further reduced.

According to the seventeenth aspect, the alloying is performed in a gas atmosphere containing oxygen. For example, the electrodes are made of two or more kinds of metals having different electronegativities,
In addition, when the metal in contact with the p-type semiconductor has a higher electronegativity and is easily oxidized, for example, if heating is performed in an atmosphere containing oxygen, the metal in contact with the p-type semiconductor reacts with oxygen. It passes through the metal on it and is exposed on the surface. At this time, the impurities on the interface are also removed from the interface. In this way, the metal layer having a large work function, which was originally not in direct contact with the p-type semiconductor interface, comes into contact with the p-type semiconductor, and a better contact can be realized.

According to such a method, it is possible to independently set (optimize) the type and film thickness of the metal forming the electrode according to various conditions. This makes it possible to further reduce the drive voltage of the element and to form a stronger electrode. The gas containing an oxygen element includes, for example, at least one molecule containing an oxygen element such as O ₂ , O ₃ , CO, CO ₂ , NO, N ₂ O, NO ₂ and H ₂ O. It is a gas. Further, as other elements constituting this gas (atmosphere), an inert gas such as group 0 element gas or nitrogen molecule gas may be used. Therefore, for example, this gas may be constituted by the atmosphere or the like.

[0037]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described below based on preferred embodiments. However, the present invention is not limited to the following embodiments and examples, and it is possible to grasp the invention by arbitrarily extracting a part of the description regardless of other parts. The p-type semiconductor used in the present invention is generally any semiconductor, but a III-V group compound semiconductor and a III group nitride semiconductor are particularly preferable.

As the group III nitride semiconductor, for example, 4
Elementary AlGaInN, ternary AlGaN, GaInN, AlInN, 2
For example, AlN, GaN, InN, etc. of the original system. However, the composition ratio of those atoms is arbitrary. In addition, these were doped with Group III elements (for example, those having a larger atomic radius than Al and Ga, for example, those doped with In, the doping was not added to the extent that the composition ratio appears), and those doped with Group V elements. Thing (for example, P, A whose atomic radius is larger than N,
s, Sb are doped). Further, a part of N in AlGaInN is, for example, P, As, Sb, AlGaInNP, AlGaInNA
s or AlGaInNSb may be used. The conclusion is that nitrogen-containing III-V
Any compound semiconductor can be used.

The substrate used for crystal growth is made of sapphire, spinel, silicon, silicon carbide, zinc oxide, gallium phosphide, gallium arsenide, magnesium oxide, manganese oxide, lithium gallium oxide (LiGaO ₂ ), molybdenum sulfide (MoS), or the like. In addition to the heterogeneous substrate, the GaN substrate and the other group III nitride semiconductor substrates described above can be used.

As the crystal growth method, a metal organic chemical vapor deposition method (MOCVD, MOVPE), a molecular beam epitaxy method (MBE), or a halide vapor phase epitaxy method can be used. Further, it is usually desirable to grow a target crystal after forming a buffer layer on the substrate.

The buffer layer is composed of GaN, InN, Al in addition to AlN._xGa
_1-xN (0 <x <1), In_xGa_1-xN (0 <x <1), Al_xIn_1-xN (0 <x <1), Al_xG
a_yIn_1-xyN (0 <x <1,0 <y <1,0 <x + y <1), other, general formula Al_x
Ga_yIn _1-xyII at N (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1)
At least some of the Group I elements are boron (B),
It may be replaced by um (Tl) and at least part of the nitrogen
Phosphorus (P), arsenic (As), antimony (Sb), bismuth
It may be replaced with (Bi) or the like. Furthermore, n-type dopa such as Si
And p-type dopant such as Mg may be added.
A superlattice formed by joining two or more kinds of semiconductors may be used. Special
In the case of Si substrate, SiC is desirable for the buffer layer.
Yes.

A so-called low temperature buffer layer is used as the buffer layer. A desirable growth temperature of the buffer layer is 380 ° C to 420 ° C in the case of AlN. The most desirable growth temperature for GaN is 500-700 ° C. Generally, 360 ° C to 900 ° C (most desirably 360 ° C
The function as a buffer layer is most effective when grown at ~ 600 ° C. In addition to the low temperature buffer layer, a so-called high temperature buffer layer may be used. For example, 1000 ° C to 1
It is a buffer layer grown in the range of 180 ° C. The most desirable temperature range is 1050 ° C to 1170 ° C, and more desirably 1100 ° C to 1150 ° C.

For forming the buffer layer, the MOCVD method and the MBE method can be used. It is also possible to use sputtering. Different manufacturing methods have different optimum temperatures during film formation. It is also possible to form a buffer layer composed of AlN 3 and GaN by a reactive sputtering method using high-purity metallic aluminum and nitrogen gas as raw materials using a DC magnetron sputtering device. In addition, using metal aluminum, metal gallium, metal indium, nitrogen gas or ammonia gas, in the same manner as above, the general formula Al _x G
It is possible to form a buffer layer of a _y In _1-xy N (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1, composition ratio is arbitrary). In addition to sputtering, a vapor deposition method, an ion plating method, a laser ablation method, an ECR method, or a plasma CVD method can be used. The buffer layer formed by these physical vapor deposition methods is preferably performed at 200 to 600 ° C. It is more preferably 300 to 500 ° C., further preferably 40.
It is 0 to 500 ° C. When the physical vapor deposition method such as the sputtering method is used, the thickness of the buffer layer is 10
0 ~ 3000Å is desirable. More preferably, 100
~ 2000Å is desirable, most preferably 100-3
It is 00Å. Further, it is desirable to perform heat treatment after forming the buffer layer. Since the temperature of the substrate is raised when the crystal is grown on the buffer layer, the heat treatment can be replaced with the rise of the substrate temperature at this time. The heating temperature is 100
0 to 1250 ° C is desirable, and more desirably 105
0 to 1200 ° C., most preferably 1100-1
It is 150 ° C. By performing heat treatment at this temperature, recrystallization of the buffer layer enhances single crystallinity.

When forming an n-type group III nitride compound semiconductor layer using these semiconductors, Si, Ge, Se, Te, C, etc. can be added as n-type impurities. . Further, as p-type impurities, Zn, Mg, Be, Ca, Sr,
Ba or the like can be added. The present invention can also be used for reducing the p-type resistance of a group III nitride compound semiconductor formed by lateral growth.

The following method for reducing the resistance is exemplified as a method for reducing the resistance of a semiconductor to which p-type impurities are added.
Therefore, in an actual device, after forming a large number of layers on the substrate, the method described below is applied to the low resistance p layer. Usually, the p layer to be made low in resistance is often a layer located from the surface laminated on the substrate to a certain depth. For example, in the case of a light emitting diode, normally, an n layer, a layer such as SQW and MQW, and a p layer are formed as basic layers on a substrate. The present invention is used to reduce the resistance of the p layer.

The following p-type semiconductor layers were formed in the following manner to evaluate the reduction in resistance. FIG. 1 shows a method of manufacturing a low resistance p-type semiconductor of this embodiment. The figure is a process drawing.
In this example, vapor phase growth by a metal organic vapor phase epitaxy method (hereinafter abbreviated as "MOVPE") was adopted. The gas used is, for example, ammonia (NH ₃ ), carrier gas (H ₂ , N ₂ ), trimethylgallium (Ga (CH ₃ ) ₃ ) (hereinafter referred to as “TMG”), trimethylaluminum (Al (CH ₃ ) ₃ ) (hereinafter referred to as "TMA"), cyclopentadienyl magnesium _{(Mg (C 5 H 5)} 2)
(Hereinafter referred to as “CP ₂ Mg”).

The manufacturing process of this embodiment is the process (a) of FIG.
~ It is divided into 6 steps shown in step (f). First, in step (a), a p-GaN layer 5 to which p-type impurities have been added is formed on the sapphire substrate 1. Impurity is Mg. To this end, first, the single crystal sapphire substrate 1 whose main surface is the surface cleaned by organic cleaning and heat treatment is mounted on a susceptor (not shown) mounted in the reaction chamber of the MOVPE apparatus. Next, the sapphire substrate 1 was baked at a temperature of 1100 ° C. while flowing H ₂ into the reaction chamber at a flow rate of ₂ liter / min for about 30 minutes under normal pressure. Then the temperature is lowered to 400 ° C and H ₂ is added to 20 liter / min NH
₃ at 10 liter / min and TMA at 2.0 × 10 ^-5 mol / min
The AlN buffer layer 2 was formed to a film thickness of about 30 nm.

Next, the temperature of the sapphire substrate 1 is set to 1100 ° C.
Hold and N₂Or H₂20 liter / min, NH ₃10 liter / min, TM
G = 1.0 x 10^-FourMol / min, CP₂2 x 10 Mg^-FiveIn mol / min
Supply. This gives a film thickness of about 250 nm and a concentration of 5 × 10¹⁹/ c
m³The Mg-doped p-GaN layer 5 is formed.

Then, the process proceeds to step (b). Process (b)
Then, the Co layer is used as the lower layer 61 of the first metal layer, and
Au layers are respectively formed as the metal layer upper layers 62. This is performed, for example, by a vapor deposition device or the like. For example, in the chamber
After evacuating to a high vacuum of 10 ⁻³ Pa or less, a Co layer having a film thickness of about 7 Å and then an Au layer having a film thickness of about 30 Å are formed on the p-GaN layer 5. Thus, the first metal layer 6 of Co / Au having a two-layer structure is formed.

Next, the step (c) is started. In the step (c), electron beam irradiation is performed to reduce the resistivity of the p-GaN layer 5. The electron beam irradiation is irradiation using plasma. FIG. 2 shows an electron beam irradiation apparatus 100 using plasma.
The electron beam irradiation apparatus 100 is disclosed in Japanese Patent Application No. 2000-254306.
It is the same as that shown in the issue. Electron beam irradiation device 100
Is largely a vacuum chamber 101 and a plasma chamber 10.
5 and the substrate holder 110. The vacuum chamber 101 includes a cathode (cold cathode) 103 and a grid 1.
04 are arranged. Further, in the plasma chamber 105, a wire 106 connected to a plasma power source and an electron beam extraction window 107 are arranged.

Actually, the helium ion gas (He ⁺ ) generated in the plasma chamber 105 is accelerated by the electric field generated by the high-voltage power source of, for example, about 200 kV by using the plasma power source and the wire 106, The surface of the cathode (cold cathode) 103 in the vacuum chamber 101 is collided at high speed. As a result, a large number of secondary electrons are emitted from the surface of the cathode 103, and they are accelerated in the direction opposite to the helium ion gas by the above electric field. as a result,
The electron beam irradiation device 100 can irradiate a wide range of electron beams.

The electrons thus generated penetrate the thin metal plate 108 forming the outer surface of the electron beam extraction window 107 that shields the outside air, and irradiates the semiconductor substrate, that is, GaN, installed outside. (FIGS. 2 and 3). This is usually done in about atmospheric air (step (c)). By irradiating the surface of the p-GaN layer 5 with the electron beam by such a method, the resistance of the p-GaN layer 5 can be reduced in a shorter time than the conventional method of about 3 minutes.
At this time, if the first metal layer 6 does not exist, the p-GaN layer 5
The surface of several hundred Å becomes a damaged layer, but in this example, p-Ga
Since the N layer 5 is protected by the first metal layer 6, the damage layer is not formed.

Next, the process (d) is started. Step (d)
Then, the first metal layer 6 is etched with an iodine-based etching solution to expose the oxidized layer.

Next, the step (e) is carried out. Process (e)
Then, the second metal layer 10 is formed on the first metal layer 6 by a vacuum vapor deposition device. The second metal layer 10 is, for example, nickel (Ni). The conditions of the vacuum vapor deposition device are the same as in step (b). That is, after evacuation to a high vacuum of, for example, 10 ⁻³ Pa or less with a vapor deposition device, a film thickness of 2000
Å Ni layer is formed. This is for efficiently and completely removing the first metal layer 6 in the subsequent etching step (f). It is considered that the Ni layer should be at least 100 Å or more. The thickness of the second metal layer 10 is 100Å
~ 6000Å is desirable. When using a vapor deposition device,
The above range is desirable. For example, in the vapor deposition method, the film thickness is 100
If it is thinner than Å, it may form islands. In that case, the first metal layer cannot be uniformly removed in the subsequent etching step. On the other hand, if it exceeds 6000 Å, the vapor deposition time and the etching process time become long, which is inefficient.

Finally, the step (f) is started. Process (f)
Then, the first metal layer 6 including the alloy layer 63 and the Ni layer which is the second metal layer 10 are removed by etching. The etching solution is hydrofluoric nitric acid having a ratio of hydrofluoric acid: nitric acid: water of about 1: 5: 10. As a result, the first metal layer 6 and the second metal layer 10 are almost completely removed in about 5 minutes. That is, the upper surface of the p-GaN layer 5 is clean.

If an electrode is formed on the p-GaN layer 5 formed by such a manufacturing process, the surface is cleaned,
The contact resistance of the surface is reduced. Further, the electrode can be formed with an optimum element that minimizes the contact resistance. Further, the resistivity of the p-GaN layer 5 itself is also reduced as described above. Therefore, the semiconductor has a reduced driving voltage. Moreover, cleaning the surface increases the light transmission at that surface. Therefore, the present invention is effective for forming an optical element. That is, the above-described manufacturing method is extremely useful for an optical device that requires a reduction in driving voltage and an increase in light intensity. The p-GaN layer 5 thus obtained has a high hole concentration of about 5 × 10 ¹⁸ / cm ³ , and the doping amount of Mg is controlled so that 10 ¹⁷ / cm ^{3 to} 5 × 10 ^{18 can be obtained.} It can be arbitrarily controlled within the range of / cm ³ . Beryllium (B
By adding magnesium (Mg) to GaN implanted with e) and performing the above-mentioned treatment, it becomes possible to control the hole concentration up to 5 × 10 ¹⁹ / cm ³ . Other, II
The same applies to group I nitride semiconductors.

In the above description, the resistance lowering process in the case where the p-GaN layer 5 is formed as a single layer on the substrate has been described. When obtaining a p-GaN substrate, lowering the resistance in this single layer is a meaningful manufacturing method. However, in the case of manufacturing the p layer in the device, a resistance reduction treatment is performed on the surface layer and a plurality of layers below the surface layer after laminating a large number of layers. As the p-type semiconductor layer, any compound semiconductor can be used as described at the beginning of the embodiment.

(Second Embodiment) FIG. 4 shows a light emitting device 20 manufactured by the method of the first embodiment. The figure is a schematic sectional view showing the structure. This light emitting element 20
Group III nitride-based compound semiconductors elements _{Al x Ga y In 1-xy} N
It is a semiconductor element of (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) system.

In the light emitting device 20 of this embodiment, the buffer layer 2 of AlN having a film thickness of about 30 nm is provided on the sapphire substrate 1, and the Si-doped film having a film thickness of about 4 μm is provided thereon.
The n-GaN layer 3 is formed. A multi-layer 4 including a light emitting layer is formed on the n-GaN layer 3. On top of the multi-layer 4, M having a film thickness of about 300 nm described in the first embodiment is formed.
A p-GaN layer 5 to which g is added is formed.

Then, on the p-GaN layer 5 having a low resistivity and cleaned by the method of the first embodiment, a first electrode layer 91 made of Co having a film thickness of about 20Å and made of metal by vapor deposition, and a film thickness of about 20 60Å
The second electrode layer 92 made of Au is sequentially laminated, and the first electrode layer 91 and the second electrode layer 92 form the translucent p electrode 9. Gold (Au) is deposited on the p-electrode 9 in a predetermined area.
The electrode pad 7 is formed of a metal containing Al and having a film thickness of about 1.5 μm. Moreover, a film thickness of about 200 is formed on the n-type GaN layer 3.
Å vanadium (V) and aluminum with a thickness of about 2.0 μm (A
The n electrode 8 composed of l) or Al alloy is formed.
The electrode pad 7 can be made of gold (Au), nickel (Ni), aluminum (Al), cobalt (Co), or the like, or an alloy containing at least one of them.

Next, a method of manufacturing the light emitting device 20 will be described. The light emitting device 20 is also manufactured by vapor phase growth by a metal organic vapor phase epitaxy method (hereinafter abbreviated as "MOVPE"). The gas used is the same as that of the first embodiment.
First, the single crystal sapphire substrate 1 whose main surface is the surface cleaned by organic cleaning and heat treatment is mounted on a susceptor placed in the reaction chamber of the MOVPE apparatus (not shown). Next, the sapphire substrate 1 is baked at a temperature of 1100 ° C. while flowing H ₂ at a flow rate of ₂ liter / min into the reaction chamber at atmospheric pressure for about 30 minutes.
Then lower the temperature to 400 ° C and add H ₂ at 20 liter / min.
NH ₃ is supplied at 10 liter / min and TMA is supplied at 2.0 × 10 ⁻⁵ mol / min to form an AlN buffer layer 2 with a film thickness of about 30 nm.

Next, the temperature of the sapphire substrate 1 is set to 1150 ° C.
Hold and N₂Or H₂10liter / min, NH ₃10 liter / min, TM
G = 1.0 x 10^-FourMol / min, TMA 0.5 x 10^-FourMol / min,
H₂5x10 silane diluted to 0.9ppm with gas^-9Mole
/ Min, film thickness: approx. 4 μm, electron concentration: 1 x 10¹⁸/ c
m³, Silicon concentration 2 × 10¹⁸/cm³Forming n-GaN layer 3 of
It

After forming the n-GaN layer 3 described above, subsequently,
N₂Or H₂20 liter / min, NH₃10 liter / min, TMG 7.0
× 10^-FiveMol / min, TMI 0.2 x 10^-FourSupply in mol / min
Ga _0.8In_0.2A multilayer 4 of N is formed.

Next, the temperature of the sapphire substrate 1 is set to 1100 ° C.
Hold and N₂Or H₂20 liter / min, NH ₃10 liter / min, TM
G x 1.1 x 10^-FourMol / min, CP₂2 x 10 Mg^-FiveIn mol / min
Supply a film thickness of about 300 nm, concentration 5 × 10¹⁹/cm³Do Mg
Then, the p-GaN layer 5 is formed.

Next, the resistivity of the p-GaN layer 5 was lowered by the following procedure. (1) After evacuating to a high vacuum of 10 ^-3 Pa or less with a vapor deposition device,
Co having a film thickness of about 10 Å is formed on the p-GaN layer 5 to form a first metal layer lower layer 61. (2) Subsequently, Au having a film thickness of about 50 Å is formed thereon to form the first metal layer upper layer 62. (3) After that, the resistivity of the semiconductor layer to which the p-type impurity is added is reduced by the means of the present invention. That is, in the atmosphere, the electron beam irradiation apparatus 100 is passed through the metal layer (electrode).
Electron beam irradiation according to (FIG. 2) is performed. However, the acceleration voltage by the high voltage power supply (FIG. 2) at this time is 100 to 250 kV. This ensures that the p-GaN layer 5 has a low resistance.

(4) Next, the surface of the p-GaN layer 5 is cleaned. That is, the first metal layer 6 is removed. For that, first
The steps (d) to (f) of the example are performed (FIG. 1). That is, first, the impurities on the first metal layer 6 are removed by an etching process using an iodine-based etching solution to activate the surface. Next, the film thickness is about 1000Å ~ 200 by vacuum evaporation.
A Ni layer, which is the 0 Å second metal layer 10, is formed (corresponding to the step (e)). Next, etching is performed for a short time, for example, for about 3 minutes, using hydrofluoric nitric acid having the same mixing ratio as in the first embodiment. As a result, the first metal layer 6 and the second metal layer 10 are almost completely removed. That is, the surface of the p-GaN layer 5 is cleaned.

Next, the steps of forming the n electrode and the p electrode are performed as follows. (5) Next, a step of exposing the surface of the n-GaN layer 3 is performed. An etching mask is formed on the p-GaN layer 5, the mask in a predetermined region is removed, and the part of the p-GaN layer 5, the multilayer 4 and the n-GaN layer 3 which is not covered with the mask is chlorine-containing. The surface of the n-GaN layer 3 is exposed by etching by reactive ion etching using a gas containing a.

(6) Next, the n-electrode 8 for the n-GaN layer 3 and the translucent p-electrode 9 for the p-GaN layer 5 are formed by the following procedure. (7) That is, first, a photoresist is applied, a window is formed in a predetermined region on the exposed surface of the n-GaN layer 3 by photolithography, and the film is evacuated to a high vacuum of 10 ⁻³ Pa or less. Vanadium (V) with a thickness of about 200Å and Al with a thickness of about 2.0 μm are deposited. Next, the photoresist is removed. This gives n-
An n-electrode 8 is formed on the exposed surface of the GaN layer 3. (8) Next, apply a photoresist uniformly on the surface,
The photoresist on the p-type GaN layer 5 is removed by photolithography to form a window.

(9) After evacuation to a high vacuum of 10 ⁻³ Pa level or less on the photoresist and the exposed p-type GaN layer 5 with a vapor deposition apparatus, Co with a film thickness of about 20 Å is formed. , The first electrode layer 9
1 is formed. (10) Subsequently, an Au film having a film thickness of about 60Å is formed on the first electrode layer 91 to form the second electrode layer 92. (11) Next, the sample is taken out from the vapor deposition device, and Co and Au deposited on the photoresist are removed by the lift-off method.
In this way, the translucent p-electrode 9 made of Co / Au is formed.

(12) Next, an electrode pad 7 for bonding is formed on a part of the translucent p electrode 9. That is, first
A photoresist is applied uniformly, and a window is opened in the photoresist in the portion where the electrode pad 7 is formed. Next, gold (A
A metal containing u) is formed by vapor deposition to a film thickness of about 1.5 μm, and the metal film containing gold (Au) deposited on the photoresist is removed by the lift-off method as in step (5). Then, the electrode pad 7 is formed.

(13) Finally, the translucent p electrode 9, n electrode 8 and electrode pad 7 are alloyed. As a result, good ohmic contact is realized, and the drive voltage of the light emitting element 20 is reduced. The light emitting device 20 was manufactured by the above method.

As described above, it was possible to obtain a layer in which the contact resistance of the electrode was lowered and thus the driving voltage was lowered. Further, as a result of the complete removal of the first metal layer 6 used at the time of electron beam irradiation, the light transmittance of the surface was also improved. Therefore, the light from the multi-layer 4 including the light-emitting layer could be efficiently output to the outside from the translucent p-electrode 9. Without removing the first metal layer 6, the driving voltage of the light emitting element using this metal layer as the p electrode was 10.0 V, and the light emission output was 210 μW. In addition, after the first metal layer 6 is completely removed, the light emitting element on which the p electrode is formed has a driving voltage of 3.5 V and an emission output of 270 μW.
Met. Therefore, the driving voltage was about 1/3 or less, and the rate of increase in transmittance was 29% (difference / lower transmittance) or more.

Next, the results of experiments relating to the relationship between the thickness of the first metal layer 6 and the light transmittance will be described. When the thickness of the first metal layer 6 is 70Å and 200Å, the first embodiment and the second embodiment
The second metal layer 1 was irradiated with an electron beam by the method described in the example.
The light transmittance of the p-type doped semiconductor layer after the first metal layer 6 was removed together with the second metal layer 10 after stacking 0 was measured at wavelengths of 375 nm, 470 nm, and 520 nm. The result is shown in FIG. The transmittance on the vertical axis of FIG. 5 is 100% as the light transmittance of the p-type impurity-added semiconductor layer before the first metal layer 6 and the second metal layer 10 are provided.
The light transmittance is based on this. When the electron beam irradiation treatment is performed with the thickness of the first metal layer 6 set to 70Å, as shown in FIG. 5, 94% at a wavelength of 375 nm and 470 nm at a wavelength of 470 nm.
At 95.5% and 96% at a wavelength of 520 nm. First
When the thickness of the metal layer 6 is 200 Å, as shown in FIG. 5, it is 85% at a wavelength of 375 nm and 8% at a wavelength of 470 nm.
6% and 88% at a wavelength of 520 nm. Therefore, 90
% (At wavelength 375 nm) to 92% (at wavelength 520 nm)
To obtain the above light transmittance, the thickness of the first metal layer 6 is 10
It is considered that 0 Å or less is desirable. Further, in order to prevent the semiconductor layer to which the p-type impurity is added from being largely damaged by the electron beam irradiation, it is desirable that the thickness of the first metal layer 6 is 50 Å to 100 Å. .

Although the first metal layer 6 has two layers in the above embodiment, it may have a single layer or three or more layers. Similarly, the second metal layer 10 is a single Ni layer, but may be a multiple layer. It is considered that the second metal layer 10 may be any transition metal belonging to Group VIIIA. Therefore, in addition to Ni and Co, Fe, Ru, Rh, Pd, Os, Ir, Pt
Can be used. The light emitting device 20 was manufactured by the above method. In the light emitting device 20 obtained by the above method, the treatment for reducing the resistance of the p-type GaN layer 5 is
Compared with the conventional method, it can be effectively performed in an extremely short time (about 3 minutes).

15 in the p-type GaN layer 5 in the light emitting device 20.
Optimum current value when electron beam is irradiated at 0 kV (eg: 11 m
The relationship between the retention time after reaching A) and the light output was measured. It was found that the output tends to decrease when the holding time is long. For this reason, it is desirable to keep the holding time at 0 minute to 1 minute.

The light emitting device may have a single quantum well structure or a multiple quantum well structure. Also, Mg was used as the p-type impurity, but beryllium (B
e), zinc (Zn), calcium (Ca), strontium (Sr),
Group 2 elements such as barium (Ba) and radium (Ra) and carbon (C),
Among the Group 4 elements such as silicon (Si), germanium (Ge), tin (Sn), and lead (Pb), an atom forming an acceptor level can be used.

The present invention can be applied not only to the case of using the conventional transparent metal electrode but also to the case of using a thick electrode such as a flip chip type. Further, the present invention can be used not only in light emitting elements such as LEDs and LDs but also in light receiving elements. The element shown to reduce the resistivity of the p-type doped semiconductor layer is merely an example, and should be used for all semiconductor devices using a p-type doped semiconductor. Is possible. Further, in the above embodiment, an example in which the p electrode is formed on the p-type semiconductor to reduce the contact resistance,
The p-type semiconductor manufactured by the above method also has good light transmittance. Therefore, the present invention can be applied to a method of manufacturing a light emitting element or a light receiving element that outputs or inputs light from the surface of the p-type semiconductor. The light emitting element includes a light emitting diode and a laser, and in the case of a laser, a surface emitting laser or the like. or,
The present specification describes all semiconductor devices having a p-type semiconductor manufactured by the above method and an arbitrary layer structure having the p-type semiconductor layer, and the semiconductor device belongs to the scope of claims. . Further, in the examples, p-GaN is shown as an example of the layer for lowering the resistance, but any layer can be used as long as it is a group III nitride semiconductor to which a p-type impurity is added. AlGaN, InGaN, AlGaInN may be used. Furthermore, AlGaInNAs, AlGa containing N, As, P, etc. as group V elements
It may be InNP.

[Brief description of drawings]

FIG. 1 is a manufacturing process diagram of a p-type semiconductor according to the first embodiment of the present invention.

FIG. 2 is a schematic sectional view of an electron beam irradiation apparatus 100 according to the present invention.

FIG. 3 is a schematic sectional view of a p-type semiconductor (GaN: Mg) in the electron beam irradiation step of the present invention.

FIG. 4 is a schematic cross-sectional view showing the structure of a light emitting device according to a second embodiment of the invention.

FIG. 5 is a characteristic diagram in which the relationship between the thickness of the first metal layer and the light transmittance of the p-type semiconductor after the first metal layer is removed is measured.

[Explanation of symbols]

1 ... Sapphire substrate 2 ... Buffer layer 3 ... n-GaN layer 4 ... Multilayer including light emitting layer 5 ... p-GaN layer 6 ... First metal layer 61 ... Lower layer of first metal layer 62 ... Upper layer of first metal layer 63 ... Alloy layer 7 ... Electrode pad 8 ... Negative electrode 9 ... P electrode 10 ... Second metal layer 20 ... Light emitting element 100 ... Electron beam irradiation device 103 ... Cathode (cold cathode) 107 ... Electron beam extraction window

Continued front page    F term (reference) 4M104 AA04 BB04 BB13 CC01 FF13                       GG04                 5F041 AA03 AA08 AA24 CA04 CA05                       CA40 CA57 CA74 CA77 CA84                       CA88 CA92 CA98 CA99                 5F045 AA04 AB14 AC08 AC19 AF09                       CA07 CA10 CA12 CA13 HA06                       HA14 HA19

Claims (17)

[Claims] 1. A method for lowering the resistivity of a semiconductor doped with p-type impurities, comprising forming a first metal layer on the surface of the semiconductor doped with p-type impurity, and passing through the first metal layer. Electron beam is irradiated to the semiconductor to which the p-type impurity is added, a second metal layer is formed on the first metal layer after the electron beam irradiation, and the first metal is formed together with the second metal layer by an etching process. A method for manufacturing a p-type semiconductor, which comprises removing the layer. 2. The method for manufacturing a p-type semiconductor according to claim 1, wherein the second metal layer is formed after etching the surface of the first metal layer. 3. The first metal layer comprises cobalt (Co), nickel (Ni), aluminum (Al), copper (Cu), palladium (P).
d), manganese (Mn), vanadium (V), gold (Au), or an alloy containing at least one of these metals, p-type according to claim 1 or 2 Semiconductor manufacturing method. 4. The method for manufacturing a p-type semiconductor according to claim 1, wherein the second metal layer is made of nickel or cobalt. 5. The etching solution used in the etching step after forming the second metal layer is a mixed solution of hydrofluoric acid, nitric acid and water. 4. The method for manufacturing a p-type semiconductor according to any one of 4 above. 6. The semiconductor to which the p-type impurity is added is I
The method for manufacturing a p-type semiconductor according to claim 1, wherein the p-type semiconductor is a group II nitride compound semiconductor. 7. The p-type impurity is magnesium (Mg)
7. The method for manufacturing a p-type semiconductor according to any one of claims 1 to 6, wherein 8. The film thickness of the first metal layer is 5Å-1000.
8. The method for manufacturing a p-type semiconductor according to claim 1, wherein the p-type semiconductor is 0Å. 9. The film thickness of the first metal layer is 5Å to 100Å
8. The method for manufacturing a p-type semiconductor according to claim 1, wherein 10. The film thickness of the second metal layer is 100Å to 6
It is 000Å, It is characterized by the above-mentioned.
The method for manufacturing a p-type semiconductor according to any one of 1. 11. The p according to claim 1, wherein the potential of the first metal layer is kept substantially constant by grounding when the electron beam is irradiated. Type semiconductor manufacturing method. 12. A semiconductor device in which a plurality of semiconductor layers made of a group III nitride compound semiconductor are stacked on a substrate by crystal growth, wherein at least a part of the semiconductor layers forming the semiconductor device is provided. A p-type semiconductor formed by the method according to any one of claims 1 to 11 is used. III.
Group nitride compound semiconductor device. 13. The p-type semiconductor includes a layer formed on the uppermost layer of the group III nitride compound semiconductor device, and an electrode is newly formed on the p-type semiconductor of the uppermost layer. The group III nitride compound semiconductor device according to claim 12. 14. The group III nitride compound semiconductor device according to claim 13, wherein the electrode has a multi-layered structure. 15. The electrode comprises cobalt (Co), nickel
(Ni), aluminum (Al), copper (Cu), palladium (Pd), manganese (Mn), vanadium (V), gold (Au), or at least one of these metals is formed. III according to claim 13 or 14, characterized in that
Group nitride compound semiconductor device. 16. The electrode comprises cobalt (Co), nickel
(Ni), aluminum (Al), copper (Cu), palladium (Pd), manganese (Mn), vanadium (V), gold (Au) at least two kinds of alloyed alloy electrode 16. The method according to any one of claims 12 to 15, wherein
Group III nitride compound semiconductor device. 17. The group III nitride compound semiconductor device according to claim 15, wherein the alloying of the electrodes is performed in a gas atmosphere containing oxygen.