JP2003068631A - Drawing data processing system for electron beam lithography system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a drawing data processing system for electron beam lithography system, that can prevent the occurrence of data errors due to noise at calculating of data by pipeline processing. SOLUTION: Normally a selector 35 is connected to a terminal A, and an arithmetic unit 31 performs parity check on the data fetched in an input register 36. When an error is detected, the selector 35 is switched to the other terminal B, and the data fetched in a buffer register 34 are supplied to and fetched in the input register 36. When the register 36 fetches the second data, parity check is executed, and when it is discriminated that the data are not in error, as a result of the inspection, an arithmetic circuit 37 calculates the data fetched in the register 36 and the output of data from another arithmetic circuit 32 is also restarted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a drawing data processing method in an electron beam drawing apparatus which deflects an electron beam applied to a drawing material to draw a desired pattern.

[0002]

2. Description of the Related Art FIG. 1 shows an example of a conventional variable area electron beam drawing apparatus. Reference numeral 1 denotes an electron gun that generates an electron beam EB.
B is irradiated onto the first molding slit 2 via an irradiation lens (not shown). A blanking electrode 3 is arranged between the electron gun 1 and the first shaping slit 2.

The opening image of the first shaping slit 2 is imaged on the second shaping slit 4 by a shaping lens (not shown), and the position of the image formation can be changed by the shaping deflector 5. it can. The image formed by the second forming slit 4 is irradiated onto the drawing material 6 via a reduction lens and an objective lens (not shown). The irradiation position on the drawing material 6 can be changed by the positioning deflector 7.

Reference numeral 8 is a control CPU, and the control CPU 8 transfers the pattern data from the drawing data memory 9 to the irradiation control circuit 10. The blanking signal generated by the irradiation control circuit 10 is supplied to the blanking electrode 3 via the amplifier 11. In addition, the shape shaping signal of the electron beam generated by the irradiation control circuit 10 is the DA conversion amplifier 1
It is supplied to the shaping deflector 5 via 2. Further, the irradiation position signal of the electron beam on the material 6 created by the irradiation control circuit 10 is transmitted via the DA conversion amplifier 13 to the positioning deflector 7
Is supplied to. The control CPU 8 moves the material 6 for each field so that the stage on which the material 6 is placed is moved.
Control (not shown). The operation of such a configuration will be described below.

First, a basic drawing operation will be described. The pattern data stored in the drawing data memory 9 is sequentially read and supplied to the irradiation control circuit 10.
The shaping deflector 6 and the positioning deflector 7 are controlled based on the data from the irradiation control circuit 10.

As a result, the cross section of the electron beam is shaped into a unit pattern shape by the shaping deflector 5 based on each drawing pattern data, and the unit patterns are sequentially shot on the material 6 to draw a pattern of a desired shape. Is done. At this time, the blanking signal to the blanking electrode 3 causes the blanking of the electron beam in synchronization with the shot of the electron beam on the material 6. When drawing in different fields on the material 6, the control C
The stage on which the material 6 is placed is moved by a predetermined distance under the control of the PU 8. Although not shown, the moving distance of the stage is monitored by a laser length measuring device, and the position of the stage is accurately controlled based on the length measurement result from the length measuring device.

FIG. 2 shows a specific example of the irradiation control circuit 10. The irradiation control circuit 10 is composed of a compression / decompression unit 15, a graphic division unit 16, and a correction calculation unit 17. The compression / decompression unit 15 converts the pattern data expressed in the compressed format from the drawing data memory 9 into the data of the basic figure which can be drawn by the electron beam.

The graphic dividing unit 16 supplies basic graphic data (data expressed as large and small graphics) from the compression / expansion unit 15.
Is divided into shapes that can be drawn with an electron beam. The correction calculation unit 17 performs calculations such as irradiation position correction and irradiation amount correction for each figure divided by the figure division unit 16. The graphic data subjected to various correction processes is supplied from the correction calculation unit 17 to the blanking electrode 5, the shaping deflector 5, and the positioning deflector 7.

By the way, in an electron beam drawing apparatus using a variable area beam, as shown in FIGS. 1 and 2, the shape and irradiation position of the electron beam are calculated in real time for one electron beam irradiation. Meanwhile, the figure is drawn by repeating the generation of the voltage of the deflector and the irradiation of the electron beam.

At this time, the irradiation time of the electron beam is several tens to
Since it is performed in a short time of several hundreds of ns, it is necessary to always calculate the next data at high speed. In order to satisfy this requirement, pipeline processing by hardware is generally used for data calculation. Therefore, for example, in the example shown in FIG. 2, the irradiation control circuit 10 is divided into blocks such as a compression / expansion unit 15, a graphic division unit 16 and a correction calculation unit 17, but each block is divided into smaller blocks for each calculation. It is divided into processing circuits.

For example, the figure division unit 16 is divided into five arithmetic circuits 18 to 22, each arithmetic circuit performs an arithmetic operation on data in a short time, and delivers the processed data to the next arithmetic circuit. At this time, the first arithmetic circuit can process the next data. Similarly, one data is gradually processed by a plurality of arithmetic units to finally obtain necessary data.

With such a configuration, as a result, the processing of one data is completed at the maximum value of the processing time of each arithmetic circuit. Therefore, if each arithmetic circuit is processed in a short time, it becomes very difficult. Data can be processed at high speed. On the other hand, in pipeline processing, it is necessary to connect an extremely large number of circuits in order to increase the processing speed.

[0013]

In the electron beam drawing apparatus that performs pipeline processing for high-speed processing as described above, the processing circuit becomes large, so it is necessary to transfer data between distant units. . At this time, if an error occurs in the data due to noise or the like, an abnormal drawing result occurs, which causes a fatal defect. For this reason,
In addition to the data signal, a parity signal was added to detect a data error.

However, since the parity only detects an error, it is impossible to correct the error although the occurrence of the abnormality can be known. Although it is possible to add error correction codes that are commonly used in communications and perform error correction, parallel transfer, which transfers data at high speed, requires a larger number of signal lines than parity. Correcting bit errors at the same time was not practical.

The present invention has been made in view of the above-mentioned points, and an object thereof is drawing data in an electron beam drawing apparatus capable of preventing a data error due to noise when data is calculated by pipeline processing. To realize the processing method.

[0016]

A drawing data processing method in an electron beam drawing apparatus according to the present invention is a first and a second operation circuit groups adjacent to each other in which a plurality of arithmetic circuit groups are arranged in series so as to process drawing data sequentially. In the arithmetic circuit of 1, the output side of the first arithmetic circuit is provided with an output register for receiving the output data of the first arithmetic circuit, a buffer register for receiving the output data of the output register, and an output register and an output of the buffer register. A selector for selecting and supplying one of them to the second arithmetic circuit, an input register for receiving the output data selected by the selector on the input side of the second arithmetic circuit, and an error in the contents of the input register. And a check circuit for checking, and supplies an error signal from the check circuit to the first and second arithmetic circuits, and a selector. Also supplied, when an error signal is generated is characterized by being configured to provide data into the input register of the buffer register.

That is, according to the present invention, in the electron beam drawing apparatus, when the drawing data processed by a specific arithmetic circuit in the irradiation control circuit using pipeline control is transferred to the next arithmetic circuit, The data can be saved in the buffer register, and if an error occurs in the transferred data, the data can be transferred from the buffer register to the next arithmetic circuit again to prevent data errors due to noise. Become.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 3 shows an example of an arithmetic unit that performs data processing according to the present invention.
FIG. 3 is a block diagram of a connection portion of two adjacent arithmetic units 30 and 31 included in the irradiation control circuit 10 of the electron beam drawing apparatus shown in FIG.

The arithmetic unit 30 includes a first arithmetic circuit 3
2, an output register 33, a buffer register 34, and a selector 35 are provided. The arithmetic circuit 32 performs a predetermined arithmetic operation on the inputted drawing data, and the data arithmetically processed by the arithmetic circuit 32 is taken into the output register 33. At this time, a parity bit is added to the processed data. The data taken in the output register 33 is transferred to the buffer register 34 and taken in.
The selector 35 selects either the data in the output register 33 or the data in the buffer register 34, and outputs it to the arithmetic unit 31 side.

The arithmetic unit 31 includes an input register 3
6, an arithmetic circuit 37, and a parity check unit 38 are provided. The input register 36 takes in the data sent from the arithmetic unit 30 side and transfers the taken-in data to the arithmetic circuit 37. The arithmetic circuit 37 performs a predetermined arithmetic processing on the transferred drawing data, and the result is transferred to the next arithmetic unit (not shown). The parity check unit 38 checks the parity signal added to the data taken into the input register 36. When an error is detected as a result of the inspection by the parity check unit 38, the error signal is supplied from the parity check unit 38 to the arithmetic circuit 32, the arithmetic circuit 37, and the selector 35. The operation of such a configuration will be described below.

First, the drawing data which has been subjected to a predetermined arithmetic processing in the arithmetic circuit 32 is taken into the output register 33. Normally, when there are no errors in the data,
The selector is connected to the A side, and the data stored in the output register is transferred as it is to the input register 36 of the arithmetic unit 31 and is stored therein.

At the same time that the input register 36 takes in the data, the output register 33 in the arithmetic unit 30 takes in the next data. At this time, the buffer register 3
The first data of the output register 33 is fetched in 4. In this state, the arithmetic unit 31 performs a parity check of the data taken in the input register 36,
If there is no error, the data taken in the input register 36 is subjected to a predetermined arithmetic processing in the arithmetic circuit 37.

On the other hand, when the parity check section 38 detects an error, an error signal is supplied to the arithmetic circuit 32, the selector 35, and the arithmetic circuit 37. When the error signal is supplied, the arithmetic circuit 37 does not perform arithmetic processing on the data taken in the input register 36. In addition, the arithmetic circuit 32
The output of data from is also stopped. And selector 3
5 is switched to the B side, and the data stored in the buffer register 34 is supplied to and stored in the input register 36.

A parity check is executed as the second data is loaded into the input register 36.
If no error is found as a result of the inspection, the normal operation, that is, the arithmetic circuit 37 executes the arithmetic processing of the data fetched in the input register, and the output of the data from the arithmetic circuit 32 is restarted. At this time, the selector 35 is connected to the A side. In this way, the data once transferred is stored in the buffer register 34, and when an error occurs on the data receiving side, the data stored in the buffer register 34 is retransmitted, so that the error temporarily occurs. Even after that, it becomes possible to reliably transfer normal data thereafter.

Next, the above operation will be described more specifically with reference to the timing chart of FIG. First, the output register 33
Data is set to the input register 36 and the data is transferred to the input register 36 via the selector 35. The data is set in the input register 36 and simultaneously in the buffer register 34. At this time, the following data is set in the output register 33. As a result of the parity check in the arithmetic unit 31, when the data has no error, the data set in the input register 36 is transferred to the arithmetic circuit 37.

Next, it is assumed that an error occurs when the data is taken into the input register 36. In that case,
Since the parity check unit 38 outputs an error signal, the arithmetic circuit 32 stops the data output. As a result,
The output register 33 stores the data in the buffer register 34.
Keeps the data. At the same time, selector 3
5 is switched to the B side, and the data is taken into the input register 36 again. When the correct data is set in the input register 36 at the second time, the error signal is released,
The selector 35 is switched to the A side, and the data is taken into the input register 36.

FIG. 5 shows another embodiment of the present invention. The same or similar components as those of the embodiment shown in FIG. 3 are designated by the same reference numerals, and detailed description thereof will be omitted. In FIG. 5, the error signal from the parity check unit 38 is
It is also supplied to the counter 40. The counter 40 counts the number of error signals continuously generated and supplies the count value to the alarm circuit 41. The alarm circuit 41 issues an alarm as an abnormal state in the arithmetic units 30 and 31 when the number of consecutive error signals exceeds a predetermined value.

Although one embodiment of the present invention has been described above, the present invention is not limited to this embodiment. For example, the variable area electron beam writing apparatus has been described as an example, but the present invention can also be applied to an electron beam writing apparatus that irradiates a drawing target with an electron beam that is narrowed down. Also,
Although the simplest parity check method was used as the error check method, error detection is not limited to parity check, and other methods can be used. For example, when the range of data is limited, the range of the data may be inspected, or when two or more data are transferred in parallel and the magnitude relationship between the two data is large or small. In such a case, the magnitude relation may be inspected by a comparator.

[0029]

As described above, according to the present invention, in the electron beam drawing apparatus, the drawing data processed by the specific arithmetic circuit in the irradiation control circuit using the pipeline control is changed to the next arithmetic circuit. When the data is transferred to, the data is also stored in the buffer register, and if an error occurs in the transferred data, the data is transferred from the buffer register to the next arithmetic circuit again, so that data error due to noise, etc. It becomes possible to prevent it. As a result, the reliability of the electron beam drawing apparatus can be significantly improved.

[Brief description of drawings]

FIG. 1 is a diagram showing an example of a conventional variable area electron beam writing apparatus.

FIG. 2 is a diagram showing a specific example of an irradiation control circuit used in the device of FIG.

FIG. 3 is a diagram showing an example of an arithmetic unit that performs data processing according to the present invention.

FIG. 4 is a timing diagram for explaining an example of data processing according to the present invention.

FIG. 5 is a diagram showing another embodiment of the present invention.

[Explanation of symbols]

30, 31 arithmetic unit 32, 37 arithmetic circuit 33 Output register 34 Buffer Register 35 selector 36 input registers 38 Parity check section

Claims (5)

[Claims] 1. In adjacent first and second arithmetic circuits of a plurality of arithmetic circuit groups arranged in series so as to sequentially process drawing data, a first arithmetic circuit is provided on the output side of the first arithmetic circuit. Select the output register that receives the output data of the arithmetic circuit, the buffer register that receives the output data of this output register, the output register and the output of the buffer register,
A selector for supplying either of them to the second arithmetic circuit, an input register for receiving the output data selected by the selector on the input side of the second arithmetic circuit, and an error in the contents of the input register are checked. A check circuit is provided, and the error signal from the check circuit is supplied to the first and second arithmetic circuits and also to the selector, and when the error signal occurs, the data in the buffer register is input to the input register. A drawing data processing method in an electron beam drawing apparatus, which is configured to be supplied to 2. The drawing data processing method in an electron beam drawing apparatus according to claim 1, wherein a parity signal is added to the drawing data, and the check circuit checks an error based on the parity signal. 3. The drawing data processing method in an electron beam drawing apparatus according to claim 1, wherein the check circuit checks the range of data. 4. The drawing data processing method in an electron beam drawing apparatus according to claim 1, wherein the drawing data is a plurality of data, and the check circuit checks the relationship between the plurality of data. 5. The drawing data in the electron beam drawing apparatus according to claim 1, wherein the number of error signals from the check circuit is counted, and an alarm is issued when the count value exceeds a predetermined value. Processing method.