JP2003050551A - Integrated board, and method and device for inspecting the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an integrated board which is configured of a plurality of circuit boards arranged thereon, and which is capable of shortening an inspection time of the circuit boards (picture display device), and has moreover high cost-performance. SOLUTION: The integrated board 112 comprises a plurality of circuit boards each of which is provided with picture display devices having a plurality of gate lines 116 and source lines 117 driven by a gate driver 113a and a source driver 114a, respectively. The above integrated board 112 is provided with an inspection circuit comprising gate line short links 124 for connecting the above gate lines 116 with the source lines 117 and further connecting the gate lines 116 of the adjacent picture display devices, and source line short links 123 for connecting the source lines 117, and gate side output monitoring terminals 108 and source side output monitoring terminals 104 for sequentially outputting inspection signals inputted to the above gate lines 116 and source lines 117 through the above gate line short links 124 and the source line short links 123.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a collective substrate having a plurality of circuit boards used in, for example, an active matrix type liquid crystal display device, an inspection method therefor, and an inspection device.

[0002]

2. Description of the Related Art Circuit boards used in liquid crystal display devices are
This is a configuration in which the image display device is provided on the substrate. In this image display device, a plurality of scanning lines and a plurality of signal lines are arranged so as to intersect with each other, and a pixel electrode,
A switching element that drives the pixel electrode is formed.

The above-mentioned circuit board is manufactured by individually dividing an area in which a plurality of image display devices are formed in a collective board in which a plurality of image display devices are formed on a large substrate.

These circuit boards are usually inspected before they are cut. The image display device of the collective substrate is inspected for each image display device for the presence or absence of disconnection, abnormal wiring pattern, short circuit or the like.

As a method of inspecting the image display device, Japanese Patent Laid-Open No. 5866/1993 discloses a method in which an inspection probe is connected to an FPC connection terminal for each image display device, and various kinds of disconnection, short circuit, etc. are generated according to an input inspection signal. Inspecting for defects is disclosed.

[0006]

However, Japanese Unexamined Patent Publication No.
In the method of inspecting a circuit board described in Japanese Patent No. 5866, even if only a serious defect (a disconnection of a source line and a gate line, a short circuit due to an abnormal wiring pattern, etc.) is inspected individually Individually inspect. In this inspection, in addition to the inspection time for one image display device, an extra time is required for moving and connecting the inspection probe. Therefore, when inspecting all the image display devices on the collective substrate, there is a problem that an enormous amount of inspection time is required. Further, as the image display device becomes smaller, the number of image display devices formed on one aggregate substrate increases. Therefore, there is a problem that the inspection time significantly increases as the number of image display devices increases.

Further, in order to inspect the image display device, it is necessary to provide an inspection pad for inputting an inspection signal and an inspection pad for outputting the inspection signal for each image display device. Therefore, there is a problem that the installation cost of the inspection pad is high.

Further, in the collective substrate (large substrate),
A region for installing these inspection pads is required (a large area is required in terms of circuit layout). Therefore, there is also a problem that the number of image display devices that can be formed on the collective substrate is reduced and cost performance is reduced.

The present invention has been made in view of the above problems, and an object thereof is to reduce the inspection time of a circuit board (image display device) and to provide a plurality of circuit boards having high cost performance. An object is to provide an array substrate.

[0010]

In order to solve the above-mentioned problems, a collective board of the present invention has a plurality of circuit boards arranged with an image display device having a plurality of wirings driven by a drive circuit. In the collective board, the common wiring connecting the wirings of the image display devices and the wirings of the adjacent image display devices, and the inspection signal input to the wirings of the image display devices are connected to the common wiring. It is characterized in that it is provided with an inspection circuit consisting of a common test pad for sequentially outputting via.

According to the above structure, the collective board is provided with the inspection circuit including the common test pad for connecting the adjacent image display devices with the common wiring and outputting the inspection signal from the image display devices. There is. As a result, it is possible to inspect for defects such as short circuit and disconnection of the wiring of each image display device on the circuit board by the inspection signal output from the common test pad. Further, since a plurality of image display devices can be inspected by the common test pad without individually inspecting each image display device on each circuit board, it is possible to provide an aggregate substrate which can reduce the inspection time. You can Furthermore, since the number of shared test pads provided can be reduced, there is a region where shared test pads are not formed. Therefore, more image display devices can be formed on the collective substrate. Therefore, since more circuit boards can be taken out from one aggregate board, an aggregate board having high cost performance can be provided.

In addition to the above structure, the collective substrate of the present invention is provided with a shift register for converting the start pulse input to the drive circuit by the drive circuit to generate the start pulse of the adjacent image display device, and adjacent to each other. It is characterized in that it is provided with a connecting line that connects the drive circuits of the adjacent image display devices so that the generated start pulse can be input to the drive circuit of the image display device.

According to the above construction, in the collective substrate, the drive circuits of the adjacent image display devices are connected to each other by the connecting lines, so that the start pulse newly generated by the shift register is adjacent to the image display devices. Can be sequentially transmitted to. That is, it is possible to sequentially inspect adjacent image display devices with one inspection signal. Therefore, it is not necessary to inspect each image display device on the circuit board, and a plurality of image display devices can be inspected.
The inspection time of the circuit board can be further shortened.

The method for inspecting an aggregate substrate according to the present invention is the method for inspecting an aggregate substrate in which a plurality of circuit boards having an image display device having a plurality of wirings driven by a drive circuit are arranged. The inspection signal input to the wiring is transmitted through the wiring of each image display device, and the output inspection signal is detected from the same shared test pad.

According to the above arrangement, a plurality of image display devices on the collective substrate can be inspected by one common test pad, so that it is not necessary to inspect each image display device on the circuit substrate. Therefore, the inspection time of the collective board can be shortened.

In addition to the above structure, the method for inspecting an aggregate substrate according to the present invention converts the start pulse input to the drive circuit to generate the start pulse of the adjacent image display device and the adjacent image display device. It is characterized in that the generated start pulse is input to the drive circuit.

With the above arrangement, the newly generated start pulse can be sequentially input to the adjacent image display devices. That is, it is possible to sequentially inspect adjacent image display devices with one inspection signal. Therefore, it is not necessary to inspect each image display device on the circuit board,
Since it is possible to inspect a plurality of image display devices, it is possible to further shorten the inspection time of the circuit board.

The method of inspecting an aggregate board according to the present invention is characterized by detecting a short circuit between adjacent wirings.

According to the above structure, it is possible to detect a short circuit between adjacent wirings formed on the collective substrate.

An aggregate board inspection apparatus of the present invention is an inspection apparatus for inspecting the above aggregate board, which comprises a comparison means for comparing signals from a plurality of circuit boards output from a common test pad with a reference voltage. It is characterized by having a judging means for judging the quality of the circuit board based on the result of the comparing means.

According to the above configuration, since the output of signals from a plurality of circuit boards can be obtained by the common test pad, it is not necessary to inspect each circuit board.
Therefore, it is possible to provide an inspection device that can reduce the inspection time.

In addition to the above structure, the inspection apparatus of the present invention is characterized in that the judging means judges a display defect or a non-linearity of the D / A converter.

According to the above configuration, it is possible to determine the display defect or the non-linearity of the D / A converter.

The method of manufacturing a circuit board according to the present invention is characterized in that the circuit board and the inspection circuit in the above-mentioned collective board are separated.

According to the above structure, the circuit board can be provided only by separating the collective board.

The circuit board manufacturing method of the present invention is characterized in that the common test pad is separated in addition to the above configuration.

According to the above structure, since the common test pad can be separated from the circuit board, the portion (peripheral portion) of the aggregate board other than the circuit board is discarded after the circuit board is separated. Therefore, the common test pad formed on the peripheral portion does not remain on the circuit board.
As a result, the common test pad can be freely installed in the peripheral portion without being influenced by the shape of the circuit board or the like. Therefore, for example, it is possible to provide a common test pad in a place where it is easier to output data, or to form the common test pad in an arbitrary shape, depending on the convenience of the inspection device.

[0028]

DESCRIPTION OF THE PREFERRED EMBODIMENTS [Embodiment 1] The following will describe one embodiment of the present invention in reference to FIG. 1 to FIG.

As shown in FIG. 1, an aggregate substrate 112 (hereinafter, simply the aggregate substrate 1) having a plurality of circuit boards according to the present embodiment is provided.
12) is one in which a plurality of circuit boards are vertically and horizontally formed on a single large board. In the following description, as shown in FIG. 1, four circuit boards A1, A2,
B1 and B2 (each circuit board is an area surrounded by a cutting line 111) are arranged in two rows (from the left, rows A and B) × 2 rows (from the top, one and two rows). Although the part of the aggregate substrate 112 that has been described will be described, the number and arrangement of the circuit boards to be formed may be different from this.

Further, each circuit board has an image display device. This image display device includes scanning signal drive circuits (gate drivers) 113a and 113b and data drive circuits (source drivers) 114a and 114b. These drive circuits (gate driver 113a
113b and source drivers 114a and 114b)
Is equipped with a shift register. In addition, the image display device includes a gate line (wiring) 11 that functions as a scanning line.
A large number of 6 are wired in parallel, and a plurality of source lines 117 (wiring) functioning as signal lines are wired orthogonally to the gate line 116. The gate lines 116 are arranged in the column direction of the circuit board, and the source lines 117 are arranged in the step direction of the circuit board. Pixels 115 are provided at the intersections of the gate lines 116 and the source lines 117. The pixels 115 are arranged in a matrix in the image display device. The pixel 115 has gate drivers 113a and 113b via a gate line 116.
To the source driver 114a via the source line 117.
114b, respectively.

An inspection circuit is formed around the circuit board of the collective board 112. This inspection circuit includes terminals for inputting signals to the source driver 114a (source clock input terminal 101, video input terminal 102, source side start pulse input terminal 103) and terminals for inputting signals to the gate driver 113a (gate Clock input terminal 106, gate side start pulse input terminal 1
07), input to the source driver 114a and the source line 1
Source-side output monitor terminal (shared test pad) 104 that outputs the signal transmitted through 17, and gate-side output monitor terminal (shared test pad) 108 that outputs the signal input to the gate driver 113a and transmitted through the gate line 116. Equipped with.

Here, each of the above members will be described.

The source clock input terminal 101 is a terminal for inputting a clock signal to the source drivers 114a and 114b. This source clock input terminal 101
Is the source clock input line 11 extending in the column direction.
8 is connected to the source drivers 114a and 114b of the respective image display devices arranged in the column direction.
The clock signal input from the source clock input terminal 101 is transmitted to the source drivers 114a and 114b via the source clock input line 118.

The video input terminal 102 is a terminal for inputting a video signal to the source drivers 114a and 114b. The video input terminal 102 is provided with a source driver 114a of each image display device arranged in the column direction via a video signal input line 119 extending in the column direction.
-Connected to 114b. This video input terminal 10
The video signal input from 2 is the video signal input line 11
9 via the source drivers 114a and 114b
To be transmitted to.

Source side start pulse input terminal 103
Is a terminal for inputting a start pulse to the source driver 114a. The source side start pulse input terminal 103 is connected to the source driver 114a. By this connection, the start pulse input from the source-side start pulse input terminal 103 is transmitted to the source driver 114a. Furthermore, the source driver 11
4a is also connected to the source driver (source driver of the next column) 114b of the image display device adjacent in the column direction by the source driver connection line 120. The start pulse transmitted to the source driver 114a is converted into a new start pulse by the shift register of the source driver 114a. The converted start pulse is transmitted via the source driver connection line 120 as a start pulse in the source driver 114b in the next column.

The gate clock input terminal 106 is a terminal for inputting a clock signal to the gate drivers 113a and 113b. This gate clock input terminal 106
Is the gate clock input line 12 extending in the step direction.
1 is connected to the gate drivers 113a and 113b of the image display devices arranged in the row direction.
The clock signal input from the gate clock input terminal 106 is transmitted to the gate drivers 113a and 113b via the gate clock input line 121.

Gate side start pulse input terminal 107
Is a terminal for inputting a start pulse to the gate driver 113a. The gate-side start pulse input terminal 107 is connected to the gate driver 113a. With this connection, the start pulse input from the gate-side start pulse input terminal 107 is transmitted to the gate driver 113a. Furthermore, the gate driver 11
3a is also connected by a gate driver connection line 122 to a gate driver (next stage gate driver) 113b of the image display device adjacent in the step direction. The start pulse transmitted to the gate driver 113a is converted into a new start pulse by the shift register of the gate driver 113a. This converted start pulse is
A start pulse for the gate driver 113b in the next column is transmitted via the gate driver connection line 122.

Each source line 117 of each image display device in the column direction on the collective substrate 112 is bundled with a short link circuit (test facilitation circuit) 11 via a resistor of several tens kΩ.
0 is connected to the source line short link 123 extending in the column direction. The source line short link 123 is connected to the source side output monitor terminal 104 via the source side buffer 105.

Further, each gate line 116 of each image display device in the step direction on the collective substrate 112 is extended in the step direction via the short link circuit 110 which is bundled with a resistor of several tens kΩ. It is connected to the gate line short link 124. This gate line short link 124
Are connected to the gate side output monitor terminal 108 via the gate side buffer 109.

The source side buffer 105 and the gate side buffer 109 improve the drive capability of the output from the pixel 115 and do not attenuate the signal output from the source side output monitor terminal 104 and the gate side output monitor terminal 108. It is something to do.

The collective substrate 112 is a row of image display devices (circuit board A1 and circuit board B1 or circuit board A2 and circuit board B2) arranged in the column direction.
Image display device), source clock input terminal 10
1, a video input terminal 102, a source-side start pulse input terminal 103, and a source-side output monitor terminal 104 are provided in a set. In addition, the collective substrate 1
Reference numeral 12 denotes a row of image display devices (circuit board A1 and circuit board A2, or circuit board B1 and circuit board B2 image display devices) arranged in a row.
Gate clock input terminal 106, gate side start pulse input terminal 107 and gate side output monitor terminal 10
This is a configuration in which one set of 8 is provided. The inspection of each image display device can be performed by inputting signals (clock signal, start pulse, and video signal) from the above terminals. The start pulse is generated by the source driver 114
It is converted into a new start pulse by the shift register of a and the shift register of the gate driver 113a, and this start pulse becomes the start pulse of the next column and the next stage. Each signal is sequentially transmitted by this start pulse. Output monitor terminal 10 according to these transmitted signals
4. The voltage output from 108 is judged by comparing with the reference voltage, so that the source lines 117 in the image display devices arranged in the column direction are short-circuited or broken (defects in display). , And a short circuit of the gate line 116 in the image display device arranged in the step direction,
Defects such as disconnection (defects on display) can be inspected. As described above, it is possible to inspect the image display device on the collective substrate without providing the terminals for each image display device. Therefore, the number of terminals can be reduced, and a region where the terminals are not formed is generated. Therefore, the image display device can be further formed on the collective substrate. As a result, more circuit boards can be taken out from one collective board, so that the circuit boards can be manufactured at low cost. Further, by reducing the number of terminals, it is possible to shorten the time for moving the inspection probe when inspecting the image display device, so that the inspection can be performed at high speed.

The inspected collective board 112 has a cutting line 11 in which a part (short links 123 and 124) of the inspecting circuit is left in the cutting step of the circuit board manufacturing process.
By cutting along the line 1, the individual circuit boards are cut out (separated). The portion (peripheral portion) of the aggregate board 112 other than the circuit board is discarded after the circuit board is cut out. Therefore, the terminals formed on the peripheral portion do not remain on the circuit board. Thereby, each terminal can be freely installed in the peripheral portion without being influenced by the shape of the circuit board or the like. For this reason, for example, terminals can be provided at locations where data can be easily input, the number of pads can be increased or decreased, and the pads can be arbitrarily shaped (larger size, etc.) according to the convenience of the inspection probe or inspection device.
It is possible to Further, since the circuit board after cutting can be used as it is, the steps other than cutting do not increase.

Next, a method of inspecting the collective substrate 112 will be described with reference to FIGS. 2 and 3.

Here, as shown in FIG. 2, the source side start pulse input terminal 103 (see FIG. 1) to the start pulse 201 and the source clock input terminal 101.
When the clock signal 202 is input from (see FIG. 1),
A case where the shift register output 203 is output at the (n + 2) th clock input will be described as an example. The shift register output means an output of a signal obtained by converting a start pulse in the shift register of the driver. The shift register output 203 is input as a start pulse 204 to the source driver 114b (see FIG. 1) of the image display device on the circuit board B1. If you have many circuit boards,
Similarly, the shift register output 205 from the shift register of the source driver 114b is input to the source driver of the next column as the start pulse 206. At this time, for example, when a 5V video signal 207 is input from the video input terminal 102 (see FIG. 1), the output voltage 208 shown in FIG. 2 is output from the source side output monitor terminal 104. If the source line 117 is broken, the output abnormal portion 2
As shown in 09, a difference in voltage level is detected. Although the source line 117 has been described here, the gate line 11
Also for 6, the gate side start pulse input terminal 107
The same test can be performed by inputting a start pulse from the gate clock and a clock signal from the gate clock input terminal 106. The detection of the output voltage 208 is
The following inspection system will be used.

As shown in FIG. 3, the inspection system is
Inspection device 30 for inspecting device under test (collective substrate) 301
It consists of three. The inspection device 303 includes a comparator (comparing means) 304 and a judging device (judging means) 305.
The inspection is performed by the output monitor terminal (common test pad) 302 of the device under test 301 (source side output monitor terminal 104 and gate side output monitor terminal 108 in FIG. 1).
The output signal from the comparator 304 to the inspection device 303,
Is compared with the reference voltage, and the judgment device 305 judges whether the device under test 301 is good or bad. When the source line has a short circuit, a disconnection, or the like, the output abnormal portion 209 is detected as shown in FIG. Thereby, it is possible to determine the abnormality of the source line. The abnormal state of the gate line can be detected similarly to the source line.

[Second Embodiment] The following will describe another embodiment of the present invention in reference to FIG.
For convenience of description, members (structures) having the same functions as the members (structures) shown in the drawings of the first embodiment will be designated by the same reference numerals, and the description thereof will be omitted.

As shown in FIG. 4, the aggregate substrate according to the present embodiment is similar to that of the first embodiment except that the video input terminal 1 is used.
02, a first video input terminal 402 and a second video input terminal 403 are provided, and adjacent (adjacent) source lines 117a and 117b are alternately arranged to form a first source line short link 407 and a second source line short link 408. It is connected to and. Further, the first source line short link 407 is connected to the first source side output monitor terminal 405 via the first source side buffer 409.
The second source line short link 408 is connected to the second source side output monitor terminal 4 via the second source side buffer 410.
It is connected to 06. The above configuration is the source line 117
a · 117b disconnection, adjacent source lines 117a · 117
The circuit board is configured so that a short circuit (short circuit) of b and a defect can be detected.

Here, the adjacent source lines 117a and 117a
The detection of the short circuit defect of b will be described. First, the first
Video input terminal 402 and second video input terminal 403
Signal having a different potential, for example, an inverted signal is input to the adjacent source lines 117a and 117b. The signal input from the first video input terminal 402 is the source line 117a.
Is transmitted, passes through the first source line short link 407, and is output from the first source side output monitor terminal 405. The signal input from the second video input terminal 403 is transmitted through the source line 117b, passes through the second source line short link 408, and is output from the second source side output monitor terminal 406. By detecting these output signals with the inspection device 303 in the first embodiment, it is possible to detect a short circuit defect between the adjacent source lines 117a and 117b.

Specifically, the video input terminals 402 and 40
When video signals of 5V and 0V, for example, are input to 3, the source lines 117a and 117b output signals of normal values 5V and 0V, respectively. Here, when the adjacent source lines 117a and 117b have a short circuit, a value different from the normal value is output from the source lines 117a and 117b. That is, when the inspection device 303 outputs a signal having a value different from the normal value, it is understood that there is a short circuit between the adjacent source lines 117a and 117b. This makes it possible to inspect a short circuit between the source lines. If the selected pixel has a defect, a signal having a value obtained by adding or subtracting the leak amount to the normal value of 5V is detected. Thereby, the pixel defect can be inspected.

When a video signal of, for example, 5 V is input to the video input terminals 402 and 403, the source line 117
A signal of 5V, which is a normal value, is output from a 117b. However, the source line having a disconnection does not transmit the video signal, and the output becomes 0V. That is, when 0 V is detected by the inspection device 303, it can be seen that the source line is broken. Thereby, the disconnection of the source line can be inspected.

[Third Embodiment] The following will describe still another embodiment of the present invention with reference to FIG. For convenience of description, members (structures) having the same functions as the members (structures) shown in the drawings of the first embodiment are designated by the same reference numerals, and the description thereof will be omitted.

As shown in FIG. 5, the circuit board according to the present embodiment is different from the video input terminal 1 in the first embodiment.
02 and the source driver 114, a D / A converter 507 is provided in the middle of the connection. The circuit board according to the present embodiment can inspect the non-linearity of the D / A converter 507 in a driver-integrated image display device with a digital video input function, for example.

The inspection for non-linearity of the D / A converter 507 will be described. First, the source driver 11
4 to operate the source clock input terminal 101
From the start pulse input terminal 103 on the source side. Further, for example, a 6-bit digital video signal is input from the video input terminal 102 in synchronization with the start pulse and the clock signal. Then, the output voltage output from the source-side output monitor terminal 104 is measured by the inspection device 303 of the first embodiment. The nonlinearity of the D / A converter 507 can be evaluated by measuring the digital video signal for 64 gradations.

[0054]

As described above, the collective substrate of the present invention is an aggregate substrate in which a plurality of circuit boards having an image display device having a plurality of wirings driven by a drive circuit are arranged. A common test in which the wirings of each image display device are connected to each other, and the inspection signals input to the wirings of the image display devices are output sequentially through the common wirings. This is a configuration including an inspection circuit including a pad.

According to the above configuration, it is possible to inspect for defects such as short circuit and disconnection of the wiring of each image display device on the circuit board by the inspection signal output from the common test pad. Further, since a plurality of image display devices can be inspected by the common test pad without individually inspecting each image display device on each circuit board, it is possible to provide an aggregate substrate which can reduce the inspection time. There is an effect that can be. Furthermore, since the number of shared test pads provided can be reduced, there is a region where shared test pads are not formed. Therefore, more image display devices can be formed on the collective substrate. Therefore, since more circuit boards can be taken out from one aggregate board, the effect that an aggregate board with high cost performance can be provided is also exhibited.

In addition to the above structure, the collective substrate of the present invention is provided with a shift register for converting the start pulse input to the drive circuit by the drive circuit to generate the start pulse of the adjacent image display device. The configuration includes a connection line that connects the drive circuits of the adjacent image display devices so that the generated start pulse can be input to the drive circuit of the image display device.

According to the above structure, since the driving circuits of the adjacent image display devices are connected to each other by the connecting lines in the collective substrate, the start pulse newly generated by the shift register is adjacent to the image display devices. Can be sequentially transmitted to. That is, it is possible to sequentially inspect adjacent image display devices with one inspection signal. Therefore, it is not necessary to inspect each image display device on the circuit board, and a plurality of image display devices can be inspected.
An effect that the inspection time of the circuit board can be further shortened is achieved.

The method for inspecting an aggregate substrate according to the present invention is the inspection method for an aggregate substrate in which a plurality of circuit boards having an image display device having a plurality of wirings driven by a drive circuit are arranged. The inspection signal input to the wiring is transmitted through the wiring of each image display device, and the output inspection signal is detected from the same shared test pad.

According to the above arrangement, a plurality of image display devices on the collective substrate can be inspected by one common test pad, so it is not necessary to inspect each image display device on the circuit substrate. Therefore, there is an effect that the inspection time of the collective substrate can be shortened.

In addition to the above configuration, the method of inspecting an aggregate substrate according to the present invention converts the start pulse input to the drive circuit to generate the start pulse of the adjacent image display device and the adjacent image display device. In this configuration, the generated start pulse is input to the drive circuit.

According to the above configuration, it is possible to sequentially inspect adjacent image display devices with one inspection signal. Therefore, it is not necessary to inspect each of the image display devices on the circuit board, and a plurality of image display devices can be inspected, so that there is an effect that the inspection time of the circuit board can be further shortened.

The method of inspecting a collective board according to the present invention is configured to detect a short circuit between adjacent wirings.

According to the above construction, it is possible to detect a short circuit between adjacent wirings formed on the collective substrate.

An aggregate board inspection apparatus of the present invention is an inspection apparatus for inspecting the above aggregate board, which comprises a comparison means for comparing signals from a plurality of circuit boards output from a common test pad with a reference voltage. The configuration includes a determination unit that determines the quality of the circuit board based on the result of the comparison unit.

According to the above configuration, since the output of the signals from the plurality of circuit boards can be obtained by the common test pad, it is not necessary to inspect each circuit board individually.
Therefore, there is an effect that it is possible to provide an inspection device that can reduce the inspection time.

In addition to the above configuration, the inspection apparatus of the present invention has a configuration in which the determination means determines a display defect or a non-linearity of the D / A converter.

According to the above configuration, it is possible to determine the display defect or the non-linearity of the D / A converter.

The method of manufacturing a circuit board according to the present invention has a structure in which the circuit board and the inspection circuit in the above-mentioned assembly board are separated.

According to the above construction, the circuit board can be provided only by separating the collective board.

The circuit board manufacturing method of the present invention has a structure in which the common test pad is separated in addition to the above structure.

According to the above structure, since the common test pad can be separated from the circuit board, the portion (peripheral portion) of the aggregate board other than the circuit board is discarded after the circuit board is separated. Therefore, the common test pad formed on the peripheral portion does not remain on the circuit board.
As a result, the common test pad can be freely installed in the peripheral portion without being influenced by the shape of the circuit board and the like. For this reason, for example, it is possible to provide a common test pad in a place where it is easier to output data, or to form the common test pad in an arbitrary shape, depending on the convenience of the inspection device.

[Brief description of drawings]

FIG. 1 is a plan view of a collective substrate in which a plurality of circuit boards including an image display device according to an embodiment of the present invention are arranged.

FIG. 2 is a chart showing input / output timing of the image display device shown in FIG.

FIG. 3 is a plan view showing an inspection system for inspecting a collective substrate according to one embodiment of the present invention.

FIG. 4 is a plan view of a circuit board in an aggregate board according to another embodiment of the present invention.

FIG. 5 is a plan view of a circuit board in an aggregate board according to still another embodiment of the present invention.

[Explanation of symbols]

101 source clock input terminal 102 video input terminal 103 source side start pulse input terminal 104 source side output monitor terminal (shared test pad) 105 source side buffer 106 gate clock input terminal 107 gate side start pulse input terminal 108 gate side output monitor terminal ( Common test pad) 109 Gate side buffer 110 Short link circuit (test facilitation circuit) 112 Aggregate substrate 113 Gate driver (scan signal drive circuit, drive circuit) 114 Source driver (data drive circuit, drive circuit) 116 Gate line (wiring) 117 source line (wiring) 118 source clock input line 119 video signal input line 120 source driver connection line (connection line) 121 gate clock input line 122 gate driver connection line (connection line) 123 Gate line short link (common wiring) 124 Gate line short link (common wiring) 201 Start pulse 202 Clock signal 203 Shift register output 204 Start pulse 205 Shift register output 206 Start pulse 207 Video signal 208 Output voltage 209 Output abnormal portion 301 Measured Device (aggregate substrate) 302 Output monitor terminal (shared test pad) 303 Inspection device 304 Comparator (comparing means) 305 Judgment device (judgment means) 402 First video input terminal 403 Second video input terminal 405 First source side output monitor Terminal 406 Second source side output monitor terminal 507 D / A converter

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) G09F 9/35 G09F 9/35 F term (reference) 2G014 AA02 AA03 AB21 AB59 AC18 2G036 AA22 AA25 AA27 BA33 BB12 CA10 2H088 FA13 FA26 FA30 5C094 AA41 AA43 BA03 BA43 CA19 EA03 EA04 EA07 5G435 AA17 AA19 BB12 CC09 KK05 KK09 KK10

Claims (9)

[Claims] 1. A collective board in which a plurality of circuit boards having an image display device having a plurality of wirings driven by a driving circuit are arranged, and each wiring of the image display device is connected to and adjacent to each other. An inspection circuit including a common wiring that connects the wiring of the image display device and a common test pad that sequentially outputs the inspection signal input to the wiring of each image display device through the common wiring is provided. Characteristic aggregate board. 2. A start pulse generated in a drive circuit of an adjacent image display device, wherein the drive circuit includes a shift register for converting a start pulse input to the drive circuit to generate a start pulse of the adjacent image display device. 2. The collective substrate according to claim 1, further comprising a connection line that connects the drive circuits of the adjacent image display devices to each other so that the input circuit can be input. 3. A method for inspecting a collective substrate, in which a plurality of circuit boards having an image display device having a plurality of wirings driven by a drive circuit are arranged, wherein an inspection signal input to the wiring of each image display device is applied. A method of inspecting a collective substrate, which comprises transmitting the wiring of each image display device and detecting an output inspection signal from the same common test pad. 4. A start pulse input to a drive circuit is converted to generate a start pulse of an adjacent image display device, and a start pulse generated is input to a drive circuit of an adjacent image display device. The method for inspecting a collective substrate according to claim 3. 5. The method for inspecting a collective substrate according to claim 3, wherein a short circuit between adjacent wirings is detected. 6. An inspection apparatus for inspecting an aggregate board according to claim 1, wherein the comparison means compares signals from a plurality of circuit boards output from a common test pad with a reference voltage, and the comparison means. And a judgment means for judging whether the circuit board is good or bad based on the result of 1. 7. The apparatus for inspecting a collective substrate according to claim 6, wherein the determination means determines a display defect or non-linearity of the D / A converter. 8. A method of manufacturing a circuit board according to claim 1, wherein the circuit board and the inspection circuit are separated from each other. 9. The method of manufacturing a circuit board according to claim 8, wherein the common test pad is separated.