JP2003046225A - Method of manufacturing printed wiring board - Google Patents

Method of manufacturing printed wiring board

Info

Publication number
JP2003046225A
JP2003046225A JP2001229276A JP2001229276A JP2003046225A JP 2003046225 A JP2003046225 A JP 2003046225A JP 2001229276 A JP2001229276 A JP 2001229276A JP 2001229276 A JP2001229276 A JP 2001229276A JP 2003046225 A JP2003046225 A JP 2003046225A
Authority
JP
Japan
Prior art keywords
insulating layer
conductor
layer
wiring board
wiring pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001229276A
Other languages
Japanese (ja)
Inventor
Hideshi Mizumura
秀史 水村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Mektron KK
Original Assignee
Nippon Mektron KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Mektron KK filed Critical Nippon Mektron KK
Priority to JP2001229276A priority Critical patent/JP2003046225A/en
Publication of JP2003046225A publication Critical patent/JP2003046225A/en
Pending legal-status Critical Current

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  • Manufacturing Of Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a printed wiring board which is capable of ensuring pattern insulation for a wiring pattern, and improving a gap between the wiring patterns in transparency so as to improve the wiring board in part mounting density. SOLUTION: A laminate composed of a conductor layer 2 and an insulating layer 1 is used, and an interface between the layers 1 and 2 is roughened. A required wiring pattern 3 is provided to the conductor layer 2, and the roughened surface of the insulating layer 1 located at a gap G between the wiring patterns 3 is smoothed by the use of a chemical method or the like. When a smoothing operation is carried out, conductor residues 4 are removed.

Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】本発明は、配線パターン間の
絶縁を確保し、且つ配線パターン間のギャップ部の透明
度を向上させて部品実装密度を上げ得るプリント配線板
の製造法に関する。 【0002】 【従来の技術とその問題点】導体層と絶縁層が積層され
てなる導体積層板は、導体層と絶縁層の密着強度を確保
する為に物理的/化学的に界面密着強度を増加させる手
段を採用している。物理的に密着強度を増す方法として
は、界面の接触面積を増加させる方法が用いられる。 【0003】例えば密着させる前の金属箔等の導体層の
絶縁層との密着側表面を物理的或いは化学的手法を用い
て粗化して表面積を拡大させ、これに単体の絶縁層を接
着或いは絶縁層をキャスト・コーティングする方法であ
る。 【0004】上記導体積層板を用いて配線パターンを形
成するプリント配線板の場合、配線パターンと配線パタ
ーンの間(以下、これをギャップと呼ぶ)に露出した絶
縁層の表面形状は、導体層の疎化された形状をレプリカ
した形状、即ち、粗い形状となっている。 【0005】導体積層板の界面粗化形状が余りに粗い
と、配線パターンを例えば化学的エッチング法を用いて
形成する際に、ギャップの凹部分に導体残渣が残る場合
が有る。導体残渣が隣接配線パターン間に渡った場合は
配線パターンの短絡となる。 【0006】また、隣接する配線パターンに渡らないか
或いは配線パターンから孤立した場合は、配線パターン
の短絡には至らないまでも充分な配線パターン間の絶縁
を確保できない場合が有る。 【0007】ギャップ間の導体残渣を完全に除去する為
には配線パターン形成の為のエッチングを充分に行なう
必要が有るが、配線パターン上部がエッチングレジスト
で保護されていてもエッチング媒体の横方向への廻りこ
みがあり、エッチング量を増すと横方向にもエッチング
が進行し、配線パターン幅がやせ細る。 【0008】他方、導体層の粗化された形状をレプリカ
した粗い絶縁層表面は、平滑な表面より透過光を散乱す
る為、透明性が低いという問題が有る。 【0009】電気部品の実装の際には部品の位置決めに
一般的に画像認識が用いられるようになり、画像コント
ラスト差の大きい回路基板が求められる。近年、電気部
品の実装密度が益々増加する傾向に有る為、画像認識の
精度を向上させる必要が有り、更に、ギャップ部絶縁層
表面の透過度を上げる技術が求められている。 【0010】そこで、絶縁層表面の凹凸を減少させれば
透過度を向上させることが出来るが、導体層の凹凸を減
少させ、導体層・絶縁層の界面の接触面積を減少させる
ことは界面剥離強度を低下させる為、益々、微細化する
回路の信頼性低下をもたらす為好ましくない。 【0011】その為、本発明は回路としての配線パター
ン形成後にギャップ部の絶縁層表面の疎化面を化学的そ
の他の手法を用いて平滑化し、その平滑化の際に導体残
渣を効率的に除去し、且つギャップ部の透明度を向上さ
せることの可能なプリント配線板の製造法を提供するも
のである。 【0012】 【課題を解決するための手段】その為に本発明に係るプ
リント配線板の製造法では、導体層と絶縁層との界面が
粗化された積層板を用意し、前記導体層に対する所要の
配線パターン形成後に該配線パターン間のギャップ部に
於ける前記絶縁層表面の粗化面を化学的その他の手法を
用いて平滑化し、その平滑化の際に導体残渣を除去する
手法を採用したものである。 【0013】 【発明の実施の形態】以下、図示の実施例を参照しなが
ら本発明を更に説明する。 【0014】図1は本発明に係るプリント配線板の製造
工程図であって、同図(1)のように導体層2と絶縁層
1の密着強度を増す為に導体層2と絶縁層1との界面が
粗化された積層板を用意する。 【0015】この積層板を出発材料として常法を用いて
同図(2)の如く回路としての配線パターン3の形成を
行なう。例えば、液状或いはフィルム状の感光性エッチ
ングレジスト層を導体層2の上面に載置し、紫外光等で
レジスト層を部分的に架橋させて、その後現像を行ない
不要部分のレジストを除去し、化学エッチングで導体層
2を除去して配線パターン3を形成する。 【0016】ここで、同図(2)には絶縁層1の表面が
導体層であった配線パターン3に於ける粗化表面の凹凸
のレプリカとして粗くなっている様子を示している。ま
た、化学エッチングに於いてエッチング除去しきれなか
った導体層残渣4が部分的に絶縁層1の表面の粗化面に
残されている様子を示している。しかし、同図(2)の
形態では、図の下方向から入射した透過光は絶縁層1の
表面の凹凸で散乱し、透明度が悪い。 【0017】また、同図(2)でエッチング除去しきれ
なかった導体層残渣4を完全に除去する為には更に導体
層のエッチングを追加する必要が有り、配線パターン3
が幅方向に痩せてしまう。 【0018】そこで、同図(2)の状態から、絶縁層1
を優先的に除去できる方法で処理し、同図(3)のよう
に凹凸の粗化面を平滑化するものである。可撓性銅箔回
路基板の場合では、例えばエスパネックス(新日鐵化学
株式会社)、ネオフレックス(三井東圧化学株式会社)
等の場合、導体層2は銅、絶縁層1はポリイミド樹脂と
なっているが、この場合、ポリイミドを除去できる方法
としては化学的にポリイミドをエッチングする方法を好
適に用いる事が出来る。 【0019】ポリイミドエッチング液としては、アルカ
リ−ヒドラジン系エッチング液、尿素−アルカリ金属系
エッチング液、脂肪族アルコール−ジメチルホルムアミ
ド混合液等多くの薬液が知られている。これらの薬液は
ポリイミドを容易にエッチング除去できるが、導体層2
を形成する銅に対してのエッチング能力は銅エッチング
液に対して大幅に低く、配線パターン3を必要以上に痩
せさせてしまう虞が少ないか殆ど無視できる。 【0020】このようにポリイミドをエッチング除去す
ると、配線パターン3間のギャップ部Gに於ける絶縁層
1の表面は元の凹凸に対し、平滑化された平滑化ギャッ
プ部5となり、表面での透過光散乱が低下するので、ポ
リイミドの透明度が増す。また、凹部に孤立した導体層
残渣4自体はこのエッチング液で直接エッチング除去さ
れないものの、残渣4の周辺の絶縁層ポリイミドがエッ
チング除去される事により、ポリイミド表面から剥離・
離脱し、結果として、ギャップ部Gから除去される。 【0021】 【発明の効果】本発明に係るプリント配線板の製造法を
採用すると、ギャップ部の絶縁層表面の粗化面を化学的
その他の手法を用いて平滑化し、その平滑化の際に導体
残渣を効率的に除去する事により、配線パターン幅を必
要以上に細らせる事無く配線パターン間の絶縁を充分確
保する事が出来る。 【0022】また、ギャップ部の透明度を向上させるこ
とが出来る為、電気部品実装時の画像認識が容易にな
り、画像認識精度を上げる事が出来るので、部品実装の
信頼性を増す事が出来、結果的に部品実装密度を高める
事が出来る。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a print capable of securing insulation between wiring patterns and improving the transparency of a gap portion between the wiring patterns to increase the component mounting density. The present invention relates to a method for manufacturing a wiring board. 2. Description of the Related Art A conductor laminated plate having a conductor layer and an insulating layer laminated thereon has a physical / chemical interface adhesion strength to ensure the adhesion strength between the conductor layer and the insulation layer. Means to increase are adopted. As a method of physically increasing the adhesion strength, a method of increasing the contact area of the interface is used. For example, a surface of a conductor layer such as a metal foil, which is in close contact with an insulating layer before being adhered, is roughened by a physical or chemical method to increase the surface area, and a single insulating layer is adhered or insulated thereto. This is a method of casting and coating the layer. In the case of a printed wiring board in which a wiring pattern is formed using the above-described conductor laminate, the surface shape of the insulating layer exposed between the wiring patterns (hereinafter referred to as a gap) depends on the shape of the conductive layer. The shape is a replica of the sparsed shape, that is, a rough shape. [0005] If the roughened shape of the interface of the conductor laminate is too rough, a conductor residue may remain in the concave portion of the gap when a wiring pattern is formed by, for example, a chemical etching method. If the conductor residue extends between adjacent wiring patterns, the wiring pattern will be short-circuited. When the wiring pattern does not extend over the adjacent wiring pattern or is isolated from the wiring pattern, sufficient insulation between the wiring patterns may not be ensured even if the wiring pattern is not short-circuited. [0007] In order to completely remove the conductor residue between the gaps, it is necessary to perform sufficient etching for forming the wiring pattern. However, even if the upper part of the wiring pattern is protected by the etching resist, the etching is performed in the lateral direction of the etching medium. When the amount of etching is increased, etching proceeds in the horizontal direction, and the width of the wiring pattern becomes thinner. On the other hand, a rough surface of the insulating layer replicating the roughened shape of the conductor layer scatters transmitted light from a smooth surface, and thus has a problem of low transparency. In mounting electric components, image recognition is generally used for positioning components, and a circuit board having a large image contrast difference is required. In recent years, since the mounting density of electric components has been increasing, it is necessary to improve the accuracy of image recognition. Further, a technique for increasing the transmittance of the surface of the gap insulating layer has been required. Therefore, the transmittance can be improved by reducing the unevenness on the surface of the insulating layer. However, reducing the unevenness of the conductive layer and reducing the contact area at the interface between the conductive layer and the insulating layer can be achieved by removing the interface. It is not preferable because the strength is reduced and the reliability of the circuit to be miniaturized is further reduced. Therefore, according to the present invention, after forming a wiring pattern as a circuit, the roughened surface of the insulating layer in the gap portion is smoothed by using a chemical or other method, and the conductive residue is efficiently removed at the time of the smoothing. An object of the present invention is to provide a method of manufacturing a printed wiring board which can be removed and the transparency of a gap portion can be improved. [0012] For this purpose, in the method of manufacturing a printed wiring board according to the present invention, a laminated board in which the interface between a conductor layer and an insulating layer is roughened is prepared, and After forming a required wiring pattern, a method of smoothing the roughened surface of the insulating layer surface in a gap portion between the wiring patterns by using a chemical or other method and removing a conductor residue at the time of the smoothing is adopted. It was done. The present invention will be further described below with reference to the illustrated embodiments. FIG. 1 is a view showing a manufacturing process of a printed wiring board according to the present invention. As shown in FIG. 1A, in order to increase the adhesion strength between the conductor layer 2 and the insulation layer 1, the conductor layer 2 and the insulation layer 1 are formed. A laminate having an interface roughened is prepared. Using this laminate as a starting material, a wiring pattern 3 as a circuit is formed as shown in FIG. For example, a liquid or film-shaped photosensitive etching resist layer is placed on the upper surface of the conductor layer 2, the resist layer is partially cross-linked by ultraviolet light or the like, and then development is performed to remove unnecessary portions of the resist. The wiring layer 3 is formed by removing the conductor layer 2 by etching. FIG. 2B shows that the surface of the insulating layer 1 is roughened as a replica of the unevenness of the roughened surface in the wiring pattern 3 which was a conductor layer. In addition, a state is shown in which the conductor layer residue 4 that cannot be completely removed by chemical etching is partially left on the roughened surface of the insulating layer 1. However, in the form of FIG. 2B, the transmitted light incident from the lower side of the figure is scattered by irregularities on the surface of the insulating layer 1 and has poor transparency. Further, in order to completely remove the conductor layer residue 4 that cannot be completely removed by etching in FIG. 2B, it is necessary to further add etching of the conductor layer.
Is thin in the width direction. Therefore, the state of FIG.
Is preferentially removed, and the roughened surface of the unevenness is smoothed as shown in FIG. In the case of a flexible copper foil circuit board, for example, Espanex (Nippon Steel Chemical Co., Ltd.), Neoflex (Mitsui Toatsu Chemical Co., Ltd.)
In such a case, the conductor layer 2 is made of copper and the insulating layer 1 is made of a polyimide resin. In this case, as a method of removing the polyimide, a method of chemically etching the polyimide can be preferably used. As the polyimide etching solution, many chemical solutions such as an alkali-hydrazine etching solution, a urea-alkali metal etching solution, and a mixed solution of an aliphatic alcohol and dimethylformamide are known. These chemicals can easily remove polyimide by etching.
The etching ability with respect to copper for forming the wiring pattern is significantly low with respect to the copper etchant, and there is little or almost no possibility that the wiring pattern 3 is made thinner than necessary. When the polyimide is removed by etching as described above, the surface of the insulating layer 1 in the gap G between the wiring patterns 3 becomes a smoothed gap 5 which is smoothed to the original unevenness, and the transmission on the surface is achieved. Since light scattering is reduced, the transparency of the polyimide is increased. Moreover, although the conductor layer residue 4 itself isolated in the concave portion is not directly etched away by this etching solution, the insulating layer polyimide around the residue 4 is removed by etching away from the polyimide surface.
It is separated from the gap G as a result. When the method for manufacturing a printed wiring board according to the present invention is adopted, the roughened surface of the insulating layer in the gap portion is smoothed by using a chemical or other method. By efficiently removing the conductor residue, the insulation between the wiring patterns can be sufficiently secured without making the wiring pattern width narrower than necessary. Further, since the transparency of the gap portion can be improved, image recognition at the time of mounting the electric component becomes easy, and the accuracy of the image recognition can be increased, so that the reliability of the component mounting can be increased. As a result, the component mounting density can be increased.

【図面の簡単な説明】 【図1】本発明に係るプリント配線板の製造工程図。 【符号の説明】 1 絶縁層 2 導体層 3 配線パターン 4 残渣 5 平滑化ギャップ部 G ギャップ部[Brief description of the drawings] FIG. 1 is a manufacturing process diagram of a printed wiring board according to the present invention. [Explanation of symbols] 1 insulating layer 2 conductor layer 3 Wiring pattern 4 residue 5 Smoothing gap G gap

Claims (1)

【特許請求の範囲】 【請求項1】導体層と絶縁層との界面が粗化された積層
板を用意し、前記導体層に対する所要の配線パターン形
成後に該配線パターン間のギャップ部に於ける前記絶縁
層表面の粗化面を平滑化し、その平滑化の際に導体残渣
を除去することを特徴とするプリント配線板の製造法。
Claims: 1. A laminate having a roughened interface between a conductor layer and an insulating layer is prepared, and after a required wiring pattern is formed on the conductor layer, the laminate is formed in a gap between the wiring patterns. A method for manufacturing a printed wiring board, characterized in that a roughened surface of the insulating layer surface is smoothed, and a conductor residue is removed during the smoothing.
JP2001229276A 2001-07-30 2001-07-30 Method of manufacturing printed wiring board Pending JP2003046225A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001229276A JP2003046225A (en) 2001-07-30 2001-07-30 Method of manufacturing printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001229276A JP2003046225A (en) 2001-07-30 2001-07-30 Method of manufacturing printed wiring board

Publications (1)

Publication Number Publication Date
JP2003046225A true JP2003046225A (en) 2003-02-14

Family

ID=19061647

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001229276A Pending JP2003046225A (en) 2001-07-30 2001-07-30 Method of manufacturing printed wiring board

Country Status (1)

Country Link
JP (1) JP2003046225A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101184006B1 (en) 2010-09-28 2012-09-19 삼성전기주식회사 Printed circuit board and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101184006B1 (en) 2010-09-28 2012-09-19 삼성전기주식회사 Printed circuit board and manufacturing method thereof

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