JP2003046110A - Semiconductor photodetector - Google Patents

Semiconductor photodetector

Info

Publication number
JP2003046110A
JP2003046110A JP2001230663A JP2001230663A JP2003046110A JP 2003046110 A JP2003046110 A JP 2003046110A JP 2001230663 A JP2001230663 A JP 2001230663A JP 2001230663 A JP2001230663 A JP 2001230663A JP 2003046110 A JP2003046110 A JP 2003046110A
Authority
JP
Japan
Prior art keywords
layer
semiconductor
conductivity type
light
receiving element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2001230663A
Other languages
Japanese (ja)
Inventor
Takanori Yasuda
隆則 安田
Kenichi Koyama
憲一 小山
Hisashi Higuchi
永 樋口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2001230663A priority Critical patent/JP2003046110A/en
Publication of JP2003046110A publication Critical patent/JP2003046110A/en
Withdrawn legal-status Critical Current

Links

Landscapes

  • Light Receiving Elements (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor photodetector by which response deceleration is prevented by reducing dark current. SOLUTION: The semiconductor photodetector is obtained by forming a buffer layer 11 presenting a one conductivity type, a semiconductor layer 12 presenting the one conductivity type, an optical absorption layer 13, a window layer 14 presenting an opposite conductivity type semiconductor, and a conduct layer 15 presenting the opposite conductivity type semiconductor in order on a substrate 10. The photodetector has p-n junction having a p-side electrode 17a on a light shielding film 16 and the layer 14, and an n-side electrode 17b on the rear surface of the substrate 10. In the semiconductor photodetector, the joint area of the interfaces of the layer 13 and the layer 15 is larger than that of the layer 13 and the layer 12.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は半導体受光素子に関
し、特に光ファイバー通信などを使用し得る半導体受光
素子に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light receiving element, and more particularly to a semiconductor light receiving element capable of using optical fiber communication.

【0002】[0002]

【従来の技術】従来の半導体受光素子を図3と図4によ
り説明する。図3はGaAs系メサ形状型半導体受光素子の
斜視図であり、図4は断面図である。
2. Description of the Related Art A conventional semiconductor light receiving element will be described with reference to FIGS. FIG. 3 is a perspective view of a GaAs mesa-shaped semiconductor light receiving element, and FIG. 4 is a sectional view.

【0003】n型のGaAs基板20上にn型のGaAsバッファ
層21、n型のAlGaAs層22、n-型の半絶縁性GaAs光吸収層2
3、p+型のAlGaAs窓層24、p+型GaAsコンタクト層25が順
次形成され、p型のGaAsコンタクト層25の表面上にp側電
極27aを設け、GaAs基板21の裏面にn側電極27bを設け、
また、受光面に遮光膜26を設けた構造となっている。
An n-type GaAs buffer layer 21, an n-type AlGaAs layer 22, and an n -type semi-insulating GaAs light absorption layer 2 on an n-type GaAs substrate 20.
3, the p + type AlGaAs window layer 24 and the p + type GaAs contact layer 25 are sequentially formed, the p side electrode 27a is provided on the surface of the p type GaAs contact layer 25, and the n side electrode is provided on the back surface of the GaAs substrate 21. 27b is provided,
Further, it has a structure in which a light shielding film 26 is provided on the light receiving surface.

【0004】かかるGaAs系メサ形状型半導体受光素子に
おいては、GaAsバッファ層21は、n型不純物が1×1017
1019atoms/cm3程度の比較的高濃度にて添加されてい
る。
In such a GaAs mesa-shaped semiconductor light receiving element, the GaAs buffer layer 21 contains n-type impurities of 1 × 10 17 to.
It is added at a relatively high concentration of about 10 19 atoms / cm 3 .

【0005】AlGaAs層22は、n型不純物が1×1017〜1019
atoms/cm3程度の比較的高濃度にて添加されている。GaA
s光吸収層23は不純物を含有しないノンドープである
が、実際には不純物が5×1015 atoms/cm3程度の低濃度
のn-型になっている。AlGaAs窓層24が1×1017〜1018ato
ms/cm3程度のp+型になっている。コンタクト層25は1×1
017〜1018atoms/cm3程度のp+型になっている。
The AlGaAs layer 22 contains 1 × 10 17 to 10 19 of n-type impurities.
It is added at a relatively high concentration of about atoms / cm 3 . GaA
Although the light absorption layer 23 is non-doped and does not contain impurities, it is actually an n type with a low concentration of about 5 × 10 15 atoms / cm 3 . AlGaAs window layer 24 is 1 × 10 17 to 10 18 ato
It has a p + type of about ms / cm 3 . Contact layer 25 is 1 × 1
It is a p + type with about 0 17 to 10 18 atoms / cm 3 .

【0006】ここで、p側電極27aとn型電極27bから逆バ
イアス電圧を印加して光吸収層23を空乏化する。このよ
うな状態で入射光29が入射すると、光吸収層23で励起さ
れたキャリアは光吸収層23に印加されている高電界によ
って加速され、短い時間でn型GaAsバッファ層21、もし
くはp+型のAlGaAs窓層24に移動して高速応答を実現する
ことができる。
Here, a reverse bias voltage is applied from the p-side electrode 27a and the n-type electrode 27b to deplete the light absorption layer 23. When the incident light 29 enters in such a state, the carriers excited in the light absorption layer 23 are accelerated by the high electric field applied to the light absorption layer 23, and the n-type GaAs buffer layer 21 or p + Type AlGaAs window layer 24 to achieve a high speed response.

【0007】上記構成の半導体受光素子に対し、さらに
受光効率を上げるためにメサ形状型を有する技術が提案
されている(特開平7-153993号参照)。
In order to further improve the light receiving efficiency of the semiconductor light receiving element having the above structure, a technique having a mesa shape type has been proposed (see Japanese Patent Laid-Open No. 7-153993).

【0008】この技術では活性層から発光する光をメサ
形状側面の反射光を用いて、比較的多くの光が取り出す
ことができる。
In this technique, a relatively large amount of light can be extracted from the light emitted from the active layer by using the reflected light from the side surface of the mesa.

【0009】しかしながら、図3と図4に示すような前
記構成のGaAs系メサ形状型半導体受光素子によれば、P
N接合部28および光吸収層23の端部はメサ形状側面に露
出しており、そして、受光面から漏れた入射光29が素子
側面から入射し、受光領域下部でキャリアが生成し、受
光領域で生成されたキャリアと受光領域下部で生成され
たキャリアとでは、キャリアの走行距離が異なるので、
キャリアの走行時間が異なり、この違いが信号として検
出したとき、立下り波形にテール状態として表れ、素子
の応答速度を低下させていた。また、発生したキャリア
はメサ側面上に表面リーク電流を生じさせ、暗電流を増
大させていた。
However, according to the GaAs-based mesa-shaped semiconductor light receiving element having the above-described structure as shown in FIGS. 3 and 4, P
The ends of the N-junction 28 and the light absorption layer 23 are exposed on the side surface of the mesa, and the incident light 29 leaking from the light receiving surface enters from the side surface of the element, carriers are generated in the lower portion of the light receiving area, and the light receiving area is formed. Since the traveling distance of the carrier is different between the carrier generated in and the carrier generated in the lower part of the light receiving area,
When the carrier travel times are different and this difference is detected as a signal, it appears as a tail state in the falling waveform, and the response speed of the element is reduced. Further, the generated carriers cause a surface leak current on the side surface of the mesa to increase the dark current.

【0010】かかる課題を解消するために、遮光膜26を
形成した後にO2のイオン注入など不活性不純物を導入
して、メサ形状側面と絶縁膜の間にメサ形状側面を半絶
縁物化することによって暗電流を低減させる方法(特開
平2-15680号)や、メサ形状側面に基板と同一導電型の低
濃度層と高濃度層の多層膜構造を設け、暗電流を低減さ
せる方法(特開平8-162663号)などが提案されている。
In order to solve such a problem, after forming the light-shielding film 26, an inert impurity such as O 2 ion implantation is introduced to make the mesa-shaped side surface a semi-insulating material between the mesa-shaped side surface and the insulating film. Method to reduce the dark current (Japanese Patent Laid-Open No. 2-15680) or a method to reduce the dark current by providing a multi-layer structure of a low-concentration layer and a high-concentration layer of the same conductivity type as the substrate on the side surface of the mesa. 8-162663) is proposed.

【0011】[0011]

【発明が解決しようとする課題】しかしながら、これら
の方法はイオン注入、メサ形状形成後の成膜工程などを
行うので、製造工程が複雑になっていた。
However, in these methods, since the ion implantation, the film forming process after forming the mesa shape, and the like are performed, the manufacturing process is complicated.

【0012】また、上記構成のGaAs系メサ形状型によれ
ば、入射光29を受光するAlGaAs窓層24の面積に比べて、
PN接合の面積のほうが大きくなり、受光素子の静電容
量が増加して、素子の応答性を示す遮断周波数が小さく
なり、その結果、素子の高速動作に問題が生じていた。
Further, according to the GaAs mesa shape type having the above-mentioned structure, as compared with the area of the AlGaAs window layer 24 which receives the incident light 29,
The area of the PN junction becomes larger, the capacitance of the light receiving element increases, and the cutoff frequency showing the response of the element becomes smaller, resulting in a problem in high-speed operation of the element.

【0013】したがって本発明の目的は叙上に鑑みて完
成されたものであり、その目的は逆メサ形状を有する側
面を形成することにより、製造工程を複雑化することな
く、メサ形状側面にPN接合、および光吸収層の端部が
露出していることによって生じる暗電流の低減し、これ
により、応答速度の低下を防止した半導体受光素子を提
供することにある。
Therefore, the object of the present invention has been completed in view of the above, and an object thereof is to form a side surface having an inverted mesa shape so that a PN is formed on the mesa shape side surface without complicating the manufacturing process. It is an object of the present invention to provide a semiconductor light receiving element in which the dark current caused by the exposure of the end portion of the junction and the light absorption layer is reduced, and thereby the reduction of the response speed is prevented.

【0014】本発明の他の目的は素子の端部に入射する
入射光を効率よく集光でき、PN接合の面積を小さくす
ることでもって素子の静電容量を低減し、高速な半導体
受光素子を提供することにある。
Another object of the present invention is to efficiently collect incident light incident on the end portion of the device, reduce the capacitance of the device by reducing the area of the PN junction, and achieve a high-speed semiconductor light receiving device. To provide.

【0015】[0015]

【課題を解決するための手段】本発明の半導体受光素子
は、基板の上に一導電型半導体層、光吸収層および逆導
電型半導体層とを順次形成してなるPN接合を有する半
導体受光素子において、光吸収層と逆導電型半導体層の
界面の接合面積を、光吸収層と一導電型半導体層の界面
の接合面積に比べて大きくしたことを特徴とする。
A semiconductor light receiving element of the present invention has a PN junction formed by sequentially forming a one-conductivity-type semiconductor layer, a light absorption layer, and a reverse-conductivity-type semiconductor layer on a substrate. In the above, the junction area at the interface between the light absorption layer and the opposite conductivity type semiconductor layer is made larger than the junction area at the interface between the light absorption layer and the one conductivity type semiconductor layer.

【0016】本発明の他の半導体受光素子は、前記逆導
電型半導体層、光吸収層および一導電型半導体層の各端
面を逆メサ形状にしたことを特徴とする。
Another semiconductor light receiving element of the present invention is characterized in that each of the end faces of the opposite conductivity type semiconductor layer, the light absorption layer and the one conductivity type semiconductor layer has an inverted mesa shape.

【0017】[0017]

【発明の実施の形態】以下、本発明を図1と図2により
詳細に説明する。図1は本発明の半導体受光素子の一実
施形態を示すの斜視図であり、図2は概略断面図であ
る。この半導体受光素子をGaAs系pinフォトダイオード
でもって例示する。
DETAILED DESCRIPTION OF THE INVENTION The present invention will be described in detail below with reference to FIGS. FIG. 1 is a perspective view showing an embodiment of a semiconductor light receiving element of the present invention, and FIG. 2 is a schematic sectional view. This semiconductor light receiving element is exemplified by a GaAs pin photodiode.

【0018】本発明の半導体受光素子において、10は一
導電型を呈する半導体基板(以下、基板と称する)、11
は一導電型を呈するバッファ層、12は一導電型を呈する
半導体層、13は光吸収層、14は逆導電型半導体を呈する
窓層、15は逆導電型半導体を呈するコンタクト層であ
る。
In the semiconductor light receiving element of the present invention, 10 is a semiconductor substrate of one conductivity type (hereinafter referred to as substrate), 11
Is a buffer layer of one conductivity type, 12 is a semiconductor layer of one conductivity type, 13 is a light absorption layer, 14 is a window layer of the opposite conductivity type semiconductor, and 15 is a contact layer of the opposite conductivity type semiconductor.

【0019】さらに素子の側面と表面上に遮光膜16を設
け、基板10の下および窓層14の上にp側電極17a、基板10
の裏面にn側電極17bと設けている。
Further, a light-shielding film 16 is provided on the side surface and the surface of the device, and the p-side electrode 17a and the substrate 10 are provided under the substrate 10 and on the window layer 14.
An n-side electrode 17b is provided on the back surface of the.

【0020】基板10が半導体基板である場合には、たと
えば一導電型不純物を1×1017〜101 9atoms/cm3 程度含
有して成る、シリコン(Si)、ガリウム砒素(GaAs)などの
単結晶半導体基板を用いる。
[0020] If the substrate 10 is a semiconductor substrate, for example made of one conductivity type impurity contained about 1 × 10 17 ~10 1 9 atoms / cm 3, silicon (Si), gallium arsenide (GaAs), such as A single crystal semiconductor substrate is used.

【0021】単結晶半導体基板は(100)面を<011>方向に
2〜7°オフさせた基板などが好適である。
The single crystal semiconductor substrate is preferably a substrate in which the (100) plane is off by 2 to 7 ° in the <011> direction.

【0022】一導電型半導体層であるバッファ層11はガ
リウム砒素(GaAs)から形成され、一導電型不純物(Si等)
を1×1017〜1019atoms/cm3 程度含有させ、そして、2〜
3μm程度の厚みに形成し、これにより、基板10と、そ
の上の半導体層との格子不整合からなるミスフィット転
位を防止したり、もしくは低減させている。
The buffer layer 11, which is a semiconductor layer of one conductivity type, is made of gallium arsenide (GaAs) and contains impurities of one conductivity type (Si or the like).
Of about 1 × 10 17 to 10 19 atoms / cm 3 and 2 to 10
It is formed to have a thickness of about 3 μm, thereby preventing or reducing misfit dislocations due to lattice mismatch between the substrate 10 and the semiconductor layer above it.

【0023】一導電型半導体層12はアルミニウムガリウ
ム砒素(AlxGa1-xAs)から形成され、 一導電型不純物(Si等)を1×1017〜1019atoms/cm3 程度
含有させ、そして、0.2〜2μm程度の厚みに形成する。
また、この層12のAl組成としてはxを0.1以上にすると
よく、これにより、エネルギーバンドギャップにて不連
続が形成され、そして、光吸収層13で生成し、p側電極1
7aに走行するホールが一導電型半導体層12に拡散される
のが防止される。
The one-conductivity-type semiconductor layer 12 is formed of aluminum gallium arsenide (Al x Ga 1-x As), and contains one-conductivity-type impurity (Si or the like) in a concentration of about 1 × 10 17 to 10 19 atoms / cm 3 . Then, it is formed to a thickness of about 0.2 to 2 μm.
The Al composition of the layer 12 is preferably x of 0.1 or more, whereby a discontinuity is formed in the energy band gap, and the p-side electrode 1 is generated in the light absorption layer 13.
The holes traveling to 7a are prevented from being diffused into one conductivity type semiconductor layer 12.

【0024】光吸収層13はガリウム砒素(GaAs) から形
成され、不純物を含有しないノンドープであるが、実際
には一導電型不純物(S等)を5×1015 atoms/cm3程度含有
しており、2〜3μm程度の厚みである。
The light absorption layer 13 is made of gallium arsenide (GaAs) and is non-doped with no impurities. However, in reality, it contains one conductivity type impurity (S or the like) at about 5 × 10 15 atoms / cm 3. And has a thickness of about 2 to 3 μm.

【0025】逆導電型を呈する半導体層である窓層14は
アルミニウムガリウム砒素(AlyGa1- yAs)から形成され、
亜鉛(Zn)の逆導電型半導体不純物を1×101 7〜1019atoms
atoms/cm3 程度含有し、0.1〜0.2μm程度の厚みであ
る。ここでAl組成としてはyを0.1以上にすると、前述し
た如く、エネルギーバンドギャップにて不連続が形成さ
れるという点で望ましい。さらに、半導体層12のAl組
成より小さい方が後述するエッチングにおいて適してい
る(y<x) 逆導電型を呈する半導体層であるオーミックコンタクト
層15はガリウム砒素(GaAs)から形成され、亜鉛(Zn)など
の逆導電型半導体不純物を1×1019〜1020atoms/cm3程度
含有し、0.01〜0.3μm程度の厚みである。
The window layer 14, which is a semiconductor layer having a reverse conductivity type, is formed of aluminum gallium arsenide (Al y Ga 1- y As),
Zinc (Zn) opposite conductivity type semiconductor impurity 1 × 10 1 7 ~10 19 atoms of
It contains about atoms / cm 3 and has a thickness of about 0.1 to 0.2 μm. Here, as the Al composition, when y is 0.1 or more, it is desirable in that discontinuity is formed in the energy band gap as described above. Further, the smaller the Al composition of the semiconductor layer 12 is, the more suitable it will be in etching to be described later (y <x). ) Or the like having a reverse conductivity type semiconductor impurity of about 1 × 10 19 to 10 20 atoms / cm 3 and a thickness of about 0.01 to 0.3 μm.

【0026】遮光膜16は窒化シリコン(SiNx)や酸化珪素
(SiO2)、合成樹脂などから形成され、3000Å程度の厚み
である。
The light-shielding film 16 is made of silicon nitride (SiNx) or silicon oxide.
It is made of (SiO 2 ), synthetic resin, etc. and has a thickness of about 3000 Å.

【0027】p側電極17a、n側電極17bは金/金・ゲルマニ
ウム (Au/AuGe)などから形成され、厚み1μm程度であ
る。
The p-side electrode 17a and the n-side electrode 17b are made of gold / gold / germanium (Au / AuGe) and have a thickness of about 1 μm.

【0028】かくして上記構成の受光素子によれば、逆
導電型半導体層14および光吸収層13の端面部が内側に傾
斜した逆メサ形状側面を有することで、受光面から漏れ
た入射光19が、一導電型を呈する半導体層12に入射し、
受光領域下部でキャリアが生成することがなく、したが
って、キャリアの走行時間の差により、信号が立下り波
形にテール状態として表れ、素子の応答速度を低下させ
ることがなくなる。また、発生したキャリアはメサ側面
上に表面リーク電流を生じさせ、暗電流を増大させなく
する。
Thus, according to the light-receiving element having the above structure, since the end surfaces of the reverse-conductivity-type semiconductor layer 14 and the light-absorbing layer 13 have the inverted mesa-shaped side surfaces inclined inward, the incident light 19 leaking from the light-receiving surface is prevented. , Incident on the semiconductor layer 12 exhibiting one conductivity type,
Carriers are not generated in the lower part of the light receiving region, and therefore, due to the difference in carrier transit time, the signal does not appear as a tail state in the falling waveform and the response speed of the element is not reduced. In addition, the generated carriers cause a surface leak current on the side surface of the mesa and prevent the dark current from increasing.

【0029】また、素子の端部に入射する入射光19は素
子内部に伝播し、屈折率の異なる外部に出る界面にて、
逆メサ形状が強くなると逆メサ側面に入射する角度が大
きくなり、逆メサ側面での反射率が上がり、これによ
り、反射された光は素子中心部に集光し、光吸収層13に
て吸収する光子数が多くなり、生成されるキャリア数が
多くなり、受光感度が向上する。また、逆メサ形状であ
るので、プレーナー形状やメサ形状の同じ受光面積の素
子に対してPN接合18の面積を小さくすることができ、
素子の静電容量を低減でき、その結果、素子の応答性を
示す遮断周波数を大きくすることができる。
Incident light 19 incident on the end of the element propagates inside the element and exits at an interface having a different refractive index.
When the reverse mesa shape becomes stronger, the angle of incidence on the reverse mesa side surface becomes larger, and the reflectance at the reverse mesa side surface increases, which causes the reflected light to be condensed at the center of the element and absorbed by the light absorption layer 13. The number of photons generated increases, the number of carriers generated increases, and the light receiving sensitivity improves. Further, since it has an inverted mesa shape, it is possible to reduce the area of the PN junction 18 with respect to a planar shape or mesa shape element having the same light receiving area.
The capacitance of the element can be reduced, and as a result, the cutoff frequency showing the responsiveness of the element can be increased.

【0030】(本発明の半導体受光素子の製法)つぎに
本発明の半導体受光素子のMOCVD法による製造方法
を、以下、GaAs半導体受光素子にて説明する。
(Manufacturing Method of Semiconductor Light-Receiving Element of the Present Invention) Next, a method of manufacturing the semiconductor light-receiving element of the present invention by the MOCVD method will be described below with reference to a GaAs semiconductor light-receiving element.

【0031】一導電型のGaAs基板10を水素(H2)とアルシ
ンガス(AsH3)雰囲気中で600℃〜800℃まで昇温し、基板
10の表面上の酸化物を除去する。
The GaAs substrate 10 of one conductivity type is heated in a hydrogen (H 2 ) and arsine gas (AsH 3 ) atmosphere to 600 ° C. to 800 ° C.
Remove oxide on 10 surfaces.

【0032】ついで、基板温度500℃〜800℃にしてトリ
メチルガリウム(以下、TMGと略記する)とアルシンガ
ス(AsH3)とシランガス(SiH4)をドーパントガスとして供
給し、Si濃度が1.0×1017〜1019atom/cm3のGaAsバッフ
ァ層11を2〜4μmの厚みにて形成する。
Then, the substrate temperature is set to 500 ° C. to 800 ° C., trimethylgallium (hereinafter abbreviated as TMG), arsine gas (AsH 3 ) and silane gas (SiH 4 ) are supplied as dopant gases, and the Si concentration is 1.0 × 10 17 A GaAs buffer layer 11 of about 10 19 atom / cm 3 is formed with a thickness of 2 to 4 μm.

【0033】次にTMG、トリメチルアルミニウム(以
下、TMAと略記する)、アルシンガス(AsH3)、シラン
ガス(SiH4)をドーパントガスとして供給し、Si濃度が1.
0×101 7〜1019atom/cm3一導電型半導体を呈する半導体
層12を0.2〜2.0μmの厚みで形成する。
Next, TMG, trimethylaluminum (hereinafter abbreviated as TMA), arsine gas (AsH 3 ) and silane gas (SiH 4 ) were supplied as dopant gases, and the Si concentration was 1.
The semiconductor layer 12 exhibiting 0 × 10 1 7 ~10 19 atom / cm 3 one conductivity type semiconductor is formed to a thickness of 0.2 to 2.0 [mu] m.

【0034】その上に原料ガスとしてTMG、アルシン
ガス(AsH3)を用いて、半絶縁性を呈するGaAs光吸収層13
を2.0〜3.0mmの厚みにて形成する。
On top of that, TMG and arsine gas (AsH 3 ) are used as source gases, and a GaAs light absorption layer 13 having a semi-insulating property is formed.
Is formed with a thickness of 2.0 to 3.0 mm.

【0035】そして、TMG、TMA、アルシンガス(A
sH3)、およびジメチル亜鉛(以下、DMZと略記する)を
ドーパントガスとし、Zn濃度が1.0×1017〜1019atom/cm
3のアルミニウムガリウム砒素(AlGaAs)からなる逆導電
型半導体を呈する窓層14を0.1〜2.0μmの厚みで形成す
る。
Then, TMG, TMA, arsine gas (A
sH 3 ), and dimethylzinc (hereinafter abbreviated as DMZ) as a dopant gas, and the Zn concentration is 1.0 × 10 17 to 10 19 atom / cm 2.
A window layer 14 having a reverse conductivity type semiconductor made of aluminum gallium arsenide (AlGaAs) 3 is formed to a thickness of 0.1 to 2.0 μm.

【0036】その後、ジメチル亜鉛(以下、DMZと略
記する)をドーパントガスとして、アルミニウムガリウ
ム砒素(AlGaAs)からなる逆導電型半導体を呈する窓層14
を0.1〜0.2μmの厚みで形成する。
After that, the window layer 14 which exhibits an opposite conductivity type semiconductor made of aluminum gallium arsenide (AlGaAs) using dimethylzinc (hereinafter abbreviated as DMZ) as a dopant gas.
To have a thickness of 0.1 to 0.2 μm.

【0037】このような成長の後の結晶は硫酸-過酸化
水素系のエッチング液を用いて逆メサ構造を形成する。
このエッチング液を使用した場合、ガリウム砒素に比
べ、アルミガリウム砒素の方が、エッチングレートが速
く、さらにアルミガリウム砒素のなかでもアルミニウム
組成比率が大きいほどにエッチングレートが高くなる。
The crystal after such growth forms an inverted mesa structure by using a sulfuric acid-hydrogen peroxide type etching solution.
When this etching solution is used, aluminum gallium arsenide has a faster etching rate than gallium arsenide, and the higher the aluminum composition ratio among the aluminum gallium arsenide, the higher the etching rate.

【0038】アルミニウムガリウム砒素(AlxGa1-xAs)か
らなる一導電型半導体層12と、アルミニウムガリウム砒
素(AlyGa1-yAs)からなる逆導電型半導体層14との間に
て、y<xにしたことで、半導体層12を成す層が最も速
いエッチングレートになり、断面形状にて最も細くな
り、一導電型半導体層12、光吸収層13、逆導電型半導体
層14は逆メサ逆メサ形状になる。
The aluminum gallium arsenide (Al x Ga 1-x As ) one conductivity type semiconductor layer 12 made of, in between the aluminum gallium arsenide (Al y Ga 1-y As ) opposite conductivity type semiconductor layer 14 made of , Y <x, the layer forming the semiconductor layer 12 has the fastest etching rate and the thinnest cross-sectional shape, and the one conductivity type semiconductor layer 12, the light absorption layer 13, and the opposite conductivity type semiconductor layer 14 are Inverted mesa The shape becomes an inverted mesa.

【0039】続けて、硫酸-過酸化水素系のエッチング
液を用いて、ガリウム砒素コンタクト層15をエッチング
し、受光領域を形成する。
Subsequently, the gallium arsenide contact layer 15 is etched using a sulfuric acid-hydrogen peroxide type etching solution to form a light receiving region.

【0040】その後、プラズマCVD法でシランガス(Si
H4)とアンモニア(NH4)を用いて窒化シリコン(SiNx)から
なる遮光膜18を形成する。
After that, silane gas (Si
The light shielding film 18 made of silicon nitride (SiNx) is formed using H 4 ) and ammonia (NH 4 ).

【0041】しかる後、蒸着法やスパッタリング法を用
いて金・ゲルマニウム(AuGe)などによりp側電極17aを形
成する。同様に基板裏面にn側電極17bを形成する。
Thereafter, the p-side electrode 17a is formed of gold / germanium (AuGe) or the like by using the vapor deposition method or the sputtering method. Similarly, the n-side electrode 17b is formed on the back surface of the substrate.

【0042】[0042]

【発明の効果】以上のとおり、本発明による受光素子に
おいて、基板の上に、一導電型を呈する半導体層、光吸
収層、逆導電型を呈する半導体層とを順次形成してなる
PN接合を有する半導体受光素子において、光吸収層と
一導電型半導体層の界面の接合面積に比べ、光吸収層と
逆導電型半導体層の界面の接合面積が大きくしたこと
で、特に少なくとも逆導電型半導体層、光吸収層および
一導電型半導体層の端面が内側に傾斜した逆メサ形状側
面を有するように構成したことで、製造工程を複雑化す
ることなく、そして、メサ形状側面にPN接合、および
光吸収層の端部が露出していることによって生じる暗電
流の低減し、応答速度の低下を防止した半導体受光素子
を提供できた。
As described above, in the light receiving element according to the present invention, a PN junction is formed by sequentially forming on the substrate a semiconductor layer having one conductivity type, a light absorption layer, and a semiconductor layer having an opposite conductivity type. In the semiconductor light receiving element which has, the bonding area at the interface between the light absorption layer and the opposite conductivity type semiconductor layer is made larger than the bonding area at the interface between the light absorption layer and the one conductivity type semiconductor layer. Since the end faces of the light absorption layer and the semiconductor layer of one conductivity type have the inverted mesa-shaped side faces inclined inward, the manufacturing process is not complicated, and the PN junction and the light It was possible to provide a semiconductor light receiving element in which the dark current caused by the exposed end of the absorption layer was reduced and the response speed was prevented from decreasing.

【0043】また本発明の半導体受光素子では、逆メサ
形状を有する側面を形成することにより、素子の端部に
入射する入射光を効率よく集光することにでき、PN接
合の面積を小さくすることにより素子の静電容量を低減
し、高速な半導体受光素子を提供できた。
Further, in the semiconductor light receiving element of the present invention, by forming the side surface having the inverted mesa shape, the incident light incident on the end portion of the element can be efficiently collected and the area of the PN junction is reduced. As a result, the capacitance of the device was reduced and a high-speed semiconductor light receiving device could be provided.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の半導体受光素子の斜視図である。FIG. 1 is a perspective view of a semiconductor light receiving element of the present invention.

【図2】本発明の半導体受光素子の断面図である。FIG. 2 is a sectional view of a semiconductor light receiving element of the present invention.

【図3】従来の半導体受光素子の斜視図である。FIG. 3 is a perspective view of a conventional semiconductor light receiving element.

【図4】従来の半導体受光素子の断面図である。FIG. 4 is a sectional view of a conventional semiconductor light receiving element.

【符号の説明】[Explanation of symbols]

10・・・半導体基板 11・・・一導電型を呈するバッファ層 12・・・一導電型を呈する半導体層 13・・・光吸収層 14・・・逆導電型半導体を呈する窓層 15・・・逆導電型半導体を呈するコンタクト層 16・・・遮光膜 17a・・・p側電極 17b・・・n側電極 10 ... Semiconductor substrate 11 ... Buffer layer exhibiting one conductivity type 12 ... Semiconductor layer exhibiting one conductivity type 13 ... Light absorbing layer 14 ... Window layer exhibiting reverse conductivity type semiconductor 15 ... Contact layer exhibiting reverse conductivity type semiconductor 16 ... Shading film 17a ... p-side electrode 17b ... n side electrode

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 5F049 MA02 MA03 MB07 NA01 NA03 NB01 PA14    ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 5F049 MA02 MA03 MB07 NA01 NA03                       NB01 PA14

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】基板の上に一導電型半導体層、光吸収層お
よび逆導電型半導体層とを順次形成してなるPN接合を
有する半導体受光素子において、光吸収層と逆導電型半
導体層の界面の接合面積を、光吸収層と一導電型半導体
層の界面の接合面積に比べて大きくしたことを特徴とす
る半導体受光素子。
1. A semiconductor light-receiving element having a PN junction, in which a semiconductor layer of one conductivity type, a light absorption layer, and a semiconductor layer of opposite conductivity type are sequentially formed on a substrate. A semiconductor light-receiving element characterized in that the junction area at the interface is made larger than the junction area at the interface between the light absorption layer and the one-conductivity-type semiconductor layer.
【請求項2】前記逆導電型半導体層、光吸収層および一
導電型半導体層の各端面を逆メサ形状にしたことを特徴
とする請求項1記載の半導体受光素子。
2. The semiconductor light receiving element according to claim 1, wherein each of the end faces of the opposite conductivity type semiconductor layer, the light absorption layer and the one conductivity type semiconductor layer has an inverted mesa shape.
JP2001230663A 2001-07-30 2001-07-30 Semiconductor photodetector Withdrawn JP2003046110A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001230663A JP2003046110A (en) 2001-07-30 2001-07-30 Semiconductor photodetector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001230663A JP2003046110A (en) 2001-07-30 2001-07-30 Semiconductor photodetector

Publications (1)

Publication Number Publication Date
JP2003046110A true JP2003046110A (en) 2003-02-14

Family

ID=19062836

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001230663A Withdrawn JP2003046110A (en) 2001-07-30 2001-07-30 Semiconductor photodetector

Country Status (1)

Country Link
JP (1) JP2003046110A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003174187A (en) * 2001-12-07 2003-06-20 Sumitomo Chem Co Ltd Thin-film semiconductor epitaxial substrate and manufacturing method thereof
JP2011100753A (en) * 2009-11-03 2011-05-19 Epson Imaging Devices Corp Imaging apparatus, x-ray imaging apparatus, and method of manufacturing imaging apparatus
WO2017199501A1 (en) * 2016-05-16 2017-11-23 ソニー株式会社 Light receiving element, optical communication device, and method for manufacturing light receiving element

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003174187A (en) * 2001-12-07 2003-06-20 Sumitomo Chem Co Ltd Thin-film semiconductor epitaxial substrate and manufacturing method thereof
JP2011100753A (en) * 2009-11-03 2011-05-19 Epson Imaging Devices Corp Imaging apparatus, x-ray imaging apparatus, and method of manufacturing imaging apparatus
WO2017199501A1 (en) * 2016-05-16 2017-11-23 ソニー株式会社 Light receiving element, optical communication device, and method for manufacturing light receiving element
JPWO2017199501A1 (en) * 2016-05-16 2019-03-14 ソニー株式会社 Light receiving element, optical communication device, and method for manufacturing light receiving element
US10937919B2 (en) 2016-05-16 2021-03-02 Sony Corporation Light receiving element, optical communication device, and method for manufacturing a light receiving element
JP7006588B2 (en) 2016-05-16 2022-01-24 ソニーグループ株式会社 Manufacturing method of light receiving element, optical communication device, and light receiving element

Similar Documents

Publication Publication Date Title
US4684969A (en) Heterojunction avalanche photodiode
US10199525B2 (en) Light-receiving element and optical integrated circuit
JPH06350123A (en) Composition-modulated avalanche photodiode
JP3828982B2 (en) Semiconductor photo detector
JPH09260710A (en) Semiconductor device
JPH04111478A (en) Light-receiving element
JP7298715B2 (en) light receiving device
JP2002231992A (en) Semiconductor light receiving element
EP0491384A1 (en) Light receiving device with a PIN structure
JP2003046110A (en) Semiconductor photodetector
US5656831A (en) Semiconductor photo detector
JP2730472B2 (en) Semiconductor light receiving element
JP2000223685A (en) Photoelectric integrated circuit and heterojunction phototransistor
JP4044738B2 (en) Semiconductor photo detector
US20220416108A1 (en) Optical Receiving Device and Manufacturing Method Therefor
JP2002289905A (en) Semiconductor light-receiving element
JPH051629B2 (en)
JP3854086B2 (en) Semiconductor photo detector
JP4486603B2 (en) Semiconductor photo detector
JPH04342174A (en) Semiconductor photoelectric receiving element
JP2003101061A (en) Semiconductor light-receiving element
JPH05327001A (en) Photodetector
JP2002203981A (en) Semiconductor light receiving element
JPH09270527A (en) Semiconductor photodetector
JPH0265279A (en) Semiconductor photodetecting element

Legal Events

Date Code Title Description
A761 Written withdrawal of application

Free format text: JAPANESE INTERMEDIATE CODE: A761

Effective date: 20050927