JP2003044292A - Multiplex parallel processor, multiplex parallel processing method and multiplex parallel processing program executed by computer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce overheads at switching a program execution environment between the execution of a program and an interruption without complicating the constitution of a computer and basic software and without remarkably increasing the burdens of the description of the program of a user. SOLUTION: An internal arithmetic unit 2 executes the program divided into a plurality of threads by a thread unit. An event processor 1 holds the interruption from the outside while executing a prescribed thread among the threads and executes the interruption after the prescribed thread is ended. The threads are automatically divided by a language processing system.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used in various parallel and distributed computers connected to a network, and by applying the principle of multithread processing, a conventional program fragment called an exclusive executable program called a thread. By subdividing it into multiplex and running them in parallel,
The present invention relates to a multiple parallel processing device, a multiple parallel processing method, and a multiple parallel processing program executed by a computer, which integrates external event processing such as communication and input / output and internal computer processing and controls the parallel execution thereof. .

[0002]

2. Description of the Related Art In conventional event processing, each time an external interrupt (event) occurs, the currently executing program is interrupted and the interrupt is processed with priority. In this case, the execution environment of the processor, which is usually called "context switching", is switched each time an interrupt occurs, and after waiting for the arrival of that event, the execution of the program whose execution has been suspended is resumed, so the overhead is Increase.

Further, in the conventional event processing, it is necessary to design a program for controlling the timing of the arrival of an event and the interruption of execution of the program and the arrival of the corresponding event to be accurate. Particularly, in parallel and distributed processing, a plurality of computers are operating in parallel while exchanging data with each other, so that events frequently occur due to communication with other processors and exchanging data. Since such an event complicates the control of the program execution order on each processor, that is, the mechanism of the synchronous control, it is desired to simplify the program processing.

[0004]

In the conventional event processing for picking up and processing an event immediately after it arrives, there are the following problems in the configuration of the computer and the basic software and the program configuration of parallel and distributed processing.

(1) In the conventional computer hardware and operating system (OS), the main purpose is to minimize the overhead of context switching. Therefore, it is necessary to distinguish between the internal arithmetic processing centering on the user program and the event processing generated by an external factor, and to perform control focusing on the switching. This complicates the configuration of the computer and the basic software and increases the development cost.

(2) In program description, especially in parallel and distributed processing, the timing of event waiting and event arrival is predicted, the timing mismatch is minimized, and the number of context switching is minimized. It is required to design and write a program in. For a user who designs and describes parallel and distributed processing, it is necessary to describe the processing in consideration of the externally generated event and the internal operation processing, so the program is written only with the algorithm that should be processed originally. This makes it difficult for users to write programs, and the burden of writing programs on the users is significantly increasing.

An object of the present invention is to provide a program execution environment between program execution and interruption without complicating the configuration of a computer and basic software and without significantly increasing the burden of user's program description. It is an object of the present invention to provide a multiple parallel processing device, a multiple parallel processing method, and a multiple parallel processing program executed by a computer, which reduce the overhead at the time of switching.

[0008]

A multiple parallel processing apparatus according to the present invention holds a means for dividing an existing program into a plurality of thread programs by a language processing system and an external interrupt during the execution of the thread program. Means and means for executing the interrupt after the thread program is completed.

According to the present invention, an existing program is divided into a plurality of thread programs by a language processing system, and an external interrupt is executed after the thread program is completed. Therefore, it is necessary to interrupt the program every interrupt. Disappear. In this way, by executing the program divided into a plurality of threads in units of threads, it is possible to reduce the overhead at the time of switching the program execution environment between the execution of the program and the interruption. In addition, in the present invention, even if there are a plurality of interrupts from the outside, the plurality of interrupts can be collectively performed after the thread ends, so that the number of times the program execution environment is switched between the execution of the program and the interrupt is Significantly reduced, and as a result,
There is no need to complicate the configuration of the computer and the basic software for switching the program execution environment between program execution and interruption, and there is no fear that the burden of writing the program on the user will significantly increase.

A multiple parallel processing method according to the present invention comprises a step of dividing an existing program into a plurality of thread programs by a language processing system, a step of holding an external interrupt during execution of the thread program, and the thread program. The step of executing the interrupt after the completion of the.

According to the present invention, the program execution environment between the program execution and the interrupt is executed without complicating the configuration of the computer and the basic software and without significantly increasing the burden of the user's description of the program. It is possible to reduce the overhead at the time of switching.

A multiple parallel processing program executed by a computer according to the present invention has a step of dividing an existing program into a plurality of thread programs by a language processing system and a step of holding an external interrupt during the execution of the thread program. And executing the interrupt after the thread program is completed.

According to the present invention, the program execution environment between the program execution and the interrupt is executed without complicating the configuration of the computer and the basic software and without significantly increasing the burden of the user's description of the program. Multiple parallel processing that reduces the overhead at the time of switching can be executed by a computer program.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Multiple parallel processing apparatus according to the present invention,
Embodiments of a multiple parallel processing method and a multiple parallel processing program executed by a computer will be described in detail with reference to the drawings.

First, the first embodiment will be described. In the first embodiment, a mechanism for independently performing event processing and thread execution (internal calculation processing) in parallel is realized by hardware. In the present embodiment, it is premised that a language processing system executes a program code obtained by converting an existing program code into a thread program structure as shown in FIG. 1, and the multiple parallel processing apparatus according to the present invention shown in FIG. The processing is executed by the event processing device 1 and the internal processing device 2.

In FIG. 1, a, b, c, d, and e respectively represent a thread code, a thread starting condition (synchronous counter), a thread execution instruction sequence, a thread execution end instruction, and continuing thread information (pointer).

The event processing device 1 and the internal processing device 2 operate in parallel. The event processing device 1 processes an external event (interrupt) 3 and manages thread synchronization, and the internal processing device 2 exclusively executes an executable thread.

When an external event 3 occurs in this situation,
It is picked up by the interrupt reception device 4 of the event processing device 1, and the interrupt queue 5 of the event processing device 1 is taken.
Held in.

Interrupt processing device 6 of event processing device 1
Performs the interrupt processing by taking out the interrupts held in the interrupt queue 5 one by one. The interrupt processing device 6 has an interrupt processing execution device 7 and a thread synchronization management device 8 and performs the following operations.

1. The corresponding interrupt processing routine is executed based on the interrupt factor. 2. The thread synchronization management device 8 decrements the synchronization counter 10 of the thread waiting in the synchronization waiting thread management table 9 according to the result of the interrupt processing for the thread waiting for the event caused by the interrupt. A thread waiting for an event caused by an interrupt is identified by a thread ID 11. 3. As a result of subtracting 1 from the synchronization counter 10, when the value becomes zero, the thread ID 11 of the thread and the thread code address 12 are transferred to the execution waiting queue 1 in the internal processing unit 2.
Put in 3.

The internal processing unit 2 picks up the executable queue held in the execution waiting thread queue 13 and executes the thread. The internal processing device 2 further includes a thread execution environment setting device 14, a thread execution device 15, and a continuous thread registration device 16, and performs the following processing.

1. The thread execution environment setting device 14 allocates a free register file in advance for the inter-execution waiting thread that is nearing the execution order, that is, moves to the head of the queue, and the execution environment of the thread is set in the register file. Is set (recovery of the execution environment). 2. The thread to be executed is taken out from the head of the execution waiting queue 13, and the thread execution is started for the currently empty arithmetic unit using the register file already allocated. Execution of a thread exclusively executes an instruction sequence until execution of a thread execution end instruction without interruption in the middle. 3. The continuing thread registration device 16 executes a thread execution end instruction. Since the thread execution end instruction has the name (thread ID and its code address) of the thread (continuation thread) to be executed subsequent to the thread and the initial value of the synchronization counter as operands, use the operand information. , The continuing thread is registered in the synchronization waiting thread management table 9. When the same continuation thread already exists in the synchronization waiting thread management table 9, the synchronization counter 10 is decremented by 1. 4. As a result of subtracting 1 from the synchronous counter 10, its value becomes zero, and when the activation condition is satisfied, the thread ID and code address of the thread are put into the execution waiting queue 13 in the internal arithmetic unit 2.

Next, a second embodiment will be described. Second
In this embodiment, software implements a mechanism for performing event processing and thread execution (internal operation processing) independently and in parallel. Also in the present embodiment, it is assumed that the language processing system executes the program code in which the existing program code is converted into the thread program structure as shown in FIG. 1, and the multiple parallel processing method according to the present invention is implemented in FIG. The process is executed by a commercially available hardware device 21 as shown.

The hardware device 21 is an arithmetic device 22.
An external device (interrupt device) 23, a storage device 24,
It has a bus 25 for exchanging data between them.

The operation of this embodiment will be described with reference to FIG. At the same time that the thread execution management unit 26 is executed in the arithmetic unit 22, the external event 27 is picked up by the external unit 23, and the interrupt queue 27 in the storage unit 24.
Held in. The thread execution management unit 26 has a thread execution unit 29 and an interrupt processing execution unit 30. here,
The thread execution environment is the contents of registers.

When a thread execution end instruction is executed during thread execution, the execution of the thread ends, and the thread execution environment saving unit saves the thread execution environment. The thread execution end instruction has information of at least one thread continuing to the thread as an operand, and this continuing thread is registered in the synchronization waiting thread management table 31 of the storage device 24. If the same continuation thread already exists in the synchronization waiting thread management table 31, the synchronization counter is decremented by 1.

The thread execution unit 29 takes out the execution waiting thread held in the execution waiting thread queue 32 from the head of the queue, sets the execution environment of the thread in the thread execution environment setting unit, and the thread execution unit 29 executes the threads. Executes a code (execution instruction string).

When the execution of one thread is completed, the control is transferred to the interrupt processing execution unit 30. Interrupt processing execution unit 3
At 0, the next operation is repeated until the interrupt thread queue 28 becomes empty.

1. An interrupt is taken out from the head of the interrupt queue 28, the interrupt factor is checked, and the corresponding interrupt processing routine is executed. 2. The synchronization counter is decremented by 1 for threads waiting for that event, that is, for threads registered in the synchronization waiting thread management table 32 (thread synchronization processing). 3. As a result, when the value of the synchronization counter becomes zero, the thread is deleted from the synchronization waiting thread management table 31 and put in the execution waiting thread queue 32. When the processing of the interrupt execution unit 30 is completed, the control is transferred to the thread execution unit 29.

According to the present embodiment, by analyzing the characteristics of the event processing and the internal arithmetic processing, the general program including the parallel and distributed processing can be detected at the point where the execution is interrupted by the influence of the external event. As a boundary, a portion (thread) that can be dedicated to internal arithmetic processing without being affected by an external event is divided into a plurality of program pieces and converted into a program including a plurality of threads. Note that thread division can be automatically performed by the language processing system.

The thread is started while controlling the synchronization by the arrival of the event, and the started thread is
It is executed without the influence of external events.
The place where the influence of the external event is exerted is specified in advance as a thread break.
It can be executed collectively by computer hardware or basic software independently of the user program, and the user program can concentrate on internal arithmetic processing as thread execution. This makes it possible to hide the event processing that frequently occurs in parallel and distributed processing from the user program and reduce the overhead compared to the conventional case.

Therefore, according to the present embodiment, since the interrupt processing can be collectively performed after the thread execution, the external event interrupt does not affect the internal arithmetic processing. As a result, the number of times the program execution environment is switched between the execution of the user program and the interrupt processing routine can be significantly reduced, and the processing overhead can be reduced as compared with the conventional case.

Since the user program can exclusively execute the internal arithmetic processing as thread execution, the description of the synchronous processing related to the external event is based on the execution dependency between the threads triggered by the event. Can be configured as a program. As a result, the user program does not need to consider the synchronous control between events, which facilitates the design and development of parallel and distributed programs.

[Brief description of drawings]

FIG. 1 is a program block diagram showing the structure of a thread program executed in the present invention.

FIG. 2 is a block diagram showing an overall configuration of a multiple parallel processing apparatus according to the present invention.

FIG. 3 is a block diagram of hardware for implementing a multiple parallel processing method according to the present invention.

FIG. 4 is a diagram showing an operation process of software inside the external device, the storage device, and the arithmetic device of FIG. 3;

[Explanation of symbols]

1 event processor 2 Internal processing unit 3,27 External event (interrupt) 4 Interrupt acceptance device 5,28 Interrupt queue 6 Interrupt processing device 7 Interrupt processing execution device 8 Thread synchronization management device 9,31 Synchronization wait thread management table 10 Synchronous counter 11 thread ID 12 Thread code address 13,32 Pending thread queue 14 Thread execution environment setting device 15 thread execution unit 16 Continuation thread registration device 21 Hardware device 22 Arithmetic device 23 External device (interrupt device) 24 storage 25 bus 26 Thread execution manager 29 Thread execution unit 30 Interrupt processing execution unit a thread code b Thread start condition (synchronous counter) c Thread execution instruction sequence d Thread execution end instruction e Continued thread information (pointer)

Claims (3)

[Claims] 1. A means for dividing an existing program into a plurality of thread programs by a language processing system, a means for holding an interrupt from the outside during the execution of the thread program, and the interrupt after the thread program is completed. A multi-parallel processing apparatus comprising: a means for executing. 2. A step of dividing an existing program into a plurality of thread programs by a language processing system, a step of holding an interrupt from the outside during execution of the thread program, and a step of interrupting the interrupt after the thread program is finished. A parallel processing method, comprising: performing steps. 3. A step of dividing an existing program into a plurality of thread programs by a language processing system, a step of holding an interrupt from the outside during execution of the thread program, and a step of interrupting the interrupt after the thread program is completed. A multiple parallel processing program executed by a computer, comprising: executing steps.