JP2003032051A - Distortion compensation device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a distortion compensation device that can compensate distortion generated in an amplifier with high accuracy. SOLUTION: When distortion generating means 2, 3 generate amplitude or phase distortion to a signal amplified by an amplifier 4, a signal level detection means 5 detects the level of the signal amplified by the amplifier 4, and distortion control means 12, 7, 8 control the amount of distortion generated by the distortion generating means 2, 3 on the basis of the level detected by the signal level detection means 5, control timing adjustment means 9, 10, 11 adjust timing when the distortion quantity is controlled by using a distortion control means (digital/analog converters 7, 8 shown in the Figure) so that the distortion generated by the amplifier 4 is greatly compensated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a distortion compensator for compensating for distortion generated in an amplifier, and more particularly by adjusting the timing for controlling the amount of distortion generated for a signal amplified by the amplifier. , A distortion compensator for realizing highly accurate distortion compensation.

[0002]

2. Description of the Related Art In a mobile radio communication system such as a mobile phone system, an area (cell) controlled by a base station device
In order to enable wireless communication with mobile station devices existing up to the end of, the base station device wirelessly transmits signals simultaneously to multiple mobile station devices (multiple users) depending on the communication conditions. Therefore, the base station device needs to transmit a signal with high power. Similarly, a relay station device (relay amplifier) that receives and amplifies a signal wirelessly transmitted from the base station device and wirelessly transmits the amplified signal to the mobile station device also transmits a signal with high power. Will be required.

Therefore, in the above base station apparatus and relay station apparatus, a (large) power amplifier (PA: Power Amplifie) capable of covering the physical distance to the edge of the cell.
r) is used to amplify a signal to be transmitted (for example, a modulated wave) to a desired level. However, such an amplifier exhibits non-linear response (AM-AM conversion or AM-PM conversion) characteristics near the limit point (saturation point) of the element, resulting in non-linear distortion. There's a problem.

In addition, for example, in the Radio Law, a strict band limitation is imposed on a person who performs various wireless communication services in order to eliminate the influence between different services that perform wireless communication using adjacent bands. Has been.

Therefore, as a method of compensating for the non-linear distortion generated in the amplifier as described above, conventionally, for example, it has a characteristic opposite to the non-linear distortion generated in the amplifier (that is,
A predistorter type distortion compensating method is used in which the nonlinear distortion is compensated by generating the distortion in the preceding stage to cancel the nonlinear distortion.

As a method of compensating for the non-linear distortion as described above, there are other distortion compensation methods such as a feedforward distortion compensation method and a negative feedback distortion compensation method. Here, for example, the feed-forward distortion compensation method has an advantage that the operation is stable, but the distortion component (generated in the main amplifier) is extracted in the distortion detection loop and the distortion component is sub-amplified in the distortion compensation loop. Therefore, there is a problem that the circuit becomes complicated and the power supply efficiency is lowered by the sub-amplifier because it is necessary to perform the process of amplifying the output signal and subtracting the amplified signal from the output signal of the main amplifier. On the other hand, the predistorter type distortion compensation method is relatively advantageous in terms of circuit scale and power supply efficiency because it has a relatively simple configuration and does not require a sub-amplifier.

Next, an example of an (distortion compensating) amplifying device equipped with a predistorter for performing distortion compensation by the above-mentioned predistorter type distortion compensation system will be shown. FIG. 11 shows a circuit configuration example of an amplifier device (amplifier with predistortion function) including a predistorter, and an operation example of the amplifier device will be described with reference to FIG. This amplification device is provided in the transmission unit of the base station device or the relay station device as described above, inputs a signal to be transmitted (transmission signal) from the transmitter, and amplifies the signal with an amplifier. Output to the antenna.

First, the signal to be transmitted, which is output from the transmitter, is input (to the amplification device), the signal is divided into two, and one of the divided signals is input to the delay means 81. The other distribution signal is input to the level detection unit 85.

Here, FIG. 12 shows an example of the spectrum of the signal at the stage of being input from the transmitter to the amplifier, and the horizontal axis in the figure shows the frequency [kHz] of the signal, The vertical axis represents the signal level by the power ratio [dB]. At this stage, as shown in the figure,
Predistorter (variable attenuator 82 and variable phase shifter 8
Since the distortion due to 3) and the distortion due to the amplifier 84 are not received, the spectrum of the unnecessary signal outside the used band has a low level.

The delay means 81 delays the input signal (one of the divided signals) and delays the variable attenuator (attenuator) 8.
Output to 2. The variable attenuator 82 changes (attenuates) the amplitude of the signal input from the delay means 81 according to a (analog) control signal input from a D / A converter 88 described later.
By doing so, the amount of amplitude distortion corresponding to the control signal is generated for the input signal, and the signal (including the amplitude distortion) is output to the variable phase shifter 83.

The variable phase shifter 83 changes the phase of the signal input from the variable attenuator 82 in accordance with the (analog) control signal input from a D / A converter 89 described later, thereby inputting the input signal. In response to the control signal, a phase distortion of an amount corresponding to the control signal is generated, and the signal (including the phase distortion) is output to the amplifier 84. In this example, a predistorter (predistortion generator) is composed of the variable attenuator 82 and the variable phase shifter 83 connected in series, and the control systems 81, 85 to 90 for controlling them. .

The amplifier 84 amplifies the signal input from the variable phase shifter 83 to a desired level and outputs the amplified signal (from the amplification device) to the antenna. Here, FIG.
For example, if distortion compensation is not performed, the amplifier 8
4 shows an example of the spectrum of the signal output from the signal No. 4, in which the horizontal axis indicates the signal frequency [kHz] and the vertical axis indicates the signal level by the power ratio [dB]. In this case, as shown in FIG.
Due to the distortion generated in No. 4, there is a spectrum in which a distortion component (leakage power to an adjacent channel) is generated outside the used band.

In addition, such a distortion component is a predistorter (variable attenuator 82 and variable phase shifter 83) which is a distortion (amplitude distortion or phase distortion) having characteristics opposite to those generated by the amplifier 84. Compensation can be achieved by generating in. Here, FIG. 14 shows an example of the spectrum of the signal output from the amplifier 84 when distortion compensation is performed by the predistorter, and the horizontal axis in the figure indicates the frequency [kHz] of the signal. The vertical axis represents the signal level by the power ratio [dB]. As shown in the figure, in this case, the spectrum has a reduced distortion component (leakage power to the adjacent channel) outside the used band generated in the amplifier 84.

The level detection unit 85 is, for example, an envelope detector for detecting an envelope of a signal, or a low pass filter (L) for extracting only a predetermined frequency component with respect to the detected envelope.
PF: Low Pass Filter), an A / D converter that performs A / D (Analog / Didital) conversion of the extracted envelope component, and the like. Then, the level detection unit 85 detects the level (for example, the power level) of the input signal (the other distribution signal) by using such a configuration, and outputs the detection result to the control unit 90 as a digital value. .

The distortion extracting means 86 is composed of, for example, a directional coupler, extracts the distortion (for example, part of the amplified signal) contained in the amplified signal output from the amplifier 84, and outputs it to the control section 90. To do. The clock source 87 generates a clock signal of a predetermined cycle, and outputs the clock signal to the level detection unit 85 and two D / A converters 88 and 89 described later.
As described above, the data is output and supplied to each processing unit that performs digital processing.

The D / A (Digital / Analog) converter 88 is
Based on the timing according to the clock signal input from the clock source 87, the digital control signal input from the control unit 90 described later is converted into an analog control signal and output to the variable attenuator 82. It should be noted that this control signal controls the amount of amplitude change (that is, the amount of amplitude distortion to be generated) in the variable attenuator 82.

The D / A converter 89 converts a digital control signal input from a control unit 90, which will be described later, into an analog control signal on the basis of a timing corresponding to a clock signal input from the clock source 87, and variably transfers the analog control signal. Output to the phase shifter 83. The control signal is for controlling the amount of phase change (that is, the amount of phase distortion to be generated) in the variable phase shifter 83.

The control unit 90 is composed of, for example, a digital signal processor (DSP). Then, based on the detection result (detected level) input from the level detection unit 85, the control unit 90 uses the variable attenuator 82 to generate a digital control signal for realizing the amount of amplitude change according to the detection result. In addition to outputting to the D / A converter 88, the variable phase shifter 83 outputs to the D / A converter 89 a digital control signal for realizing a phase change amount according to the detection result.

Specifically, in the non-linear characteristic of the amplifier 84, since the level of the output signal is not linear with respect to the level of the input signal (AM-AM conversion), amplitude distortion occurs and the level of the input signal is also increased. On the other hand, since the phase of the output signal is not linear (AM-PM conversion), phase distortion occurs, and the amount of amplitude distortion or the amount of phase distortion that occurs is the level of the signal amplified by the amplifier 84 (input. It changes depending on the signal level and the level of the output signal). Therefore, the control unit 90, based on the detection result by the level detection unit 85, which is a level that reflects the level of the signal amplified by the amplifier 84, adjusts the amount of amplitude distortion generated in the amplifier 84 by the variable attenuator. The variable phase shifter 83 generates the phase distortion of the amount which cancels the phase distortion generated by the amplifier 84 while being generated by the variable phase shifter 83.

As an example, a corrected amplitude distortion characteristic for compensating the amplitude distortion generated in the amplifier 84 (a characteristic opposite to the amplitude distortion) and a corrected phase distortion for compensating the phase distortion generated in the amplifier 84. The characteristic (the characteristic opposite to the phase distortion) is calculated (or measured) in advance, and, for example, the value of the detection result by the level detection unit 85 is associated with the control value related to the amplitude distortion and the control value related to the phase distortion. The stored correction table is stored in the memory of the control unit 90. In this case, the control unit 90 reads out the control value related to the amplitude distortion and the control value related to the phase distortion corresponding to the value of the detection result input from the level detection unit 85 from the correction table, and variably attenuates these two control values. Each of the D / A converters 8 is used as a digital control signal for controlling the phase shifter 82 and a digital control signal for controlling the variable phase shifter 83.
Output to 8 and 89.

Further, the control unit 90 detects the level (for example, power level) of the distortion component (the signal component outside the used band) from the signal input from the distortion extraction means 86, and the detected level is small. It is also possible to update the contents of the above-mentioned correction table so as to be (preferably minimum) (that is, to increase the distortion compensation amount), and thereby it is possible to improve the accuracy of distortion compensation.

In the delay means 81, the control signal corresponding to the timing at which the one distribution signal is processed by the variable attenuator 82 and the variable phase shifter 83 and the level of the other distribution signal is supplied to the control unit. 90 to D / A converter 8
The role of compensating for the time difference (delay time) from the timing input to the variable attenuator 82 or the variable phase shifter 83 via 8, 89 (ideally, the role of matching these two timings) I carry it.

That is, when distortion (amplitude distortion or phase distortion) is generated by the variable attenuator 82 or the variable phase shifter 83 with respect to a certain signal portion of the input signal, the variable attenuator 82 or the variable phase shifter is used. The device 83 needs to be controlled by a control signal corresponding to the level of the signal portion (not other signal portion), and the delay means 81 described above is provided to compensate the timing of such processing. .

[0024]

However, the delay means 81 as shown in FIG. 11, for example, has a problem that it is difficult to finely adjust the delay time. Therefore, for example, If the delay time becomes long, there is a problem that the accuracy of distortion compensation deteriorates.

Here, the above problems will be described in more detail. That is, in the delay means 81, the delay time required for detecting the level of the other distribution signal and D / A converting the digital control signal according to the detection result, as well as the physical wiring path. It is necessary to adjust the delay time caused by this.

As an example, according to the result of studying the amplification device assumed by the inventors of the present invention (note that this is an example and the present invention is not limited to the examples given here), the delay time is adjusted. , 500psec (psec: pico secon
d) = Adjustment on the order of 10 ^-12 seconds is required. If this delay time is adjusted with, for example, a semi-rigid cable, a cable of about 10 cm is prepared and adjusted. However, considering that there is generally about 30 to 40 cm from end to end of the (circuit) substrate of the electronic device, the above 10 cm corresponds to a delay time that is easily generated by wiring.

The delay time as described above also changes depending on, for example, the parasitic capacitance of the substrate and the individual difference of each device used. That is, conventionally, it is necessary to adjust the delay time by adjusting the length of the cable each time a device (for example, the amplifying device shown in FIG. 11) is created. Moreover, this delay time also depends on, for example, the temperature characteristics of each electronic device, and the delay time also changes (delicately) when the temperature changes. Further, this delay time also changes (changes over time) depending on the years of use of the respective devices.

As described above, adjusting the delay time as described above is a very important factor in manufacturing the device, and conventionally, such adjustment of the delay time is performed in a minute unit. As a result, the device becomes expensive even if it takes a long time to perform difficult adjustment.

An example of the result of computer simulation concerning the influence of the above-mentioned delay time adjustment error on the distortion compensation by the predistorter will be shown. Note that this example shows the case where a single carrier in the 5 MHz band is used, and the condition regarding the waveform of the signal to be transmitted is, for example, 3GPP (3rd
Generation Partnership Project) specifications,
The condition is that the number of users is 50 and the roll-off rate of the filter for band limiting the signal is 0.22.

Parameters for examining the level of the distortion component include the third-order intermodulation distortion component (IM3) and the fifth-order intermodulation distortion component (IM5). In this example, In order to simplify the explanation, an adjacent band leakage power ratio (ACPR: Adjacent Channel Power Ratio) representing the level of power leaked to a band adjacent to the used band.
The level of the distortion component is indicated by [dBc].

Specifically, in FIG. 15, the delay time (relative delay time between the system that processes the one distributed signal and the system that processes the other distributed signal) is the correction (compensation) of the amplitude distortion.
Shows an example of the result of a computer simulation concerning the influence on the delay time. The horizontal axis in the figure shows (relative) delay time [× 2 nsec (nsec: nano second
= 10 ⁻⁹ seconds)] (for example, the scale “2” indicates 4 nsec), and the vertical axis indicates the level of the distortion component by the adjacent band leakage power ratio (ACPR) [dBc]. In this simulation, the delay time related to the correction of the phase distortion (for example, by the variable phase shifter 83) is zero.

Further, specifically, FIG. 16 shows an example of the result of a computer simulation regarding the influence of the (relative) delay time on the correction (compensation) of the phase distortion. The horizontal axis is (relative) delay time [× 2nse
c], and the vertical axis indicates the level of the distortion component by the adjacent band leakage power ratio (ACPR) [dBc]. Note that in this simulation (for example, the variable phase shifter 8
The delay time for correction of amplitude distortion (according to No. 3) is assumed to be zero.

As shown in FIG. 15 above, the influence of the delay time on the compensation of the amplitude distortion is relatively small, while as shown in FIG. The influence on the ACPR is relatively large, and in any case, the ACPR deteriorates as the delay time (adjustment error thereof) increases.

Here, the reason why the influence of the delay time is larger in the compensation of the phase distortion than in the compensation of the amplitude distortion is generally the amplitude distortion (AM-AM fluctuation) in the amplifier.
This is because the gain fluctuation amount is small while the phase distortion amount (AM-PM fluctuation) in the amplifier is large. In other words, with respect to the phase distortion in the amplifier, since the fluctuation range is large, even if the delay time is slightly shifted, the compensation accuracy (ACPR in this example) changes greatly.

The numerical values presented as the results of the computer simulations shown in FIG. 15 and FIG. 16 are considered to change depending on, for example, the amplifying device used in the simulation. It is considered that the tendency that is greatly affected by the delay time compared to the amplitude distortion compensation is the same as the result of this simulation.

The present invention has been made in order to solve the above conventional problems, and when compensating for the distortion generated in the amplifier, for example, the delay time as described above is finely adjusted. An object of the present invention is to provide a distortion compensator capable of realizing highly accurate distortion compensation by finely adjusting the timing for controlling the amount of distortion generated with respect to the signal amplified by the amplifier. And

[0037]

In order to achieve the above object, the distortion compensating apparatus according to the present invention compensates the distortion generated in the amplifier as follows. That is, the signal level detecting means detects the level of the signal amplified by the amplifier, with respect to the distortion generating means for generating the distortion of at least one of the amplitude and the phase with respect to the signal amplified by the amplifier, When the distortion amount controlling means controls the amount of distortion generated by the distortion generating means based on the level detected by the signal level detecting means, the distortion is generated so that the control timing adjusting means largely compensates the distortion generated by the amplifier. The timing for controlling the amount of distortion is adjusted by the amount control means.

Therefore, by a new adjusting method of adjusting the timing for controlling the amount of distortion generated with respect to the signal amplified by the amplifier, for example, the timing can be finely adjusted. Thereby, highly accurate distortion compensation can be realized.

Here, various types of amplifiers may be used as the distortion compensation target, for example, an amplifier composed of a plurality of amplifiers. In the present invention, the amplitude distortion and the phase distortion generated in such an amplifier are targets for compensation. Further, as the degree of compensating for the distortion generated in the amplifier, for example, it is preferable to reduce the distortion to zero, but the present invention does not necessarily use such a mode (that is, a mode to reduce to zero). Often,
The point is that it is possible to reduce the distortion.

As a mode in which the distortion generating means generates distortion in the signal amplified by the amplifier, for example, a mode in which distortion is generated in the signal before being amplified by the amplifier may be used. Alternatively, for example, a mode in which distortion is generated in the signal after being amplified by the amplifier may be used.

Further, it is preferable that the distortion generating means has both a function of generating amplitude distortion and a function of generating phase distortion, for example, but a structure having only a function of generating amplitude distortion, for example. Alternatively, a configuration having only the function of generating phase distortion may be used.

As a mode of detecting the level of the signal amplified by the amplifier by the signal level detecting means,
For example, a mode of detecting the level of the signal before being amplified by the amplifier may be used, or a mode of detecting the level of the signal after being amplified by the amplifier may be used. The level to be detected may be various levels, for example, the level of the amplitude of the signal or the power of the signal (normally proportional to the square of the amplitude).
Level can be detected.

In the distortion amount control means, for example, the distortion generation means generates distortion (a distortion having a characteristic opposite to the distortion generated in the amplifier) that cancels the amount of distortion (amplitude distortion or phase distortion) generated in the amplifier. The amount of strain generated by the strain generating means is controlled so that the strain is generated. The amount of distortion (amplitude distortion or phase distortion) generated in the amplifier can be estimated, for example, based on the level detected by the signal level detecting means.

Further, the degree to which the distortion generated in the amplifier is largely compensated by the adjustment by the control timing adjusting means may be various degrees as described above, and specifically, the distortion is not necessarily required. Does not have to be compensated to zero, and distortion compensation may be realized with a precision that is practically effective. Also, adjusting the timing for controlling the amount of distortion by the distortion control means by the control timing adjusting means corresponds to adjusting the delay time as shown in the above-mentioned conventional example, for example.

As the control timing adjusting means,
For example, the timing of controlling the distortion amount by the distortion amount control means is detected (always or always) by always (or periodically) detecting the distortion compensation amount generated in the amplifier and increasing the compensation amount. Although it is preferable to use a configuration that adjusts periodically), for example, a configuration in which the adjustment time is set (fixed) in advance so that the distortion generated in the amplifier is largely compensated may be used.

Further, in a distortion compensating apparatus according to the present invention, as a preferred mode, the distortion generating means generates distortion (corresponding to an analog control signal input from the outside (here, a D / A converting means described later)). It is composed of a circuit (a circuit that changes the amplitude or a circuit that changes the phase) in which the amount of the amplitude distortion or the phase distortion changes. The distortion amount control means uses a D / A conversion means for converting a digital control signal into an analog control signal and outputting the analog control signal at a timing corresponding to a timing signal input from the outside (here, a control timing adjusting means). The digital control signal of the D /
The amount of distortion (amplitude distortion or phase distortion) generated by the distortion generating means is controlled by outputting to the distortion generating means via the A conversion means.

Further, the control timing adjusting means is a clock signal generating means for generating a clock signal of a predetermined cycle, and a timing signal generating means for generating a timing signal whose timing is adjusted from the clock signal generated by the clock signal generating means. Means for controlling the amount of distortion (amplitude distortion or phase distortion) by the distortion amount control means by outputting the timing signal generated by the timing signal generation means to the D / A conversion means. Adjust the timing.

In a preferred embodiment of the distortion compensating apparatus according to the present invention, the distortion amount control means further sets the signal level and the control value (the amount of distortion (amplitude distortion or phase distortion) generated by the distortion generating means). And a control value corresponding to the level detected by the signal level detection means is stored as a digital control signal from the memory means in the D / A. The amount of distortion (amplitude distortion or phase distortion) generated by the distortion generating means is controlled by outputting the distortion to the distortion generating means via the converting means.

Further, in the distortion compensating apparatus according to the present invention, as one aspect, the timing signal generating means amplifies the clock signal generated by the clock signal generating means with a variable gain and the variable amplifier. When the level of the generated signal is equal to or higher than a predetermined threshold, it is configured using a limiter that limits the level to a predetermined level and outputs the level. The output signal from the adjusted limiter is used as the timing signal.

Here, as the predetermined threshold value, various values may be used depending on, for example, the usage status of the apparatus.
Further, the predetermined level may be various levels, and for example, the predetermined threshold value (the same level as the above) can be used.

In another aspect of the distortion compensating apparatus according to the present invention, the timing signal generating means uses a variable threshold value when the level of the clock signal generated by the clock signal generating means is equal to or higher than the threshold value. It is configured by using a comparator that outputs an off signal when the level of the clock signal is less than the threshold while outputting an on signal to the on-off, and the on / off timing is adjusted by adjusting the threshold of the comparator. The output signal from the comparator is used as a timing signal.

Here, as the threshold value, various values may be used depending on, for example, the usage status of the apparatus. Also,
For example, taking a digital signal composed of "1" value and "0" value as an example, the above ON signal corresponds to, for example, a signal of "1" value (or a signal of "0" value). The off signal corresponds to, for example, a signal of "0" value (or a signal of "1" value).

In another aspect of the distortion compensating apparatus according to the present invention, the timing signal generating means uses a variable threshold value when the level of the clock signal generated by the clock signal generating means is equal to or higher than the threshold value. In addition, a limiter that limits and outputs the level to a predetermined level is used, and the output signal from the limiter whose level limit timing is adjusted by adjusting the threshold of the limiter is used as a timing signal.

Here, as the threshold value, various values may be used depending on, for example, the usage status of the apparatus. Also,
The predetermined level may be various levels,
As an example, the predetermined threshold value (the same level as that) can be used.

Further, in the distortion compensating apparatus according to the present invention, as one mode, a flip-flop is used to change the duty of the timing signal (the ratio of the ON state to the signal consisting of the ON state and the OFF state). it can. That is, the timing signal generation means further uses a flip-flop that inputs the output signal with the adjusted timing (the output signal from the limiter or the comparator described above) and outputs the signal with the duty of the signal changed. The output signal from the flip-flop is used as a timing signal.

Further, in another aspect of the distortion compensating apparatus according to the present invention, a flip-flop is used to change the duty of the timing signal, and a selector is used to adjust the timing of the timing signal (in a larger range). be able to. That is, the timing signal generating means further outputs the output signal with the adjusted timing (the output signal from the limiter or the comparator described above).
And a flip-flop that outputs a signal in which the duty of the signal is changed and a signal in which on / off of the signal is inverted (that is, a signal in which the duty of the output signal is changed and on / off is inverted), A selector that selects and outputs one of the two signals output from the flip-flop is used, and the output signal from the selector is used as a timing signal.

In the distortion compensating apparatus according to the present invention, as a preferred mode, the distortion generating means changes the amplitude of the signal amplified by the amplifier to generate an amplitude distortion for the signal, and a variable attenuator. It is configured by connecting in series a variable phase shifter that changes the phase of a signal amplified by an amplifier to generate phase distortion with respect to the signal. Also,
The distortion amount control means controls the amount of amplitude distortion generated by the variable attenuator by controlling the amount of amplitude change by the variable attenuator and the variable shifter by controlling the amount of phase change by the variable phase shifter. Controls the amount of phase distortion generated by the phaser.

The control timing adjusting means distorts the signal (the signal amplified by the amplifier) in accordance with the deviation between the timing when the variable attenuator processes the signal and the timing when the signal is processed by the variable phase shifter. The timing of controlling the amount of amplitude distortion by the amount control means and the timing of controlling the amount of phase distortion by the distortion amount control means are shifted (for example, the time corresponding to the deviation).

Here, means for generating amplitude distortion with respect to the signal amplified by the amplifier (here, variable attenuator)
And the means for generating phase distortion with respect to the signal (here, the variable phase shifter) may be connected in any order, that is, the phase distortion is generated after the amplitude distortion is generated with respect to the signal. May be generated, or amplitude distortion may be generated after phase distortion is generated for the signal.

In a distortion compensating apparatus according to the present invention, as a preferred mode, distortion generated in an amplifier provided in a wireless transmitting apparatus for wirelessly transmitting a signal and amplifying a signal to be transmitted by the wireless transmitting apparatus is generated. Then, the control timing adjusting means causes the amount of distortion to be equal to or less than the reciprocal value of the value obtained by multiplying the band of the signal to be transmitted (for example, the value obtained by multiplying the carrier frequency interval by the number of carriers) by 8 seconds. The control means adjusts the timing for controlling the amount of distortion.

Here, various devices may be used as the radio transmission device, and in a preferred mode, a base station device or a relay station device (relay amplifier) of the mobile radio communication system is used. Further, the wireless transmission device does not necessarily have to have only the wireless transmission function, and may be a device (wireless communication device) having both the wireless transmission function and the wireless reception function. Further, the above-mentioned 8 (times) corresponds to the number of oversamplings, and as shown above, it is preferable that the numerical value is 8 or more.

Here, the error related to the above timing adjustment will be described in detail with reference to the example of the computer simulation result shown in FIG. 15 and FIG. 16 above, taking the case of digital predistortion as an example. Ideally, the optimum distortion compensation (distortion removal) is realized when the (relative) delay time shown in the above-mentioned conventional example becomes zero, but here, in reality (the error occurs) Considering the device, how much the delay time should be reduced to achieve effective distortion compensation will be examined using mathematical expressions and the above-described computer simulation result example.

In general, in predistortion, distortion occurs due to the envelope of the signal (amplified signal) input to the amplifier. In the amplifier, AM-AM conversion and AM-P
A non-linear operation called M conversion is performed by the device, which causes distortion. Here, the AM-AM conversion shows a phenomenon in which the gain of the amplifier is not constant when the level of the input signal is large, and the AM-PM conversion shows that the amplifier gains from the amplifier according to the level of the input signal. The phenomenon that the phase of the output signal (output phase) changes is shown.

Here, the above-mentioned input signal is a signal to be amplified, and the band of the signal to be amplified is expressed by equation (1). The carrier frequency interval is, for example, a frequency interval for detuning adjacent carrier waves in a multicarrier signal (where there are a plurality of carrier wave frequencies). For example, in the current 3GPP specifications, the carrier frequency interval is 5 MHz. The number of carriers means the number of carriers (different frequencies) included in the multicarrier signal. For example, in single carrier transmission, the number of carriers is 1.

[0065]

[Equation 1]

Here, a multicarrier signal of 4 carriers (carrier signal = 1) is assumed as an example, and in this case, the bandwidth of the signal to be amplified is 20 MHz (5 MHz × 4 carriers). With digital predistortion,
Predistortion is executed according to the variation of the envelope of the input signal. According to the generally known sampling theorem, in order to accurately follow the envelope variation of the input signal, it is necessary to perform sampling of at least twice the signal bandwidth. That is, the operation cycle Ts [sec] of the digital circuit required in this case is represented by Expression 2. A value of 2 or more is set as the oversampling number.

[0067]

[Equation 2]

As an example, when the amplified signal band is 5 MHz and quadruple sampling is performed (oversampling number = 4), Ts = 50 (= 1/2)
0 MHz) [nsec]. In this case, the oversampling follows (samples) at a speed four times as fast as the envelope that changes at a speed of 5 MHz.
It means that.

In this case, the maximum value of the relative delay error (delay time) is 25.0 nsec (50 nse).
half the value of c). That is, in a digital system, since it operates by a clock, on / off of a clock signal of 50 nsec cycle, which is composed of an on state (for example, “1” value) and an off state (for example, “0” value), is inverted, By selectively using the normal clock signal (clock signal that is not inverted) or the inverted clock signal, it is possible to adjust the delay time in units of 25.0 nsec, which is a half value of the period.

Next, an examination will be made based on the examples of the results of the computer simulation shown in FIG. 15 and FIG. As described above, AM-PM conversion is more efficient than AM-
Since it is more susceptible to the delay time than the AM conversion, here, the examination will be made based on the result example of the computer simulation regarding the AM-PM conversion shown in FIG.

First, consider the case where the ACPR required by the system is, for example, -65 dBc (assuming that the standard is -60 dBc and there is a margin of 5 dB). In this case, referring to FIG. 16, the allowable relative delay error is approximately −4 nsec to +2 nsec with reference to the ideal point (the point where the relative delay time is zero). That is, the allowable fluctuation range is 6 nsec, and if the delay time is shorter than this, no problem will occur.

Here, as an example, when considering a system in which a four-time sampling is performed using a single carrier, a delay time T1 that can be adjusted by a clock signal (only for normal rotation) is represented by Expression 3, and an inverted clock is used. The adjustable delay time T2 when the signal is also used is shown in Equation 4.

[0073]

[Equation 3]

[0074]

[Equation 4]

Adjustable delay time T2 shown in equation 4 above
Considering that, since the time unit to be adjusted to realize the ACPR of −65 dBc is within 6 nsec, it is adjusted by the above digital clock, and
Furthermore, it is necessary to adjust the delay time with a precision of 8 times.

In summary, the time unit T3 to be adjusted in order to realize the ACPR of -65 dBc.
Is shown in Equation 5. It should be noted that n indicates the value of the oversampling number (4 in this example), and 8 indicates the required accuracy acquired by the computer simulation.

[0077]

[Equation 5]

Also, consider a case where the ACPR required by the system is, for example, about -60 dBc. in this case,
Referring to FIG. 16 above, the allowable relative delay error is
Based on the ideal point (the point where the relative delay time is zero),
It is about −8 nsec to +6 nsec. That is, the allowable variation range is 14 nsec, which is 14 nsec.
The delay time may be adjusted within the error.

Similar to the above, ACP of about -60 dBc
To realize R, the time unit T4 to be adjusted is Equation 6
Indicated by. In this equation 6, the number of oversampling is 4
If the clock inversion is used and the delay time is adjusted with double precision, the required ACPR
Shows that can be achieved.

[0080]

[Equation 6]

Furthermore, the ACP required by the system
Consider the case where R is -55 dBc, for example. here,
ACPR = −55 dBc corresponds to the allowable next adjacent channel leakage power ratio (which represents the allowable leakage power to the next adjacent channel) in the 3GPP standard. The next adjacent channel indicates a frequency band in which the frequency interval is further shifted by one carrier from the adjacent carrier.

As a specific example, when the frequency of the transmission signal carrier is 2.1125 GHz and the carrier frequency interval is 5 MHz (= 0.005 GHz), the frequency of the adjacent channel is 2.1175 GHz (or,
The frequency of the next adjacent channel is 2.1225 GHz (or 2.1025 GHz).
z). That is, the carrier frequency shifts (5 MHz) from the reference carrier to the adjacent channel and from the adjacent channel to the next adjacent channel.

Generally, in actual pre-distortion, a distortion situation different from the distortion occurrence situation of a pure amplifier occurs. That is, in the distortion caused only by the amplifier, the amount of distortion is attenuated from the reference channel to the adjacent channel and the next adjacent channel as the frequency interval from the reference channel increases. However, in the predistortion, for example, the amount of distortion in the adjacent channel and the amount of distortion in the next adjacent channel become substantially the same amount.

Therefore, even if the leakage power standard of the adjacent channel is achieved, the leakage power standard of the next adjacent channel is not always achieved. With this in mind, here is the standard for the next adjacent channel leakage power −
Consider 55 dBc as an example.

In this case, referring to FIG. 16, the allowable relative delay error is about -13 nsec to +12 with reference to the ideal point (the point where the relative delay time is zero).
It becomes nsec. That is, the allowable fluctuation range is 25n
sec, and the delay time may be adjusted with an error within 25 nsec.

Similar to the above, ACP of about -55 dBc
To realize R, the time unit T5 to be adjusted is Equation 7
Indicated by. In this equation 7, the number of oversampling is 4
In the above case, it is shown that the necessary ACPR can be achieved (by adjusting the delay time with a precision of 1) by using the clock inversion.

[0087]

[Equation 7]

As described above, the required strain amount (here, A
In order to obtain CPR, it is preferable to adjust the delay time with an error of at least 1 / (signal bandwidth × oversampling number), and further, in digital signal processing,
Since all the operation timings are controlled by the clock, it is possible to adjust the delay time of a half clock by inverting and using the clock. In addition, in FIG.
According to the result example of the computer simulation shown in (1), as a preferable aspect, a value of 8 or more should be set as the oversampling number to obtain a design margin for reducing the distortion amount to a required value.

The configuration example of the distortion compensating apparatus according to the present invention will be shown below. (1) In a distortion compensating apparatus for compensating for distortion generated in an amplifier, distortion generating means for generating distortion of at least one of amplitude and phase with respect to a signal amplified by the amplifier, and a signal amplified by the amplifier Signal level detecting means for detecting the level of the signal, distortion amount control means for controlling the amount of distortion generated by the distortion generating means based on the level detected by the signal level detecting means, and distortion generated by the amplifier is largely compensated. As described above, the distortion compensating device is provided with: a control timing adjusting unit that adjusts the timing of controlling the amount of distortion by the distortion amount controlling unit.

(2) In the distortion compensating apparatus described in (1), the distortion generating means is composed of a circuit in which the amount of distortion generated changes according to an analog control signal input from the outside. The control means is configured by using a D / A conversion means that converts a digital control signal into an analog control signal and outputs the analog control signal at a timing according to a timing signal input from the outside. By controlling the amount of distortion generated by the distortion generating means by outputting to the distortion generating means via the converting means, the control timing adjusting means includes a clock signal generating means for generating a clock signal of a predetermined cycle, and the clock signal generating means. And a timing signal generating means for generating a timing signal whose timing is adjusted from a clock signal generated by the signal generating means. Cage, by outputting a timing signal generated by the timing signal generating means to the D / A converting means, the distortion compensating apparatus characterized by adjusting the timing to control the amount of distortion by the distortion amount control means.

(3) In the distortion compensating apparatus described in (2), the distortion amount control means is further configured by using memory means for storing the signal level and the control value in association with each other, and the signal level A control value corresponding to the level detected by the detection means is output from the memory means as a digital control signal to the distortion generation means via the D / A conversion means to control the amount of distortion generated by the distortion generation means. Distortion compensation device characterized by the above.

(4) In the distortion compensating apparatus according to (2) or (3), the timing signal generating means includes a variable amplifier that amplifies the clock signal generated by the clock signal generating means with a variable gain, and the variable amplifier. When the level of the signal amplified by the amplifier is equal to or higher than a predetermined threshold value, it is configured by using a limiter that limits the level to a predetermined level and outputs the level. By adjusting the gain of the variable amplifier, the level is limited. Distortion compensating device, wherein an output signal from a limiter whose timing is adjusted is used as a timing signal.

(5) In the distortion compensating apparatus according to (2) or (3), the timing signal generating means uses a variable threshold value and the level of the clock signal generated by the clock signal generating means is equal to or higher than the threshold value. It is configured by using a comparator that outputs an ON signal in some cases, and outputs an OFF signal when the level of the clock signal is less than the threshold value.The ON / OFF timing is adjusted by adjusting the threshold value of the comparator. A distortion compensating device, wherein the adjusted output signal from the comparator is used as a timing signal.

(6) In the distortion compensating apparatus according to (2) or (3), the timing signal generating means uses a variable threshold value and the level of the clock signal generated by the clock signal generating means is equal to or higher than the threshold value. In some cases, it is configured using a limiter that limits and outputs the level to a predetermined level, and the output signal from the limiter that adjusts the timing of the level limit by adjusting the threshold of the limiter is used as a timing signal. Distortion compensating device characterized by.

(7) In the distortion compensating apparatus according to any one of (4) to (6), the timing signal generating means further inputs the output signal with the adjusted timing, and sets the duty of the signal. A distortion compensating device comprising a flip-flop that outputs a changed signal, wherein an output signal from the flip-flop is used as a timing signal.

(8) In the distortion compensating apparatus according to any one of (4) to (6), the timing signal generating means further inputs the output signal with the adjusted timing, and sets the duty of the signal. A flip-flop that outputs a changed signal and a signal obtained by inverting the ON / OFF state of the signal, and a selector that selects and outputs one of the two signals output from the flip-flop are configured. A distortion compensating device characterized in that an output signal from a selector is used as a timing signal.

(9) In the distortion compensating apparatus according to any one of (1) to (8), the distortion generating means changes the amplitude of the signal amplified by the amplifier to perform amplitude distortion on the signal. And a variable phase shifter that changes the phase of the signal amplified by the amplifier to generate phase distortion with respect to the signal, which are connected in series. Is generated by the variable phase shifter by controlling the amount of amplitude distortion generated by the variable attenuator by controlling the amount of amplitude change by the variable attenuator. The control timing adjusting means controls the amount of phase distortion caused by the distortion amount controlling means according to the difference between the timing when the signal is processed by the variable attenuator and the timing when the signal is processed by the variable phase shifter. Distortion compensating apparatus characterized by shifting the timing of controlling the amount of phase distortion by the timing and the strain amount control means for controlling the amount of width distortion.

(10) In the distortion compensating apparatus according to any one of (1) to (9), a signal which is provided in a radio transmitting apparatus for transmitting a signal by radio and is a transmission target of the radio transmitting apparatus. Compensating for the distortion generated by the amplifier that amplifies the signal, the control timing adjusting means uses the distortion amount control means to measure the A distortion compensator characterized by adjusting the timing for controlling the amount.

(11) In a distortion compensating apparatus for compensating for distortion generated in an amplifier, distortion generating means for generating distortion of at least one of amplitude and phase with respect to a signal amplified by the amplifier, and amplification by the amplifier The signal level detecting means for detecting the level of the generated signal, the distortion amount controlling means for controlling the amount of distortion generated by the distortion generating means based on the level detected by the signal level detecting means, and the distortion generated by the amplifier. In order to be compensated, the distortion amount control is performed in order to adjust the delay time between the timing at which the distortion is generated in the signal by the distortion generation unit and the timing at which the distortion amount control unit performs the control based on the level of the signal. And a control timing adjusting means for adjusting the timing for controlling the amount of distortion by the means.

[0100]

BEST MODE FOR CARRYING OUT THE INVENTION A (distortion compensation) amplifying device according to a first embodiment of the present invention will be described with reference to the drawings. The amplifying apparatus of the present example includes a predistorter which is an example of the distortion compensating apparatus according to the present invention, and the distortion generated in the amplifier by using the predistorter type distortion compensating method by the predistorter. To compensate.

FIG. 1 shows an example of the circuit configuration of an amplifying device (amplifier with a predistortion function) equipped with the predistorter of this example. This amplification device is provided, for example, in a transmitter of a base station device or a relay station device of a mobile radio communication system, inputs a signal to be transmitted (transmission signal) from a transmitter, and outputs the signal by an amplifier. Amplify and output to the antenna.

As shown in FIG. 1, the amplifying apparatus of this embodiment has a delay means 1 for delaying a transmission signal until preparation for predistortion, which will be described later, and a correction for predistortion of the transmission signal. Variable attenuator (attenuator) 2 that gives an AM-AM characteristic, variable phase shifter 3 that gives a corrected AM-PM characteristic for predistortion to a transmission signal, and amplifier that amplifies the transmission signal to a predetermined transmission level. 4, a level detector 5 for detecting the (envelope) level of the transmission signal, a distortion extractor 6 for extracting a distortion component signal from the output signal of the amplifier 4, and a digital signal output from the controller 12. Generated by two D / A converters 7 and 8 for converting into analog signals, a clock source 9 for supplying a clock to each digital device, and a clock source 9. Two phase adjusting means 10, 11 for generating a clock of a different phase of the clock to, adaptive control of the predistortion and phase adjusting means 10, 11
And a control unit 12 that controls the above.

An example of the operation of the amplifying device of this example will be shown below. First, a signal to be transmitted, which is output from the transmitter, is input (to the amplification device of this example), the signal is divided into two, and one of the divided signals is input to the delay means 1, while the other is input. The distribution signal of is input to the level detection unit 5.

The delay means 1 delays the input signal (one distribution signal) and outputs it to the variable attenuator 2. Here, the delay means 1 is, for example, a delay line that delays a signal or a band pass filter (BPF: Band Pass Filter).
And the like. The variable attenuator 2 changes the amplitude of the signal input from the delay means 1 into a D / A which will be described later.
By changing (attenuating) according to a control signal (by an analog voltage) input from the converter 7, an amount of amplitude distortion corresponding to the control signal is generated with respect to the input signal, and the signal (amplitude distortion) is generated. Is output to the variable phase shifter 3.

The variable phase shifter 3 changes the phase of the signal input from the variable attenuator 2 according to a control signal (by analog voltage) input from a D / A converter 8 described later. Generates the amount of phase distortion corresponding to the control signal to the input signal, and the signal (including phase distortion)
Is output to the amplifier 4. In this example, the predistorter is composed of the variable attenuator 2 and the variable phase shifter 3 connected in series, and the control systems 1, 5 to 12 for controlling them.

The amplifier 4 is composed of, for example, a (large) power amplifier, amplifies the signal input from the variable phase shifter 3 to a desired (power) level, and outputs the amplified signal (the amplifier device of this example). From) to the antenna. Here, in the amplifier 4 of this example, when the level of the signal input from the variable phase shifter 3 is large, amplitude distortion and phase distortion occur. In the present example, the distortion (amplitude distortion and phase distortion) having characteristics opposite to the distortion generated in the amplifier 4 is generated by the predistorter (variable attenuator 2 and variable phase shifter 3), and Compensates for distortion components.

The level detector 5 includes, for example, an envelope detector that detects the envelope of a signal using a diode, a low-pass filter (LPF) that extracts only predetermined frequency components of the detected envelope, The extracted envelope component is A
It is composed of an A / D converter for D / D conversion. Then, the level detection unit 5 detects the level (for example, the power level) of the input signal (the other distribution signal) by using such a configuration, and outputs the detection result as a digital value (digitized level information). ) To the control unit 12.

The reason why the level of the input signal is detected by the level detector 5 is that the output level fluctuation generated in the amplifier 4 which changes according to the level of the signal input to the amplifier 4 in the predistortion of this example. This is because it is necessary to detect the level of the transmission signal input to the amplifier 4 (in this example, it is indirectly detected).

The distortion extracting means 6 is composed of, for example, a directional coupler, extracts the distortion (for example, part of the amplified signal) contained in the amplified signal output from the amplifier 4, and outputs it to the control unit 12. To do.

The D / A converter 7 analog-controls the digital control signal input from the control unit 12 described later on the basis of the timing corresponding to the clock signal (timing signal) input from the phase adjustment unit 10 described later. The signal is converted into a signal and output to the variable attenuator 2. This control signal is
The amount of change in amplitude in the variable attenuator 2 (that is, the amount of amplitude distortion to be generated) is controlled.

The D / A converter 8 analog-controls the digital control signal input from the control unit 12 described later on the basis of the timing corresponding to the clock signal (timing signal) input from the phase adjustment unit 11 described later. The signal is converted into a signal and output to the variable phase shifter 3. This control signal is
The phase shift amount in the variable phase shifter 3 (that is, the amount of generated phase distortion) is controlled.

The clock source 9 generates a clock signal of a predetermined cycle and digitally processes the clock signal like the level detecting section 5 and two phase adjusting means 10 and 11 (to be described later). , In this example, two D / A
It outputs and supplies it to converters 7 and 8).

Under the control of the control section 12, the phase adjusting means 10 generates a clock signal (timing-shifted signal) in which the phase of the clock signal input from the clock source 9 is shifted, and generates the clock signal (timing signal). )
Is output to the D / A converter 7. Under the control of the control unit 12, the phase adjusting unit 11 generates a clock signal (timing-shifted signal) in which the phase of the clock signal input from the clock source 9 is shifted, and the clock signal (timing signal) is D Output to the / A converter 8.

The control unit 12 is composed of, for example, a digital signal processor (DSP). Then, the control unit 12
Is a D / A converter based on a detection result (detected level) input from the level detection unit 5 and a digital control signal for realizing an amplitude change amount according to the detection result by the variable attenuator 2. Variable phase shifter 3
Thus, a digital control signal for realizing the phase change amount according to the detection result is output to the D / A converter 8.

Specifically, in the nonlinear characteristic of the amplifier 4,
Amplitude distortion occurs because the level of the output signal is not linear with respect to the level of the input signal (AM-AM conversion), and the phase of the output signal is not linear with respect to the level of the input signal (AM-PM (Conversion) causes phase distortion,
The amount of amplitude distortion and the amount of phase distortion that occur vary depending on the level of the signal amplified by the amplifier 4. Therefore, the control unit 12 adjusts the amount of amplitude distortion that cancels the amplitude distortion generated in the amplifier 4 based on the detection result of the level detection unit 5 that is a level that reflects the level of the signal amplified by the amplifier 4. 2 and an amplifier 4
The variable phase shifter 3 controls the amount of phase distortion that cancels the phase distortion generated in
Caused by.

As an example, a corrected amplitude distortion characteristic for compensating the amplitude distortion generated in the amplifier 4 (a characteristic opposite to the amplitude distortion) or a corrected phase distortion for compensating the phase distortion generated in the amplifier 4 is used. The characteristic (the characteristic opposite to the phase distortion) is calculated (or measured) in advance, and for example, the level detection unit 5
A correction table in which a control value related to amplitude distortion and a control value related to phase distortion are stored in association with the value of the detection result according to is stored in the memory of the control unit 12. in this case,
The control unit 12 reads from the correction table a control value relating to amplitude distortion and a control value relating to phase distortion corresponding to the value of the detection result (digitized level information) input from the level detecting unit 5, and controls these two controls. The values are output to the respective D / A converters 7 and 8 as a digital control signal for controlling the variable attenuator 2 and a digital control signal for controlling the variable phase shifter 3.

Further, the control unit 12 detects the level (for example, power level) of the distortion component (the signal component outside the used band) from the signal input from the distortion extraction means 6, and the detected level is small. It is also possible to update the contents of the above-mentioned correction table so as to be (preferably minimum) (that is, to increase the distortion compensation amount), and thereby it is possible to improve the accuracy of distortion compensation. Further, since the values to be corrected (contents of the correction table) can be adaptively updated in this way, it is possible to deal with minute delay time errors caused by changes in temperature characteristics or changes over time. You can also provide distortion.

The control section 12 controls the phase adjustment (of the clock signal) performed by the phase adjusting means 10 and 11 by outputting a control signal to the phase adjusting means 10 and 11 described above. To do. In this case, the control unit 12 of the present example controls the phase adjustment so that the level of the distortion component detected from the signal input from the distortion extracting unit 6 becomes small (preferably minimum).

Now, the above-mentioned two phase adjusting means 10 and 11 which are characteristic components of the present invention will be described in detail. That is, as shown in the above-mentioned conventional example,
Also in this example, the transmission signal is delayed by the delay unit 1 during the predistortion preparation time in the digital domain. Ideally, for any signal portion that constitutes the transmission signal, the timing at which the signal portion is input to the variable attenuator 2 or the variable phase shifter 3 via the delay means 1, and
It is required that the control unit 12 controls the variable attenuator 2 and the variable phase shifter 3 based on the level of the signal portion at the same time. In this example, since the error of the delay time by the delay unit 1 is relatively large, such (fine) timing adjustment is performed by the two phase adjustment units 1.
It is performed by 0 and 11.

Specifically, a clock is supplied to an A / D converter and a D / A converter, which are generally digital circuits and analog interfaces. As an example, 80MH
If the clock signal of z is distributed and supplied from the clock source 9 to each block, the cycle of the clock signal is 12.5 nsec. Therefore, only in the unit of 12.5 nsec (for the normal clock signal only). Unable to adjust (relative) delay time. Further, if an inverted clock signal is generated and used by using an inverter, for example, control can be performed in 6.25 (= 12.5 / 2) nsec unit, but in any case, delay in 6.25 nsec unit is required. Time adjustment is the limit.

However, as described in the above problem,
As an example, according to a result of studying an amplification device assumed by the inventors of the present invention (note that this is an example and the present invention is not limited to the example given here), adjustment of delay time in actual predistortion is performed. As 500 pse
It is necessary to adjust the delay time in units of about c.

Therefore, the amplifying apparatus of this example is provided with two phase adjusting means 10 and 11, and each of the phase adjusting means 10 generates a clock signal having a phase independent of the clock signal from the clock source 9. To do. That is, in this example, the clock signal output from the clock source 9 is input to the phase adjusting means 10 and 11, and the phase adjusting means 10 and
At 11, the phase of the clock signal is finely adjusted and supplied to the D / A converters 7 and 8.

In this example, with such a configuration, even if the delay time by the delay means 1 is too short or too long, for example, the phase adjustment means 10 can be controlled by the control signal from the controller 12. By controlling 11, the delay time (the control timing of the variable attenuator 2 and the variable phase shifter 3) can be relatively finely corrected.

As a result of this, the predistortion processing can be correctly executed at the timing at which the predistortion processing should be carried out for each signal portion forming the transmission signal, whereby the residual signal remains in the output signal of the amplifier 4. It is possible to sufficiently reduce the out-of-band leakage power included in the above. Further, in the past, for example, an expert may finely adjust the above-mentioned delay time for about half a day, but in the amplification device of this example, such fine adjustment (for example, the control unit 12) is performed. Automatically).

In this example, the preferred embodiment is 2
The processing timing is adjusted independently for each of the D / A converters 7 and 8. On the other hand, for example, in the configuration in which the timing adjustment is performed at the time of A / D conversion that is an input stage of the digital circuit (for example, when the detection result is output from the level detection unit 5), two D / A converters 7 ,
Although it is possible to give timing suitable for any of the eight, it is not possible to give suitable (different) timing to each of the two D / A converters 7 and 8.

That is, in the configuration of this example, the delay time is adjusted (simultaneously) for each of the two D / A converters 7 and 8 provided immediately before the variable attenuator 2 and the variable phase shifter 3. Therefore, it is possible to adjust the delay time due to the line difference in the digital circuit, thereby absorbing and eliminating the subtle (minute) time difference due to the paths to the D / A converters 7 and 8. It is possible.

Further, in the configuration of this example, there is a deviation (offset) between the timing when the signal output from the delay means 1 is processed by the variable attenuator 2 and the timing when the signal is processed by the variable phase shifter 3. Since there is time, it is preferable that the phase of the clock signal (timing signal) given to each D / A converter 7 and 8 is shifted by an amount corresponding to the shift.

Next, the phase adjusting means 10 and 11 described above are provided.
Specific circuit configuration examples and operation examples of are shown. In this example, the circuit configurations of the respective phase adjusting means 10 and 11 have the same configuration, and therefore one of the phase adjusting means 10 will be represented below as an example of these circuit configurations.

FIG. 2 shows an example of the circuit configuration of the phase adjusting means 10. The phase adjusting means 10 is constructed by connecting a variable (gain) amplifier 21 and a limiter 22 in series. The variable amplifier 21 has a characteristic that the gain changes according to a control signal (for example, a control voltage) input from the control unit 12, and a clock signal input from the clock source 9 is controlled by the control unit 12. It amplifies with a controlled gain and outputs the amplified signal to the limiter 22.

The limiter 22 sets all levels of the signal to the same level (for example, a level corresponding to the threshold value) when a signal having a level equal to or higher than a predetermined threshold value (fixedly set) is input. It has a characteristic of outputting, limits the level of the amplified signal input from the variable amplifier 21 by the characteristic, and outputs the limited amplified signal by D
It outputs to the / A converter 7 (D / A converter 8 for the phase adjusting means 11).

An operation example of the circuit shown in FIG. 2 will be described with reference to FIG. In the graphs of FIGS. 7A to 7D, the horizontal axis represents the time and the vertical axis represents the voltage level of the signal. Specifically, FIG. 1A shows an example of the waveform of the clock signal output from the clock source 9. Further, FIG. 2B shows an example of the waveform of the clock signal amplified by the variable amplifier 21.

Further, in FIG. 13C, an example of the waveform of the signal after the amplified clock signal is processed by the limiter 22 is shown by a solid line, and for convenience of explanation,
An example of the waveform of the amplified clock signal is shown by a dotted line, and an example of the threshold value set in the limiter 22 is shown. As shown in FIG. 6D, all the input signals having a level equal to or higher than the threshold value of the limiter 22 are clipped to a predetermined level (ON state), so that the limiter 22
Outputs a rectangular wave signal.

Further, in FIG. 12D, the amplified clock signal is limited by the limiter 22 when the gain of the variable amplifier 21 is controlled to be lower than that in the case shown in FIG.
An example of the waveform of the signal after being processed by is shown by a solid line, and for convenience of explanation, an example of the waveform of the amplified clock signal is shown by a dotted line, and the threshold value set in the limiter 22 is shown. An example (the same value as in the case of FIG. 7C) is shown.

As shown in FIG. 10D, when the gain of the variable amplifier 21 is relatively low, the level of the sine wave input to the limiter 22 becomes relatively high to some extent. Is clipped. As described above, when the gain of the variable amplifier 21 is changed, the width of the time when the signal output from the limiter 22 is in the ON state changes according to the gain.

For example, as shown by broken lines in FIGS. 13C and 13D, the time when the level of the amplified signal is clipped by the limiter 22 is compared for two cases where the gain of the variable amplifier 21 is different. Then, the phase of the signal output from the limiter 22 shifts according to the gain.

In this example, the control unit 12 controls the variable amplifier 2
The gain of 1 (that is, the voltage level of the amplified clock signal) is controlled to generate a clock signal (timing signal) whose phase is changed, and the signal is used as the input clock of the D / A converter 7. The D / A
It is possible to (finely) adjust the operation timing of the converter 7. That is, since the D / A converter 7 operates at the rising (or falling) timing of the input clock signal, the timing at which the (analog) control signal is output from the D / A converter 7 is changed. It is possible to adjust it by subtly changing it.

As described above, in the configuration of the phase adjusting means 10 and 11 as shown in FIG. 2, the control unit 12 controls the gain of the variable amplifier 21 so that the clock signals (timing) having various phases (timing Signal), and the delay time can be finely adjusted.

Further, FIG. 4 shows another example of the circuit configuration of the phase adjusting means 10.
Is configured by connecting an amplifier 31 and a comparator (comparator) 32 in series. The amplifier 31 has the characteristic that the (voltage) level of the output signal is constant (for example, the gain of amplification is constant), amplifies the clock signal input from the clock source 9, and outputs the amplified signal. Output to the comparator 32.

It should be noted that the amplifier 3 having the above characteristics
1 is generally called a buffer, and such an amplifier 31 has such a condition that the phase adjusting means 10 is arranged physically close to the clock source 9 and an input signal to the phase adjusting means 10 (main In the example, when the condition that the clock signal from the clock source 9) does not attenuate is satisfied, it can be omitted from the circuit configuration.

The comparator 32 inputs the amplified signal output from the amplifier 31 and the control signal output from the control unit 12, compares the levels of these two signals, and compares the comparison result. Is a "1" value (for example, Hig
It is output to the D / A converter 7 as a signal composed of an "h level" and a "0" value (for example, Low level).

Specifically, in this example, the (voltage) level of the control signal input from the control unit 12 to the comparator 32 is used as the threshold value in the comparator 32, and the comparator 32 uses the amplifier. When the (voltage) level of the signal input from 31 is equal to or higher than the threshold value, an ON signal (in this example, a signal having a “1” value) is output, and when the level is lower than the threshold value, an OFF signal is output. (In this example, "0"
Value signal) is output.

Further, FIG. 5 shows another example of the circuit configuration of the phase adjusting means 10.
Is configured by connecting an amplifier 41 and a limiter 42 in series. The amplifier 41 is, for example, (voltage) of the output signal.
It has a characteristic that the level is constant (for example, the gain of amplification is constant), amplifies the clock signal input from the clock source 9, and outputs the amplified signal to the limiter 42. It should be noted that such an amplifier 41 can be omitted from the circuit configuration as long as a predetermined condition is satisfied, as described with respect to the circuit configuration shown in FIG.

The limiter 42 has the characteristic that the threshold value changes according to the control signal input from the control section 12, and when a signal having a level equal to or higher than the threshold value is input, the level of the signal is the same. It has a characteristic of outputting as a level (for example, a level corresponding to the threshold value), limits the level of the amplified signal input from the amplifier 41 by the characteristic, and outputs the limited amplified signal to the D / A converter 7. Output.

Specifically, in this example, the threshold value of the limiter 42 is changed by the control (voltage) from the control unit 12, and the limiter 42 changes the (voltage) level of the signal input from the amplifier 41. When it is equal to or more than the threshold value, the level is limited and an ON signal of a predetermined (voltage) level (in this example, a signal of “1” value) is output.

Referring to FIG. 6, an operation example of the circuits shown in FIGS. 4 and 5 will be shown. Here, since the operation of the circuit shown in FIG. 4 and the operation of the circuit shown in FIG. 5 have the same characteristics, operation examples of these two circuits will be collectively described here. In addition, in the same figure (a) -the figure (g), the horizontal direction has shown the time and the vertical direction has shown the voltage level of a signal. Further, FIGS. 6F and 6G will be described later.

Specifically, FIG. 9A shows a clock source 9
3 shows an example of the waveform of the clock signal output from the amplifier and input to the amplifier (amplifier 31 or amplifier 41). Further, in FIGS. 2B and 2D, an amplifier (amplifier 31
7 shows an example of the waveform of the clock signal amplified by the amplifier (41) or the amplifier 41) (for example, with some gain fixedly set).

Further, in FIGS. 7C and 7E, when the threshold value (in the comparator 32 and the limiter 42) is changed (in FIGS. 7C and 7D). An example of the waveform of the signal output from the phase adjusting means 10 (comparator 32 or limiter 42) to the D / A converter 7 is shown by a solid line, and for convenience of explanation, an amplifier (amplifier 31 or amplifier 41) is shown. ) Shows an example of the waveform of the clock signal amplified by), and shows an example of the threshold value set (in the comparator 31 and the limiter 41) with a dotted line.

As shown in FIGS. 4 (c) and 4 (e), the phase adjusting means 1 as shown in FIGS. 4 and 5 above.
In the configurations of 0 and 11, by controlling the threshold value of the comparator 32 and the threshold value of the limiter 42 from the control unit 12, it is possible to generate clock signals (timing signals) having various phases. Can be finely adjusted. In other words, in this example, the value (threshold value) of the reference voltage to the comparator 32 in the subsequent stage or the threshold value of the limiter 42 in the subsequent stage is changed instead of changing the gain in the amplifier (amplifier 31 or amplifier 41). Thus, the phase of the clock signal can be changed.

Further, FIG. 7 shows another example of the circuit configuration of the phase adjusting means 10.
Is configured by connecting a variable (gain) amplifier 51, a limiter 52, a flip-flop (D-FF) 53, and a selector 54 in series.

In such a circuit structure, the flip-flop 53 realizes control of the duty of the clock signal (timing signal). That is, as described above, the D / A converters 7 and 8 operate at the rising and falling edges of the input clock signal (timing signal), but in the actual D / A converter, for example, the input clock In some high level areas and low level areas, the minimum required time (duty) is defined. In this case, for example, FIG. 2, FIG. 4 or FIG.
In the circuit configuration as shown in (1), the duty may fluctuate, and thus the phase that can be changed by the phase adjusting unit 10 may be limited. Therefore, in this configuration, the duty is shaped by the flip-flop 53 as described above.

The function and operation of the variable amplifier 51 are similar to those of the variable amplifier 21 shown in FIG. 2, for example, and the variable amplifier 51 controls the clock signal input from the clock source 9 by the control unit 12. The amplified signal is amplified by the gain and the amplified signal is output to the limiter 52.

The function and operation of the limiter 52 are similar to the function and operation of the limiter 22 shown in FIG. 2, for example. The limiter 52 limits the level of the amplified signal input from the variable amplifier 51 with a predetermined threshold value. , And outputs the limited amplified signal to the flip-flop 53.

The flip-flop 53 has two input ends and two output ends. The signal output from the limiter 52 is input from one input end and one output end (inverted signal output end). ) Is input from the other input end, the inversion signal is output from the one output end to the other input end and the selector 54, and the normal rotation signal is output from the other output end to the selector 54. Is output.

Here, the above-mentioned normal signal is, for example, a signal in which the duty of the signal input from the limiter 52 to the flip-flop 53 is changed by the flip-flop 53, and the above-mentioned inverted signal is further The signal is a signal obtained by inverting the on / off of the signal. Also,
The flip-flop 53 is generally used to set the duty to 50%, and in the configuration like this example, as shown in FIG. 8 described later, the duty of the clock signal (timing signal) is set to 50%. can do.

The selector 54 has two input ends and one output end, and selectively selects a signal (only) input from one of the input ends according to the control signal from the control section 12. It has a function of switching the output signal so that the output signal is output from the output terminal. Then, the selector 54
The inverted signal output from the one output end of the flip-flop 53 is input from one input end, and the non-inverted signal output from the other output end of the flip-flop 53 is input from the other input end. Under control of the control unit 12, either the inversion signal or the normal rotation signal is output to the D / A converter 7.

Referring to FIG. 8, an operation example of the circuit shown in FIG. 7 is shown. In addition, in the same figure (a) -the same figure (g),
The horizontal direction shows the time, and the vertical direction shows the voltage level of the signal. Specifically, FIG. 1A shows an example of the waveform of the clock signal output from the clock source 9 and input to the variable amplifier 51. In addition, in the same figure (b) and the same figure (d), an example of the waveform of the clock signal amplified by the variable amplifier 51 using different gains (in the figure (b) and the figure (d)) is shown. It is shown.

Further, in FIGS. 7C and 7E, corresponding to FIGS. 8B and 8D, respectively, the amplified clock signal after being processed by the limiter 52 is shown. An example of the waveform of the signal is shown by a solid line, and for convenience of explanation, an example of the waveform of the amplified clock signal is shown by a dotted line, and an example of the threshold value set in the limiter 52 is shown by a dotted line. There is.

When the gain of the variable amplifier 51 is changed as shown in FIGS. 7C and 7E, the phase of the generated clock signal (timing signal) changes, and at the same time, the clock signal The duty changes.

Therefore, in this example, the flip-flop 53
Thus, the duty of the clock signal (timing signal) is set to 50%. Specifically, (f) of the figure shows an example of the waveform of the signal output from the limiter 52. At this stage, the duty of the signal is the (voltage) level of the signal output from the variable amplifier 51. It takes various values depending on.

In FIG. 16G, an example of the waveform of the signal output from the flip-flop 53 as, for example, a normal signal is shown by a solid line, and for convenience of explanation, the one input of the flip-flop 53 is input. An example of the waveform of the signal input to the end (shown in FIG. 6 (f)) is shown by a dotted line. As shown in FIG. 6G, when the signal is output from the flip-flop 53, the duty of the signal is 50%. In other words, the flip-flop 53 outputs a signal that repeats on / off at each rising edge of the signal input from the limiter 52, and the duty of such a signal is 50%.

Further, in this example, the phase adjusting means 10, 11 are used.
Although the phase of the clock signal (timing signal) output from is changed by changing the rising time (or the falling time), the phase is 180 degrees in the circuit configuration up to the flip-flop 53 described above. °
It is difficult to change the above.

Therefore, in this example, by the selector 54,
The phase of the clock signal (timing signal) is, for example, 360
It is possible to control in the range of °. That is, in the present example, it is generally used that the flip-flop 53 outputs the normal signal and the inverted signal in which the rising time and the falling time are inverted from each other. By controlling 54 to output either the normal signal or the inverted signal from the selector 54, phase adjustment in a wide range can be realized.

In the circuit configuration as shown in FIG. 7, the phase adjusting means 1 as shown in FIG.
Since the cycle of the clock signal (timing signal) output from 0 and 11 is twice the cycle of the clock signal (from the clock source 9) input to the respective phase adjusting means 10 and 11, for example, D / A A clock source 9 is used which outputs a clock signal having a rate twice that required for the input clock of the converters 7, 8 (ie half period). As a specific example, if the D / A conversion rate by the D / A converters 7 and 8 is 80 MHz, 160 MH
A clock source 9 that outputs a z clock signal is used.

Further, in FIG. 7 described above, the flip-flop 53 and the selector 5 have the same circuit configuration as that shown in FIG.
4 is added, but similarly to this, for example, a clock signal (timing signal) is provided by providing a flip-flop in the subsequent stage of the comparator 32 shown in FIG. 4 or the limiter 42 shown in FIG. It is also possible to adjust the duty of, and further, for example, a selector is provided in the subsequent stage of the flip-flop to expand the adjustable phase range for the clock signal.

In FIG. 6 (f), the comparator 32 and the limiter 4 are arranged in the same manner as shown in FIG. 8 (f), for example.
2 shows an example of the waveform of the signal output from the signal No. 2, and the duty of the signal is 50 due to the flip-flop in FIG. 6 (g) as in the case of FIG. 8 (g). An example of the waveform of the signal converted into% is shown by a solid line, and an example of the waveform of the signal before the conversion (shown in FIG. 6F) is shown by a dotted line.

Next, referring to FIG. 9, each phase adjusting means 1
The perturbation method is shown as an example of a method of controlling 0 and 11 by the control unit 12 to adjust the (relative) delay time. That is, the distortion compensation by the predistortion of this example is performed according to the envelope of the signal to be amplified (of the amplifier 4). In this way, when distortion compensation according to the measured envelope is performed on the signal to be amplified, a distortion compensation control system (control unit 1
2 or the D / A converters 7 and 8 side system) and the main signal system (the system of the variable attenuator 2 or the variable phase shifter 3 side) through which the signal to be amplified flows (relative) delay time. It needs to be adjusted.

If the above-mentioned delay time adjustment is incomplete, the influence of the delay time makes the amplifier 4 provided at the final stage.
The distortion component remains in the signal output from the.
The presence / absence of such a distortion component can be easily determined using, for example, a spectrum analyzer or the like, and the control unit 12 of the present example uses the distortion extracting means 6 to monitor the amount of the distortion component. By doing so, the residual strain amount due to the existence of the delay time is detected.

An example of adjustment by the perturbation method will be shown below as an example of the method of adjusting the delay time as described above. Specifically, in the perturbation method, the delay time is adjusted by repeating the following processes (1) to (4).

(1) The amount of the above distortion component at the current delay time T (T = T 'after the processing of (4) described later) is stored as P0. (2) The delay time is adjusted by (+ τ) (that is, the delay time is further delayed to (T + τ)) and the amount of the distortion component at that time is stored as P +. (3) The delay time is adjusted by (−τ) (that is, the delay time is advanced to (T−τ)) along with the processing of (2), and the amount of the distortion component at that time is stored as P−. . (4) The magnitudes of the above-mentioned distortion amount P + and the above-mentioned distortion amount P- are compared, and the delay time corresponding to the smaller distortion amount (P + or P-) is newly added to the new delay time. T '
Save as (T ′ = T + τ, or T ′ = T−τ).

When the above processes (1) to (4) are repeated, the updated delay time T approaches an optimum state, and the distortion amount P0 and the distortion amounts P + and P- are changed. The difference between is getting smaller. Also, for example, the above-mentioned strain P
Each time the difference between 0 and the above-mentioned strain amounts P + and P- becomes small,
If the adjustment time used in the process of (2) or the process of (3) is changed from (± τ) to (± τ / 2) and the adjustment time is halved, the delay time It is preferable because the adjustment can be adaptively performed.

Here, FIG. 9 shows an example of an image in which the delay time is adjusted by the perturbation method. The horizontal axis in the figure shows the (relative) delay time, and the vertical axis in the upward direction. Indicates the amount of the distortion component, and the vertical axis in the downward direction indicates the elapsed time. Further, in the same figure, a curve P showing the amount of the distortion component (the distortion component extracted by the distortion extracting means 6) caused by the remaining delay time is shown, and the position where the amount of the distortion component becomes the minimum is shown. And the delay time becomes zero.

As a concrete example, in the perturbation method, first, the position of the delay time T at the present time is set as the starting point (in the figure). Then, at the next elapsed time, the delay time (T
The amount of distortion at the position of + τ) is compared with the amount of distortion at the position of delay time (T−τ), and the delay time (T + τ) corresponding to the smaller amount of distortion is the delay after updating. Time T '
As (in the figure).

Next, in the next elapsed time, the distortion amount at the position of the delay time (T + τ + τ) and the delay time (T + τ−τ)
The magnitude of the distortion amount at the position of is compared with that of the position, and the delay time (T + τ + τ) corresponding to the smaller distortion amount is selected as the updated delay time T ′ (in the figure).

Then, in response to the determination that the updated delay time approaches the optimum delay time (zero) and the distortion component amount has converged, at the next elapsed time, the delay time (T + τ + τ + τ / 2) ) Position distortion amount and delay time (T
+ Τ + τ−τ / 2) is compared with the amount of distortion at the position, and the delay time (T + τ + τ−τ / 2) corresponding to the smaller distortion amount is selected as the updated delay time T ′. Yes (in the figure). By repeatedly performing the above processing, the delay time to be updated can be gradually brought close to the optimum delay time (zero).

As described in the above means, the delay time is, for example, [1 / {carrier frequency interval x number of carriers x
It is preferable to adjust the time error within n}] seconds (that is, the difference from zero, which is the optimum delay time in this example). Here, as the carrier frequency interval and the number of carriers, values relating to the transmission signal processed by the amplifying apparatus of this example are used, and n is set to a positive number of 8 or more. Also, (carrier frequency interval x number of carriers) corresponds to the band of the transmission signal.

As described above, in the predistorter provided in the amplifying apparatus of this embodiment, the distortion (amplitude distortion or the like) generated by the variable attenuator 2 or the variable phase shifter 3 is applied to the transmission signal amplified by the amplifier 4. By adjusting the timing for controlling the amount of phase distortion by the phase adjusting means 10 and 11, it is possible to finely adjust the timing, and thereby highly accurate distortion compensation can be realized. it can.

Specifically, for example, it is possible to avoid that predistortion is not normally performed due to the presence of a minute delay time, and, for example, a minute time which has conventionally required a long time. The delay time adjustment process can be performed in a short time, and as a result of these, it is possible to reduce the cost of the device, for example.

Here, in this example, the amplifier 4 corresponds to the amplifier (which is a distortion compensation target) according to the present invention. Further, in the present example, the functions of the variable attenuator 2 and the variable phase shifter 3 constitute the distortion generating means referred to in the present invention. In this example, the variable attenuator 2 and the variable phase shifter 3 constitute a circuit that changes the amount of distortion generated according to an analog control signal input from the outside.

In this example, the function of the level detecting section 5 constitutes the signal level detecting means referred to in the present invention. Further, in this example, the function of the control unit 12 and the two D / A converters 7 and 8 constitutes the distortion amount control means referred to in the present invention. Further, in this example, the functions of the clock source 9 and the two phase adjusting means 10 and 11 constitute the control timing adjusting means in the present invention.

In this example, the two D / A converters 7,
The functions of 8 constitute the D / A conversion means referred to in the present invention. Further, in the present example, the function of the clock source 9 constitutes the clock signal generating means referred to in the present invention. Further, in this example, a clock signal (timing signal) whose timing is adjusted by the two phase adjusting means 10 and 11
The timing signal generating means referred to in the present invention is constituted by the function of generating.

Next, a (distortion compensation) amplifying apparatus according to the second embodiment of the present invention will be described with reference to FIG. The amplifying apparatus of the present example includes a predistorter which is an example of the distortion compensating apparatus according to the present invention, and the distortion generated in the amplifier by using the predistorter type distortion compensating method by the predistorter. To compensate.

FIG. 10 shows an example of the circuit configuration of an amplifying device (amplifier with predistortion function) equipped with the predistorter of this example. This amplification device is provided, for example, in a transmitter of a base station device or a relay station device of a mobile radio communication system, inputs a signal to be transmitted (transmission signal) from a transmitter, and outputs the signal by an amplifier. Amplify and output to the antenna.

As shown in the figure, in the amplifying apparatus of this example, the delay means 61, the variable attenuator 62, and the variable phase shifter 6 are provided.
3, amplifier 64, level detector 65, distortion extracting means 66, two memories 67 and 68, two D / A converters 69 and 70, a clock source 71, and two phase adjusting means 72. , 73, and a control unit 74.

Here, the configuration of the amplifying apparatus of this example is such that the memory 6 for controlling the variable attenuator 62 and the variable phase shifter 63 is used.
The configuration is the same as that of, for example, the amplifying apparatus shown in FIG. 1 of the above-described first embodiment, except that 7 and 68 are provided outside the control unit 74. For this reason, in the following, detailed description of the same components as those of the amplifying device shown in FIG. 1 of the first embodiment will be omitted, and components different from the amplifying device will be described in detail.

That is, in the amplifying apparatus of this example, as a configuration for controlling the variable attenuator 62, the memory 67 is provided between the control section 74 and the D / A converter 69, and the variable phase shifter is provided. As a configuration for controlling the device 63, a memory 68 is provided between the control unit 74 and the D / A converter 70. Further, in the amplification device of this example, the result of detecting the level of the signal by the level detection unit 65 is output to the two memories 67 and 68 as a digital value.

One of the memories 67 is a look-up table (LUT: Look Up Table) for controlling the variable attenuator 62.
This lookup table has a digital value (of the detection result) output from the level detection unit 65 and a (digital) control for controlling the amplitude distortion generated by the variable attenuator 62. It is stored in association with the value. Here, as the control value, the amplitude distortion (the amplitude distortion and the amplitude distortion) which can compensate the amplitude distortion generated in the amplifier 64 by the predistortion when a digital value (detection result) associated with the control value is obtained. The value that realizes the inverse characteristic amplitude distortion) is calculated (or measured) in advance and stored.

Similarly, the other memory 68 is a look-up table (LUT) for controlling the variable phase shifter 63.
This lookup table has a digital value (of the detection result) output from the level detector 65 and a (digital) control value for controlling the phase distortion generated by the variable phase shifter 63. And are stored in association with each other. Here, as the control value, the amplifier 6 is used when a digital value (detection result) associated with the control value is obtained.
The value that realizes the phase distortion (the phase distortion having the characteristic opposite to the phase distortion) capable of compensating the phase distortion generated in 4 by the predistortion is calculated (or measured) in advance, for example.
Has been stored.

As described above, the one memory 67 has the look-up table for storing the corrected AM-AM characteristic, and the other memory 68 has the look-up table for storing the corrected AM-PM characteristic. have. Then, these lookup tables are digital values (detection results) input from the level detection unit 65.
Is used as an address, a process of outputting a stored value (control value) corresponding to the input address to each of the D / A converters 69 and 70 is executed.
The amount of distortion generated by the variable attenuator 62 and the variable phase shifter 63 is controlled.

The D / A converters 69 and 70 of this example are
The digital control signals input from the memories 67 and 68 are converted into analog control signals, and the analog control signals are output to the variable attenuator 62 and the variable phase shifter 63.

Further, in this example, the storage contents of the memories 67 and 68 described above are adaptively rewritten by the control unit 74 based on the level of the distortion component detected by using the extracting means 66, for example. With such a configuration, it is possible to realize a predistortion capable of coping with a minute delay time error caused by, for example, a change in temperature characteristics or an aged change.

As described above, in the amplifying apparatus of this example, the memory 6 for controlling the variable attenuator 62 and the variable phase shifter 63 is used.
7, 68 are arranged separately from the control unit 74 and are arranged outside the control unit 74, the memory 67,
High-speed access to 68 is possible, and the processing efficiency can be improved. Here, in this example, the memory means referred to in the present invention is configured by the functions of the two memories 67 and 68.

As an example, in the amplifying apparatus of this example, 80M
It is supposed to be a digital part that operates at Hz, but in general,
When the D / A conversion process at about 80 MHz (12.5 nsec) is required, it may be difficult to directly access from the control unit 74. Note that this is because the control unit 74 is often composed of a digital signal processor (DSP), and the input / output rate (access speed of external hardware) of the digital signal processor is limited to about 30 MHz.

On the other hand, in the amplifying apparatus of the present example, as described above, the memories 67 and 68 are arranged outside the control unit 74 to enable high-speed access, and for example, process a wideband transmission signal. Even in such a case, delicate (minute) phase adjustment (D / A conversion timing adjustment) can be easily realized.

Here, the configuration of the distortion compensating apparatus according to the present invention is not necessarily limited to the one described above, and various configurations may be used. For example, the order of arrangement of the variable attenuator and the variable phase shifter for performing predistortion is arbitrary. In addition, for example (is subject to distortion compensation)
Various configurations may be used as the configuration for realizing the acquisition of the distortion component signal (error signal) from the output signal of the amplifier and the configuration of the level detection unit.

Although not shown in the above embodiments, for example, a low pass filter (LPF) is provided between the D / A converter and the variable attenuator or between the D / A converter and the variable phase shifter. ) And smoothing the output signals from these D / A converters by the low pass filter, the presence or absence of such a low pass filter may be determined by, for example, the usage status of the device. It may be arbitrarily set according to the above.

Further, the application fields of the distortion compensating apparatus according to the present invention are not necessarily limited to the above-mentioned fields, but the present invention can be applied to various fields. As an example, the distortion compensating apparatus according to the present invention can be applied to an apparatus that adopts a predistorter type distortion compensating method using digital processing, and also a predistorter type distortion compensating method using analog processing. It is also possible to apply to a device that adopts the method.

The various processes performed by the distortion compensating apparatus according to the present invention include, for example, a hardware resource provided with a processor, a memory, etc.
A configuration controlled by executing the control program stored in may be used, or, for example, each functional unit for executing the processing may be configured as an independent hardware circuit. Further, the present invention can be understood as a computer-readable recording medium such as a floppy (registered trademark) disk or a CD-ROM storing the above control program, and the control program is input to the computer from the recording medium. By causing the processor to execute, the processing according to the present invention can be performed.

[0198]

As described above, according to the distortion compensating apparatus of the present invention, for example, the amount of amplitude distortion or phase distortion generated by a variable attenuator or a variable phase shifter with respect to a signal amplified by an amplifier can be controlled. When the control is performed based on the detection result of the level of the signal amplified by the amplifier, the timing of the control is adjusted so that the distortion generated in the amplifier is largely compensated. ), It is possible to realize highly accurate distortion compensation.

[Brief description of drawings]

FIG. 1 is a diagram showing a circuit configuration example of an amplifier device including a predistorter according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a circuit configuration example of a phase adjusting unit.

FIG. 3 is a diagram for explaining an example of the operation of the phase adjusting means.

FIG. 4 is a diagram showing an example of a circuit configuration of phase adjusting means.

FIG. 5 is a diagram showing a circuit configuration example of a phase adjusting unit.

FIG. 6 is a diagram for explaining an example of the operation of the phase adjusting means.

FIG. 7 is a diagram showing a circuit configuration example of a phase adjusting unit.

FIG. 8 is a diagram for explaining an example of the operation of the phase adjusting means.

FIG. 9 is a diagram showing an example of an image for adjusting a delay time by a perturbation method.

FIG. 10 is a diagram showing a circuit configuration example of an amplifier device including a predistorter according to a second embodiment of the present invention.

FIG. 11 is a diagram showing a circuit configuration example of an amplifier device including a predistorter according to a conventional example.

FIG. 12 is a diagram showing an example of a spectrum of a signal in which no distortion has occurred.

FIG. 13 is a diagram showing an example of a spectrum of a signal in which distortion has occurred.

FIG. 14 is a diagram showing an example of a spectrum of a signal in which distortion is compensated.

FIG. 15 is a diagram showing an example of the result of a computer simulation regarding the influence of delay time on correction of amplitude distortion.

FIG. 16 is a diagram showing an example of the result of computer simulation regarding the influence of delay time on the correction of phase distortion.

[Explanation of symbols]

1, 61 ... Delay means 2, 62 ... Variable attenuator (attenuator) 3, 63 ... Variable phase shifter 4, 31,
41, 64 ... Amplifier, 5, 65 .. Level detection unit,
6, 66 ... Distortion extraction means, 7, 8, 69, 70 ... D /
A converter, 9, 71 ... Clock source, 10, 11, 7
2, 73 ... Phase adjusting means, 12, 74 ... Control section,
21, 51 .. Variable amplifier, 22, 42, 52 .. Limiter, 32 .. Comparator, 53 .. Flip-flop, 54 .. Selector, 67, 68 .. Memory,

Claims (3)

[Claims] 1. In a distortion compensating apparatus for compensating distortion generated in an amplifier, a distortion compensation control system for controlling compensation of distortion generated in an amplifier and a signal to be amplified flow to generate distortion for distortion compensation. Adjusting the delay time with the signal system is based on the residual distortion amount when the time obtained by adding the predetermined adjustment time to the reference delay time and the reference delay time are used as the predetermined adjustment. A distortion compensating apparatus, characterized in that the adjusted delay time corresponding to the smaller one of the residual distortion amount when the time obtained by subtracting the time is used as the delay time is selected as the updated delay time. 2. The distortion compensating apparatus according to claim 1, wherein the delay time is repeatedly updated so that the updated delay time approaches the optimum delay time. 3. The distortion compensating apparatus according to claim 2, wherein the adjustment time is reduced as the difference between the residual distortion amount in the reference delay time and the residual distortion amount in the adjusted delay time decreases. Distortion compensation device characterized by: