JP2003031949A - Multilayer board, manufacturing method and bonding structure thereof - Google Patents

Multilayer board, manufacturing method and bonding structure thereof

Info

Publication number
JP2003031949A
JP2003031949A JP2001212112A JP2001212112A JP2003031949A JP 2003031949 A JP2003031949 A JP 2003031949A JP 2001212112 A JP2001212112 A JP 2001212112A JP 2001212112 A JP2001212112 A JP 2001212112A JP 2003031949 A JP2003031949 A JP 2003031949A
Authority
JP
Japan
Prior art keywords
adhesive
wiring board
wiring
bonding
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001212112A
Other languages
Japanese (ja)
Inventor
Naohito Mitsunari
尚人 三成
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Metal Mining Co Ltd
Original Assignee
Sumitomo Metal Mining Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Metal Mining Co Ltd filed Critical Sumitomo Metal Mining Co Ltd
Priority to JP2001212112A priority Critical patent/JP2003031949A/en
Publication of JP2003031949A publication Critical patent/JP2003031949A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a high-reliability and high-density multilayered board, its manufacturing method and an bonding structure. SOLUTION: The multilayer board, formed by mutually adhering wiring boards, is composed of a first wiring board 7, a second wiring board 3, a conductive material 5 for electrically connecting the first board 7 with the second board 3, and bonding structures 1, 2 for bonding the wiring boards each other. The adhering structure 1, 2 is composed of a porous layer 1 and adhesive layers 2 provided on both surfaces of the porous layer for adhering to the wiring boards.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、高密度配線基板の
多層基板、多層基板の製造方法および接着用構造体に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-layer substrate for a high-density wiring board, a method for manufacturing the multi-layer substrate, and a bonding structure.

【0002】[0002]

【従来の技術】最近、パソコン等に代表される電子機器
の高密度・小型化に伴い、ICパッケージも高密度・小
型化が要求されている。ICパッケージの高密度・小型
化に対応して、従来のQFP(Quad Flat P
ackage)タイプのICパッケージよりもさらに多
端子化に対応できるBGA(Ball Grid Ar
ray)タイプが登場してきている。また、パッケージ
を実装する基板においても、多層化、微細化が進み、ビ
ルドアップによる多層基板の開発も盛んである。一方、
低コスト、高機能の多層基板を提供する方法として、従
来のプリント基板、セラミック多層基板に、多層フレキ
基板を貼り合わせた複合多層基板も登場してきている。
2. Description of the Related Art Recently, as electronic devices such as personal computers have become higher in density and smaller in size, IC packages have also been required to have higher density and smaller in size. Conventional QFP (Quad Flat P) for high density and miniaturization of IC packages
BGA (Ball Grid Ar) that can support more terminals than IC package of package type)
ray) type has been introduced. Also, with respect to the board on which the package is mounted, the number of layers and miniaturization are progressing, and development of a multilayer board by build-up is also active. on the other hand,
As a method of providing a low-cost, high-performance multi-layer substrate, a composite multi-layer substrate in which a multi-layer flexible substrate is pasted on a conventional printed circuit board or ceramic multi-layer substrate has been introduced.

【0003】通常、貼り合わせ基板におけるビア形成
は、レーザーを用いるが、貼り合わせる樹脂フィルム層
と接着剤層を同時に開孔する。レーザー開孔後、ビア内
のスミヤを、湿式処理またはプラズマ等の乾式処理によ
り除去する。導電樹脂の充填、半田ボール、半田ペース
トの溶融、無電解、または電解めっきによるNi、C
u、Auの金属層で形成する方法によって、層間で電気
的な接続を取る。
Usually, a laser is used to form a via in a bonded substrate, but the resin film layer and the adhesive layer to be bonded are simultaneously opened. After the laser opening, the smear in the via is removed by a wet process or a dry process such as plasma. Filling with conductive resin, solder balls, melting of solder paste, electroless or Ni, C by electroplating
Electrical connection is established between the layers by the method of forming the metal layers of u and Au.

【0004】[0004]

【発明が解決しようとする課題】このように製造された
基板は、半田ペーストのスクリーン印刷、各種パッケー
ジのマウント後、リフロー工程にて表面実装される。基
板の信頼性試験については、日本工業規格JIS、日本
プリント回路基板協会JPCA等の規格で定められてい
るが、パッケージを基板に表面実装するとき特に重要と
なる試験は、実装半田耐熱試験である。前述の規格で
は、通常、ボードを高温多湿の霧囲気で所定の時間吸湿
した後、リフロー炉への投入または溶融半田槽へ浸漬が
なされる。このとき、複合多層基板内に吸湿された水分
が気化し、貼り合わせに用いられている接着剤層での剥
離ボイド発生等が起こるという問題が生ずることもあ
る。
The substrate thus manufactured is surface-mounted in a reflow process after screen printing of solder paste and mounting of various packages. The reliability test of the board is defined by the Japanese Industrial Standards JIS, the Japan Printed Circuit Board Association JPCA, etc., but the soldering heat resistance test is a particularly important test when the package is surface-mounted on the board. . According to the above-mentioned standard, the board is usually absorbed in a hot and humid mist atmosphere for a predetermined time, and then put into a reflow furnace or immersed in a molten solder bath. At this time, the moisture absorbed in the composite multi-layer substrate may be vaporized to cause a problem such as occurrence of peeling voids in the adhesive layer used for bonding.

【0005】したがって、本発明は上記の問題点を解決
するためになされたもので、樹脂フィルムをリジッド基
板に貼り合わせて多層基板を製造するとき、接着剤層を
接着部の剥離等の発生を防止することを可能とし、かつ
各種電子部品の組立工程において信頼性の高い高密度多
層基板、その製造方法および接着用構造体を提供するこ
とを目的とする。
Therefore, the present invention has been made to solve the above problems, and when a resin film is attached to a rigid substrate to manufacture a multi-layer substrate, the adhesive layer causes peeling of an adhesive portion or the like. An object of the present invention is to provide a high-density multi-layer substrate which can be prevented and is highly reliable in the process of assembling various electronic components, a manufacturing method thereof, and a bonding structure.

【0006】[0006]

【課題を解決するための手段】上記課題を解決するため
に、木発明による多層基板の製造方法は、以下のような
方法である。まず、多孔質フィルムの両面に接着剤フィ
ルムをラミネートすることにより、多孔質フィルムが接
着剤で挟み込まれた三層構造の接着用構造体を作製す
る。
In order to solve the above problems, the method of manufacturing a multilayer substrate according to the present invention is as follows. First, an adhesive film is laminated on both sides of the porous film to produce a three-layer structure for adhesion in which the porous film is sandwiched by the adhesive.

【0007】次に、樹脂フィルム基材には、湿式法であ
るフォトエッチングプロセスを利用してビアホール(ス
ルーホールまたはブラインドビア)を形成した後、導体
配線を形成する。導体配線およびビアホールが形成して
ある樹脂フィルムと、多孔質フィルムを挟み込んだ接着
剤フィルムをラミネートする。また、多孔質フィルムヘ
の接着剤層の形成は、フィルム状の接着剤をロールコー
ターにて、多孔質フィルムに塗布後、乾燥しても良い。
樹脂フィルムと接着剤フィルムを、リジッドなプリント
基板に貼り合わせる。
Next, a via hole (through hole or blind via) is formed in the resin film substrate by using a photo-etching process which is a wet method, and then a conductor wiring is formed. A resin film having conductor wiring and via holes is laminated with an adhesive film sandwiching a porous film. In addition, the formation of the adhesive layer on the porous film may be performed by applying a film-like adhesive to the porous film with a roll coater and then drying.
The resin film and adhesive film are attached to a rigid printed circuit board.

【0008】貼り合わせた後、レーザーにてビアホール
の下層にある多孔質フィルムを含む接着剤層を除去し、
ビアホール内に導電性樹脂ペーストを充填することによ
って得られる多層プリント基板製造方法である。
After the bonding, the adhesive layer containing the porous film under the via hole is removed with a laser,
It is a method for manufacturing a multilayer printed circuit board, which is obtained by filling a conductive resin paste into a via hole.

【0009】接着剤層に含まれた多孔質層の機能として
は、複合多層化された基板の構成要素である樹脂フィル
ム、リジッド基板、接着剤に合まれた水分が急激に蒸
発、充填剤である導電性樹脂の硬化過程で発生するガ
ス、または、接着剤の硬化する際に発生するガスが接着
剤層に含まれた多孔質層の間隙を適して、接着剤層から
効率的に排出される。そのため、各接着界面にたまるこ
とがなくなり、各接着層での剥離、ボイド発生を生じさ
せず、多孔質層に接着剤が食い込みアンカー効果により
接着剤層と多孔質フィルムとの密着力が向上する。
The function of the porous layer included in the adhesive layer is that the moisture contained in the resin film, the rigid substrate, and the adhesive, which are the constituent elements of the composite multi-layered substrate, evaporates rapidly, and The gas generated during the curing process of a certain conductive resin or the gas generated during the curing of the adhesive is efficiently discharged from the adhesive layer through the gap between the porous layers included in the adhesive layer. It Therefore, it does not accumulate at each adhesive interface, does not cause peeling and void generation in each adhesive layer, and the adhesive penetrates into the porous layer to improve the adhesive force between the adhesive layer and the porous film due to the anchor effect. .

【0010】[0010]

【発明の実施の形態】本発明の多孔質フィルムを挟み込
んだ接着剤フィルムで接着される樹脂フィルム基材は、
樹脂フィルムの片面または両面に配線パターンが形成さ
れている一般的なフレキシブルなテープを用いる。TA
BテープやPPCテープの製造方法は従来の製造方法が
適用できる。フィルム、基板の大きき、形状等は適用す
る半導体装置の大きさ、形状等に応じて適宜設計すれば
よい。
BEST MODE FOR CARRYING OUT THE INVENTION A resin film substrate bonded with an adhesive film sandwiching a porous film of the present invention is
A general flexible tape having a wiring pattern formed on one side or both sides of a resin film is used. TA
A conventional manufacturing method can be applied to the manufacturing method of the B tape or the PPC tape. The size and shape of the film and the substrate may be appropriately designed according to the size and shape of the semiconductor device to be applied.

【0011】また、リジッド基板は、一般的なプリント
基板が用いられる。多孔質のフィルムを挟み込む接着剤
は常温接合タイプ、熱硬化性タイプまたは熱可塑性タイ
プいずれのタイプでもよい。また接着剤の厚みに関して
は、任意の厚みを選択することが可能であるが、接着剤
と多孔質フィルムの総厚を薄く抑えることが望ましいた
め、通常20μmから100μmの厚みが用いられる。
接着剤で挟み込まれる多孔質フィルムは、内部から発生
するガスを効率的に系外に排出するため、また、接着剤
との密着力を維持するために適当なポアサイズとガス通
気性が要求されるが、適当に選ぶことができる。このよ
うにして本発明の高密度配線基板は形成される。
A general printed board is used as the rigid board. The adhesive for sandwiching the porous film may be any one of a room temperature bonding type, a thermosetting type and a thermoplastic type. Regarding the thickness of the adhesive, it is possible to select any thickness, but it is desirable to keep the total thickness of the adhesive and the porous film thin, and therefore, a thickness of 20 μm to 100 μm is usually used.
The porous film sandwiched between the adhesives is required to have an appropriate pore size and gas permeability in order to efficiently discharge the gas generated from the inside of the system and to maintain the adhesive force with the adhesives. However, it can be selected appropriately. In this way, the high-density wiring board of the present invention is formed.

【0012】(実施例)以下、この発明の実施例につい
て図面を参照して説明する。図1は多孔質フィルムの両
面に熱硬化性接着剤層を形成したときの断面構造の模式
図であり、図2は多孔質フィルムに接着剤を両面にラミ
ネートしたフィルムを用いて、フレキシブルプリント基
板とリジッドのプリント基板とを貼り合わせしたした積
層基板の断面構造の模式図である。
(Embodiment) An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic diagram of a cross-sectional structure when thermosetting adhesive layers are formed on both sides of a porous film, and FIG. 2 is a flexible printed circuit board using a film obtained by laminating an adhesive on both sides of a porous film. FIG. 6 is a schematic diagram of a cross-sectional structure of a laminated substrate in which a rigid printed circuit board and a rigid printed circuit board are bonded together.

【0013】図1、図2を参照して、製造方法を中心に
説明すると、熱硬化性接着剤2(住友3M(株)社製
接着剤1592、膜厚20μm)を、大成ラミネーター
(株)社製ラミネーター(FV−700型)により、ロ
ール圧0.3MPa、ロール温度70°C、ラミネート
速度0.2m/minで、大気中にて、多孔質フィルム
1(日東電工(株)社製ミクロテックスNTF113
1、厚さ25μm)の両面に貼り合わせた。
The manufacturing method will be mainly described with reference to FIGS. 1 and 2, and a thermosetting adhesive 2 (manufactured by Sumitomo 3M Co., Ltd.)
Adhesive 1592, film thickness 20 μm) was put into the atmosphere at a roll pressure of 0.3 MPa, a roll temperature of 70 ° C. and a laminating speed of 0.2 m / min using a laminator (FV-700 type) manufactured by Taisei Laminator Co., Ltd. Porous film 1 (manufactured by Nitto Denko Corporation, Microtex NTF113
1 and thickness of 25 μm).

【0014】多孔質フィルムであるため、大気中でのラ
ミネートでも、十分多孔質フィルムの凹凸に追随し、接
着剤層と多孔質フィルムの間にボイドが巻き込まれるこ
とがなかった。この多孔質フィルムを用いて、両面に配
線を形成したフレキシブルプリント回路フィルム3(F
PC)とリジッド基板7(4層のプリント回路基板)を
貼り合わせた。貼り合わせは、プリント基板上に位置合
わせ用のスルーホール(直径1.5mmφ)とFPC上
に形成された位置合わせ用のスルーホール(直径1.5
mmφ)をそれぞれピンアライメント方式の治具で位置
合わせをして大気中、常温で、0.1MPaの圧力で両
者を仮付けした。
Since it is a porous film, even if it is laminated in the air, it can sufficiently follow the irregularities of the porous film and no void is caught between the adhesive layer and the porous film. Using this porous film, flexible printed circuit film 3 (F
PC) and the rigid board 7 (printed circuit board of four layers) were bonded together. The bonding is performed by aligning through holes (diameter 1.5 mm) on the printed circuit board and aligning through holes (diameter 1.5 mm) formed on the FPC.
(mmφ) was aligned with a jig of pin alignment method, and both were temporarily attached in the air at room temperature at a pressure of 0.1 MPa.

【0015】その後、1軸のプレス機により150°
C、10MPaの圧力で、10分間加圧し、本圧着をし
た。さらに、接着剤を本硬化するため、150°C、1
20°Cのオープン中に放置した。硬化後、プリント基
板と接着剤、フレキシブルプリント基板と接着剤または
多孔質フィルムと接着剤のそれぞれの界面に剥離、また
はボイドの発生は見られなかった。
After that, by a uniaxial press machine, 150 °
C, 10 MPa pressure was applied for 10 minutes to perform final pressure bonding. Furthermore, in order to fully cure the adhesive, 150 ° C, 1
It was left open at 20 ° C. After curing, no peeling or void formation was observed at the interface between the printed circuit board and the adhesive, the flexible printed circuit board and the adhesive, or the porous film and the adhesive.

【0016】さらに、貼り合わせたFPCとリジッドの
プリント基板との各配線層の電気的な導通をとるため、
所定の位置に住友重機械工業(株)社製炭酸ガスレーザ
ー(LAVIA1000TW)を用いて、ビア形成を行
った。ここで、レーザー加工条件は、出力1.8W、周
波数500Hz、ショット数8、ビーム径280μmφ
とした。ビア開孔後、導電ペースト(住友金属鉱山
(株)製導電性銀ペースト)を印刷法にてビア内に充填
をした。充填後150°Cで、90分間オーブン中で硬
化した。貼り合わせの基板について、半田耐熱性試験を
実施した。
Furthermore, in order to establish electrical continuity between the wiring layers of the bonded FPC and the rigid printed circuit board,
Via formation was performed at a predetermined position using a carbon dioxide gas laser (LAVIA 1000TW) manufactured by Sumitomo Heavy Industries, Ltd. Here, the laser processing conditions are: output 1.8 W, frequency 500 Hz, shot number 8, beam diameter 280 μmφ
And After opening the via, a conductive paste (conductive silver paste manufactured by Sumitomo Metal Mining Co., Ltd.) was filled in the via by a printing method. After filling, it was cured in an oven at 150 ° C for 90 minutes. A solder heat resistance test was performed on the bonded substrates.

【0017】試験方法は、日本プリント工業規格(IP
C/JPCA−6202、6801規格)に従った。半
田耐熱性試験では、−40°C〜+60°Cの温度サイ
クルを1時間あたり2回の周期で10回行った後、サン
プルを105°C、24時間の乾燥、温度30°C、湿
度60%RHの恒温恒湿槽に192時間加湿処理を施し
た後、IRリフロー炉(温度125°Cで120秒、1
83°C以上で2〜3分間、max温度220°C)に
2回、260°C、10秒間溶融半田に浸漬した。
The test method is based on the Japan Printing Industrial Standards (IP
C / JPCA-6202, 6801 standard). In the solder heat resistance test, a temperature cycle of −40 ° C. to + 60 ° C. was performed 10 times at a cycle of 2 times per hour, and then the sample was dried at 105 ° C. for 24 hours, temperature 30 ° C., humidity 60. After performing a humidification treatment in a constant temperature and humidity chamber of% RH for 192 hours, an IR reflow furnace (temperature of 125 ° C for 120 seconds, 1 second
It was immersed in the molten solder twice at 260 ° C. for 10 seconds at a maximum temperature of 220 ° C. at a temperature of 83 ° C. or higher for 2-3 minutes.

【0018】半田耐熱性試験後で、ピール強度、ボイド
の観察、ビアの導通抵抗変化率ΔRを調べた。導通抵抗
変化率は、式ΔR=|(Rf−Ri)/Ri|×100
%にて計算した。ここで、Rfは半田耐熱性試験後の抵
抗値であり、Riは初期の導通抵抗値である。評価は、
導通抵抗変化率が20%以下を合格とした。ピール強度
については、10mm幅のテープで、基板に対して18
0°方向へテープを引き剥がしたときの強度を測定し
た。0.5N/m以上を合格とした。
After the solder heat resistance test, peel strength, observation of voids, and rate of change in conduction resistance ΔR of vias were examined. The conduction resistance change rate is calculated by the formula ΔR = | (Rf−Ri) / Ri | × 100
Calculated in%. Here, Rf is a resistance value after the solder heat resistance test, and Ri is an initial conduction resistance value. Evaluation,
A conduction resistance change rate of 20% or less was regarded as acceptable. As for the peel strength, it is 18 mm against the substrate with 10 mm width tape.
The strength when the tape was peeled off in the 0 ° direction was measured. A pass rate of 0.5 N / m or more was determined.

【0019】(比較例)接着剤に多孔質フィルムを含ま
ず、接着剤の厚さを65μmとした以外は、実施例と同
じ方法にて積層基板を作製した。
Comparative Example A laminated substrate was prepared in the same manner as in Example except that the adhesive did not include a porous film and the thickness of the adhesive was 65 μm.

【0020】表1に、実施例と比較例についての、貼り
合わせ後および半田耐熱性試験後のボイド観察結果、貼
り合わせ後および半田耐熱性試験後のピール強度測定結
果および導通抵抗率の結果を示す。
Table 1 shows the results of void observation after bonding and after the solder heat resistance test, the peel strength measurement results after bonding and after the solder heat resistance test, and the results of conduction resistance for the examples and comparative examples. Show.

【0021】[0021]

【表1】 [Table 1]

【0022】表1から明らかなように、実施例では、貼
り合わせ後のボイド、貼り合わせ後のピール強度、半田
耐熱性試験後のボイド、半田耐熱性試験後のピール強
度、および半田耐熱性試験前後の導通抵抗変化率のすべ
てで、良好な結果が得られ合格したが、比較例では、半
田耐熱性試験後のボイドおよび半田耐熱性試験前後の導
通抵抗変化率において、不合格となったものがあった。
As is clear from Table 1, in Examples, voids after bonding, peel strength after bonding, voids after solder heat resistance test, peel strength after solder heat resistance test, and solder heat resistance test Good results were obtained with all of the rates of change in conduction resistance before and after, but in the comparative example, the voids after the solder heat resistance test and the rate of change in conduction resistance before and after the solder heat resistance test failed. was there.

【0023】[0023]

【発明の効果】本発明による多孔質フィルムを挟み込ん
だ接着剤を用いれば、樹脂フィルムとリジッド基板の貼
り合わせした後の接着剤の加熱時、または、吸湿後の半
田耐熱試験時の加熱時に、接着剤または構成物であるポ
リイミド、または、ガラスエポキシ樹脂等から発生する
水分または反応ガスによる接着剤層とそれに接する材料
(ポリイミド、ガラスエポキシ樹脂等)との界面にボイ
ド、または、剥離の発生がなく、また、層間接続の導通
抵抗値の上昇を抑えることができ、積層基板における信
頼性を向上できる効果がある。
By using the adhesive having the porous film sandwiched between the present invention, when the adhesive is heated after the resin film and the rigid substrate are bonded together, or when the solder heat resistance test after moisture absorption is performed, Voids or peeling may occur at the interface between the adhesive layer and the adhesive layer or the adhesive layer and the material (polyimide, glass epoxy resin, etc.) in contact with it due to moisture or reaction gas generated from the glass epoxy resin or the like. Moreover, there is an effect that it is possible to suppress an increase in the conduction resistance value of the interlayer connection and improve the reliability of the laminated substrate.

【図面の簡単な説明】[Brief description of drawings]

【図1】図1は本発明の実施例における多孔質フィルム
の両面に接着剤をラミネートしたフィルムの断面構造の
模式図である。
FIG. 1 is a schematic diagram of a cross-sectional structure of a film obtained by laminating an adhesive on both sides of a porous film in an example of the present invention.

【図2】図2は本発明の実施例における多孔質フィルム
の両面に接着剤をラミネートしたフィルムを用いて、フ
レキシブルプリント基板とリジッドのプリント基板とを
貼り合わせした積層基板の断面構造の模式図である。
FIG. 2 is a schematic diagram of a cross-sectional structure of a laminated substrate in which a flexible printed circuit board and a rigid printed circuit board are bonded together by using a film obtained by laminating an adhesive on both sides of a porous film in an example of the present invention. Is.

【符号の説明】[Explanation of symbols]

1 多孔質フィルム 2 接着剤層 3 フレキシブルプリント基板 4 ソルダーレジスト 5 層間接続部(導電性べ−スト充填したビア) 6 配線パターン 7 リジッドのプリント基板 8 内層配線部 1 Porous film 2 Adhesive layer 3 Flexible printed circuit board 4 Solder resist 5 Interlayer connection (via filled with conductive base) 6 wiring patterns 7 rigid printed circuit board 8 Inner layer wiring section

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】配線基板同士を接着して構成される多層基
板であって、第1の配線基板と、第2の配線基板と、第
1の配線基板と第2の配線基板とを電気的に接続する導
電性材料と、配線基板同士を接着する接着用構造体と、
からなり、該接着用構造体は多孔質層と、該多孔質層の
両面に設けられて各配線基板に接着するための接着層と
から成ることを特徴とする多層基板。
1. A multi-layer substrate configured by adhering wiring boards to each other, wherein a first wiring board, a second wiring board, a first wiring board and a second wiring board are electrically connected. A conductive material to be connected to, and a bonding structure for bonding the wiring boards together,
The multilayer substrate, wherein the adhesive structure comprises a porous layer and adhesive layers provided on both sides of the porous layer for adhering to each wiring board.
【請求項2】セラミック配線基板またはプリント配線基
板等のリジッド配線基板の両面又は片面に、配線を形成
した樹脂フィルム基材を熱硬化性接着剤または熱可塑性
接着剤を用いて貼り合わせ、ビア形成を行った後、導電
性材料をビア内に充填し、各金属配線層間を電気的接続
して高密度多層化するとき、接着剤層の間に多孔質層が
挟まれていることを特徴とする高密度配線基板の製造方
法。
2. A via is formed by bonding a resin film base material on which wiring is formed to both sides or one side of a rigid wiring board such as a ceramic wiring board or a printed wiring board using a thermosetting adhesive or a thermoplastic adhesive. After filling, a conductive material is filled in the vias, and when the metal wiring layers are electrically connected to each other to form a high density multilayer, the porous layer is sandwiched between the adhesive layers. High-density wiring board manufacturing method.
【請求項3】請求項2記載の高密度配線基板の製造方法
において、接着剤で挟み込む多孔質層のフィルム厚さ
は、0.020〜0.1mm、好ましくは0.03〜
0.06mmであり、多孔質のポアサイズが1〜3μm
であることを特徴とする製造方法。
3. The method for manufacturing a high-density wiring board according to claim 2, wherein the film thickness of the porous layers sandwiched by the adhesive is 0.020 to 0.1 mm, preferably 0.03 to
0.06 mm with a porous pore size of 1-3 μm
A manufacturing method characterized by being.
【請求項4】請求項2記載の製造方法において、樹脂フ
ィルム基材として、TAB(Tape Automat
ed Bonding)テープ、またはFPC(Fle
xisible Printed Circuit)を
用いることを特徴とする高密度配線基板の製造方法。
4. The production method according to claim 2, wherein the resin film substrate is TAB (Tape Automat).
ed Bonding) tape or FPC (Fle)
A method for manufacturing a high-density wiring board, which comprises using a xisable printed circuit.
【請求項5】配線基板同士を接着する接着用構造体であ
って、多孔質層と、該多孔質層の両面に設けられて各配
線基板に接着するための接着層とから成ることを特徴と
する接着用構造体。
5. An adhesive structure for adhering wiring boards together, comprising a porous layer and adhesive layers provided on both sides of the porous layer for adhering to each wiring board. Adhesive structure to be.
【請求項6】請求項5記載の接着用構造体において、前
記多孔質層のフィルム厚さは、0.020〜0.1m
m、好ましくは0.03〜0.06mmであり、多孔質
のポアサイズが1〜3μmであることを特徴とする接着
用構造体。
6. The adhesive structure according to claim 5, wherein the film thickness of the porous layer is 0.020 to 0.1 m.
m, preferably 0.03 to 0.06 mm, and a porous pore size of 1 to 3 μm.
JP2001212112A 2001-07-12 2001-07-12 Multilayer board, manufacturing method and bonding structure thereof Pending JP2003031949A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001212112A JP2003031949A (en) 2001-07-12 2001-07-12 Multilayer board, manufacturing method and bonding structure thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001212112A JP2003031949A (en) 2001-07-12 2001-07-12 Multilayer board, manufacturing method and bonding structure thereof

Publications (1)

Publication Number Publication Date
JP2003031949A true JP2003031949A (en) 2003-01-31

Family

ID=19047321

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001212112A Pending JP2003031949A (en) 2001-07-12 2001-07-12 Multilayer board, manufacturing method and bonding structure thereof

Country Status (1)

Country Link
JP (1) JP2003031949A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011258779A (en) * 2010-06-09 2011-12-22 Fujitsu Ltd Layer circuit board and method for producing circuit board
WO2018079477A1 (en) * 2016-10-27 2018-05-03 株式会社村田製作所 Multilayer substrate and method for manufacturing same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011258779A (en) * 2010-06-09 2011-12-22 Fujitsu Ltd Layer circuit board and method for producing circuit board
WO2018079477A1 (en) * 2016-10-27 2018-05-03 株式会社村田製作所 Multilayer substrate and method for manufacturing same

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