JP2003029852A - Power unit and method for controlling the same and portable electronic equipment and clocking device and method for controlling the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce power consumption of a constant voltage circuit. SOLUTION: An oscillation circuit 80 generates an oscillation signal based on the oscillation frequency of a crystal oscillator 81, and a frequency-dividing circuit 90 generates a sampling clock CKs whose duty rate is 1/8 by frequency- dividing the oscillation signal. A constant voltage circuit 70 operates in the 'H' level period of the sampling clock CKs, and stops its operation in the 'L' level period. While the constant voltage circuit 70 stops its operation, a voltage Vreg varying in accordance with a second low potential voltage Vss2 is generated. The cycle of the sampling clock CKs is made short, and the variation of the voltage Vreg is reduced. On the other hand, the power consumption of the constant voltage circuit 70 is reduced to 1/8 compared with the case that the constant voltage circuit 70 always operates.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply device suitable for reducing power consumption, a control method therefor, a portable electronic device,
The present invention relates to a timing device and a control method thereof.

2. Description of the Related Art In a small electronic timepiece such as a wristwatch type, in addition to a timekeeping circuit for measuring the time and a drive circuit for driving a motor connected to a hand movement mechanism, a power generator is incorporated and the battery is not replaced. Something that works has been realized. These electronic timepieces have a function of temporarily charging the power generated by the power generator into a capacitor, etc., and when the power is not generated, the time discharged is displayed by the power discharged from the capacitor. .

Therefore, stable operation can be performed for a long time without a battery, and in consideration of the trouble of battery replacement and disposal of the battery, many electronic timepieces will be equipped with a power generator in the future. Is expected. The power generation device built into a wristwatch or the like is a solar cell that converts irradiated light into electric energy, or a power generation system that captures movements of a user's arm and converts kinetic energy into electric energy. These power generators are very good in terms of converting the energy around the user into electric energy for use, but have a problem that the available energy density is low and continuous energy cannot be obtained. . Therefore, continuous power generation is not performed, and the electronic timepiece operates with the power accumulated in the capacitor during that period.

[0003]

By the way, in a small electronic timepiece, the electromotive voltage of the power generator is small, so the voltage across the terminals of the capacitor is not sufficient to operate the clock circuit. Therefore, the voltage across the terminals of the capacitor is boosted once,
The boosted voltage is stored in another capacitor. Also,
In order to supply a stable power supply voltage even if the boosted voltage fluctuates, the voltage of the capacitor is stabilized by using a constant voltage circuit, and this is used as a power supply voltage to supply power to the clock circuit. In such an electronic timepiece, in order to extend the continuous use time, it is necessary to reduce the power consumption of the entire electronic timepiece. However, since the constant voltage circuit consumes power by itself, it is not preferable to always operate the constant voltage circuit from the viewpoint of reducing power consumption. On the other hand, a constant voltage circuit is required in order to stably operate the clock circuit without causing a malfunction. The present invention has been made in view of the above circumstances, and an object thereof is to reduce power consumption by operating a constant voltage circuit in a sampling manner (intermittently). Another object is to reduce power consumption and stabilize the power supply voltage by controlling the constant voltage circuit according to the fluctuation of the input voltage.

[0004]

In order to solve the above-mentioned problems, a power supply device according to the present invention comprises a voltage stabilizing means for generating an output voltage with an input voltage stabilized in a power supply state, and the voltage stabilizing means. Power supply means for supplying power to the power source, voltage fluctuation detection means for detecting fluctuations in the input voltage or a state in which the fluctuations are predicted, and power supply operation of the power supply means based on the detection result of the voltage fluctuation detection means. And a control means for controlling the operation. According to the present invention, since the power feeding operation of the power feeding means can be controlled according to the fluctuation of the input voltage, the output voltage can be stabilized and the power consumption can be reduced.

More specifically, the control means controls the power supply means such that when the input voltage is stable, the power supply to the voltage stabilization means and the stop of power supply are repeated at a constant cycle. However, when it is detected that the input voltage is fluctuating or when a state in which the fluctuation is predicted is detected, the ratio of the power supply time to the power supply stop time to the voltage stabilizing means is set to the stable input voltage. The power supply unit may be controlled so as to be larger than that in the case of being operated. According to this invention, when the input voltage fluctuates, the power supply time can be lengthened, so that the output voltage can be stabilized, while when the input voltage is stable, the power supply stop time can be reduced. Since the length can be increased, power consumption can be reduced.

Further, the control means controls the power feeding means so as to intermittently feed power to the voltage stabilizing means when the input voltage is stable, and the fluctuation or the fluctuation of the input voltage When the predicted state is detected by the voltage fluctuation detection means, the power supply means may be controlled so that power is constantly supplied to the voltage stabilization means. In this case, when the input voltage fluctuates, the voltage stabilizing means always operates, so that the output voltage can be further stabilized.

Further, the portable electronic device according to the present invention stores the power supply device, a power generation unit for generating electric power, and electric power from the power generation unit, and uses the stored voltage as the input voltage. Power storage means for supplying the power storage means to the power storage means, and the voltage fluctuation detection means is configured as charge detection means for detecting charging of the power storage means. In this case, the change in the input voltage due to the internal resistance of the power storage unit can be detected by detecting the charging of the power storage unit. Here, the charge detection means may detect the charge to the power storage means based on the charging current to the storage means, or the charge detection means to the power storage means based on the electromotive voltage of the power generation means. It may be one that detects the charging of the battery.

Further, the portable electronic apparatus according to the present invention includes the power supply device, a power generation means for generating electric power, a first power storage means for storing the power from the power generation means, and the first power storage means. The conversion ratio according to the magnitude of the voltage of
Second voltage conversion means for converting the voltage of the power storage means and second voltage for storing the voltage converted by the voltage conversion means and supplying the stored voltage as the input voltage to the power supply device.
And a voltage change detecting means configured as a magnification change detecting means for detecting a change in the conversion magnification in the voltage converting means. In this case, it is possible to detect that the input voltage fluctuates as the conversion magnification changes.

Further, the portable electronic apparatus according to the present invention comprises the power supply device and power consumption means for consuming power by receiving the power supply of the input voltage, and the voltage fluctuation detection means in the power consumption means. It is characterized in that it is configured as power consumption detection means for detecting an increase in power consumption. More specifically, the power consumption means is a motor, and the power consumption detection means detects an increase in power consumption based on a drive signal of the motor. In this case, it is possible to detect that the input voltage fluctuates as the power consumption increases.

Further, in the portable electronic device according to the present invention, the control means, when the input voltage is stable, performs a constant cycle of power supply to the voltage stabilization means and stop of power supply. When the fluctuation of the input voltage or a state in which the fluctuation is predicted is detected by the voltage fluctuation detection means, the power supply time to the voltage stabilization means is stopped. It is preferable to control the power supply means so that the ratio of is larger than that in the case where the input voltage is stable. Furthermore, when the fluctuation of the input voltage or a state in which the fluctuation is predicted is detected by the voltage fluctuation detection means, the ratio of the power supply time to the power supply stop time to the voltage stabilization means during a predetermined period. May be controlled so that it becomes larger than that when the input voltage is stable.

Further, the control means controls the power feeding means so as to intermittently feed power to the voltage stabilizing means when the input voltage is stable, so that the fluctuation of the input voltage or the fluctuation of the input voltage is suppressed. When the predicted state is detected by the voltage fluctuation detection means, it is preferable to control the power supply means so that power is constantly supplied to the voltage stabilization means. Further, when the fluctuation of the input voltage or the state in which the fluctuation is predicted is detected by the voltage fluctuation detection means, the power supply means is always supplied to the voltage stabilization means for a predetermined period. It may be controlled. Further, the timekeeping device according to the present invention, the power supply device, the power supply by the output voltage from the power supply device,
And a time measuring means for measuring time.
In this case, it is possible to stably operate the time counting means while reducing the power consumption.

Further, the timekeeping device according to the present invention comprises a power generation means for generating electric power, a power storage means for storing the power from the power generation means, and a voltage stabilizing means for generating an output voltage with a stabilized input voltage. A power supply means for supplying power to the voltage stabilizing means using the voltage stored in the power storage means as the input voltage; and a voltage fluctuation detecting means for detecting a fluctuation of the input voltage or a state in which the fluctuation is predicted. A control means for controlling the power feeding operation of the power feeding means based on the detection result of the voltage fluctuation detecting means, and a time counting means for receiving power from the output voltage from the voltage stabilizing means and measuring time. It may be.

Further, the timing device according to the present invention has a power generation means for generating power, a first power storage means for storing the power from the power generation means, and a voltage level of the first power storage means. A voltage conversion means for converting the voltage of the first power storage means at a conversion ratio, a second power storage means for storing the voltage converted by the voltage conversion means and supplying the stored voltage, and an input voltage Voltage stabilizing means for generating a stabilized output voltage, power feeding means for feeding power to the voltage stabilizing means using the voltage stored in the second power storage means as the input voltage, and the voltage converting means. A change ratio detecting means for detecting a change in the conversion ratio, a control means for controlling a power supply operation of the power supplying means based on a detection result of the ratio change detecting means, and power supply by an output voltage from the voltage stabilizing means. Receiving , It may be provided with a timer means for measuring time.

The control method of the power supply device according to the present invention is premised on the provision of a constant voltage circuit for generating an output voltage in which the input voltage is stabilized in the power supply state, and the constant voltage circuit is provided for a predetermined first time. It has a first step of supplying power to the voltage circuit, and a second step of stopping the supply of power to the constant voltage circuit for a predetermined second time when the first time has elapsed. When the second step is completed, the first step and the second step are alternately repeated. According to this invention,
The constant voltage circuit alternately repeats the power supply state and the power supply stop state. In the power supply stopped state, the output voltage fluctuates according to the input voltage, but in the power supply state, the output voltage in which the input voltage is stabilized is generated, and thus the fluctuation range of the output voltage is small. Therefore, it is possible to reduce the power consumption while suppressing the fluctuation range of the output voltage.

The control method of the power supply device according to the present invention is premised on the provision of a constant voltage circuit for generating an output voltage in which the input voltage is stabilized in the power feeding state, and the fluctuation of the input voltage or the fluctuation is predicted. Is detected, and the power supply to the constant voltage circuit is controlled based on the detection result. According to the present invention, the power supply operation can be controlled according to the fluctuation of the input voltage or the state in which the fluctuation is predicted, so that the output voltage can be more stabilized and the power consumption can be further reduced.

A method of controlling a time measuring device according to the present invention comprises a constant voltage circuit for generating an output voltage with an input voltage stabilized in a power supply state, and a time measuring circuit for measuring a time of power supply by the output voltage. Assuming that, the generated electric power is stored in the first power storage device, the voltage of the first power storage device is converted at a conversion ratio according to the magnitude of the voltage of the first power storage device, and the converted voltage is converted into the converted voltage. Charging the second battery with the stored voltage, supplying the stored voltage as the input voltage to the constant voltage circuit, receiving power from the second battery,
Driving at least one of charging the first capacitor, changing the conversion ratio, and driving the motor by driving a motor that rotates a hand that displays time based on the measurement result of the timing circuit. The power supply to the constant voltage circuit and the stop of power supply are controlled based on the detection result. According to the present invention, at least one of charging of the first capacitor, change of the conversion ratio, and driving of the motor, which are factors that cause the input voltage to change, is detected. Power supply and power supply stop can be appropriately controlled, power consumption can be reduced, and the clock circuit can be operated stably. Here, when it is determined that the input voltage is stable based on the detection result, power is intermittently supplied to the constant voltage circuit, and the input voltage fluctuates or the fluctuation occurs depending on the detection result. When it is determined that the predicted state is reached, the ratio of the power supply time to the power supply stop time to the constant voltage circuit is set to be larger than that when the input voltage is stable, or the power is always supplied. It is preferable.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION [1. First Embodiment] [1-1: Overall Configuration] A first embodiment according to the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a schematic configuration of a timing device 1 according to the first embodiment of the present invention. The timekeeping device 1 is a wristwatch, and the user uses the belt connected to the device body by winding the belt around the wrist. Reference numeral 10 denotes an AC generator, which includes, for example, a rotary weight, a power generation rotor connected to the rotary weight rotates inside the power generation stator, and electric power induced in a power generation coil connected to the power generation stator. The electromagnetic induction type that can output to the outside is adopted. Reference numeral 20 denotes a rectifier circuit connected to the AC generator 10, which is a half-wave rectifier,
Alternatively, full-wave rectification is performed and the power is transferred to the large-capacity capacitor 3.
Charge to 0. In this example, the voltage Vdd (high potential side voltage) on the high potential side of the large-capacity capacitor 30 is set to the reference potential GND.
However, the low-potential-side voltage Vss1 (first low-potential-side voltage) may be used as the reference potential GND.

Next, 40 is a step-up / down circuit, which is configured to step up or step down the voltage across the large-capacity capacitor 30 to supply power to the capacitor 60. Here, the value obtained by dividing the output voltage of the step-up / step-down circuit 40 by the input voltage thereof will be referred to as step-up / step-down ratio K. The voltage detection circuit 50 supplies the step-up / down control signal CTLa to the step-up / down circuit 40 to instruct the step-up / down ratio K based on the low potential side voltage Vss of the large-capacity capacitor 30. Buck-boost magnification K is K> 1, K = 1, K
It can take any value of <1. For example, when the magnitude of the voltage Vss1 is not sufficient to operate each unit of the timekeeping device 1, the voltage detection circuit 50 generates the step-up / down control signal CTLa instructing K> 1. On the other hand, if the voltage Vss1 is too large and the voltage is applied to the capacitor 60 as it is, the voltage detection circuit 50 generates the step-up / down control signal CTLa instructing K <1 when the capacitor 60 is overcharged. To do. This makes it possible to apply an appropriate voltage to the capacitor 60. In the following description, the voltage on the low potential side of the capacitor 60 will be referred to as the second low potential side voltage Vs.
Let's call it s2.

Next, 70 is a constant voltage circuit connected to both ends of the capacitor 60, and is a second low potential side voltage Vs.
A voltage Vreg that is obtained by stabilizing s2 as an input voltage.
Is output. The constant voltage circuit 70 is configured to output a constant voltage even when the input voltage or the load current fluctuates in the power feeding state. However, the constant voltage circuit 70 is adapted to be supplied with power intermittently based on the sampling clock CKs. As will be described in more detail later, the constant voltage circuit 70 feeds back the output voltage to perform the stabilizing operation during the period when the sampling clock CKs is at “H” level, while the sampling clock CKs is “L”.
During the level period, the stabilizing operation is stopped, the gate voltage of the output transistor 708 is held by the hold capacitor 715 (see FIG. 6) formed therein, and the load current flows through the output transistor 708. ing. In this case, the voltage Vreg, which is the output voltage of the constant voltage circuit 70, changes according to the second low potential side voltage Vss2. Here, the constant voltage circuit 70 consumes electric power when the stabilizing operation by feedback is performed because the active element constituting the constant voltage circuit 70 operates. On the other hand, when the hold capacitor 715 holds the output voltage Vreg. Is configured to stop the power supply to the active element. In this example, the ratio (duty ratio R) of the "H" level period to one cycle of the sampling clock CKs is set to 1/8. Therefore, the power consumption of the constant voltage circuit 70 can be reduced to 1/8 as compared with the case where the constant voltage circuit 70 is always operated.

Next, 80 is an oscillating circuit, which oscillates at the vibration frequency of the crystal oscillator 81. A frequency divider 90 divides the main clock CKm supplied from the oscillation circuit 80 to generate the sampling clock CKs and the drive clock CKd for driving the second hand and the hour / minute hands. The oscillating circuit 80 and the frequency dividing circuit 90 are connected between the voltage Vreg and the high-potential side voltage Vdd, and are supplied with power from these power supply lines. In addition, the total current consumption is about 50 nA, which is extremely small. Further, 91 is a level shifter for converting the level of the drive clock CKd.
Specifically, the drive clock CKd swinging between the voltage Vreg and the high potential side voltage Vdd is set to the second low potential side voltage Vdd.
It is converted to one that swings between ss2 and the high potential side voltage Vdd. Next, 100 is a drive circuit, which is adapted to generate drive pulses based on the drive clock CKd. The step motor 110 is adapted to rotate according to the number of drive pulses. Also, the step motor 110
A hand movement mechanism 120 including a train wheel, a second hand, and an hour / minute hand is connected to the. Therefore, when the step motor 110 rotates based on the drive clock CKd, power is transmitted by the hand movement mechanism 120, and the second hand and the hour / minute hands move.

Referring now to FIG. 2, the AC generator 10, the rectifier circuit 20, the booster circuit 40 and the drive circuit 10 shown in FIG.
A specific configuration example of the 0, the step motor 110, and the hand movement mechanism 120 will be described. Note that, in FIG. 2, the constant voltage circuit 70, the oscillation circuit 80, and the like shown in FIG. 1 are not shown. First, the AC generator 10 will be described.
The AC generator 10 includes a power generator 240, a rotary weight 245, and a speed increasing gear 246. As the power generation device 240, an electromagnetic induction type AC power generation device in which the power generation rotor 243 rotates inside the power generation stator 242 and the electric power induced in the power generation coil 244 connected to the power generation stator 242 is output to the outside is adopted. Has been done. The rotary weight 245 functions as a means for transmitting kinetic energy to the power generation rotor 243. And this rotary weight 245
Of the power generation through the speed increasing gear 246
To be transmitted to. This rotary weight 245 is
The wristwatch-type timekeeping device 1 is designed to be able to turn within the device by capturing the movement of the user's arm. Therefore, the energy related to the life of the user is used to generate electric power, and the electric power can be used to drive the timing device 1.

The rectifying circuit 20 shown in FIG. 2 is configured as a circuit for half-wave rectifying the output of the AC generator 10 by using one rectifying diode 247. The rectifier circuit may be full-wave rectifier, or a plurality of active elements may be used to form the rectifier circuit. Buck-boost circuit 40
Is capable of performing step-up and step-down steps using a plurality of capacitors 249a and 249b. The power source boosted and lowered by the buck-boost circuit 40 is connected to the capacitor 6
It is stored at 0. In this case, the buck-boost circuit 40
Can adjust the voltage supplied to the capacitor 60 by the control signal CTLa from the voltage detection circuit 50.

Next, the step-up / down circuit 40 will be described with reference to FIGS. As shown in FIG. 3, the step-up / down circuit 40 has a switch SW1 having one terminal connected to the high potential side (Vdd) terminal of the large-capacity capacitor 30 and one terminal connected to the other terminal of the switch SW1. , A switch SW2 having the other terminal connected to the low potential side (Vss1) terminal of the large-capacity capacitor 30, a capacitor 249a having one terminal connected to a connection point between the switch SW1 and the switch SW2, and the other of the capacitors 249a. Switch SW3 having one terminal connected to the other terminal and the other terminal connected to the low potential side terminal of the large-capacity capacitor 30, and one terminal connected to the low potential side (Vss2) terminal of the capacitor 60 and the other terminal Is connected to the switch SW4 connected to the connection point between the capacitor 249a and the switch SW3, and the high potential side terminal of the large capacity capacitor 30. A switch SW11 having one terminal connected to the connection point between the high potential side terminal of the capacitors 60, one terminal connected to the other terminal of the switch SW11, the other terminal large-capacity capacitor 30
A switch SW12 connected to the low potential side terminal of the capacitor, a capacitor 249b having one terminal connected to a connection point between the switch SW11 and the switch SW12, and a capacitor 24
One terminal is connected to the other terminal of 9b, and switch S
The switch SW13 having the other terminal connected to the connection point between the W12 and the low potential side terminal of the large-capacity capacitor 30, the one terminal connected to the connection point between the capacitor 249b and the switch SW13, and the other terminal connected to the capacitor 60. Switch SW14 connected to the low potential side terminal of
One terminal is connected to the connection point between the switch 11 and the switch SW12, and the switch SW21 is connected to the connection point between the capacitor 249a and the switch SW3 and the other terminal.

Here, the outline of the operation of the step-up / down circuit will be described with reference to FIGS.
The step-up / step-down circuit 40 operates based on a predetermined step-up / step-down clock (not shown). At the time of triple boosting, the switch SW1 is operated at the first step-up / step-down clock timing (parallel connection timing) as shown in FIG. ON, switch SW2 OFF, switch SW3 ON, switch S
W4 off, switch SW11 on, switch SW1
2 is off, switch SW13 is on, switch SW14
Is turned off and the switch SW21 is turned off. The equivalent circuit of the step-up / down circuit 40 in this case is as shown in FIG. 5A, and power is supplied from the large-capacity capacitor 30 to the capacitors 249a and 249b.
Charging is performed until the voltage of the capacitors 249a and 249b becomes substantially equal to the voltage of the large capacity capacitor 30. Next, at the second buck-boost clock timing (serial connection timing), the switch SW1 is turned off, the switch SW2 is turned on, and the switch SW3 is turned off.
The switch SW4 is turned off, the switch SW11 is turned off, the switch SW12 is turned off, the switch SW13 is turned off, the switch SW14 is turned on, and the switch SW21 is turned on. The equivalent circuit of the step-up / down circuit 40 in this case is shown in FIG.
As shown in (b), the large-capacity capacitor 3
0, the capacitor 249a, and the capacitor 249b are connected in series, and the voltage of 3
The capacitor 60 is charged with the doubled voltage, and triple boosting is realized.

Next, the step motor 100 and the hand movement mechanism 120 shown in FIG. 2 will be described. The stepping motor 110 is also called a pulse motor, a stepping motor, a stepping motor, a digital motor, or the like, and is a motor driven by a pulse signal, which is often used as an actuator of a digital control device. In recent years, small and lightweight stepping motors have been widely adopted as actuators for small electronic devices or information devices suitable for carrying. Typical of such electronic devices are timing devices such as electronic timepieces, time switches and chronographs. Stepping motor 110 shown in FIG.
Is a drive coil 211 that generates a magnetic force by a drive pulse supplied from the drive circuit 100, and the drive coil 2
A stator 212 that is excited by 11 and a rotor 213 that rotates by a magnetic field that is excited inside the stator 212 are provided. Further, the stepping motor 110 is configured as a PM type (permanent magnet rotating type) in which the rotor 213 is configured by a disc-shaped two-pole permanent magnet. The stator 212 includes a drive coil 211.
The magnetic saturation part 217 is provided so that different magnetic poles are generated in the respective phases (poles) 215 and 216 around the rotor 213 by the magnetic force generated in 1. In addition, in order to define the rotation direction of the rotor 213, the stator 21
An inner notch 218 is provided at an appropriate position on the inner circumference of the rotor 2, so that a cogging torque is generated to stop the rotor 213 at an appropriate position.

The rotor 213 of the stepping motor 110
The rotation of is transmitted to the second hand 261 by the second intermediate wheel 251 and the second wheel (second indicator wheel) 252 in the hand movement mechanism 120 meshed with the rotor 213 via the pinion, and the second is displayed. Further, the rotation of the second wheel 252 is transmitted to each hand by the minute intermediate wheel 253, the minute indicator wheel 254, the date back wheel 255 and the hour wheel (hour indicator wheel) 256. A minute hand 262 is connected to the minute indicator wheel 254, and further, the hour wheel 2
An hour hand 263 is connected to 56. The hour and minute are displayed by these respective hands in conjunction with the rotation of the rotor 213. Further, although not shown in the drawing, a train wheel 250 including the cars 251 to 256 has a transmission system for displaying a date (calendar) or the like (for example, in the case of displaying a date, a cylinder intermediate car). Of course, it is also possible to connect a day driving intermediate car, a day driving car, a day driving car, etc. In this case, it is possible to further provide a calendar correction system train wheel (for example, a first calendar correction transmission vehicle, a second calendar correction transmission vehicle, a calendar correction vehicle, a date wheel, etc.).

Next, the drive circuit 100 shown in FIG. 2 will be described. The drive circuit 100 supplies various drive pulses to the stepping motor 110 under the control of the drive pulse control circuit 230 including a combinational logic circuit. The drive circuit 100 includes a p-channel MOS transistor 233a and an n-channel MOS transistor 232 connected in series.
a and p channel MOS transistors 233b and n
It has a bridge circuit composed of channel MOS transistors 232b. In addition, the drive circuit 100
Are p-channel MOS transistors 233a and 23
Rotation detecting resistors 235 connected in parallel with 3b, respectively.
a and 235b and these resistors 235a and 23
P channel MOS transistors 234a and 234 for sampling for supplying a chopper pulse to 5b.
b. Therefore, these MOS transistors 232a, 232b, 233a, 233b, 234
By applying control pulses having different polarities and pulse widths from the driving pulse control circuit 230 to the respective gate electrodes of a and 234b at different timings, driving pulses having different polarities are supplied to the driving coil 211, or the rotor 213 is driven. It is possible to supply a detection pulse for exciting the induced voltage for rotation detection and magnetic field detection.

[1-2: Constant Voltage Circuit] Next, the constant voltage circuit 7
The configuration of 0 will be described with reference to FIG. FIG. 6 shows the circuit configuration of the constant voltage circuit 70. As shown in the figure, the constant voltage circuit 70 includes input transistors 701 and 702, load transistors 704 and 705, a reference voltage generating transistor 706, output transistors 707 and 708, constant current sources 709 to 711, switches 712 to 714, and The holding capacitor 715 is generally configured. Of these, the input transistors 701 and 702 and the transistor 706 are P-channel field effect transistors, and the load transistors 704 and 705 and the output transistors 707 and 708 are N-channel field effect transistors. The switches 712 to 714 are controlled to be turned on / off by the sampling clock CKs, and the sampling clock CKs is
It is turned on during the "H" level and turned off during the "L" level. Therefore, if the duty ratio R of the sampling clock CKs is ⅛, the constant voltage circuit 70 operates for ⅛ of the entire period. It can be reduced to 8.

The drains of the input transistors 701 and 702 are connected to the second drains of the input transistors 701 and 702 via load transistors 704 and 705, respectively.
Are connected to the low potential side voltage Vss2. In this case, the load transistors 704 and 705 function as active loads. A constant current source 710 is connected to the sources of the input transistors 701 and 702. Therefore, the input transistors 701 and 702, the load transistors 704 and 705, and the constant current source 710 form a differential amplifier. Here, the gate of the input transistor 701 is connected to the positive input terminal of the differential amplifier and the input transistor 7
The 02 gate differential amplifiers correspond to the negative input terminals, respectively.
In this example, the gate voltage of the input transistor 701 is
The voltage becomes almost equal to the threshold voltage Vth of the transistor 706, and the voltage acts as a reference voltage. Therefore, when the switches 712 to 714 are in the ON state, a feedback loop of the input transistor 701 → the output transistor 708 → the output transistor 708 → the input transistor 702 is formed, thereby stabilizing the value of the voltage Vreg. On the other hand, when the switches 712 to 714 are off, the hold capacitor 715 holds the gate voltage of the output transistor 708 and the voltage Vre
g is powered. For example, in a general timepiece driven by a silver battery, the power supply voltage is set to 1.58V and the output voltage Vreg is set to about 0.8V.

[1-3. Operation of First Embodiment] Next, the first
The operation of the embodiment will be described with reference to the drawings. Figure 7
3 is a timing chart for explaining the operation of the timekeeping device 1. In this example, the second low-potential-side voltage Vss2 rises from time t1 toward the high-potential side, turns to inversion at time t2, and returns to the level at time t1 at time t3. This is because the terminal voltage of the capacitor 60 decreases from time t1, changes from time t2 to increase, and returns to the level at time t1 at time t3, due to charging and discharging of the capacitor 60. First, when the sampling clock CKs is at the “H” level, the switch 7 shown in FIG.
12 to 714 are turned on, and the above-mentioned feedback loop is formed. Therefore, when the value of the voltage Vreg decreases, the gate voltage of the input transistor 702 decreases, and the current flowing through the input transistor 701 becomes relatively smaller than the current flowing through the input transistor 702. Then, the drain voltage of the input transistor 701 increases and the current flowing through the output transistor 708 decreases. As a result, the value of the voltage Vreg increases. Also,
Conversely, when the value of the voltage Vreg rises, the gate voltage of the input transistor 702 rises and the input transistor 701
Is relatively larger than the current flowing through the input transistor 702. Then, the input transistor 7
The drain voltage of 01 drops and the output transistor 708
The current flowing through it increases. As a result, the value of the voltage Vreg decreases. That is, during the period when the sampling clock CKs is at “H” level, the voltage Vreg can be controlled to match the predetermined reference voltage Vref.

On the other hand, while the sampling clock CKs is at the "L" level, the switches 712 to 71 are
4 is turned off. Therefore, the voltage Vreg is not stabilized by the active element, and the hold capacitor 71
5 holds the gate voltage of the output transistor 708,
The oscillator circuit 80 and the frequency divider circuit 90 are driven. In this case, the fluctuation of the second low potential side voltage Vss2 is caused by the voltage Vre.
reflected in g. However, the voltage Vreg is stabilized in the cycle of the sampling clock CKs. Therefore, the voltage Vreg fluctuates under the influence of the low potential side voltage Vss in the period Tb as shown in FIG. 7, but coincides with the reference voltage Vref in each period Ta. Therefore,
The fluctuation width Va of the voltage Vreg can be suppressed to an extent sufficient to operate the oscillation circuit 80 and the frequency dividing circuit 90. As described above, in the first embodiment, the constant voltage circuit 7
Since the power supply to 0 is performed intermittently, the power consumption of the constant voltage circuit 70 can be significantly reduced. As a result, the power consumption of the entire timekeeping device 1 can be reduced, and the continuous use time can be significantly extended.

[1-4. Modification of First Embodiment] The constant voltage circuit 70 described above may be the one shown in FIG. This constant voltage circuit 70 'is the constant voltage circuit 7 shown in FIG.
At 0, the elements connected to the high-potential side voltage Vdd and the elements connected to the low-potential side voltage Vss are reversed, and the P-channel transistor and the N-channel transistor are exchanged, so that the low-potential side voltage Vss2. Is a circuit configuration with the reference potential. In addition, the constant voltage circuit 70
In FIG. 9, the low potential side voltage Vss may be supplied through the switches 715 to 718 as shown in FIG. 9, or in the constant voltage circuit 70 ′ as shown in FIG.
The second low-potential-side voltage Vss2 may be supplied via ~ 814.

[2. Second Embodiment] In the above-described first embodiment, the power consumption is reduced by controlling the power supply to the constant voltage circuit 70 based on the sampling clock CKs that has a constant duty ratio. At this time, even if the second low-potential-side voltage Vss2 fluctuates to some extent, the constant voltage circuit 70 periodically performs the stabilizing operation, so that the fluctuation width Va of the voltage Vreg can be suppressed. However, when the stepper motor 110 is rotated by the drive pulse, a large current is applied to the drive circuit 100.
Therefore, the second low-potential-side voltage Vss2 sharply rises. Further, when the AC generator 10 is in a power generation state and the large-capacity capacitor 30 is charged with current, the second resistance is generated by the internal resistance of the large-capacity capacitor 30.
The low-potential-side voltage Vss2 of V.sub.2 rapidly drops.
Further, if the step-up / down ratio K of the step-up / step-down circuit 40 increases, the second low-potential side voltage Vss2 drops sharply, and if the step-down ratio K decreases, the second low-potential side voltage Vss2 rises sharply. It will be. In this way, the second low-potential-side voltage Vs
When s changes abruptly, the fluctuation width Va of the voltage Vreg increases, and the oscillation frequency of the oscillation circuit 80 may become unstable or the frequency dividing circuit 90 may malfunction. In the worst case, the oscillation of the oscillator circuit 80 will stop. on the other hand,
If the ratio of the “H” level period in one cycle of the sampling clock CKs is increased, the second low potential side voltage V
Although the fluctuation range of the voltage Vreg can be suppressed even if the ss2 rapidly changes, the reduction rate of the power consumption of the constant voltage circuit 70 decreases.

The second embodiment has been made in view of the above-mentioned circumstances, and suppresses the fluctuation of the voltage Vreg even when the second low-potential-side voltage Vss2 changes abruptly, and the constant voltage circuit. The purpose is to increase the reduction rate of the power consumption of 70. [2-1. Configuration of Second Embodiment] FIG. 11 is a block diagram of a timing device 2 according to the second embodiment. The timing device 2 uses a stabilized power supply unit A instead of the constant voltage circuit 70, and a power generation state detection circuit 1 that detects the power generation state of the AC generator 10.
Except for the fact that 30 is newly used, it is configured substantially the same as the timing device 1 of the first embodiment shown in FIG. The power generation state detection circuit 130 detects charging of the large-capacity capacitor 30 by detecting the power generation state of the AC generator 10. The power generation state detection circuit 130 of this example includes a resistor 131 and an operational amplifier 132 as shown in the figure. The operational amplifier 132 is provided with a slight offset so that malfunction due to noise can be prevented. The positive input terminal of the operational amplifier 132 is connected to one end X1 of the resistor 131 connected to the large-capacity capacitor 30, and its negative input terminal is the other end X2 of the resistor 131.
It is connected to the. Therefore, when an electromotive voltage is generated in the AC generator 10 and a charging current flows in a closed loop of the rectifier circuit 20 → high-potential side voltage Vdd → large-capacity capacitor 30 → resistor 131 → rectifier circuit 20, the output signal of the operational amplifier 132 is “ It goes to H "level, and goes to" L "level when no charging current flows. Then, the output signal of the operational amplifier 132 is output as the first control signal CTL1.

When the charging current flows into the large-capacity capacitor 30, the internal resistance of the large-capacity capacitor 30 causes the first low-potential-side voltage Vss1 to drop sharply. The step-up / down circuit 40 uses the first low-potential-side voltage Vss1.
Since the second low-potential-side voltage Vss2 is generated by stepping up and down the voltage,
Along with this, the second low-potential-side voltage Vss2 also drops sharply. Therefore, referring to the first control signal CTL1,
One period during which the second low-potential-side voltage Vss2 changes rapidly can be detected. Next, the second control signal CTL2 output from the voltage detection circuit 50 is at the “H” level during a period from immediately before the step-up / down control signal CTLa changes until a predetermined time elapses. The period is "L" level. When the step-up / down ratio K changes, the second low-potential-side voltage Vss2 sharply changes and converges after a certain time passes. Here, the time when the second control signal CTL2 is at "H" level is determined according to the time required for convergence. Therefore, by referring to the second control signal CTL2, it is possible to detect the period during which the second low-potential-side voltage Vss2 changes rapidly.

Next, the drive circuit 100 and the capacitor 6
0 is equivalent to a low-pass filter with respect to the second low-potential-side voltage Vss2. Therefore, when the step motor 110 is driven by the drive pulse from the drive circuit 100, the second low-potential-side voltage Vss2 suddenly changes, but during the fixed period after the valid period of the drive pulse ends, The low potential side voltage Vss2 of 2 fluctuates. The third control signal CTL3 output from the drive circuit 100 is generated by assuming this. Specifically, not only during the period when the drive pulse is valid, but also during the period immediately before the drive pulse is valid until the fluctuation of the second low-potential-side voltage Vss2 converges, the level becomes “H” level, and in other periods. "L"
It becomes a level. Therefore, by referring to the third control signal CTL3, it is possible to detect the period during which the second low-potential-side voltage Vss2 rapidly changes. Next, stabilized power supply unit A
Is composed of the selection circuit 71 and the constant voltage circuit 70 described in the first embodiment. The first clock CK1 (duty ratio R = 1 is applied to each signal input terminal of the selection circuit 71).
/ 8), the second clock CK2 (duty ratio R = 1 /
2), third clock CK3 (duty ratio R = 3 /
4) and the "H" level signal H are supplied. In addition, the control input terminal is
The third control signals CTL1 to CTL3 are supplied. This selection circuit 71 has the first to third control signals CTL1 to
First to third clocks CK1 to CK based on CTL3
3 or "H" level signal H is selected. This selection signal is used as the sampling clock CKs in the constant voltage circuit 70.
Is supplied to.

There are various modes of selection, but in this example, selection is performed based on the truth table shown in FIG. If all the first to third control signals CTL1 to CTL3 are at "L" level, the second low potential side voltage Vss2 does not fluctuate rapidly. Therefore, even if the stabilizing operation of the voltage Vreg is periodically performed at a somewhat long time interval, the voltage Vreg is
Changes little. Therefore, in such a case, the first clock CK1 having the smallest duty ratio R among the first to third clocks CK1 to CK3 is supplied to the constant voltage circuit 70 as the sampling clock CKs. In this case, the power consumption of the constant voltage circuit 70 can be reduced to 1/8 as in the first embodiment. When only the first control signal CTL1 is at "H" level, the second clock CK2 is supplied to the constant voltage circuit 70 as the sampling clock CKs. In this case, the duty ratio R
Will be used as the sampling clock CKs. Therefore, even if the second low-potential-side voltage Vss2 suddenly changes due to the current flowing into the large-capacity capacitor 30, the constant voltage circuit 7
Since the period during which 0 stabilizes is relatively long, fluctuations in the voltage Vreg are suppressed.

When the second control signal CTL2 is at "H" level and the third control signal CTL3 is at "L" level, the third clock CK3 is the sampling clock C.
It is supplied to the constant voltage circuit 70 as Ks. In this case, the third clock CK whose duty ratio R is 3/4
3 will be used as the sampling clock CKs. When the second control signal CTL1 is at “H” level, the first
The use of the third clock CK3 having a larger duty ratio R than when the control signal CTL1 of the above is “H” level is used because the rate of change (Vss2 of the second low potential side voltage Vss2) is used.
/ Time) is larger. That is, switching of the step-up / step-down ratio K starts immediately when the step-up / step-down control signal CTLa changes, but charging by power generation is performed relatively slowly. Therefore, as in this example, by varying the duty ratio R of the sampling clock CKs according to the rate of change of the second low-potential-side voltage Vss2, the fluctuation of the voltage Vreg is suppressed while the constant voltage circuit 70 consumes. Electric power can be reduced. Also, the third control signal CT
When L3 is at "H" level, the "H" level signal H is supplied to the constant voltage circuit 70 as the sampling clock CKs. In this case, the constant voltage circuit 70 is always operated. This is because the second low-potential-side voltage Vss2 fluctuates the most when the step motor 110 is driven, and further, the second low-potential-side voltage Vss2 fluctuates in the rising direction during the period in which the drive pulse is valid. Is. When the second low-potential-side voltage Vss2 rises, the power supply voltage of the oscillation circuit 80 and the frequency dividing circuit 90 decreases, the oscillation frequency becomes unstable, and in the worst case, oscillation stops. However, in this example, the constant voltage circuit 70 always operates during the period in which the drive pulse is valid, so that the oscillation circuit 80 and the frequency dividing circuit 90 can be stably operated.

[2-2. Operation of Second Embodiment] Next, the second embodiment
The operation of the embodiment will be described. FIG. 13 is a timing chart for explaining the operation of the timing device 2.
In this example, the step-up / down ratio K is not changed, and the second control signal CTL2 is always at "L" level. As shown in this figure, if the first to third control signals CTL1 to CTL3 are at the "L" level in the period T0 before the time t1, the selection circuit 71 has a duty ratio R of 1/8. The first clock CK1 is supplied to the constant voltage circuit 70 as the sampling clock CKs. Period T0
Then, since the second low-potential-side voltage Vss2 does not change abruptly, the voltage Vreg hardly changes. Therefore,
Even if the power supply of the constant voltage circuit 70 is reduced to 1/8, the oscillation circuit 80
And the frequency dividing circuit 90 operate stably.

Next, a period T from time t1 to time t2
When the charging current flows in 1, the second low-potential-side voltage Vss2 gradually decreases in the period T1. When the charging current flows, the charging state detection unit 130 detects this and supplies the selection circuit 71 with the first control signal CTL1 that is at the “H” level in the period T1. Then, the selection circuit 71 causes the second clock CK2 whose duty ratio R is set to 1/2.
Is supplied to the constant voltage circuit 70 as the sampling clock CKs. In this case, the second low-potential-side voltage Vss2 fluctuates rapidly, but the duty ratio R of the sampling clock CKs becomes 1/2, so the fluctuation range V of the voltage Vreg is V.
It is possible to make a small. Therefore, even if the second low-potential-side voltage Vss2 suddenly changes, the change in the voltage Vreg can be suppressed, so that the oscillation circuit 80 and the frequency dividing circuit 90 can be stably operated. Next, in the period T2 from the time t2 to the time t3, since the first to third control signals CTL1 to CTL3 are at the “L” level, the constant voltage circuit 70 consumes power in the same manner as in the period T0. It operates in the state of being squeezed to 1/8.

Next, the drive pulse changes from time t4 to time t5.
Assuming that the third control signal CTL3 is at the "H" level during the period up to this time, the third control signal CTL3 is at the "H" level during the period T3 from the time t3 to the time t6. Then, the selection circuit 71 supplies the “H” level signal H to the constant voltage circuit 70 as the sampling clock CKs. In this case, since the constant voltage circuit 70 always operates, the voltage Vreg is kept at the constant reference voltage Vref even if the second low-potential-side voltage Vss2 suddenly changes. Therefore, the oscillation circuit 80 and the frequency dividing circuit 90 can be stably operated. As described above, in the second embodiment, the constant voltage circuit 7
A case where the second low-potential-side voltage Vss, which is an input voltage of 0, fluctuates rapidly is detected. Since the power supply is controlled, the second low potential side voltage Vs
The fluctuation width Va of the voltage Vreg can be suppressed even when s2 rapidly changes, and the second low-potential-side voltage Vss can be suppressed.
When 2 is stable, the ratio of the power supply stop period is increased, so that the power consumption of the constant voltage circuit 70 can be significantly reduced.

[2-3. Modification of Second Embodiment] (1) In the timekeeping device 2 according to the second embodiment, it goes without saying that the constant voltage circuit 70 shown in FIGS. 8, 9, and 10 may be used. (2) In the timing device 2 according to the second embodiment, the power generation state of the AC generator 10 is detected based on the charging current to the large-capacity capacitor 30, but the present invention is not limited to this. Alternatively, the power generation state of the AC generator 10 may be detected based on the charging current to the capacitor 60. further,
The power generation state of the AC generator 10 may be detected based on the electromotive voltage of the AC generator 10. In this case, the AC generator 1
The electromotive voltage of 0 may be compared with a predetermined reference voltage, and the power generation state may be detected based on the comparison result.

A modified example of the power generation state detection circuit 130 shown in FIG. 2 in the case of detecting the power generation state based on the comparison result of the electromotive voltage of the AC generator 10 will be described with reference to FIG. The power generation state detection circuit 130a shown in FIG.
Two P-channel transistors 133 and 134 and a constant current circuit 135 in which the drain terminals of the P-channel transistors 133 and 134 are connected to the terminal on the current drawing side.
And a capacitor 136 connected in parallel to the constant current circuit 135, and an inverter 137 in which the drain terminals of the P-channel transistors 133 and 134 are connected to the input.
And an inverter 138 connected in series to the inverter 137. The gate terminals AG1 and AG2 of the P-channel transistors 133 and 134 are connected to FIG.
The terminal voltage across the generator coil 244 is applied, and the voltage Vdd is applied to each gate terminal. The voltage Vss1 or the voltage Vss2 is applied to the other terminals of the constant current circuit 135 and the capacitor 136. The output signal of the inverter 138 is the first control signal CTL1.

In the above structure, when an electromotive voltage is generated in the AC generator 10, the P-channel transistors 133, 1
34 are alternately turned on, a voltage is generated between the terminals of the capacitor 136, and the input of the inverter 137 becomes "L" level, so that the control signal CTL1 output from the inverter 138 becomes "H" level. . On the other hand, when the electromotive voltage is not generated in the AC generator 10, the P-channel transistors 133 and 134 remain off, and the electric charge of the capacitor 136 is discharged by the constant current circuit 135. Since the voltage between terminals decreases and the input of the inverter 137 becomes "H" level, the control signal CTL1 output from the inverter 138 becomes "L" level.

(3) In the timing device 2 according to the second embodiment, the power generation state of the AC generator 10, the change in the step-up / down ratio K in the step-up / down circuit 40, and the step motor 11
Although the case where the second low-potential-side voltage Vss2 fluctuates abruptly is detected based on the driving of 0, the present invention is not limited to this, and it is possible to appropriately combine these elements to achieve the second
It may be possible to detect a case where the low potential side voltage Vss2 of fluctuates. Further, each element that rapidly changes the second low-potential-side voltage Vss2 is not limited to those described above. For example, the timekeeping device is provided with a calendar display mechanism including a train wheel and a date wheel, and this is a step motor. When driving with a motor different from 110, a driving pulse for driving the motor may be considered.

Further, another factor that causes the second low-potential side voltage Vss2 to fluctuate abruptly is an alarm device when an alarm device (buzzer, voice synthesizer for generating a voice signal, etc.) is provided in the timing device. Drive current, lighting current for lighting when a lighting device is provided, and the like. Therefore, when these configurations are adopted, the constant voltage circuit can be controlled by using the drive control signal of the alarm device or the control signal of the illumination lamp. Alternatively, the variation of the second low-potential-side voltage Vss2 may be directly detected. For example, the second low-potential-side voltage Vss2 may be detected.
The rate of change of the second low-potential-side voltage Vss2 is detected by using a differentiation circuit configured by ss2 including a capacitor and a resistor, and this is compared with each predetermined threshold value. Based on the comparison result, the first ~ One of the third clocks CK1 to CK3 and the "H" level signal H may be selected and used as the sampling clock CKs.

Further, the drive pulse width generated by the drive circuit 100 for driving the step motor 110 is selected from several types according to the load, and the first to third clocks CK1 to CK3 are selected accordingly. , Or the “H” level signal H may be selected and used as the sampling clock CKs. Specifically, when the step motor 110 cannot be rotated by a normal drive pulse, a wide drive pulse is generated (occurrence frequency is low), and in this case, the "H" level signal H is selected and set. The voltage circuit 70 may be constantly operated, while the first to third clocks CK1 to CK3 may be appropriately selected and the constant voltage circuit 70 may be sampled when a normal drive pulse is generated.

In addition, the time display mode for operating the hand movement mechanism 120 and the hand movement mechanism 1 for reducing the power consumption.
2 such as power save mode to stop the operation of 20
In the power save mode, there is no large power consumption and there is no fluctuation in the power supply voltage. Therefore, the duty ratio R of the sampling clock CKs is set to a smaller value, 1/16, and the first to the first time display modes are set. The sampling clocks CKs may be selected by selecting the three clocks CK1 to CK3 or the “H” level signal H. In short, the second low potential side voltage Vs
Any type may be used as long as it can detect the case where s2 rapidly changes.

Further, in the second embodiment, the sampling clock CKs is selected by selecting the first to third clocks CK1 to CK3 or the "H" level signal H. However, except the "H" level signal H, The duty ratio R of the sampling clock CKs may be varied.

[3. Modified Example of the Present Invention] (1) In each of the above-described embodiments, the AC generator 10 that converts the rotary motion of the rotary weight into electric energy is adopted, but the present invention is not limited to this. Instead, for example, by generating a rotary motion by the restoring force of the mainspring and generating an electromotive force by the rotary motion, or by applying vibration or displacement by external or self-excitation to the piezoelectric body, power is generated by the piezoelectric effect. It may be a power generation device. Further, power generation by a solar cell or thermal power generation may be used. In addition, the AC generator 10 and the rectifier circuit 2
Instead of 0, it is also possible to use a primary storage battery or a secondary storage battery. However, when using a primary or secondary storage battery, it is not necessary to detect the power generation state.

(2) In each of the above-described embodiments, a wristwatch-type timekeeping device has been described as an example, but the present invention is not limited to this, and a pocket watch or the like may be used instead of a wristwatch. . Also, calculators, mobile phones, portable personal computers, electronic organizers, portable radios, portable VTs.
It can also be applied to portable electronic devices such as R.

(3) In each of the above-described embodiments, the reference potential (GND) is set to Vdd (high potential side).
Of course, the reference potential (GND) may be set to Vss (low potential side).

(4) In each of the above-described embodiments, the explanation has been made on the assumption that the step-up / down circuit 40 is used. However, instead of the step-up / step-down circuit 40, a step-up circuit that performs only a step-up operation may be used. Of course. When the electromotive voltage of the AC generator 10 is large, the step-up / down circuit 40, the voltage detection circuit 50, and the capacitor 60 are omitted, and both ends of the large-capacity capacitor 30 are directly connected to the constant voltage circuit 70. Good.

[0054]

As described above, according to the features of the invention of the present invention, the voltage stabilizing means is operated intermittently, so that the power consumption of the power supply device can be reduced. Further, since the power supply to the voltage stabilizing means is controlled according to the fluctuation of the input voltage, the fluctuation range of the output voltage can be suppressed while reducing the power consumption of the power supply device.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a timing device according to a first embodiment of the present invention.

FIG. 2 shows an AC generator 10, a rectifier circuit 20, a step-up / down circuit 40, and a drive circuit 1 in the timing device according to the embodiment of the present invention.
00 is a diagram showing a specific configuration example of a step motor 110 and a hand movement mechanism 120.

3 is a schematic configuration diagram of a step-up / down circuit 40 of FIG.

4 is an operation explanatory diagram of the step-up / down circuit 40 of FIG.

5 is an equivalent circuit for triple boosting in the step-up / down circuit 40 of FIG.

6 is a circuit diagram of a constant voltage circuit according to the embodiment shown in FIG.

FIG. 7 is a timing chart for explaining the operation of the timing device according to the same embodiment.

FIG. 8 is a circuit diagram showing an example of a constant voltage circuit according to a modified example of the same embodiment.

FIG. 9 is a circuit diagram showing an example of a constant voltage circuit according to a modified example of the same embodiment.

FIG. 10 is a circuit diagram showing an example of a constant voltage circuit according to a modified example of the same embodiment.

FIG. 11 is a block diagram showing a configuration of a timing device according to a second embodiment of the present invention.

FIG. 12 is a truth table of the selection circuit according to the same embodiment.

FIG. 13 is a timing chart for explaining the operation of the timing device according to the same embodiment.

FIG. 14 is a circuit diagram showing a modified example of the power generation state detection circuit according to the same embodiment.

[Explanation of symbols]

1, 2 ... Timing device 10 ... AC generator (power generation means) 30 ... Large-capacity capacitor (first power storage means) 40 ... Buck-boost circuit (voltage conversion means) 50 ... Voltage detection circuit (voltage fluctuation detection means, magnification change) Detecting means) 60 ... Capacitor (second storage means) 70 ... Constant voltage circuit (voltage stabilizing means) 71 ... Selection circuit (control means) 80 ... Oscillation circuit (processing means, clocking means) 90 ... Dividing circuit (processing) Means, clocking means) 100 ... Drive circuit (voltage fluctuation detection means) 110 ... Step motor (power consumption means, motor) 130, 130a ... Power generation state detection circuit (voltage fluctuation detection means, charge detection means) 712-714 ... Switch ( Power supply means) Vdd ... High potential side voltage Vss1 ... First low potential side voltage Vss2 ... Second low potential side voltage (input voltage)

   ─────────────────────────────────────────────────── ─── Continued front page    F term (reference) 2F002 AA07 AB06 AD06 AD07 AE00                       AE01 DA00 GA04 GA06                 2F084 AA01 AA07 GG02 GG03 GG04                       JJ05 JJ07 LL01 LL02 LL03                 5H430 BB05 BB09 BB11 EE06

Claims (20)

[Claims] 1. A voltage stabilizing unit that generates an output voltage that stabilizes an input voltage in a power supply state, a power feeding unit that supplies power to the voltage stabilizing unit, and a fluctuation or fluctuation of the input voltage is predicted. A power supply device, comprising: a voltage fluctuation detecting unit that detects a state in which the electric power is supplied, and a control unit that controls a power feeding operation of the power feeding unit based on a detection result of the voltage fluctuation detecting unit. 2. The control means controls the power supply means to repeat power supply to the voltage stabilization means and stop power supply at a constant cycle when the input voltage is stable, and the input means When a voltage fluctuation or a state in which the fluctuation is predicted is detected by the voltage fluctuation detecting means, the ratio of the power supply time to the power supply stop time to the voltage stabilizing means is compared with that when the input voltage is stable. The power supply device according to claim 1, wherein the power supply unit is controlled so as to become larger. 3. The control means controls the power feeding means so as to intermittently feed power to the voltage stabilizing means when the input voltage is stable, so that fluctuations in the input voltage or fluctuations in the input voltage may occur. The power supply device according to claim 1, wherein when the predicted state is detected by the voltage fluctuation detection means, the power supply means is controlled so that power is constantly supplied to the voltage stabilization means. 4. A portable electronic device comprising the power supply device according to claim 1, wherein a power generation unit that generates power and power stored from the power generation unit are stored, and the stored voltage is the input voltage. And a power storage unit that supplies power to the power supply device, and the voltage fluctuation detection unit is configured as a charge detection unit that detects charging of the power storage unit. 5. The portable electronic device according to claim 4, wherein the charging detection unit detects charging of the power storage unit based on a charging current to the storage unit. 6. The portable electronic device according to claim 4, wherein the charging detection unit detects charging of the power storage unit based on an electromotive voltage of the power generation unit. 7. A portable electronic device comprising the power supply device according to claim 1, comprising: a power generation unit that generates power, a first power storage unit that stores the power from the power generation unit, and A voltage conversion unit that converts the voltage of the first power storage unit at a conversion ratio according to the voltage magnitude of the first power storage unit, stores the voltage converted by the voltage conversion unit, and stores the stored voltage. A second power storage unit that supplies the power supply device as the input voltage, wherein the voltage fluctuation detection unit is configured as a magnification change detection unit that detects a change in the conversion magnification in the voltage conversion unit. Portable electronic device that does. 8. A portable electronic device including the power supply device according to claim 1, further comprising a power consumption unit that receives power supply of the input voltage and consumes power, wherein the voltage fluctuation detection unit includes: A portable electronic device configured as power consumption detection means for detecting an increase in power consumption of the power consumption means. 9. The portable electronic device according to claim 8, wherein the power consumption unit is a motor, and the power consumption detection unit increases the power consumption based on a drive signal of the motor. A portable electronic device characterized by detecting. 10. The control means controls the power supply means to repeat power supply to the voltage stabilization means and stop power supply at a constant cycle when the input voltage is stable, and the input means When a voltage fluctuation or a state in which the fluctuation is predicted is detected by the voltage fluctuation detecting means, the ratio of the power supply time to the power supply stop time to the voltage stabilizing means is compared with that when the input voltage is stable. The portable electronic device according to any one of claims 4, 7 and 8, wherein the power supply unit is controlled so as to become larger. 11. When the fluctuation of the input voltage or a state in which the fluctuation is predicted is detected by the voltage fluctuation detecting means, power is supplied to the voltage stabilizing means for a power supply stop time during a predetermined period. 11. The portable electronic device according to claim 10, wherein the power supply unit is controlled so that a ratio of time becomes larger than that in a case where the input voltage is stable. 12. The control means controls the power feeding means so as to intermittently feed power to the voltage stabilizing means when the input voltage is stable, and the fluctuation or the fluctuation of the input voltage 9. The power feeding means is controlled so that power is constantly fed to the voltage stabilizing means when a predicted state is detected by the voltage fluctuation detecting means. The portable electronic device according to the item. 13. When the fluctuation of the input voltage or a state in which the fluctuation is predicted is detected by the voltage fluctuation detecting means, the voltage stabilizing means is always supplied with power for a predetermined period. The portable electronic device according to claim 12, wherein the power supply unit is controlled. 14. A time measuring device comprising: the power supply device according to claim 1; and a time measuring device that receives power from an output voltage from the power supply device and measures time. 15. Power generation means for generating power, power storage means for storing power from the power generation means, voltage stabilization means for generating an output voltage with an input voltage stabilized, and the power storage means Voltage as the input voltage,
A power supply unit that supplies power to the voltage stabilizing unit, a voltage fluctuation detection unit that detects a fluctuation of the input voltage or a state in which the fluctuation is predicted, and a power fluctuation of the power supply unit based on a detection result of the voltage fluctuation detection unit. A time measuring device comprising: a control unit that controls a power feeding operation; and a time counting unit that receives power from an output voltage from the voltage stabilizing unit and measures time. 16. A power generation unit that generates power, a first power storage unit that stores the power from the power generation unit, and the first power storage unit at a conversion ratio according to the magnitude of the voltage of the first power storage unit. Voltage conversion means for converting the voltage of the storage means, second storage means for storing the voltage converted by the voltage conversion means and supplying the stored voltage, and an output voltage for stabilizing the input voltage. A voltage stabilization unit that generates the voltage, a power supply unit that supplies power to the voltage stabilization unit using the voltage stored in the second power storage unit as the input voltage, and a change in conversion ratio in the voltage conversion unit is detected. Magnification change detection means, control means for controlling the power supply operation of the power supply means based on the detection result of the magnification change detection means, and timing for receiving power and measuring time by the output voltage from the voltage stabilizing means. Timing device being characterized in that a stage. 17. A method of controlling a power supply device comprising a constant voltage circuit for generating an output voltage which stabilizes an input voltage in a power feeding state, wherein power is supplied to said constant voltage circuit only for a first predetermined time. A second step of stopping the power supply to the constant voltage circuit for a predetermined second time when the first time has passed, and the second step When the above is finished, the first step and the second step are alternately repeated, and the control method of the power supply device is characterized in that. 18. A method of controlling a power supply device comprising a constant voltage circuit for generating an output voltage which stabilizes an input voltage in a power feeding state, wherein a fluctuation of the input voltage is detected, and a detection result of the fluctuation of the input voltage is detected. A method for controlling a power supply device, characterized in that power supply to the constant voltage circuit is controlled based on the above. 19. A method for controlling a time measuring device, comprising: a constant voltage circuit for generating an output voltage with an input voltage stabilized in a power supply state; and a time measuring circuit for measuring a time of power supply by the output voltage. Stored electric power in the first electric storage device, and at a conversion ratio according to the magnitude of the voltage of the first electric storage device,
The voltage of the first battery is converted, the converted voltage is stored in the second battery, the stored voltage is supplied to the constant voltage circuit as the input voltage, and power is supplied from the second battery. At least one of receiving, driving a motor that rotates a hand that displays the time based on the measurement result of the timing circuit, charging the first capacitor, changing the conversion ratio, and driving the motor. Is detected, and power supply to the constant voltage circuit and power supply stop are controlled based on the detection result. 20. When it is determined that the input voltage is stable based on the detection result, power is intermittently supplied to the constant voltage circuit, and the input voltage fluctuates depending on the detection result, or When it is determined that the fluctuation is predicted, the ratio of the power supply time to the power supply stop time to the constant voltage circuit is made larger than that when the input voltage is stable, or the power is always supplied. Claim 1 characterized by the above-mentioned.
9. The method for controlling the timekeeping device according to item 9.