JP2003028889A - Manufacturing method of semiconductor gas rate sensor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor gas rate sensor that can maintain improved airtightness, can laminate chips with improved accuracy without any squeeze-out of an adhesive, and has improved productivity. SOLUTION: The manufacturing method comprises a process (ST13) for moving an adhesive layer to a junction surface while heating an adhesive to a temperature where the adhesive is softened but not cured while pressing a film adhesive 43 to the junction surface of a second Si wafer 24, a junction surface-aligning process (ST14) for reading a first alignment mark 28 in the first Si wafer 23 and a second alignment mark 29 in the second Si wafer 24 through infrared rays, for aligning the first and second alignment marks 28 and 29 to a specific position, and for aligning the junction surface of the first Si wafer 23 and that of the second Si wafer 24, and a process (ST15) for forming the gas passage of gas flow for curing the adhesive layer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor gas rate sensor, and more particularly, in the process of manufacturing a minute gas rate sensor which is a micromachining element, S
The present invention relates to a method for manufacturing a semiconductor gas rate sensor using bonding of i wafers.

[0002]

2. Description of the Related Art As a method of bonding upper and lower semiconductor substrates,
As disclosed in JP-A-3-29858,
Glass-Si anodic bonding and bonding methods using low-melting glass are known. However, these joining methods have a problem in that it is very difficult to maintain airtightness when there is unevenness, and that they stick out from a predetermined position where an adhesive is applied.

A method of adhering the upper and lower semiconductor substrates at a predetermined position to form a single semiconductor member for solving such a problem is disclosed in Japanese Patent Laid-Open No. 6-334315. The method is to use a film adhesive consisting of a reinforcing material and an adhesive layer as an adhesive, cut the film adhesive, die-cut, or press it as it is against the bonding surface of the chip component or circuit board. , The adhesive layer is heated to a temperature at which it softens but does not cure, the adhesive layer is transferred to the joint surface, and the joint surface of the chip component or circuit board that is the joint partner is aligned with the joint surface, and then the joint agent layer Is a method of curing.

That is, an adhesive formed into a predetermined shape is transferred to one chip member by so-called thermal transfer, the other chip member is bonded to this, and then heat having a temperature higher than that of the thermal transfer is applied to the adhesive. They are heat-cured and bonded to each other.

[0005]

However, in the joining method disclosed in Japanese Patent Laid-Open No. 6-334315, there is a problem in that it can be performed only by the chip member alone, which is disadvantageous in terms of productivity. Further, although the publication describes how to bond the chip members, that is, the bonding method, there is no disclosure of a technique for correctly recognizing the positions of the chip members and bonding them at a desired site. There wasn't. Further, in order to bond the chip members, it is necessary to bond the chips with high accuracy. If the bonding cannot be performed with the desired accuracy, there is a problem in that the desired gas flow cannot be obtained due to poor sealing of the gas passage or the displacement of the gas passage, and the sensing efficiency decreases due to the displacement of the heat sensor. There is.

The object of the present invention is to solve the above-mentioned problems, so that good airtightness can be maintained, the adhesive does not stick out, and the chips can be bonded together with high precision, and the productivity can be improved. An object of the present invention is to provide a method for manufacturing a semiconductor gas rate sensor having high cost.

[0007]

In order to achieve the above object, the method for manufacturing a semiconductor gas rate sensor according to the present invention is configured as follows.

According to a first method for manufacturing a semiconductor gas rate sensor (corresponding to claim 1), a heat wire bridge having a detection part composed of a pair of heat wires is provided in a gas passage, and a gas flow hitting the heat wires is biased. In a method of manufacturing a semiconductor gas rate sensor for detecting an angular velocity from a first Si wafer, a first alignment mark forming step of forming a plurality of first alignment marks on a bonding surface of a first Si wafer, and a bonding surface of a second Si wafer on the bonding surface. A second alignment mark forming step of forming a plurality of second alignment marks, and a functional portion forming a heat wire bridge having a detection portion composed of a pair of heat wires and a half groove serving as a gas passage on the first Si wafer. And a half-groove forming step of forming a half-groove serving as a gas passage in the second Si wafer, and the first Si wafer or the second Si wafer. a step of heating the adhesive to a temperature that does not soften and cure the adhesive while pressing a film adhesive composed of a reinforcing material and an adhesive layer onto the bonding surface of the i-wafer, and transferring the adhesive layer to the bonding surface; The first alignment mark on the wafer and the second alignment mark on the second Si wafer are read by transmitting infrared rays, and the first alignment mark and the second alignment mark are aligned with a predetermined position, and the first alignment mark is read. It is characterized by including a bonding surface aligning step of matching the bonding surface of the Si wafer and the bonding surface of the second Si wafer, and a step of curing the adhesive layer to form a gas passage.

According to the first method for manufacturing a semiconductor gas rate sensor, the chip components are not bonded to each other but to each other in a wafer state during the process, so that the bonding can be performed accurately. Thereby, the complexity of the manufacturing process can be avoided, and the productivity can be increased. In addition, because the alignment mark is transmitted by infrared rays and read to align the Si wafer,
It is possible to accurately bond two Si wafers.

In the second method for manufacturing a semiconductor gas rate sensor (corresponding to claim 2), in the above method, preferably, a (100) plane is formed on the bonding surface of the first Si wafer and the second Si wafer. Characterized by the use.

According to the second method for manufacturing a semiconductor gas rate sensor, since the bonding surface is the (100) plane, excellent anisotropic etching can be performed.

In the third method for manufacturing a semiconductor gas rate sensor (corresponding to claim 3), preferably, in the above method, preferably, a half groove serving as a gas passage of the first Si wafer and the first alignment mark are simultaneously formed. It is characterized by being formed by wet etching.

According to the third method of manufacturing a semiconductor gas rate sensor, since the alignment mark and the gas passage are collectively etched from the resist patterning, the alignment and the gas passage are bonded in a chip component state. The accuracy can be improved as compared with. In addition, the sensing performance can be improved as the shape of the gas passage and the accuracy of the position of the heat sensor are improved.

In a fourth method for manufacturing a semiconductor gas rate sensor (corresponding to claim 4), preferably, in the above method, the half groove serving as a gas passage of the second Si wafer and the second alignment mark are simultaneously formed. It is characterized by being formed by wet etching.

In the fifth method for manufacturing a semiconductor gas rate sensor (corresponding to claim 5), preferably, in the above method, the (100) plane of the first Si wafer or the second S wafer is preferably used.
A mask pattern is placed on the (100) surface of the i-wafer and anisotropic wet etching is performed to form an etched portion along the <111> direction of the first Si wafer or the second Si wafer. Characterized by.

According to the fifth method for manufacturing a semiconductor gas rate sensor, the depth direction can be controlled by the shape of the mask pattern on the (100) plane, and a half groove of the gas flow path is set for a wafer thickness of 700 μm. The depth is 420 microns and the depth of the alignment mark is several tens.
It is possible to suppress to a micron, and it is possible to prevent a wafer from cracking due to a decrease in the strength of the wafer due to the formation of an unnecessary touching portion.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the accompanying drawings.

The configurations, shapes, sizes, and arrangement relationships described in the embodiments are merely shown to the extent that the present invention can be understood and put into practice, and the numerical values and the compositions (materials) of the respective configurations. Is merely an example. Therefore, the present invention is not limited to the embodiments described below, and can be modified into various forms without departing from the scope of the technical idea shown in the claims.

FIG. 1 is an exploded perspective view of a semiconductor member for a gas rate sensor manufactured by using the method for manufacturing a semiconductor gas rate sensor according to the present invention. The gas rate sensor semiconductor member 10 is formed by using the lower semiconductor substrate 11, the upper semiconductor substrate 12, and the heat wire bridge 15 having the heat wires 13 and 14 that are the functional portions as constituent members. The substrate 12 is formed with touching portions 16 and 17 which serve as gas passages. The lower semiconductor substrate 11 and the upper semiconductor substrate 12 are made of a semiconductor such as Si. The heat wires 13 and 14 are detection parts, and the heat wire bridge 15 is for fixing the detection part to the gas passage.

The gas rate sensor semiconductor member 10 is used in a state where the lower semiconductor substrate 11 and the upper semiconductor substrate 12 are bonded. FIG. 2 is a schematic diagram showing the configuration of the gas rate sensor. The gas rate sensor 18 includes a sensor chip 19 and a piezo pump 20. Sensor chip 19
Is the semiconductor member 10 for the gas rate sensor and the gas inlet 2
It consists of 1. The piezo pump 20 is for supplying gas to the gas introduction part 21 and creating a gas flow in the sensor chip 19 as indicated by an arrow.

The gas rate sensor 18 is the piezo pump 2
0 introduces gas from the inlet 22 of the gas passage, and the gas flows through the gas passage, so that the heat wire 1
It is sprayed on 3,14. The left and right heat wires 13, 14 whose temperature rises due to the current at that time are cooled by the blown gas. These heat wires form a bridge circuit (not shown), and when the flow rates of the gas blown to the left and right heat wires 13 and 14 are equal, the temperatures of the two heat wires 13 and 14 are equal, and as a result, The output voltage in the bridge circuit becomes zero. However, when the gas rate sensor has an angular velocity, Coriolis force acts on the gas flow, and the gas flow is lopsided. As a result, a difference occurs in the velocity of the gas flow that blows the left and right heat wires 13 and 14, so that the electric resistance of the heat wires becomes different between the left and right, and the bridge circuit is unbalanced and the output voltage is detected. It Thereby, the angular velocity can be measured.

FIG. 3 is a flow chart showing the manufacturing steps in the first embodiment of the method for manufacturing a semiconductor gas rate sensor of the present invention. In this method for manufacturing a semiconductor gas rate sensor, a step (ST10) of forming an alignment mark on a first Si wafer and a second Si wafer, and a first Si wafer.
Functional part forming step of forming a heat wire bridge having a heat wire and a half groove serving as a gas passage on a wafer (ST1
1), a semi-groove forming step (ST12) of forming a semi-groove to be a gas passage on the second Si wafer, a step (ST13) of migrating the adhesive layer from the film adhesive to the bonding surface, and
Bonding step for aligning the bonding surface of the Si wafer and the bonding surface of the second Si wafer (ST14), curing step for the adhesive layer (ST15), and cutting out the Si wafer bonded body formed by these steps (ST)
According to 16), a semiconductor member for a semiconductor gas rate sensor is manufactured. A semiconductor gas rate sensor can be obtained by attaching a piezo pump or the like to the semiconductor member for semiconductor gas rate sensor.

Next, each step will be described in detail. Figure 4
7 is a flowchart showing a step (ST10) of forming alignment marks on the first Si wafer and the second Si wafer. In this step, a resist coating step (ST20) of coating resist on the first and second Si wafers for forming the alignment mark and a mask having an opening for exposing the resist in the portion for forming the alignment mark are applied. A photolithography process (ST21) for removing the resist by exposure and a process (ST22) for etching the first and second Si wafers.

In the resist coating step ST20, a positive resist which is soluble in light is coated in a uniform thickness by a spin coater (not shown). The cross section of the Si wafer at that time is shown in FIG. The positive resist 25 is applied to the entire surfaces of the first Si wafer 23 and the second Si wafer 24.

Next, a photolithography process (ST2
In 1), the first Si wafer and the second Si wafer coated with the resist 25 are coated with two kinds of masks (not shown) having openings corresponding to the plurality of alignment mark portions.
The wafers are brought into close contact with each other, and the exposure apparatus exposes light having a wavelength with which the resist reacts. Then, by immersing the first Si wafer and the second Si wafer in a solvent,
The resist of the exposed portion is melted and the resist of the portion forming the alignment mark is removed. FIG. 6 shows a cross section of the first Si wafer and a cross section of the second Si wafer at that time.
Shown by. On the surface of the first Si wafer 23, a resist opening 2 is formed in a portion where the first alignment mark is formed.
6 is formed, and a resist opening 27 is formed on the surface of the second Si wafer 24 at a portion where the second alignment mark is formed.
Is formed.

In the etching step (ST22), the first Si wafer and the second Si wafer are dipped in an etchant for a predetermined time to open the resist openings 26 and 2.
The Si at 7 is etched to form first and second alignment marks. FIGS. 7A and 7B show cross sections of the first Si wafer and the second Si wafer at that time. A first alignment mark 28 is formed on the first Si wafer 23, and a second alignment mark 29 is formed on the second Si wafer 24. After that, the resist 25 is removed to obtain a first Si wafer having the first alignment mark and a second Si wafer having the second alignment mark.

FIGS. 8A and 8B show the first Si wafer having the first alignment mark and the second Si wafer having the second alignment mark, which are manufactured in this manner. A first alignment mark 28 is formed on the first Si wafer 23, and a second alignment mark 29 is formed on the second Si wafer 24.

FIG. 9 is a flow chart showing a step (ST11) of forming a heat wire bridge having a heat wire and a half groove serving as a gas passage on the first Si wafer. This step includes an insulating film forming step (ST30) of forming an insulating film made of SiN on the first Si wafer and a metal resistance layer for forming a thin metal resistance layer by vapor-depositing a heat sensitive resistor such as platinum on the insulation film. Thin film forming step (ST31) and heat wire and electrode forming step (ST32) of forming a heat wire by patterning into a predetermined shape by etching the metal resistance layer and also forming electrode portions on both sides thereof. And a protective film forming step (ST33) of forming a protective film made of SiN on the heat wire and the electrode, and a heat treatment step (ST34) of performing a heat treatment for suppressing a change with time of the heat-sensitive resistance characteristic of the heat wire itself. Then, the first Si wafer is etched to form half holes and half grooves, and S of the lower portion of the heat wire is
It comprises an etching step (ST35) of forming a heat wire bridge by removing i by etching.

In the insulating film forming step (ST30), SiN is deposited on the surface of the first Si wafer on which the alignment mark is formed by chemical vapor deposition (CVD) or sputtering. A cross section of the first Si wafer 23 at that time is shown in FIG.
It shows in (a). The entire surface of the first Si wafer is SiN30.
Are in a piled state.

Next, a metal resistance layer thin film forming step (ST3
In 1), platinum or the like is vapor-deposited on the first Si wafer on which SiN has been deposited by a vapor deposition device (not shown). The cross section of the Si wafer at that time is shown in FIG. First S
SiN 30 is deposited on the entire surface of the i-wafer 23, and platinum 31 is deposited thereon.

Heat wire and electrode forming step (ST3
In 2), platinum 31 deposited on the surface of the first Si wafer
Is patterned into a predetermined shape and platinum is etched. The cross section of the Si wafer at that time is shown in FIG. SiN 30 is deposited on the entire surface of the Si wafer, and patterned platinum 31 is deposited on the SiN 30.

In the protective film forming step (ST33), SiN is formed by chemical vapor deposition (CVD) or sputtering.
Is deposited on the surface of the first Si wafer formed in the heat wire and electrode forming step (ST32). The first at that time
A cross section of the Si wafer is shown in FIG. The entire surface of the Si wafer is a SiN layer 30, a patterned platinum layer 31,
A SiN 32 layer is formed on it.

In the heat treatment step, the Si wafer is put in an electric furnace and heated at about 700 ° C. for several tens of minutes. As a result, the heat resistance characteristic of the heat wire itself is prevented from changing over time.

Next, by the etching step (ST35), the half holes and the half grooves 33 as shown in FIG. 10 (e) are formed, and the heat wire bridge 34 is formed.

FIG. 11 shows the first Si wafer 23 having the functional portion thus manufactured. On the first Si wafer 23, a touching portion 35 having an alignment mark 28 and a plurality of heat wire bridges 34 is formed, and each etching portion has a shape shown in FIG.
It is shown in (b) and comprises an engraving part 36 corresponding to the nozzle part 36a for guiding the gas flow supplied from the piezo pump 20 to the detecting part and an engraving part 37 on which the heat wire is placed.

FIG. 12 is a flowchart showing a step (ST12) of forming a half groove on the second Si wafer 24. In this step, a resist coating step (ST40) of coating a resist on a second Si wafer for forming a half groove and an opening was formed so that the resist was exposed to a portion for forming a half groove having a shape shown in the figure. It comprises a photolithography step (ST41) for removing the resist by exposing it to a mask and a step (ST42) for etching the second Si wafer.

In the resist coating step ST20, a positive resist which becomes soluble by light is coated to a uniform thickness by a spin coater (not shown). A cross section of the second Si wafer 24 at that time is shown in FIG. The positive resist 38 is applied to the entire surface of the second Si wafer 24.

Next, a photolithography process (ST4
In 1), the second Si wafer 24 having a resist coated with a mask in which openings are formed so as to correspond to the touched portions for forming the gas passages of the plurality of gas rate sensors.
And a light having a wavelength with which the resist reacts is exposed by an exposure device (not shown). After that, the second Si wafer 24 is dipped in a solvent to dissolve the resist in the exposed portion and remove the resist in the portion forming the etched portion. A cross section of the second Si wafer at that time is shown in FIG.
Shown by (b). On the surface of the second Si wafer 24,
A resist opening 39 is formed in the portion where the etched portion is formed.

In the etching step (ST42), the second Si wafer is dipped in an etchant for a predetermined time to etch Si in the opening 39 of the resist and form a touched portion. FIG. 13C shows a cross section of the second Si wafer at that time. The touched portion 40 is formed on the second Si wafer 24. After that, the resist 38 is removed to obtain the second Si wafer 24 having the touching portion 40.

FIG. 14A shows a second S having the touching portion 40 and the alignment mark 29 thus produced.
The i-wafer 24 is shown. An alignment mark 29 and a touching portion 40 are formed on the second Si wafer 24, and each shape of the touching portion 40 is shown in FIG. 14B, and is supplied from the piezo pump 20. Touching portion 41 corresponding to the nozzle portion 41a for guiding the generated gas flow to the detection portion.
And the touching part 42.

Next, the step of transferring the film adhesive (ST1
3) will be described. Second adhesive layer of film adhesive
In the step of pressing against the Si wafer 24, first, a film adhesive having an adhesive layer provided on one or both sides of the reinforcing material is prepared. FIG. 15 is a partial cross-sectional view showing an example of the film adhesive. The type of the film adhesive 43 can be appropriately changed according to the composition of the adherend, but the adhesive layer 44 made of a thermosetting resin such as an epoxy prepolymer can be made of, for example, polyimide or the like. Both sides of a film-like reinforcing material 45 made of a resinous resin are coated.

FIG. 16 is a flow chart showing the process of transferring the adhesive layer from the film adhesive to the second Si wafer. First, the adhesive layer of the film adhesive is pressed against the surface of the second Si wafer on which the etched portion is formed (ST50).
Then, maintain that state and heat to about 60 to 80 ° C (ST
51). After that, the film is peeled off (ST52). As a result, the adhesive layer is softened and transferred to the second Si wafer.

The cross section of the Si wafer at this time is shown in FIG. The softened adhesive layer 46 is accurately transferred to the surface of the second Si wafer 24 other than the touched portion.

Next, the Si wafer bonding step (ST14)
Indicates. An alignment device 47 as shown in FIGS. 18 and 19 is used in this step. This device 47 has a first S
There are infrared lamps 48 and 49 that pass through the positions of the alignment marks of both the i-wafer and the second Si wafer, and two infrared cameras 5 that detect infrared rays from these lamps.
There are 0.51. Then, the second Si wafer 24 and the first
There is a glass lower stage 52 and an upper stage 53 for installing the Si wafer 23. As shown in FIG. 19, the lower stage 52 and the upper stage 53 have openings 54 and 55 at their centers. A vacuum device 56 capable of vacuuming is attached to a lower portion of the opening 54 of the lower stage 52. Further, above the opening 55 of the upper stage 53, a vacuum device 57 for attaching a vacuum is attached. The upper stage 53 is attached to a movable shaft that can move in the XY directions, and the upper stage 53 can rotate about the movable shaft 58. The images from the infrared cameras 50 and 51 can be observed on the display 59.

Next, the procedure for adhering the first Si wafer and the second Si wafer using this alignment apparatus 47 will be described with reference to FIG. The second Si wafer 24 is placed on the lower stage 52. Then, the vacuum device 56 is operated to perform evacuation. As a result, the second Si wafer 24 is fixed to the lower stage 52 (ST60).
Next, the first Si wafer 23 is directed to the lower side of the upper stage 53, and the vacuum device 57 is operated in that state. Thereby, the first Si wafer 23 is fixed to the upper stage 53 (ST61). In that state, the infrared lamp 48,
49 is turned on and the infrared cameras 50 and 51 are operated. At this time, infrared rays are emitted from the first Si wafer and the second S wafer.
The images of the alignment marks at both ends of both Si wafers are transmitted through the i-wafer and displayed on the display 59 (ST
62).

21 (a), (b) and (c) show images of the alignment mark at that time. First Si wafer 2
The alignment mark 28 of No. 3 overlaps with the alignment mark 29 of the second Si wafer and the stage is rotated and moved in the XY directions until it is in an aligned state as shown in FIG. 21C, and is moved (ST63). The alignment as shown in FIG. 21C is when the surfaces of the first Si wafer and the second Si wafer match, and at this time, the upper stage 53
The second Si wafer 24 on the lower stage 52.
Is bonded to the first Si wafer 23 on the upper stage 53 (ST64).

Next, the bonded first Si wafer and second Si wafer are removed from the alignment device 47 as they are,
The bonded first Si wafer and second Si wafer are put into an electric furnace and heated to 100 to 150 ° C. (ST6.
6). As a result, the adhesive is cured and adhered (ST
67). FIG. 22 shows the first Si wafer and the second S after bonding.
A sectional view of a bonded body 60 of an i-wafer is shown. The first Si wafer 23 and the second Si wafer 24 are bonded to each other, and the gas passage 6
1 is formed correctly

A plurality of semiconductor members for gas rate sensors are completed by cutting out this bonded body 60 and subdividing it. At this time, by making a cut in the first Si wafer or the second Si wafer in advance, the semiconductor member can be easily divided into individual pieces by the cleavage of the semiconductor. be able to.

By using this method for manufacturing a semiconductor gas rate sensor, the airtightness is maintained, the adhesive does not squeeze out, the number of members required for the process is small, and the productivity is high in the manufacturing process without complication. A gas rate sensor can be manufactured.

Next, FIG. 23 is a flow chart showing manufacturing steps in the second embodiment of the method for manufacturing a semiconductor gas rate sensor of the present invention. In this method for manufacturing a semiconductor gas rate sensor, an alignment mark is formed on the first Si wafer, and a heat wire bridge having a heat wire and a functional portion for forming a half groove to be a gas passage are formed on the first Si wafer. Step (ST70) performed at the same time and the second Si
A step of simultaneously forming a half groove for forming a gas groove on the wafer and forming an alignment mark (ST71)
And a step of moving the adhesive layer from the film adhesive to the bonding surface (ST72), and a bonding surface aligning step of matching the bonding surface of the first Si wafer and the bonding surface of the second Si wafer (ST
73), the step of curing the adhesive layer (ST74), and the step of cutting out and subdividing the Si wafer bonded body formed by these steps (ST75) to manufacture a semiconductor member for a semiconductor gas rate sensor. A semiconductor gas rate sensor can be obtained by attaching a piezo pump or the like to the semiconductor member for semiconductor gas rate sensor.

Next, each step will be described in detail. Figure 24
4 is a flowchart showing a step (ST70) of simultaneously forming an alignment mark and a touched portion on the first Si wafer. In this process, Si is formed on the (100) surface of the Si wafer.
Insulating film forming step of forming an insulating film made of N (ST8
0) and a metal resistive layer thin film forming step (ST8) in which a heat sensitive resistor such as platinum is vapor-deposited on the insulating film to form a metal resistive layer as a thin film.
1) and a heat wire and electrode forming step (ST82) for forming a heat wire by patterning the metal resistance layer into a predetermined shape by etching the metal resistance layer, and a heat wire and an electrode forming step (ST82). A protective film forming step (ST83) of forming a protective film made of SiN on the wire and the electrode, a heat treatment step (ST84) of performing a heat treatment for suppressing a change with time of the heat-sensitive resistance characteristic of the heat wire itself, Of the Si wafer is etched to form half holes and half grooves and alignment marks, and Si in the lower portion of the heat wire is removed by etching to form a heat wire bridge (ST85).

The insulating film forming step (ST80), the metal resistance layer thin film forming step (ST81), the heat wire and electrode forming step (ST82), the protective film forming step and the heat treatment step are performed.
The steps are the same as those in the first embodiment.

In the etching process, as shown in FIG. 25, after applying a resist on the entire surface of the first Si wafer,
The resist corresponding to the half hole, the half groove and the alignment mark is removed (a), openings 62 and 63 are formed, and SiN 64 in that part is etched (b). FIG. 26 shows the surface of the alignment mark portion at that time. SiN
The removed portion 65 is formed.

Next, the first Si wafer is subjected to anisotropic etching of Si with an etchant such as KOH. As a result, as shown in FIGS. 25C and 27, the etching is selectively performed with respect to the (111) plane,
It can be seen that the alignment mark portion 66 having a small area of the opening 63 has a shallow etching depth, and the portion 67 forming the etched portion having a large area of the opening 62 has a deep etching depth. As a result, the touching portion 67 that serves as a gas passage and the alignment mark 66 can be formed at the same time.

Next, FIG. 28 shows a step of simultaneously forming the touched portion on the second Si wafer. This step includes an insulating film forming step (ST90) of forming an insulating film made of SiN on the (100) surface of the Si wafer, and an etching step of etching the second Si wafer to form half holes, half grooves and alignment marks. The process (ST92).

In the insulating film forming step (ST90), the first S
This is the same process as the process for the i-wafer.

In the etching step (ST92), a portion corresponding to the half hole, the half groove and the alignment mark is opened, resist is applied, and SiN in that portion is etched. The surface of the alignment mark portion at that time is shown in FIG. A SiN etching portion 68 and a portion 69 having SiN are formed.

Next, with an etchant such as KOH,
Anisotropic etching of Si is performed. As a result, as shown in FIG. 30, the etching is performed so that the (111) plane comes out, and when the (111) planes overlap, the etching stops, and in the alignment mark portion having a small opening area, the etching depth is The etching depth is deep at the portion where the etched portion is shallow and has a large opening area.
As a result, the touched portion serving as the gas passage and the alignment mark can be simultaneously formed.

In this way, the alignment mark and the touched portion are formed, and the steps after the step of transferring the adhesive layer from the film adhesive of the Si wafer to the second Si wafer are performed in the same manner as in the first embodiment. . This keeps the airtightness,
It is possible to manufacture a semiconductor gas rate sensor with high productivity in a manufacturing process that does not cause the adhesive to squeeze out, requires a small number of members for the process, and is not complicated.

The resist used in this embodiment is a positive type resist, but a negative type resist can also be used.

[0061]

As is apparent from the above description, the present invention has the following effects.

Since the chip components are not bonded to each other but to each other in the wafer state during the process, the bonding can be performed with high accuracy. That is, since the alignment mark provided for alignment with the element configured as the chip component is integrally formed on the wafer and aligned with the alignment mark as a reference, the elements configured as the chip component are positioned relative to each other. The factor that causes the gap is eliminated. Thereby, the complexity of the manufacturing process can be avoided, and the productivity can be increased. In addition, because the alignment mark is transmitted by infrared rays and read to align the Si wafer,
It is possible to accurately bond two Si wafers.

Since the bonding surface is the (100) plane, excellent anisotropic etching can be performed.

Since the etching process of the alignment mark and the gas passage is performed collectively from the resist patterning,
The positional relationship between the alignment and the gas passage can improve the accuracy as compared with the case where the bonding is performed in the chip component state. In addition, the sensing performance can be improved as the shape of the gas passage and the accuracy of the position of the heat sensor are improved.

The shape of the mask pattern on the (100) plane enables control in the depth direction, and the depth of the half groove of the gas passage is as deep as 420 μm for a wafer thickness of 700 μm. It can be suppressed to 10 microns, and it is possible to prevent the wafer from cracking due to the reduction in the strength of the wafer due to the formation of an unnecessary touching portion.

[Brief description of drawings]

FIG. 1 is an exploded perspective view of a semiconductor member for a gas rate sensor manufactured by using the method for manufacturing a semiconductor gas rate sensor according to the present invention.

FIG. 2 is a schematic diagram showing a configuration of a gas rate sensor.

FIG. 3 is a flowchart showing manufacturing steps in the first embodiment of the method for manufacturing a semiconductor gas rate sensor of the present invention.

FIG. 4 is a flowchart showing a process of forming alignment marks on a first Si wafer and a second Si wafer.

FIG. 5 is a cross-sectional view of a Si wafer with a resist applied.

FIG. 6 is a cross-sectional view of a first Si wafer and a second Si wafer in which a resist opening is formed.

FIG. 7 is a cross-sectional view of a first Si wafer and a second Si wafer on which alignment marks are formed.

FIG. 8 is a first Si having a first alignment mark.
Second having wafer (a) and second alignment mark
It is a figure which shows the Si wafer (b).

FIG. 9 is a flow chart showing a process of forming a heat wire bridge having a heat wire and a half groove serving as a gas passage on a first Si wafer.

FIG. 10 is a cross-sectional view of a first Si wafer, (a) S
iN deposited state, (b) platinum deposited on SiN, (c) platinum patterned, (d)
A state in which a SiN layer is formed on the patterned platinum, and a state (e) in which a half groove and a heat wire bridge are formed.

11A and 11B are diagrams showing a manufactured first Si wafer having a functional portion, where FIG. 11A is a first Si wafer and FIG.
It is a figure which shows the shape of one etching part.

FIG. 12 is a flowchart showing a process of forming a half groove on a second Si wafer.

FIG. 13 is a sectional view of a second Si wafer, (a)
Is a state in which a resist is applied, (b) is a state in which a resist opening is formed, and (c) is a state in which a touching portion is formed.

14A and 14B are diagrams showing a second Si wafer having an engraved portion and an alignment mark, FIG. 14A is a whole Si wafer, and FIG. 14B is a diagram showing one engraved portion.

FIG. 15 is a partial cross-sectional view showing an example of a film adhesive.

FIG. 16 is a flowchart showing a process of transferring an adhesive layer from a film adhesive to a second Si wafer.

FIG. 17 is a cross-sectional view of a second Si wafer to which an adhesive layer has been transferred.

FIG. 18 is a diagram showing an alignment apparatus used in a step of adhering a first Si wafer and a second Si wafer.

FIG. 19 is a diagram showing an alignment apparatus used in a step of adhering a first Si wafer and a second Si wafer.

FIG. 20 is a flowchart showing a procedure for bonding a first Si wafer and a second Si wafer using an alignment device.

FIG. 21 is a diagram showing an image of an alignment mark,
(A) is the alignment mark of the first Si wafer, (b) is the alignment mark of the second Si wafer, (c) is the alignment mark of the first Si wafer and the second Si wafer. The image which the alignment mark of a wafer projected by the infrared camera is shown.

FIG. 22 is a cross-sectional view after the first Si wafer and the second Si wafer are bonded.

FIG. 23 is a flowchart showing manufacturing steps in a second embodiment of the method for manufacturing a semiconductor gas rate sensor of the present invention.

FIG. 24 is a flowchart showing a process of simultaneously forming an alignment mark and a touched portion on the first Si wafer.

FIG. 25 is a cross-sectional view of a first Si wafer, showing (a) a state having an opening of a resist in a portion corresponding to a half groove and an alignment mark, (b) a state of partially etching SiN, (c). The state where the half groove and the alignment mark are formed is shown.

FIG. 26 is a diagram showing a state in which SiN is removed from a portion forming a first alignment mark.

FIG. 27 is a diagram showing a first alignment mark.

FIG. 28 is a flowchart showing a process of simultaneously forming a touched portion on a second Si wafer.

FIG. 29 is a diagram showing a state in which SiN is removed from a portion forming a second alignment mark.

FIG. 30 is a diagram showing a second alignment mark.

[Explanation of symbols]

10 Gas Rate Sensor Semiconductor Member 11 Lower Semiconductor Substrate 12 Upper Semiconductor Substrates 13, 14 Heat Wire 15 Heat Wire Bridge 16, 17 Touch Section 18 Gas Rate Sensor 19 Sensor Chip 20 Piezo Pump 21 Gas Inlet 22 Gas Flow Channel Inlet 23 First Si wafer 24 Second Si wafer 28 First alignment mark 29 Second alignment mark 47 Alignment device ST10 Step of forming alignment mark ST11 Heat wire bridge having heat wire on first Si wafer Functional part forming step ST12 for forming a half groove as a gas passage ST12 Half groove forming step for forming a half groove as a gas passage on a second Si wafer ST13 Step ST14 for moving an adhesive layer from a film adhesive to a bonding surface Bonding surface of Si wafer and second Si
Bonding surface aligning process for matching the bonding surfaces of the wafer ST15 Curing of the adhesive layer ST16 Cutting out of the gas rate sensor

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Tomohiro Sakoe             1-10, Shin-Sayama, Sayama City, Saitama Prefecture             Within Da Engineering Co., Ltd. (72) Inventor Yoichi Shimada             1-10, Shin-Sayama, Sayama City, Saitama Prefecture             Within Da Engineering Co., Ltd. F-term (reference) 5F031 CA02 HA13 HA53 JA04 JA05                       JA14 JA17 JA28 JA29 JA38                       KA06 KA08 KA11 KA12 MA21

Claims (5)

[Claims] 1. A method for manufacturing a semiconductor gas rate sensor, comprising: a heat wire bridge having a detection part formed of a pair of heat wires in a gas passage; First alignment mark forming step of forming a plurality of first alignment marks on the bonding surface of the Si wafer, and second alignment mark forming step of forming a plurality of second alignment marks on the bonding surface of the second Si wafer And a step of forming the heat wire bridge having a detection part composed of the pair of heat wires and a half groove serving as the gas passage on the first Si wafer, and forming the gas on the second Si wafer. A half-groove forming step of forming a half-groove to be a passage, and a bonding surface of the first Si wafer or the second Si wafer. While pressing a film adhesive consisting of a strong material and an adhesive layer, heating the adhesive to a temperature that does not soften and harden the adhesive to transfer the adhesive layer to the bonding surface, and the first Si wafer The first alignment mark and the second alignment mark of the second Si wafer are read by transmitting infrared rays, and the first alignment mark and the second alignment mark are aligned with a predetermined position, A bonding surface aligning step of aligning a bonding surface of the first Si wafer and a bonding surface of the second Si wafer, and a step of curing the adhesive layer to form the gas passage. Manufacturing method of semiconductor gas rate sensor. 2. The method for manufacturing a semiconductor gas rate sensor according to claim 1, wherein a (100) plane is used as a bonding surface of the first Si wafer and the second Si wafer. 3. The method of manufacturing a semiconductor gas rate sensor according to claim 1, wherein the first groove and the half groove that serves as the gas passage of the first Si wafer are simultaneously formed by wet etching. . 4. The method of manufacturing a semiconductor gas rate sensor according to claim 1, wherein the half groove that serves as the gas passage of the second Si wafer and the second alignment mark are simultaneously formed by wet etching. . 5. Anisotropic wet etching is performed by placing a mask pattern on the (100) surface of the first Si wafer or the (100) surface of the second Si wafer,
<1 of the first Si wafer or the second Si wafer
The method for manufacturing a semiconductor gas rate sensor according to claim 3 or 4, wherein an engraved portion is formed along the 11> direction.