JP2003028846A - Ultrasonic flaw detector - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an ultrasonic flaw detector which can shorten the cycle time of a front flaw detection regarding an ultrasonic flaw detection in the nondestructive inspection of a steel material or the like. SOLUTION: The ultrasonic flaw detector is provided with an ultrasonic transducer array 10 which comprises a plurality of transducers 1 arrangeable along the surface of a specimen, an excitation means in which each transducer in the array 10 is excited by spike pulses, a waveform memory in which an ultrasonic reception echo received by each transducer is stored as waveform data for each transducer, a phase composition means by which the content of the waveform memory with the stored waveform data for each transducer is read out so as to be phase-composited by an adder and a focus means by which, when the waveform memory is read out, the address of each waveform memory is given as an address corresponding to the beam path distance of a dynamic focus with reference to an arbitrary position within an electronic scanning range. Thereby, the installation range of the array 10 with reference to the specimen can be made to correspond to the whole region of the inspection range of the specimen.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ultrasonic flaw detector, and more particularly, to an ultrasonic flaw detector using an ultrasonic transducer array.

[0002]

2. Description of the Related Art An ultrasonic flaw detector using a conventional ultrasonic transducer array has been technically preceded for medical use even when it is used for nondestructive inspection of various materials such as steel. The technology of ultrasonic diagnostic equipment was applied almost as it was.

On the other hand, the subject of the ultrasonic diagnostic apparatus is
The human body is composed of a wide variety of organizations,
The shape of each tissue was also complicated. From the purpose of diagnosis as the medical device, the main measurement purposes were quantitative evaluation of the reflection amount of the reflection echo at the tissue boundary, position evaluation of the tissue boundary, and dynamic fluctuation of the tissue boundary.

Therefore, what is important in the basic performance of the ultrasonic diagnostic apparatus is to increase the resolution of the diagnostic image, and for the purpose of improving it, starting from the well-known phased array method, the dynamic focus method, and the multistage transmission beam focus method. The technology was developed. In this way, for the purpose of high resolution, the focus of the ultrasonic beam in these methods is considerably narrowed, the range in which flaw detection is possible at one time is narrow, and ultrasonic waves are transmitted multiple times to diagnose the entire inspection range. In the cycle, it is necessary to move the ultrasonic beam, and it took a lot of cycle time to obtain a diagnostic image.

As described above, in the ultrasonic diagnostic apparatus of a medical apparatus, since the resolution is given the highest priority, the improvement of the cycle time is often neglected. However, in the field of non-destructive inspection of various materials such as steel materials, where production efficiency is important, shortening the cycle time is an extremely realistic problem and cannot be ignored.

However, as mentioned at the outset, the conventional ultrasonic flaw detector used in the field of nondestructive inspection has the same structure as that of the ultrasonic diagnostic equipment described above, and in the case of performing flaw detection on the entire inspection range (hereinafter referred to as whole flaw detection). The cycle time was slow. The operating speeds of recent manufacturing lines and refining lines are quite high, and the length of the cycle time has been a bottleneck in introducing this type of ultrasonic flaw detection equipment into a full-face flaw detection line. For this reason, it has been attempted to install multiple ultrasonic flaw detectors, to give up full-face flaw detection and substitute for partial flaw detection, or to separately provide an inspection line to perform full-face flaw detection. But,
In either case, the equipment becomes complicated, or the production process up to the determination of the presence or absence of defects in the material is not drastically shortened. Among them, it was not possible to adequately meet the needs of performing nondestructive inspection (online flaw detection) without reducing production efficiency.

[0007]

SUMMARY OF THE INVENTION The present invention eliminates the focus on both transmitting and receiving as is done in an ultrasonic diagnostic apparatus and obtains the focus only on the receiving side.
By providing an ultrasonic flaw detector suitable for the non-destructive inspection, the shortening of the cycle time of the above-mentioned full-face flaw detection is dramatically improved, and the above problem is solved. In particular, the present invention provides an ultrasonic flaw detector capable of flaw detection on a whole surface, which has a cycle time commensurate with the operating speed of the latest production line and refining line.

[0008]

[Means for Solving the Problems] In the field of manufacturing materials such as steel materials, many of the materials tested and tested by ultrasonic flaw detectors for high-speed online that are usually used are homogeneous, and the shape is cylindrical. There are many simple things such as cylinders and cuboids. And most of them have no defects, but very rare defects such as cavities, cracks, mixing of different materials,
An ultrasonic flaw detector is used for the purpose of detecting on a line flowing at high speed. For an ultrasonic flaw detector used for such a purpose, it is sufficient if the presence or absence of a defect in the material to be tested, the maximum echo height of the ultrasonic reflection echo of the defect and the approximate position of the defect are known. Therefore, spatially continuous visualization of defect positions with high resolution, which is performed in a medical ultrasonic diagnostic apparatus, is not particularly required. The present invention takes the above points into consideration and adopts the following configurations. That is, the ultrasonic flaw detector according to the first invention of the present application is an ultrasonic transducer array having a plurality of transducers that can be arranged along the surface of the material to be inspected, and spike pulses for each transducer of the ultrasonic transducer array. Excitation means for exciting with, a waveform memory that stores the ultrasonic reception echo received by each transducer as waveform data for each transducer, and the contents of the waveform memory that stores the waveform data for each transducer is read and added. And a focus means for giving the address of each waveform memory as an address corresponding to the beam path distance of dynamic focus with respect to an arbitrary position within the electronic scanning range when reading the waveform memory. It is characterized by

By adopting such a configuration, the ultrasonic flaw detector according to the first aspect of the present invention uses the exciting means for exciting all the transducers of the ultrasonic transducer array by the spike pulse, and transmits the ultrasonic wave. The focus is stopped at and the pseudo plane wave of ultrasonic waves is radiated to the front surface of the ultrasonic transducer array. That is, the flaw detection range is not narrowed by transmitting the pseudo plane wave of the ultrasonic wave which is not focused (or is focused to a distance as much as nothing, that is, focused beyond the flaw detection range). Therefore, by making the installation range of the ultrasonic transducer array for the test material correspond to the entire inspection range of the test material, the ultrasonic waves can be propagated over the entire inspection range with one ultrasonic wave transmission. It is possible to On the other hand, the reflection echo from the reflection source within the inspection range is received by each transducer of the ultrasonic transducer array and stored as waveform data in each waveform memory. In this waveform memory, the information of the position and the size (reflection amount) of the defect (ultrasonic reflection source) within the entire inspection range is phase-spread and stored as waveform data.
That is, the state of defect distribution in the entire inspection space is phase-diffused and stored in the waveform memory by one transmission of ultrasonic waves and subsequent reception of ultrasonic waves. If there is a means to inversely calculate the defect distribution situation at an arbitrary position in the inspection space from the contents of each phase-spread waveform memory, the defect distribution situation in the entire inspection space can be recombined and the inspection time can be reduced. Dramatically shortened and inspection speed improved. This is a phase synthesizing method in which the address of each waveform memory is given as an address corresponding to the beam path distance of the dynamic focus with respect to an arbitrary position within the electronic scanning range, and the contents of each waveform memory are read out and the phase is synthesized by an adder. It becomes possible by means.

An ultrasonic flaw detector according to a second aspect of the present invention is the ultrasonic flaw detector according to the first aspect of the present invention, wherein a depth direction gate range is provided for each array element array direction within an electronic scanning range. Gate processing means for detecting the maximum echo height of the phase-synthesized signal in the gate range and the position in the depth direction at the maximum echo height, and a plurality of ultrasonic waves at a specified array element array position in the electronic scanning range A scope memory means for storing the peak echo height in each depth direction of the phase-combined signal in a cycle.

An ultrasonic flaw detector according to the second invention of the present application is
In addition to obtaining the operation of the ultrasonic flaw detector according to the first aspect of the present invention, the size of the defect can be obtained by the gate processing means by the re-synthesized defect signal in the electronic scanning range and the position information in the electronic scanning range. And its position are obtained. Further, in the A scope memory means, the A scope waveform is obtained for each waveform display cycle by the re-synthesized defect signal in the electronic scanning range and the position information of the electronic scanning range, and the waveform can be displayed on the display device. Is.

In the ultrasonic flaw detector according to the third aspect of the present invention, the ultrasonic flaw detector according to the first or second aspect of the present invention is provided in a production line of a material to be tested, which is a material product such as steel. By arranging the ultrasonic transducer array so as to intersect with the flow of the test material production line, the inside of the test material at each position in the transfer direction of the test material is moved along with the transfer of the line. It is possible to sequentially perform flaw detection on the entire range of the flaw detection plan.

The ultrasonic flaw detector according to the third aspect of the present invention is
In addition to obtaining the action of the ultrasonic flaw detector according to the first or second aspect of the present application, for the entire range of the flaw detection inside the test material at each position in the transfer direction of the line of the test material,
A single ultrasonic wave emission can complete flaw detection. In addition, since each position in the transfer direction of the test material sequentially passes through the ultrasonic transducer array due to the operation of the line, there is no need for a separate scanning means for the ultrasonic transducer array, and the transfer direction of the test material is not required. After performing the flaw detection on the entire range of the flaw detection plan at a certain position, it is possible to shift to the flaw detection on the whole range of the flaw detection plan inside the test material at another location. Therefore, using the production line, without stopping the operation of the line,
The flaw detection at each of the above positions can be sequentially completed over the entire range of flaw detection (online flaw detection).

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. 1 to 4 show an embodiment of the present invention. FIG. 1 is a block diagram of an ultrasonic flaw detector according to an embodiment of the present invention. FIG. 2 is a flowchart showing a control procedure of the ultrasonic flaw detector 1 described above. FIG. 3 is an explanatory diagram showing an image of electronic operation of the ultrasonic flaw detector. FIG. 4 is an explanatory diagram showing an image of a phase synthesis curve on the waveform memory of this ultrasonic flaw detector.

This ultrasonic flaw detector comprises an ultrasonic transducer array 10 having a plurality of transducers 1 which can be arranged along the surface of the material to be inspected corresponding to a desired area for flaw detection inside the material to be inspected, and ultrasonic transducers. Excitation means for exciting each transducer 1 of the instrument array 10 with a spike pulse, a waveform memory for storing the ultrasonic wave reception echo received by each transducer 1 as waveform data for each transducer 1, and waveform data for each transducer The phase synthesizing means for reading the stored contents of the waveform memory and synthesizing the phases in the adder, and the address of each waveform memory in the reading of the waveform memory is the beam path of the dynamic focus for an arbitrary position within the electronic scanning range. Focusing means that is given as an address corresponding to the distance and depth direction gate range for each array element array direction within the electronic scanning range are given. Gate processing means for detecting the maximum echo height of the phase-combined signal and the depth direction position at the maximum echo height, and a plurality of ultrasonic cycles at a designated array element array position in the electronic scanning range A scope memory means for storing the peak echo height of each phase-synthesized signal in each depth direction. Then, this ultrasonic flaw detector can perform online flaw detection. That is, in the production line (not shown) of the material to be inspected, which is a material product such as steel material, the ultrasonic transducer array 10 is arranged so as to intersect with the flow of the production line of the material to be inspected, that is, Ultrasonic transducer array 10
Is crossed across the production line, and the transducers 1 ... 1 are arranged over at least the entire width (horizontal width) of the crossed test material to be inspected. It is possible to sequentially perform flaw detection in the entire range of the flaw detection scheduled inside the test material at each position in the transfer direction (vertical width direction) of the line.

Further details will be described below with reference to the drawings. In FIG. 1, an ultrasonic transducer array 10 is composed of an ultrasonic transducer 1 having n elements, and includes a pulsar unit 20,
It is connected to the receiver unit 30 and transmits ultrasonic waves to the examination space and receives reflected ultrasonic echoes from the examination space. The pulsar unit 20 is composed of the same number of spike pulsar circuits as the number of elements n of the ultrasonic transducer array 10, and the spike pulsar circuits are operated simultaneously by the pulse transmission timing signal from the control unit 90, and the ultrasonic transducers are operated. Array 10 is excited. The receiver section 30 is composed of the same number of receiver circuits as the number of elements n of the ultrasonic transducer array 10, and the ultrasonic reception echo is signal-amplified here and sent to the signal processing section 40.

The signal processing unit 40 includes an ultrasonic transducer array 1
The same number of signal processing circuits 41-1 to 41 as the number n of 0 elements
-N. Each signal processing circuit 41 includes an AD converter 4
11, an ultrasonic waveform memory 412, a switch 413, and a dynamic focus phase correction memory 414.
The AD converter 411 AD-converts the ultrasonic signal sent from the receiver unit 30, and is written in the ultrasonic waveform memory 412. The sampling frequency for AD conversion is 8 times or more the nominal frequency of the ultrasonic transducer. This sampling signal is sent from the control unit 90 to a first signal line (not shown).
Supplied with.

The ultrasonic waveform memory 412 writes the ultrasonic waveform data sent from the AD converter 411 in the writing step (FIG. 2), and the ultrasonic waves stored in the memory 412 in the reading step (FIG. 2). The waveform data is read out and connected to the adder 53. The address of the ultrasonic waveform memory 412 is supplied from the switch 413.

The switch 413 sends the value of the beam path counter 50 to the address of the ultrasonic waveform memory 412 in the writing step (FIG. 2), and the contents of the dynamic focus phase correction memory 414 in the ultrasonic waveform memory 412 in the reading step. Send to address.

Dynamic focus phase correction memory 4
Reference numeral 14 stores a phase correction amount at each focus position in the known dynamic focus method, and includes a Y direction counter 51 indicating an electronic scanning position y and a D depth direction counter 52 indicating a focus depth position d. By supplying the data to the address of the dynamic focus phase correction memory 414, the phase correction amount at the focus position (yd) is obtained, and this phase correction amount is given to the read address of the ultrasonic waveform memory 412. From the ultrasonic waveform memory 412, ultrasonic waveform data contributed by the transducer when dynamic focusing is performed at the focus position (yd) is obtained. The above procedure is performed simultaneously in each of the signal processing circuits 41-1 to 41-n, and each ultrasonic waveform memory 412 of each of the signal processing circuits 41-1 to 41-n is processed.
, That is, the ultrasonic waveform data is sent to the adder 53, and the dynamic focus phase synthesis is performed. The content of each dynamic focus phase correction memory 414 is controlled by the control unit 90 via a second signal line (not shown).
Stored in advance.

The adder 53 phase-synthesizes each ultrasonic waveform data coming from the ultrasonic waveform memory 412 of the same number as the number of elements n. The output of the adder 53 is sent to the detection circuit 54. The detection circuit 54 performs detection processing such as full-wave rectification, + half-wave rectification, and −half-wave rectification. The output of the detection circuit 54 is connected to the gate circuit 60 and the waveform peak storage circuit 70.

The gate circuit 60 includes an echo height memory 6
1, a comparator 62, a write control circuit 63, an echo depth memory 64, a gate generation circuit 65, and a gate position memory 66. The gate circuit 60 functions actively only during the read step (FIG. 2). In the control unit updating step 1 (FIG. 2), only the memory 61 and the memory 64 are accessed.

The echo height memory 61 uses the Y-direction counter 51 indicating the electronic scanning position y as an address to temporarily store the peak echo height in the gate for each electronic scanning position y position.
In the comparator 62, the echo height value of the detection circuit 54 and
The in-gate peak echo heights stored in the echo height memory 61 are compared, and when the echo height value of the detection circuit 54 is higher, a write signal is sent to the write control circuit 63. The write control circuit 63 receives the gate signal of the gate generation circuit 65, and sends a write pulse to the echo height memory 61 and the echo depth memory 64 when the write signal of the comparator 62 comes while the gate is on. In response to this pulse, the echo height memory 61 writes the echo height value which is the output data of the detection circuit 54 into the same memory 61, and updates the peak echo height in the gate of the echo height memory 61. In the step of updating the control unit (FIG. 2), the Y-direction counter 51 indicating the electronic scanning position y is set to 0.
While increasing by 1, the peak echo height in the gate of the echo height memory 61 is sequentially read, the same contents are cleared after the reading, and the preparation for the next cycle is performed.

The echo depth memory 64 uses the Y-direction counter 51 indicating the electronic scanning position y as an address, and temporarily stores the in-gate peak depth position for each electronic scanning position y. The write signal from the write control circuit 63 also serves as a write pulse for the echo depth memory 64. When this write pulse arrives, the echo depth memory 64 writes the value of the D depth direction counter 52 indicating the focus depth position d into the memory, and the in-gate peak depth stored in the echo depth memory 64. The location is updated. In the step 1 of updating the control unit (FIG. 2), the peak depth position in the gate of the echo depth memory 64 is sequentially read while the Y-direction counter 51 indicating the electronic scanning position y is incremented by 0, and the same contents are cleared after the reading. And prepare for the next cycle.

The gate position memory 66 uses the Y-direction counter 51 indicating the electronic scanning position y as an address, and stores the gate starting point position data and the gate ending point position data in the depth direction for each electronic scanning position y position. When the Y direction counter 51 indicating the electronic scanning position y is updated, the contents of the gate position memory 66 are read out, and the values of the gate starting point position and the gate ending point position in the depth direction determined by the electronic scanning position y position are read. Are sent to the gate generation circuit 65. The content of the gate position memory 66 is stored in the control unit 90 in advance through a third signal line (not shown).

The gate generating circuit 65 receives the values of the gate starting point position and the gate ending point position in the depth direction sent from the gate position memory 66, and receives these two values and the focus depth position d. The values of the depth direction counter 52 are compared. When the D depth direction counter 52 is located between two gate positions, the gate signal is turned on, and when the counter is turned off, the gate signal is turned off and the gate signal is sent to the write control circuit 63.

The waveform peak storage circuit 70 comprises a waveform peak storage memory 71, a comparator 72, a register 73, a comparator 74, and a write control circuit 75. The D-depth direction counter 52 indicating the depth position d is connected to the address of the waveform peak storage memory 71, and the ultrasonic echo waveform at each depth is stored. Comparator 7
2 compares the echo height value of the detection circuit 54 with the contents of the waveform peak storage memory 71, and when the echo height value of the detection circuit 54 is higher, sends a write signal to the write control circuit 75.

The register 73 holds the contents of the Y-direction electronic scanning address ys, and the waveform peak storage circuit 70 holds the maximum value for each depth on the scanning line of the address ys. The data in the register 73 is written by the control unit 90. The comparator 74 includes a Y direction counter 51 that indicates the content (ys) of the register 73 and the electronic scanning position y.
And the write control circuit 75
To the electronic scanning position coincidence signal.

The write control circuit 75 includes a comparator 7
When there is a write signal from the comparator 72 when the electronic scanning position coincidence signal from 4 is received, a write pulse is output to the waveform peak storage memory 71. In response to this write pulse, the waveform peak storage memory 71 writes the output data of the detection circuit 54 into the memory, and the memory contents are updated.

In the step 2 of updating the control unit (FIG. 2),
The depth direction counter 52 indicating the depth position d is incremented from 0 by +1
However, the ultrasonic waveforms stored in the waveform peak storage memory 71, that is, the A-scope waveforms are sequentially read, the same contents are cleared after the reading, and the next cycle is prepared. Then, the read A scope waveform is displayed on the screen display unit in the control unit 90.

As shown in FIG. 1, the apparatus has a beam path counter 50, a Y direction counter 51, a D depth direction counter 52, and a control section 90. Each counter can be cleared or counted up by a signal from the control unit 90. The control unit 90 includes at least a CPU, a memory, a program ROM, a screen display unit,
It is a device that is composed of a communication unit and is capable of creating various timings, sending them to each circuit of each unit, giving data to each unit, reading data from each unit, displaying the result, and communicating with other devices. . A commercially available computer can be used for the control unit 90. In this embodiment, the above-mentioned excitation means of the ultrasonic flaw detector is mainly composed of the pulsar section 20. The above waveform memory is composed of the receiver unit 30, the AD converter 411, and the ultrasonic waveform memory 412. The phase synthesizing means is composed of an adder 53.
The focusing means is the Y direction counter 51.
The D depth direction counter 52, the D depth direction counter 52, and each dynamic focus phase correction memory 414.

Next, the operation of the present invention will be described with reference to FIG. In the ultrasonic wave transmitting step S 1, the control unit 90 outputs 1
Two pulse transmission timing signals are generated, and the pulser unit 2
Sent to 0. The pulsar unit 20 receives this signal,
Spike pulses are simultaneously sent to the n-element ultrasonic transducers of the ultrasonic transducer array 10. As a result, the ultrasonic transducers are excited at the same time, and the ultrasonic waves are transmitted by the ultrasonic transducer array 10
Pseudo-plane waves are radiated in the radiation surface direction of. The ultrasonic wave propagates through the inspection space, but when it encounters an acoustic reflection surface such as a defect, part of the ultrasonic wave is reflected, and the ultrasonic transducer array 10
Will be received at.

In the writing step S2, the ultrasonic wave reception echo of each transducer received by the ultrasonic transducer array 10 is amplified by the receiver unit 30, and the signal processing circuits 41-1 to 41-n corresponding to the number of transducer elements are provided. n. In each signal processing circuit 41, the ultrasonic wave reception echo is AD-converted and stored in the ultrasonic wave waveform memory 412. The memory address at this time is given by the beam path counter 50, and the clock of the counter is the same as the clock of the AD converter 411.
For example, in this embodiment, the ultrasonic transducer has a nominal frequency of 5 MHz or less and an AD conversion clock of 50 MH.
z. However, the frequency is not limited to this, and can be changed as necessary. Normally, the beam path counter 50 is cleared to 0 at the ultrasonic wave transmission timing and then counted by the clock of the AD converter. However, when the start point of the electronic scanning range is distant, the timing to be cleared to 0 is appropriate by the control unit. Controlled by. As a result, the capacity of the ultrasonic waveform memory 412 can be effectively used. This step is carried out until the maximum beam path propagation time in the electronic scanning range.

In the reading step S3, while the ultrasonic reception echo waveform stored in the ultrasonic waveform memory 412 is read in the depth direction D of the examination space and the probe array direction Y, electronic scanning is performed by the dynamic focus method. Done. FIG. 3 shows an image diagram of electronic scanning. In this figure, the ultrasonic transducer array and the section from the depth d0 to de in the examination space where the ultrasonic waves of the array are emitted and the section from y0 to ye in the Y direction of the array direction of the probe are shown. The electronic scanning plane shown is shown.

In the reading step S3, the Y direction counter 51 and the D depth direction counter 52 are cleared or set to the starting point positions y0 and d0, and then the Y direction counter 5 is set.
While incrementing by 1, it is performed until the counter value becomes yes. When the counter exceeds ye, the counter is then cleared or set to the starting point position y0, and the D depth direction counter 52 is incremented by +1. By repeating this operation, the D depth direction counter 52 becomes de,
This process is repeated until the Y-direction counter 51 makes one cycle. The clocks of these counters 51 and 52 are A
It is performed at the same 50 MHz as the D conversion clock. In the meantime, in each of the signal processing circuits 41-1 to 41-n, the values of the Y direction counter 51 and the D depth direction counter 52 are supplied to the address of the dynamic focus phase correction memory 414. The memory 414 has its electronic scanning position (y, d).
The phase correction amount, that is, the beam path position of each ultrasonic transducer (1 to n) to be phase-combined in (3) is output. further,
This beam path position becomes the read address of the ultrasonic waveform memory 412. This beam path position is illustrated by two arrows L1 and L2 of the electronic scanning position P1 on the electronic scanning image in FIG. Where L1 is the electronic scanning position P
1 indicates a propagation path where the ultrasonic wave comes first, and is usually the distance between the electronic scanning position P1 and the nearest transducer. Further, L2 indicates the propagation path of the ultrasonic wave received by each transducer (illustrated by the transducer position n in FIG. 3) when the ultrasonic wave is reflected at the electronic scanning position P1. The sum (L1 + L2) of these two propagation paths becomes the beam path position at the time of phase combination in the transducer n at the electronic scanning position P1. Therefore, from the ultrasonic waveform memory 412, the electronic scanning position (y, d)
The ultrasonic waveform data in each ultrasonic transducer that is subjected to the phase synthesis in (3) is output. This ultrasonic waveform data is output by the number of ultrasonic transducer elements in each of the signal processing circuits 41-1 to 41-n, and this is sent to the adder 53 for phase combination.
According to the above procedure, the phase-combined waveform at the electronic scanning position (y, d) indicated by the Y direction counter 51 and the D depth direction counter 52 is output by the adder 53. The above relationship is shown in FIG. 4 is shown. Point P1 and point P2 in FIG. 3 indicate two points on the plane which are electronically scanned, and the addresses (y1, d1) and (y2, d2) of these two points are the D depth direction counter 52 and Y direction at that time. The counter 51 is shown. FIG. 4 shows the address and memory of each ultrasonic waveform memory 412, and each ultrasonic waveform memory 4 at two points P1 and P2 on the electronic scanning plane.
12 shows the phase combination curve, and in the phase combination, the contents of the respective memories 412 are simultaneously read out along this curve, and the adder 53 performs the phase combination. Here, such a method is referred to as a dynamic focus method using an electronic scanning plane.
While the dynamic focus is being performed by the electronic scanning plane, the adder 53 outputs the phase combination result data at each electronic scanning position and sends it to the gate circuit 60 and the waveform peak storage circuit 70 via the detection circuit 54. To be

The gate circuit 60 detects the height of the waveform peak echo in the gate and its position in the depth direction. As shown in FIG. 3, the gate range can be set individually for each Y scanning position, and the waveform peak echo height and its beam path distance can be detected for each Y scanning position. In the gate position memory 66, gate range data for each Y scanning position is written in advance. In the dynamic focus by the electronic scanning plane in the reading step S3, the value of the Y direction counter 51 indicating the y position of the electronic scanning plane is given to the address of the gate position memory 66. The memory contents of the memory 66 are the gate range data (starting position,
End point position), and the data is connected to the gate generation circuit 65. In the gate generation circuit 65, the gate range data is compared with the D depth direction counter 52 indicating the d position on the electronic scanning plane, and if the d position is within the gate range, a gate-on signal is sent to the write control circuit 63. While the gate is on, the comparator 62 displays the echo height memory 61.
The previous peak echo height in the gate stored in
The echo height at the current electronic scanning position from the detection circuit 54 is compared, and when the echo height at the current electronic scanning position is larger,
The echo height at the current electronic scanning position is written in the echo height memory 61, and D indicating the d position of the current electronic scanning position is written.
The data of the depth direction counter 52 is converted into the echo depth memory 64.
Write in. Since the Y-direction counter 51 indicating the y position of the electronic scanning plane is given to the addresses of the echo height memory 61 and the echo depth memory 64, the waveform peak echo height in the gate and the depth thereof for each y position. You can save the direction position.

The waveform peak storage circuit 70 performs waveform peak storage processing of the ultrasonic waveform on the virtual flaw detection line whose Y position on the electronic scanning plane shown in FIG. 3 is ys. Although this ultrasonic waveform is displayed on the screen display of a personal computer,
This display cycle period is long and is about 20 msec (around 50 Hz in frequency). On the other hand, in the above apparatus of the present invention, the period for scanning the entire range of the electronic scanning plane is shorter than this, and it is not possible to display all ultrasonic waveforms on the virtual flaw detection line. Therefore, the waveform peak storage circuit 7
0 stores the peak height of the ultrasonic waveform at each depth position in each ultrasonic waveform on the virtual flaw detection line within the display cycle period, and stores the maximum waveform at that position at all depth positions. To do. Data (ys) indicating the Y position on the virtual flaw detection line is written in the register 73 by the control unit 90. This data is sent to the comparator 74. The comparator 74 compares the Y direction counter 51 indicating the electronic scanning position y with the register 73 (ys),
When they match, a match signal is written to the write control circuit 75.
The following operations are effectively performed. The D depth direction counter 52 indicating the depth position d is connected to the address of the waveform peak storage memory 71, and the ultrasonic peak waveform of the previous time at the same depth position d is stored in the comparator 72 from the waveform peak storage memory 71. The latest ultrasonic echo height at the same depth position d is given from the detection circuit 54. When the detection circuit 54 is higher, a write signal is sent to the write control circuit 75, and the write control circuit 75 sends a write pulse to the waveform peak storage memory 71.
The ultrasonic peak waveform at the depth position d is updated to have a higher echo height than the previous time. This operation is performed at each depth,
In addition, each reading step S in the next flaw detection cycle
The same is done for 3.

Controller update 1 In step S4, controller 9
0 reads the contents of the echo height memory 61 and the echo depth memory 64 of the gate circuit 60 while operating the Y direction counter 51 which gives the addresses of the memories 61 and 64, and after the reading, the contents of the memories are read. clear.

In the screen update cycle G, it is determined whether the screen display is updated or not. If the screen is not updated, the process proceeds to the display and communication step S6. If the screen is updated, the next control unit update 2 step S5 is performed.
Move to.

Controller update 2 In step S5, controller 9
0 reads the contents of the waveform peak saving memory 71 of the waveform peak saving circuit 70 while operating the D depth direction counter 52 which gives the address of the memory 71, and after the reading, clears the contents of the memory.

In the display and communication step S6, the values of the echo height and the echo depth in each gate read in the control section updating 1 step S4 are displayed, and the contents are communicated to the outside. Further, the peak-stored ultrasonic waveform read in step S5 of updating control unit 2 is displayed as an A-scope waveform on the screen display unit, and the waveform data is communicated to the outside. In this embodiment, there is only one set of gate circuits 60, but the present invention is not limited to this, and it is possible to prepare a plurality of gate circuits and add gate processing in a plurality of gate ranges. .

As described above, in the ultrasonic flaw detector of the present invention, spike pulse-shaped transmission pulses are sent to each transducer of the ultrasonic transducer array at the same timing, and the received ultrasonic echoes received by each transducer are AD. It is converted and stored in the waveform memory for the number of transducer elements. In electronic scanning, waveform data is simultaneously read from the waveform memories for the number of transducer elements along the phase combination curve at that position, and phase combination is performed. That is, the phase-combined waveform of one electronic scanning position is performed in one memory read cycle. Since the clock of 50 MHz is used in this embodiment, the calculation of one point is completed in 20 nsec. Considering an electronic scanning plane of 200 points in the depth direction and 200 points in the Y-axis direction, 20 * 200 * is required to scan the entire range.
200nsec = 800μsec. Further, during the electronic scanning, the gate processing is simultaneously performed in the gate circuit and the A-scope waveform storage processing is simultaneously performed in the waveform peak storage circuit. The ultrasonic cycle is 80
In addition to the time of 0 μsec, the ultrasonic wave transmission time, the ultrasonic wave reception time, and the reading time of the gate data and the A-scope waveform are necessary.
The flaw detection cycle in the electronic scanning range is completed in 00 μsec (= 1 msec). In the prior art device that electronically moves the flaw detection beam in the Y-axis direction and measures in the depth direction by the dynamic focus method, flaw detection in one beam direction is completed in one ultrasonic cycle. 20 to detect the same electronic scanning range as above
Zero ultrasonic repeat cycles are required. Even if the ultrasonic repetition frequency is set to 10 KHz, it takes 20 msec to detect flaws in the electronic scanning range. In this embodiment, the device of the present invention can detect flaws 20 times faster than the device of the prior art.

In the above-described embodiment, the Y-direction counter 51 is counted first in the processing sequence of the electronic scanning in the Y-direction and the D-direction, and the D-depth direction counter 52 is advanced after the Y-direction counter 51 has completed one cycle. But reverse this, D
It is also possible to count the depth direction counter 52 first and advance the Y direction counter 51D after the D depth direction counter 52 has completed one cycle. Moreover, in the above-mentioned embodiment, the ultrasonic transducer array 10 vibrates all the transducers 1 ... 1 when transmitting ultrasonic waves. However, it has a length exceeding the expected flaw detection (desired) range in the intersecting direction, and only part of the transducers 1 ... 1 covers the entire flaw detection target surface (by transmitting ultrasonic waves once). If possible, all the vibrators 1 ... 1 are not limited to those that vibrate. Furthermore, when the flaw detection (online flaw detection) is not performed on the production line, the ultrasonic transducer array 1
It is also possible to scan 0 and sequentially change the position of flaw detection by the scanning (it should be noted that even if flaw detection is carried out as described above, it is usually within the range, to the place where the inspection operator wants to observe. Only, the gate is set).
Further, in this case, not only is the flaw detection intended for the entire flaw detection range at one time (entire flaw detection), but the flaw detection intended range may be performed by a plurality of flaw detections. Even with this setting, the range that can be covered by one emission of ultrasonic waves is wider than in the conventional case, so the number of flaw detections can be reduced. However, it is most efficient to perform flaw detection on the entire surface by emitting ultrasonic waves once, and is suitable for online flaw detection.

Finally, when the principle of flaw detection according to the present invention is summarized, it means that the actual focus of the ultrasonic wave at the time of ultrasonic wave transmission is eliminated and each position (coordinate) inside the material to be flaw-detected is detected.
Corresponding to the address of the partitioned waveform memory, and by comparing the phase composition of the waveform data at each waveform memory position by the electrical processing at the time of actual reception, by knowing the address of the abnormal waveform memory , Which detects the position of the corresponding internal defect of the material to be inspected, thereby obtaining a wide flaw detection range by the pseudo plane wave, reducing the flaw detection cycle, and enabling high-speed flaw detection. .

[0045]

【The invention's effect】

By carrying out the first invention of the present application, it is possible to provide an ultrasonic flaw detector suitable for the nondestructive inspection, in which focus is obtained only on the receiving side. This has dramatically reduced the cycle time for flaw detection of various materials. In particular,
We were able to provide an ultrasonic flaw detector capable of flaw detection on the entire surface with a cycle time that matches the operating speed of the latest production line and refining line.

The effect of the ultrasonic flaw detector according to the first aspect of the present invention can be obtained by carrying out the second aspect of the present invention, and the defect signal re-synthesized within the electronic scanning range by the gate processing means can be obtained. The size and position of the defect can be obtained from the position information in the electronic scanning range. Further, the A-scope memory unit obtains the A-scope waveform for each waveform display cycle by the re-synthesized defect signal in the electronic scanning range and the position information of the electronic scanning range, and the waveform can be displayed on the display device. Is.

By carrying out the third invention of the present application, it is possible to perform flaw detection on the entire range of flaw detection scheduled for the material to be inspected at that position, particularly by emitting ultrasonic waves once. It is possible to perform flaw detection on the entire surface of the flaw detection surface online (on the production line of the material being inspected), which does not reduce the production capacity and is extremely efficient.
It is possible to complete the flaw detection of the test material.

[Brief description of drawings]

FIG. 1 is a block diagram of an ultrasonic flaw detector according to an embodiment of the present invention.

FIG. 2 is a control flowchart of the above embodiment.

FIG. 3 is an explanatory diagram showing an image of electronic scanning according to the above embodiment.

FIG. 4 is an explanatory diagram showing an image of a phase combination curve on the ultrasonic waveform memory according to the above embodiment.

[Explanation of symbols]

1 oscillator 10 Ultrasonic transducer array 20 Pulsar section 30 Receiver section 40 Signal processing unit 41 signal processing circuits (41-1 to 41-n) 411 AD converter 412 Ultrasonic waveform memory 413 switch 414 Dynamic focus phase correction memory 50 beam path counter 51 Y direction counter showing electronic scanning position y 52 D depth direction counter indicating depth position d 53 adder 54 Detection circuit 60 gate circuit 61 Echo height memory 62 comparator 63 write control circuit 64 echo depth memory 65 gate generation circuit 66 gate position memory 70 Waveform peak storage circuit 71 Waveform peak storage memory 72 Comparator 73 registers 74 Comparator 75 Write control circuit 90 Control unit

Continued front page    F-term (reference) 2G047 AA07 BA03 BC07 DA01 DB02                       GB02 GF06 GF19 GF22 GG01                       GG19 GG24 GG35

Claims (3)

[Claims] 1. An ultrasonic transducer array having a plurality of transducers that can be arranged along the surface of a material to be inspected, excitation means for exciting each transducer of the ultrasonic transducer array with a spike pulse, and each transducer. A waveform memory that stores the ultrasonic wave reception echo received as waveform data for each transducer; and a phase synthesizing unit that reads the contents of the waveform memory in which the waveform data for each transducer is stored and that performs phase synthesis with an adder. An ultrasonic flaw detector, comprising: focusing means for giving an address of each waveform memory as an address corresponding to a beam path distance of a dynamic focus with respect to an arbitrary position within an electronic scanning range in reading the waveform memory. 2. A depth direction gate range is provided for each array element array direction within an electronic scanning range, and the maximum echo height of the phase-combined signal in the gate range and the depth direction at the maximum echo height are given. A gate processing means for detecting a position, and a peak echo height in each depth direction of the phase-combined signal in a plurality of ultrasonic cycles at a designated array element array position in an electronic scanning range are stored in memory A The ultrasonic flaw detector according to claim 1, further comprising a scope memory means. 3. In a production line for a material to be inspected, which is a material product such as steel, an ultrasonic transducer array is arranged so as to intersect with the flow of the production line for the material to be inspected, so that the line is transferred. The ultrasonic wave according to claim 1 or 2, characterized in that it is possible to sequentially perform flaw detection in the entire range of the flaw detection plan inside the test material at each position in the transfer direction of the test material line. Flaw detector.