JP2003022689A - Semiconductor device having non-volatile memory, and rewriting method for the non-volatile memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor memory having a non-volatile memory in which connection can be confirmed by an easy method without changing the hardware of a general purpose ROM writer and a rewriting method for the non-volatile memory. SOLUTION: A semiconductor device incorporating a flash memory 104 is provided with a test mode storage circuit 109 and outputs an input from a control signal input terminal 101 from a data input/output terminal 102. Voltage outputted from the data input/output terminal 102 is taken in a general purpose PROM writer as a theoretical value, its input pattern is compared with an expected value pattern, and connection is confirmed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device such as a microcomputer having a programmable ROM (read-only memory) and having a PROM mode for writing the programmable ROM, and a method for writing to the semiconductor device. Regarding

[0002]

2. Description of the Related Art A CPU (central processing unit), a ROM for storing programs, a RAM (random access memory) for storing data, and an input / output control unit are formed on the same semiconductor substrate to reduce system cost and reliability. There is a single-chip type microcomputer (hereinafter abbreviated as "microcomputer") that aims to improve the performance. EE in ROM for program storage
There is a method in which a PROM (ROM capable of erasing / writing information, such as a flash memory) is used to allow a user to write / modify a program and shorten the system development period.

A microcomputer equipped with a flash memory is
The user's program and data can be rewritten in the state of being mounted on the board. However, for initial writing, the writing device such as a general-purpose PROM writer should be used before mounting on the board, not in the state of being mounted on the board. Writing is often more efficient.

A microcomputer equipped with a flash memory is
By setting the external terminal, the internal flash memory terminal,
The DIP (Dual-In-Line Pl) has a function of a mode (PROM mode) in which the external terminals are logically the same, and is compatible with a microcomputer equipped with a flash memory and a general-purpose PROM writer.
A PROM writer and a flash memory-equipped microcomputer are connected by a conversion adapter that matches the connection type of the "static Package" type.

The general-purpose PROM writer writes program data into the flash memory of the microcomputer equipped with the flash memory by logically controlling a predetermined electric signal.

[0006]

In order to meet the miniaturization of the set, it is strongly demanded that the microcomputer also have a large number of pins and miniaturization, and a narrow pitch QFP (Quad Flat Packg).
e) or FLAGA (Fine of chip size package)
LAND Grid Array) has come to be used. When a small-sized multi-pin package flash memory-equipped microcomputer is joined to a board with a socket, handling of the microcomputer or the socket rarely causes a short circuit or an open defect between the microcomputer terminal and the socket.

In the case of semiconductor inspection, a constant current source is connected to each terminal with an inspection device (semiconductor tester), and the connection of each terminal can be confirmed by measuring the voltage at which a minute current flows. Since a general-purpose PROM writer has only a function of outputting a logical value and a function of taking in and determining the logical value, the same connection inspection as a semiconductor tester cannot be performed. When writing to the flash memory with the PROM writer, even if there is a connection failure between the microcomputer terminal and the socket of the conversion adapter, the PROM writer cannot distinguish from the failure of the flash memory.

In view of the above problems, the present invention is a general-purpose ROM.
An object of the present invention is to provide a semiconductor device having a non-volatile memory in which connection can be confirmed by an easy method without changing the hardware of a writer, and a method of rewriting the non-volatile memory.

[0009]

To solve this problem, a semiconductor device of the present invention has a mode input terminal for inputting a logic value indicating a write mode and a normal operation mode, and a logic value to a nonvolatile memory in the write mode. A plurality of control signal input terminals, a data input / output terminal for exchanging write input data to the nonvolatile memory and output data for confirming the written data, and a test mode for specifying a terminal connection confirmation mode A storage means, and in the terminal connection confirmation mode, logical value inputs from the plurality of control signal input terminals are output from the data input / output terminals.

Further, in the method for rewriting to the nonvolatile memory of the present invention, the semiconductor device is electrically connected to a general-purpose ROM writer by using a conversion adapter having a socket, and the method for writing to the nonvolatile memory is tested. The first step of designating the terminal connection confirmation mode for the mode storage means, designating a plurality of control signal input terminals to arbitrary logical values, reading the voltage output from the data input / output terminal as a logical value, and optionally And a second step of judging the coincidence by comparing with the expected value of 1), the electrical connection between the semiconductor device and the general-purpose ROM writer is confirmed.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to FIGS. 1 to 7.

FIG. 1 is a block diagram showing the configuration of a microcomputer according to an embodiment of the present invention. Each block constituent element of the microcomputer shown in FIG. 1 is formed on one semiconductor substrate by a known semiconductor integrated circuit manufacturing technique. In the following drawings, parts that are not directly related to the present invention are omitted.

In FIG. 1, a central processing unit 105 (hereinafter abbreviated as CPU), a flash memory 104 connected to the CPU 105, an internal RAM 106, and a logical value output to an external terminal or a logical value output from an external circuit. A port control circuit 103 for inputting is input.

The signal line to the flash memory 104 built in the microcomputer is defined as follows for the sake of explanation. Address input signal (PA
[17: 0]), a data input / output signal (FIO [15:
0]), a mode input signal (PMODE [3: 0]) indicating a flash operation mode, and a chip select input signal (F) designating access timing to the flash memory.
NCE).

The flash memory 104 is a two-layer gate consisting of a control gate and a floating gate, which constitutes a memory cell.
Data is stored by changing the threshold value of the memory cell. The flash memory 104 has modes of read operation (Read), write operation (Prog RAM),
Erase operation (Erase), write confirmation operation (Prog
RAM Verify, erase confirmation operation (Erase)
Verify), and in each case, the operation is realized by applying an appropriate voltage to the source, drain, and control gate of the memory cell.

Flash memory 1 in the present embodiment
04 is a 4-bit mode input pin (PMODE [3:
0]), one of each operation is selected according to the logic value, and a voltage to be used internally is generated, and an address input pin (PA [17:
0]), an appropriate voltage for each mode is applied to the memory cell when the logic value of the chip select input pin (FNCE) is 0. In this embodiment, the mode input pin (PMOD
The logical value of E [3: 0]) is 0x0 at the time of read operation, 0x1 at the write operation, 0x2 at the erase operation, 0x3 at the write verify operation, and 0x4 at the erase verify operation. In this embodiment, the flash memory 104 does not operate with other logical values. In the case of the write operation, the voltage applied to the memory cell is changed according to the data value input from the data input / output pin (FIO [15: 0]) to determine whether the data is written or erased. Read operation (Read), erase confirmation operation (Erase Verif)
y), write confirmation operation (Prog RAM Veri
In fy), the applied voltage according to the operation is applied to the memory cell, and the determination value is output from the data input / output pin (FIO [15: 0]) depending on the state of the floating gate of the memory cell.

Timing diagrams are shown in FIGS. 3, 4 and 5. FIG.
Set the mode input pins (PMODE [3: 0]) to appropriate logic values, and set the address pins (PA [17: 0]) that specify the memory cell to be accessed after the specified time has elapsed. After the elapse of time, the chip select signal is set to L to access the flash memory. FIG. 3 shows an erase operation (Erase) without using the data input / output pin, and FIG. 4 shows a write operation (Prog RAM) using the data input / output pin as an input and FIG. Shows the case of outputting the state of the memory cell from the data input / output pin to the PROM writer, which is the case of read operation (Read), write confirmation operation (Prog RAM Verify), and erase confirmation operation (Erase Verify).

In FIG. 1, reference numeral 107 denotes a mode input terminal for writing with a PROM writer (hereinafter PRO.
M mode) and the case of actually operating as a microcomputer (hereinafter abbreviated as microcomputer mode) are determined. In the PROM mode, the port control circuit 103 uses a part of the external terminals of the microcomputer as the control signal input terminal 101 to take in the logical value of the voltage controlled from the outside, and the address input pin (PA [17: 0] of the flash memory 104. ) And a mode input pin (PMODE [3: 0]), and a part of an external terminal of the microcomputer as a data input / output terminal 102, and a mode input pin (PMODE [3: 0]).
[3: 0]) is decoded and the read operation (R
ead), write confirmation operation (Prog RAM Ve
rify), erase confirmation operation (Erase Verif
In the case of y), the logical value output from the data input / output pin of the flash memory 104 is output, and the write operation (Pr
In the case of an ogRAM), it has a function of fetching a voltage controlled from the outside as a logical value and connecting the logical value to a data input / output pin (FIO [15: 0]) of the flash memory 104. In the microcomputer mode, the CPU
It is controlled by 104 and has a function of fetching a voltage controlled from the outside by a software as a logical value and outputting it to the outside.

FIG. 2 is a schematic diagram for explaining a conversion substrate according to one embodiment of the present invention. Lighter board 1
Reference numeral 32 has a DIP-shaped pin for electrically connecting the PROM writer and the writer board 132.
Reference numeral 130 is a socket for electrically connecting the microcomputer and the board. 131 is a socket conversion board, which is a PRO
It has a function of logically fixing the mode input terminal 107 for setting the M mode and a function of electrically connecting the terminal used by the PROM writer in the PROM mode to the writer substrate 132.

In FIG. 1, 109 is a test mode memory circuit, the details of which are shown in FIG. 200 is PMOD
A indicating that the setting of E [3: 0] is a read operation A
It is an ND circuit. An AND circuit 201 indicates that the setting of PMODE [3: 0] is a write confirmation operation. An AND circuit 202 indicates that the setting of PMODE [3: 0] is an erase confirmation operation. 203 is a PMO
It is an AND circuit showing that the setting of DE [3: 0] is a write operation to the test mode. 207 is a flip-flop that stores the test mode, and has a logical value of 0 and P
The ROM mode and the logical value 1 indicate the connection test mode. Two
Reference numeral 04 is an OR circuit for the microcomputer side to generate an output enable signal for the data input / output terminal in the PROM mode. Reference numeral 208 denotes a chip select input pin (F
O for fixing NCE) to logical value 1 in test mode
It is an R circuit. In this embodiment, the data input / output terminal 16
Since there are 23 main and control signal input terminals, a 6-bit selector 211 for selecting a control signal to be output by using a part of PA [17] of the address signal, and a judgment value output from the flash memory 104 A 10-bit selector 209 for selecting the logical value of the control signal input terminal, a determination value output from the flash memory 104, and a 6-bit selector 211 for selecting the output of the selector 211.

In the microcomputer with built-in flash memory shown in FIG. 1, the case of writing to the flash memory will be described. A microcomputer with a built-in flash memory is put in the socket 130 of the conversion adapter shown in FIG. 2 and connected to a general-purpose ROM writer. The socket conversion board 131 fixes the mode input terminal 107 to the logical value of the PROM mode. The port control circuit 103 makes the control signal input terminal 101 and the data input / output terminal 102 electrically have the same logical value as the flash memory 104 in the microcomputer. The control signal input terminal 101 and the data input / output terminal 102 are sockets 130,
DIP of socket conversion board 131 and lighter board 132
Since it is electrically connected to the pin, the PROM writer can set the logical value of the internal pin of the flash memory 104 and capture the logical value of the data input / output pin, and the erasing operation (according to the specification of the flash memory 104 ( Erase), erase confirmation operation (Erase Veri
fy), write operation (Prog RAM), write confirmation operation (Prog RAM Verify), and read operation (Read), the user's program can be stored in the flash memory 104.

A method for testing the connection between the socket and the terminal used in the PROM mode of the microcomputer with built-in flash memory in the method of writing the user's program into the flash memory 104 as described above will be described.

As a first step, the test mode storage circuit 109 stores a logical value indicating the test mode.
The PROM writer sets MODE [3: 0] to the test mode setting 0xF logic value, sets the external logic value of A [0] of the data input / output terminal to 0x1, and outputs a low pulse from the chip select signal NCE. To do. PMODE
Since [3: 0] is set to 0xF, the AND circuit 203 has a logical value of 1, and the AND circuit 206 inverts and outputs the row pulse received from the PNCE, and the flip-flop 2
The value 1 is stored in 07.

As a second step, the PROM writer sets the terminal of A [17] to the logical value 0, one of the other control input signal terminals 101 to the logical value 1 and the remaining terminals to the logical value 0. To the PROM writer as a logical value. The captured value is compared with the expected value according to (Table 1), and if they are the same, the input pattern is changed sequentially,
Continue expected value comparison.

[0025]

[Table 1]

During this step, since the microcomputer stores 1 in the flip-flop 207, the data input / output terminal 1
02 becomes a data output mode by the OR circuit 204,
A logical value input from the control signal input terminal 101 designated by PA [17] is selected by the selector 211 and output from the data input / output terminal 102. Further, for the flash memory 104, since the OR circuit 208 does not cause the chip select signal of the flash memory to have a logical value of 0, the flash memory cell is not affected by the test mode.

In the third step, the PROM writer sets the terminal of A [17] to the logical value 1, the other control input signal terminal 101 to the logical value 1 and the remaining terminals to the logical value 0. To the PROM writer as a logical value. The captured value is compared with the expected value according to (Table 1), and if they are the same, the input pattern is changed sequentially,
Continue expected value comparison. The microcomputer operation in this step is the same as that in the second step described above.

According to the present embodiment, with respect to the control signal input terminal used in the PROM mode, a general-purpose PROM writer sets a specific logical value to all the input terminals, and the internal signal of the semiconductor device is passed through. Then, the data can be output from the data input / output terminal and the logical values thereof can be compared by the general-purpose PROM writer, and if there is a connection failure between the socket and the semiconductor device, the general-purpose PROM writer can make the determination. .

[0029]

As described above, according to the present invention,
By adding control without changing the hardware of the general-purpose PROM writer, it is possible to easily confirm the connection between the terminal of the semiconductor device used for rewriting and the general-purpose PROM writer. Further, the circuit added for that purpose is small in scale, and does not affect the reading pulse used in the normal operation of the semiconductor device, so that the speed of the semiconductor device is not reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of a conversion adapter for connecting the semiconductor device according to the embodiment of the present invention to a general-purpose PROM writer.

FIG. 3 is a timing diagram of an erase operation of the built-in flash memory according to the embodiment of the present invention.

FIG. 4 is a write operation timing chart of the built-in flash memory according to the embodiment of the present invention.

FIG. 5 is a timing chart of a read operation, a write confirmation operation, and an erase confirmation operation of the built-in flash memory according to the embodiment of the present invention.

FIG. 6 is a detailed diagram of a test mode circuit according to an embodiment of the present invention.

[Explanation of symbols]

101 Control signal input terminal 102 data input / output terminal 103-port control circuit 104 flash memory 105 CPU 106 RAM 107 Mode input terminal 109 test mode memory circuit 130 socket 131 socket conversion board 132 Lighter board

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Claims (3)

[Claims] 1. A semiconductor comprising a CPU, a non-volatile memory connected to the CPU, an internal RAM, and a port control circuit for outputting a logical value to an external terminal or inputting a logical value output by an external circuit. In the device, write mode,
A mode input terminal for inputting a logical value indicating a normal operation mode, a plurality of control signal input terminals for inputting a logical value to the nonvolatile memory in the write mode, write input data to the nonvolatile memory and written data A data input / output terminal for exchanging output data for confirming, and a test mode storage means for designating a terminal connection confirmation mode are provided, and a logical value input from the plurality of control signal input terminals is performed in the terminal connection confirmation mode. A semiconductor device having a non-volatile memory, which outputs data from the data input / output terminal. 2. The semiconductor device having a non-volatile memory according to claim 1, wherein the non-volatile memory is a flash memory. 3. The method of electrically connecting the semiconductor device according to claim 1 having a non-volatile memory to a general-purpose ROM writer by using a conversion adapter having a socket, and writing to the non-volatile memory in a test mode storage means. The first step to specify the terminal connection confirmation mode for, and specify a plurality of control signal input terminals to any logical value,
A second step of reading the voltage output from the data input / output terminal as a logical value and comparing it with an arbitrary expected value to determine a match, and confirms the electrical connection between the semiconductor device and the general-purpose ROM writer. A method of rewriting to a non-volatile memory, characterized by: