JP2003018119A - Receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a receiver where system discriminating properties are impaired, even under various kinds of receiving condition, and frequency detecting precision can be improved. SOLUTION: A part, where phase reversion patterns of a burst part added to a tip of a data symbol of a signal which is to be received by a receiver 10 are equal, is made long. More specifically, in X section of first halt, a pattern A16, IA16, A16, IA16, A16 in the case of Wireless 1394 is changed into A16, IA16, A16, IA16, IA16; and further in Y section of the latter half, the first-half pattern is made the same pattern as A16, IA16, A16, IA16, IA16 in the case of Wireless 1394, so that, the flat part of a prescribed length is made to at a peak of the latter half, thereby improving the precision in frequency detection.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiver of a wireless communication system, and more particularly to, for example, orthogonal frequency division multiplexing (OFDM).
xing) Modulation method, a format of a burst signal portion of a radio signal in which a burst signal including a preamble signal is added to the head of the modulation packet signal, and a receiving device applied to a radio communication system or the like for receiving the format Is.

[0002]

2. Description of the Related Art For example, a 5 GHz band wireless LAN system realizes excellent communication performance over a wide band.
The OFDM modulation method is adopted. In this OFDM modulation method, transmission signal symbols that have been subjected to primary modulation (QPSK, 16ASAM, etc.) are collectively subjected to inverse Fourier transform by 2n powers, so that 2n orthogonal to the frequency axis are obtained.
This is a modulation method that constitutes subcarriers of a script.

In a wireless communication system adopting such an OFDM modulation system, on the transmission side, transmission data is serial-parallel converted and inverse fast discrete Fourier transform (IFF) is performed.
By performing T), a large number of orthogonal subcarriers are collectively modulated. In this way, a burst signal, which is a synchronization training signal called a preamble signal, is added to the head of the IFFT-processed modulated signal and transmitted. Then, on the receiving side, automatic gain control (AGC: Auto Gain Control), frequency offset correction, FFT (Fast Fourier Transform) timing generation, etc. are performed using this preamble signal, and the generated FFT timing The FFT calculation is performed based on

As a typical system of the 5 GHz band wireless LAN system, there is a Wireless 1394 system.

FIG. 17 is a diagram showing a typical preamble signal of the Wireless 1394 system.

In FIG. 17, A16 represents a shot symbol (pattern identification) of 16 samples, and IA16
Indicates a pattern in which A16 is inverted in phase. C64 represents a reference signal, and C16 represents this guard interval part.

In the burst part of Wireless 1394, as shown in FIG. 17, all 10 cycles have different patterns. Specifically, A16 in the first half X section,
Patterns of IA16, A16, IA16, A16 and A16, IA16, A16, IA16, I in the latter half Y section
A preamble signal is composed of the pattern of the Y section in the latter half of A16, and following this preamble signal, there is a C region including the guard interval part C16 and two reference signals C64. Also, Wirere
Since the ss1394 system supports the synchronous transfer mode, continuous signals such as video signals can be communicated.

In addition, the Wireless 1394 system uses the same frequency band (5 GHz) as HyperLAN / 2, 802.11a, etc.
It is necessary to distinguish from these systems because it is assumed that it will be used in (band). For this discrimination, it is general to detect the difference in the phase inversion pattern of the preamble by using an autocorrelator. Wirel shown in FIG.
In the case of the phase inversion pattern of the preamble of the ess1394 system, two peaks appear in the correlator output because they are inverted every 16 samples except where two A16s in the middle are aligned. The real part is negative in both cases. In other systems, the sign of this peak is different, which allows the system to be identified from this information. That is, from the viewpoint of system identification, the preamble needs to have a phase inversion pattern having two peaks.

For such a burst signal, it is necessary to optimize the reception level (AGC), correct the reception frequency deviation, and detect the synchronization in a short time.

[0010]

By the way, in recent years, in wireless communication as well, improvement of the transmission speed has been demanded. Therefore, the amount of data multiplexed on one symbol data tends to increase. Due to this increase in multiplexed data, it is necessary to improve the carrier reproduction accuracy on the receiving side.

A wire having a preamble phase inversion pattern as shown in FIG. 17 in the synchronization burst section.
In the less 1394, conventionally, an autocorrelator is used as a carrier wave detection system. The autocorrelation obtains the correlation between repetitive signals included in the preamble part. Therefore, the frequency accuracy (S
/ N) is as shown in FIG.

It can be seen from FIG. 18 that the frequency can be detected with high accuracy if the frequency is detected at this high frequency accuracy point. However, at the first peak (first peak) shown in the figure, the actual frequency accuracy is poor because the RF system is not sufficiently converged. Therefore, the second peak shown in the figure is used for frequency detection. ing.

Here, a possible cause of increasing the error in the frequency detection of the carrier wave is the deviation of the detection position. When no noise is added to the received signal, the amplitude information of the autocorrelator matches the frequency accuracy of the carrier wave in FIG. 18, so the optimum position (S / N maximum of frequency information is maximum) based on the information of the autocorrelation output. Frequency detection can be performed at the position of.

However, when the noise component of the received signal is large, the amplitude information of the autocorrelator does not always match the frequency accuracy, so that frequency detection is often performed at a position deviated from the optimum position. As a result, the frequency detection system in the conventional receiving apparatus has deteriorated the frequency detection accuracy.

The present invention has been made in view of the above circumstances, and its object is to achieve various reception conditions.
An object of the present invention is to provide a receiving device capable of improving frequency detection accuracy without impairing system identification performance.

[0016]

To achieve the above object, a first aspect of the present invention is to add a burst section including at least a preamble signal to the head section of a data signal,
A receiving device that receives a signal in which the preamble signal is divided into two stages of a first half section and a second half section for system identification, and detects two peaks in the first half section and the second half section by autocorrelation calculation, The received signal has a pattern in which the preamble signal has a combination of shot symbols of a plurality of samples and phase inversion symbols of the shot symbols, so that the peaks in the second half section can be detected more than those in the first half section, the shot symbols and The phase inversion symbol of the shot symbol is combined.

Further, according to the first aspect of the present invention, in the received signal, a shot symbol and a phase-inverted symbol of the shot symbol are combined so that a flat portion having a predetermined length is present in a peak of a second half section. .

Further, according to the first aspect of the present invention, the moving average section related to the autocorrelation calculation is set to a length such that the peak value of the second half section is higher than at least the peak value of the first half section.

Further, according to the first aspect of the present invention, there is provided a detecting section for detecting the carrier frequency of the received signal based on the autocorrelation result.

According to a second aspect of the present invention, a burst portion including at least a preamble signal is added to the head portion of a data signal, and the preamble signal is divided into two stages of a first half section and a second half section for system identification. 2 signal in the first half and the second half by autocorrelation calculation
A receiver for detecting two peaks, the received signal is
The preamble signal has a pattern in which the shot symbols of a plurality of samples and the phase inversion symbol of the shot symbol are combined, and the peak of the shot symbol and the shot symbol of the shot symbol can be detected more in the latter half section than in the first half section. A combination of phase-inverted symbols, an automatic gain control amplification unit that amplifies the input received signal level with a gain according to the gain control signal, a received signal power observing unit that detects the power of the received signal, and the automatic gain. A delay unit for delaying the output of the control amplification unit for a fixed time,
Burst detection is performed based on the autocorrelation calculation of the output signal of the automatic gain control amplification section and the output signal of the delay section. When the first half section of the preamble signal is detected, the first burst synchronization detection signal is output, and the second half section. Second is detected
A burst detection unit that outputs a burst synchronization detection signal of
When the trigger signal indicating the start of burst detection is received, the gain control signal is output to the automatic gain control amplification unit so as to be amplified with a preset first gain, and the burst detection unit outputs the first burst synchronization detection signal. When receiving, the second gain is calculated based on the received signal power value detected by the received signal power observing section, and the gain control signal is amplified by the second gain so as to amplify the gain control signal with the second gain. To the output signal of the automatic gain control amplification unit amplified by the second gain to obtain the received signal power value, and when the burst detection unit receives the second burst synchronization detection signal, the determination is made. An amplification gain control that calculates a third gain based on the received signal power value and outputs the gain control signal to the automatic gain control amplification section so as to amplify the gain with the third gain. And a part.

According to a second aspect of the present invention, the amplification gain control section sets the gain of the automatic gain control amplification section to the third gain after setting the third gain and before starting the next burst detection. Fixed to.

Further, according to a second aspect of the present invention, the burst signal includes a reference signal following the preamble signal, receives the cross-correlation calculation result of the burst detection unit, and detects the reference signal. Further includes a timing control unit for outputting the burst synchronization detection signal to the amplification gain control unit, and the amplification gain control unit shifts to a standby mode of the trigger signal when receiving the third burst synchronization detection signal, The gain of the automatic gain control amplifier is fixed to the third gain until the next trigger signal is input.

Further, according to a second aspect of the present invention, the burst detection section detects a carrier frequency based on an autocorrelation result and selects an error detection frequency, and the burst detection section selects the error detection frequency. It has a correction unit that receives and corrects the frequency offset of the received signal.

Further, according to a second aspect of the present invention, the timing control section outputs a timing signal after a lapse of a predetermined time from the peak position of the cross-correlation result, and the burst detection section outputs the carrier wave based on the auto-correlation result. The error detection frequency is selected by detecting the frequency, the error detection frequency selected by the burst detection unit is received, and the correction unit that corrects the frequency offset of the amplified reception signal is output from the timing control unit. And a demodulation unit for receiving the timing signal and performing a discrete Fourier transform on the received signal by the correction unit to demodulate.

Further, according to a second aspect of the present invention, the received signal is modulated based on an orthogonal frequency division multiplexing modulation method.

According to a third aspect of the present invention, a burst portion including at least a preamble signal is added to the head portion of a data signal, and the preamble signal is divided into two stages of a first half section and a second half section for system identification. 2 signal in the first half and the second half by autocorrelation calculation
A receiver for detecting two peaks, the received signal is
The preamble signal has a pattern in which the shot symbols of a plurality of samples and the phase inversion symbol of the shot symbol are combined, and the peak of the shot symbol and the shot symbol of the shot symbol can be detected more in the latter half section than in the first half section. Phase-inverted symbols are combined, and an automatic gain control amplification section for amplifying an input received signal level with a gain according to a gain control signal, and an output signal of the automatic gain control amplification section are converted from an analog signal to a digital signal. An analog / digital converter,
A received signal power observing section for detecting the power of the received signal,
A delay unit that delays the output of the automatic gain control amplification unit for a fixed time, burst detection is performed based on a correlation calculation between the digital output signal of the analog / digital converter and the output signal of the delay unit, and the first half section of the preamble signal is detected. When a peak is detected, the first burst synchronization detection signal is output, and when the burst detection unit that outputs the second burst synchronization detection signal that detects the peak in the second half section and the trigger signal that indicates the start of burst detection are received, The gain control signal is output to the automatic gain control amplification section so as to amplify it with the set first gain, and when the burst detection section receives the first burst synchronization detection signal, the received signal power observation section detects it. The second gain is calculated based on the received power value of the received signal, and the gain is amplified with the second gain. A control signal is output to the automatic gain control amplifier, amplified and integrated by receiving a digital output signal of the analog / digital converter obtains the received signal power value at the second gain, the second by the burst detector
When receiving the burst synchronization detection signal of, the third gain is calculated based on the obtained received signal power value, and the gain control signal is output to the automatic gain control amplifying unit so as to amplify the gain with the third gain. And an amplification gain control section.

Further, according to a third aspect of the present invention, the amplification gain control unit adds a second gain to the received signal power value by the received signal power observing unit and does not distort the analog / digital converter. Calculate based on the signal power value.

In addition, in a third aspect of the present invention, the amplification gain control section uses the received signal power value after gain control as an optimized reference signal power value in addition to the received signal power value for which the third gain is obtained. Calculate based on

According to a third aspect of the present invention, the amplification gain control section does not distort the analog / digital converter by adding the second gain to the received signal power value by the received signal power observing section. The calculation is performed based on the reference signal power value of 1, and the third gain is calculated based on the optimized second reception signal power value after the gain control in addition to the calculated reception signal power value.

According to the present invention, when burst detection is started, the gain control signal is output from the amplification gain control section to the automatic gain control amplification section, and the amplification gain of the automatic gain control amplification section is set to a preset value, for example, It is set to the maximum value of the first gain. In this state, the reception signal input waiting state is entered. In such a state, first, the preamble signal at the head of the received signal is input to the automatic gain control amplification unit. In the automatic gain control amplifier, for example, the first half section of the preamble signal of the received signal is amplified with the first gain (maximum gain) and output to, for example, the A / D converter. In parallel with this, the preamble signal of the received signal is input to the received signal power observing section. In the received signal power observing section, the power of the received signal is observed and, for example, the peak voltage is measured, and the received signal power value having a value according to the input received signal level is supplied to the amplification gain control section.

In the A / D converter, the preamble signal portion of the received signal is converted from an analog signal to a digital signal and supplied to the amplification gain control section, the delay section and the burst detection section. At this time, the output signal of the A / D converter is distorted, but since it is not a data signal, the received signal quality does not deteriorate.

In the delay section, the digital reception signal is delayed by the burst period for burst detection and output to the burst detection section. In the burst detection unit, correlation (autocorrelation and cross-correlation) calculation between the digital received signal by the A / D converter and the delayed signal by the delay unit is performed.
Then, for example, based on the autocorrelation result, the detection of the burst signal of the predetermined period of the communication system is performed, and first,
A first synchronization detection signal indicating that the first half X section of the preamble signal has been detected is generated and output to the amplification gain control unit. Even if the preamble signal is distorted, burst detection can be performed without lowering the detection rate because the autocorrelation circuit is used in the burst detection unit.

The amplification gain control section receives the first burst synchronization detection signal from the burst detection section, and based on the received signal power value detected by the received signal observation section and an appropriate value that does not distort the A / D converter. Then, the gain is calculated and the gain control signal is set to the calculated value. This gain control signal is supplied to the automatic gain control amplification section. The automatic gain control amplifier receives the gain control signal and sets the gain to the second gain which is the calculated value. However, at this time, the gain of the automatic gain control amplification unit includes analog signal processing in the process of calculating the peak value of the received signal power, and includes some variation, resulting in rough gain control.

In the automatic gain control amplification section, for example, the remaining first half section and second half section of the preamble signal of the received signal are amplified with a gain corresponding to the received signal level, and A / A
It is output to the D converter. In the A / D converter, the preamble signal portion of the received signal is converted from an analog signal to a digital signal and supplied to the amplification gain control section, the delay section, and the burst detection section. At this time, since the input signal of the A / D converter is amplified with a gain based on an appropriate value that does not distort the A / D converter, no distortion occurs in the output signal of the A / D converter.

In the delay section, the digital received signal is delayed by the burst period for burst detection and output to the burst detection section. In the burst detection unit, correlation (autocorrelation and cross-correlation) calculation between the digital received signal by the A / D converter and the delayed signal by the delay unit is performed.
Then, for example, based on the result of the autocorrelation, the burst signal of the cycle determined by the communication system is detected, the second synchronization detection signal indicating that the second half Y section of the preamble signal is detected is generated, and the amplification gain is generated. It is output to the control unit. Further, in order to be able to detect a peak in the second half section more than in the first half section, the shot symbol and the phase inversion symbol of the shot symbol are combined, for example, the peak of the second half section of the autocorrelation power becomes flat,
Alternatively, it will be higher than the peak in the first half section. As a result, even if the detection position shifts, the frequency detection accuracy (S / N)
Has no effect on. Therefore, the carrier frequency is detected with high accuracy without deterioration in accuracy due to the carrier frequency detection position.

In the amplification gain control section, the signal passed through the A / D converter without distortion with a gain based on the received signal power is received, and for example, the digital value of the received signal is integrated to measure an accurate signal power value. It Further, the amplification gain control section receives the second burst synchronization detection signal from the burst detection section and receives the second integrated signal of the received signal that has passed through the A / D converter without distortion, and the optimum value that does not distort the A / D converter. The gain is calculated based on the value and the gain control signal is set to the calculated value. This gain control signal is supplied to the automatic gain control amplification section. The automatic gain control amplification unit receives the gain control signal and sets the gain to the third gain which is the optimum calculated value.

In the automatic gain control amplifier, the remaining Y section of the preamble signal of the received signal and the reference signal and the data signal are amplified with a gain according to the received signal level and output to the A / D converter. In the A / D converter, the reference signal and the data portion of the received signal are converted from analog signals to digital signals and supplied to the amplification gain control section, the delay section, and the burst detection section. At this time, since the input signal of the A / D converter is amplified with a gain based on an optimum value that does not distort the A / D converter, no distortion occurs in the output signal of the A / D converter.

In the delay section, the digital reception signal is delayed by the burst period for burst detection and output to the burst detection section. In the burst detection unit, correlation (autocorrelation and cross-correlation) calculation between the digital received signal by the A / D converter and the delayed signal by the delay unit is performed.
Then, for example, the cross-correlation power, which is a cross-correlation result, is supplied to the timing control unit, and based on this, for example, peak timing is observed, and after a predetermined time from this peak timing, the third synchronization detection signal is output to the amplification gain control unit. It The amplification gain controller that has received the third synchronization detection signal returns to the initial mode, that is, the standby mode for the trigger signal. After that, the optimized gain value is fixed until the end of the data signal and the start of the next burst detection.

[0039]

FIG. 1 is a block diagram showing an embodiment of a burst synchronization receiver according to the present invention.

As shown in FIG. 1, the present burst synchronization receiver 10 includes an automatic gain control amplifier (AGCAMP) 10 as shown in FIG.
1, received signal power observing section 102, A / D converter (A
DC) 103, digital / analog (D / A) converter (DAC) 104, A / D converter (ADC) 1
05, received signal processing unit (RXPRC) 106, OFDM
Demodulation unit (DEMOD) 107, delay unit (DLY) 10
8, burst detection unit (BDT) 109, timing control unit (TMG) 110, and amplification gain control unit (AGCT)
L) 111 as a main constituent element.

Hereinafter, the reason why the automatic gain control circuit according to the present invention is required for the burst synchronization communication system adopted in this embodiment, the received signal, and the concrete configuration of each component of the burst synchronization receiving apparatus 10 of FIG. The functions and functions will be described step by step.

In this embodiment, an automatic gain control system for a burst synchronous receiver of a 5 GHz band wireless LAN system will be described as an example of the burst synchronous communication system.

The 5 GHz band wireless LAN system employs the OFDM modulation method in order to realize excellent communication performance over a wide band. The OFDM modulation method has high strength against ghosts and multipaths, but weak strength against circuit non-linearity. Therefore, if distortion occurs in the A / D converter or the like, the received signal quality will be significantly deteriorated. Therefore, 5 GHz
In a band wireless LAN system, a burst signal of 10 to 20 μs called a preamble signal is inserted at the beginning of the modulated signal, and timing synchronization is performed within this section, while A / D
It is necessary to supplement the voltage amplitude of the signal input to the converter 103 within a signal allowable range in which distortion does not occur.

Further, a reference signal for observing the frequency characteristic of the transmission line called a reference signal and correcting the data signal (actual communication data) following the preamble signal is included in the second several microseconds of the preamble signal. The reference signal and the data signal, the A / D converter 1
It is not allowed to change the level of the digital signal output from the signal 03, and it is necessary to keep the gain of the automatic gain control amplification unit 101 constant. Therefore, 5 GHz band wireless LA
In the N system, a high-speed and high-performance automatic gain amplification method is required to capture a level within a signal allowable range without distortion in a time of 10 μs. In the present embodiment, as will be described later, in order to realize high-speed and high-performance level supplementation performed in the preamble section, three-stage level supplementation is performed.

FIG. 2 is a diagram showing a burst signal section including a preamble signal of a received signal according to the present invention.

The repeating pattern of the burst signal portion including the preamble signal of the received signal according to this embodiment is shown in FIG.
The detection accuracy of the carrier frequency is improved by using a pattern different from the burst part pattern of Wireless 1394 shown in FIG. The received signal has a pattern in which the preamble signal has a combination of shot symbols of a plurality of samples and phase inversion symbols of the shot symbols, so that the peaks in the second half section can be detected more than those in the first half section, the shot symbols and The phase inversion symbol of the shot symbol is combined.

Specifically, as shown in FIG. 2, the first half X
A1 in the case of Wireless 1394 in the section
6, the pattern of IA16, A16, IA16, A16 is changed to A16, IA16, A16, IA16, IA16. Furthermore, in the latter half Y section,
A16, IA16, A16, IA in the case of ss1394
16, IA16 and the same pattern. Note that, following the preamble signal, there is a C region including the guard interval part C16 and the two reference signals C64.

Also in the present embodiment, from the viewpoint of system identification, the preamble has a phase inversion pattern having two peaks, as shown in FIG.

By using the phase inversion pattern as shown in FIG. 2, the frequency detection accuracy (S /
Unlike the graph of FIG. 18, the graph of N) has a flat second peak as shown in FIG. in this way,
Since the second peak is flat, even if the detection position shifts (within ± 8 samples), the frequency detection accuracy (S / N) is not affected.

As described above, in the present embodiment, the portion where the phase inversion pattern of the burst portion added to the head of the data symbol of the signal received by the receiving apparatus 10 is equal is lengthened, and the carrier wave is maintained without impairing the system identification performance. Improves detection accuracy. Note that, due to the AGC adjustment, the second peak detection period is lengthened so that detection can always be performed even if the carrier detection position shifts.

Since the Wireless 1394 system supports the synchronous transfer mode, continuous signals such as video signals can be communicated. However, when data signals are communicated for a long period of time, in a multipath environment, the transmission characteristics change from the transmission characteristics at the time of receiving the reference signal in the preamble signal at the beginning of the reception signal, and the reception performance deteriorates. There is. For this reason,
As shown in FIG. 4, the reference signal REF is inserted in the data signal section for a certain period or longer. As a result, the transmission characteristic is measured again for each reference signal to prevent the reception performance from deteriorating.

As described above, each element of the receiving device which demodulates the received signal by inserting the burst signal portion including the signal of 10 to 20 μs called the preamble signal at the beginning of the modulated signal has the following configuration and function. Have.

The automatic gain control amplification section 101 automatically controls the received signal RS received by an antenna (not shown) based on the level of the gain control signal Vagc by the amplification gain control section 111 supplied via the DAC 104 to obtain the desired signal. The level signal RX is output to the A / D converter 103. The automatic gain control amplifier 101 is controlled when the automatic gain control is performed by the gain control signal Vagc from the amplification gain controller 111 and when the control gain is fixed.

The received signal power observing section 102 includes a peak detection circuit (PeakDet) as a peak detection circuit, measures the peak voltage of the received signal RS, and takes a voltage corresponding to the input received signal level. Field strength signal RSS which is a signal
It is converted to I and output to the A / D converter 105. Here, the peak value is detected instead of the average value in order to cope with a sudden signal change. A reset signal is given at the start of burst detection, the peak detection circuit (Peak Det) is reset, and the maximum peak value after that is observed.

The A / D converter 103 converts the analog reception signal RX output from the automatic gain control amplification unit 101 into a digital signal, and outputs it as a digital reception signal RXD to the reception signal processing unit 106.

The D / A converter 104 converts the gain control signal Vagc generated by the amplification gain control unit 111 from a digital signal to an analog signal to automatically control the gain amplification unit 1.
Output to 01.

A / D converter 105 converts the electric field strength signal RSSI output from received signal power observing section 102 from an analog signal to a digital signal RSSID and outputs it to amplification gain control section 111.

The reception signal processing unit 106 receives digital signals.
The signal RXD is the baseband signal bb re (real part) and
bb converted to im (imaginary part) and converted to the baseband signal sample
Convert the pulling frequency to a lower frequency (downsample
Error detection by the burst detection unit 109.
Frequency offset by performing complex multiplication based on wave number Δf
The signal S106 (sy re and sy
im) is generated, and the OFDM demodulation unit 107 and the delay unit 10 are generated.
8 and the burst detection unit 109.

FIG. 5 is a circuit diagram showing a specific configuration example of the reception signal processing unit 106 of FIG. Main reception signal processing unit 1
Reference numeral 06 denotes a baseband conversion circuit 10 as shown in FIG.
61, digital low-pass filter (LPF) 106
2, 1063, down conversion circuits 1064, 106
5 and a frequency offset correction circuit 1066.

The baseband conversion circuit 1061 is a local oscillator.
In the shaker 10611 and the multipliers 10612 and 10613
It is composed of With the baseband conversion circuit 1061
Multiplies the received signal RXD (if) by the multipliers 10612, 10
At 613, the carrier frequency f_CWBy multiplying by
As shown in equation (1), the input received signal RXD (if) is
Baseband signal bb re, bb converted to im
It is supplied to the LPFs 1062 and 1063, respectively.

[0061]

(1) bb re = if × cos (2πf _CW t) bb im = if × sin (2πf _CW t) (1)

The LPFs 1062 and 1063 have, for example, a linear phase FIR (Finite Impulse Response) transversal type circuit configuration.

The LPF 1062 receives the baseband signal bb.
(n-1) delay devices 1re-1 to 1re that are connected in series to the input line of re and configure a shift register.
-N-1 and the input baseband signal bb and n multipliers 2re-1 to 2re-n for multiplying the output signals of the re and the delay devices 1re-1 to 1re-n-1 by filter coefficients h (0) to h (n-1), respectively. , N of multipliers 2re-1 to 2re-n are added and output to the down-converting circuit 1064.

The LPF 1063 has a baseband signal bb.
(n-1) delay devices 1im-1 to 1im that are connected in series to the input line of im to form a shift register.
-N-1 and the input baseband signal bb and n multipliers 2im-1 to 2im-n for multiplying the output signals of the im and each of the delay units 1im-1 to 1im-n-1 by filter coefficients h (0) to h (n-1), respectively. , N of multipliers 2im-1 to 2im-n are added together and output to the down-converting circuit 1065.

These LPFs 1062 and 1063, and
Based on down conversion circuits 1064 and 1065
Band signal bb re, bb im sampling frequency
The number, for example, the signal dc from 100 MHz to 25 MHz
Convert to re. At this time, LPFs 1062 and 1063
Is the baseband signal bb re, bb control im band
Only the adjacent carriers are allowed to turn back. Well
In the down conversion circuits 1064 and 1065,
The timing of downsampling depends on the supply of the signal En.
I received it and thinned the clock.

The frequency offset correction circuit 1066 is composed of a local oscillator 10661, multipliers 1062 to 10665, and adders 10666 and 10667.

The frequency offset correction circuit 1066 has an error detection frequency Δf given by the burst detection unit 109.
Is reflected in the oscillation output of the local oscillator 10661, and this oscillation output and the signal dc re and multipliers 10662 and 106
Complex multiplication by 65, oscillation output and signal dc im is subjected to complex multiplication by multipliers 10663 and 10664, and an adder 106
At 66, the outputs of the multiplier 10662 and the multiplier 10663 are added, and at the adder 10667, the multiplier 10664 and the multiplier 1 are added.
By adding the output of 0665, the following formula (2),
The signal sy as shown in (3) re and sy im
Is generated and output to the OFDM demodulation unit 107, the delay unit 108, and the burst detection unit 109.

[0068]

(2) sy re = dc re × cos (2πf _CW t) + dc im × sin (2πf _CW t) (2)

[0069]

[Mathematical formula-see original document] sy im = dc im × cos (2πf _CW t) −dc re × sin (2πf _CW t) (3)

In the OFDM demodulation section 107, the output signal S106 of the received signal processing section 106, that is, the signal sy. re
And sy Im is synchronized with the FFT timing signal TFFT supplied by the timing control unit 110 to perform fast discrete Fourier transform to demodulate the OFDM signal and output it to the processing circuit of the next stage.

Delay section 108 outputs signal S106 of received signal processing section 106, that is, signal sy. re and sy
Im is delayed by a burst period for burst detection and output as a signal S108 to the burst detection unit 109.

The burst detection section 109 is a reception signal processing section.
Signal S106 (sy re and sy i
m) and the delay signal S108 by the delay unit 108
And detect a burst signal with a specified cycle of the communication system
Parameters for packet and frame structure
Timing signal detected by timing controller 110
Synchronous timing window signal synchronized with TMNG (X, Y, C)
And second synchronization detection signal S109W as a signal
(Xpulse, ypulse) is generated and amplification gain control
It is output to the control unit 111. Also, the burst detection unit 109
Is a reference of the predetermined correlation result and timing signal output.
The valid signal S109C
Output to. In addition, the burst detection unit 109 determines that the correlation result
Error frequency from the phase difference between the real and imaginary parts of the received signal
The error detection frequency Δf is calculated by calculating the number
It is output to the processing unit 106.

The timing control unit 110 uses the trigger signal r
The first and second synchronization detection signals S109W (xpulses) by the burst detection unit 109 are triggered by xwndw.
e, ypulse) for generating a timing signal T
The MNG (X, Y, C) is output to the burst detection unit 109. Further, the timing control unit 110 observes the peak timing from the correlation result by the burst detection unit 109,
After a predetermined time from this peak timing, the third gain detection signal S110 (cpulse) is amplified and the gain control section 111
Then, the FFT timing signal TFFT is output to the OFDM demodulation unit 107.

FIG. 6 is a circuit diagram showing a concrete configuration example of the burst detection unit 109 and the timing control unit 110 of FIG.

The burst detection unit 109 has the autocorrelation circuit 1
0901, cross-correlation circuit 10902, coefficient table 10
903, the delay unit 1 in which the delay amount is set to 32 clocks
0904, 10905, delay units 10906 to 10909 in which the delay amount is set to 48 clocks, moving average circuit 1
0910-10915, absolute value calculation circuit 10916-1
0918, threshold circuits 10919 and 10920, comparison circuits 10921 and 10922, timing window X circuit 10
923, a timing window Y circuit 10924, a timing window C circuit 10925, a frequency error detection circuit 10926, and a latch circuit 10927. The timing control unit 110 also has a peak search circuit 11001 and a timing counter 11002.

The signal sy supplied from the reception signal processing circuit 106 re and sy im is the autocorrelation circuit 109
01, the cross-correlation circuit 10902, and the absolute value calculation circuit 10916. Also, the signal sy Re is delayed by 16 clocks in the delay unit 108re and input to the autocorrelation circuit 10901. Similarly, the signal sy im
Is delayed by 16 clocks in the delay unit 108im and input to the autocorrelation circuit 10901.

FIG. 7 is a circuit diagram showing a configuration example of the autocorrelation circuit. As shown in FIG. 7, the autocorrelation circuit 10901 includes multipliers 11 to 14 and adders 15 and 16.

The autocorrelation circuit 10901 utilizes the fact that the first half X section and Y section of the preamble signal added to the head of the received signal is a periodic function of 16 clocks, and the input signal sy re and sy The output sy of the delay units 108re and 108im of im and 16 clocks re ^*
And sy Conjugate complex multiplication with im ^* to obtain autocorrelation outputs acre and acim, and delay units 10904 to 10904.
907 and moving average circuits 10910 to 10913.

Specifically, the input signal sy re and delay signal sy Re ^* and complex are multiplied by the multiplier 11, and the input signal sy re and delay signal sy The input signal sy is obtained by complex multiplication of im ^* and the multiplier 12. im and delay signal sy re ^*
And are complex-multiplied by the multiplier 13, and the input signal sy im and delay signal sy The multiplier 14 performs complex multiplication with im ^*, and the adder 15 adds the output of the multiplier 11 and the output of the multiplier 14 to obtain the autocorrelation output signal acre, and the adder 16 outputs the output of the multiplier 12. And the output of the multiplier 13 are added to obtain an autocorrelation output signal acim.

The cross-correlation circuit 10902 is shown in FIG.
Sea urchin, signal sy cascaded to the input line of re
(M-1) number of delay devices 21 forming a shift register
re-1 to 21re-m-1 and the input signal sy r
e and the output of each delay device 21re-1 to 21re-m-1
The coefficient table 10903 is set for each signal.
M multipliers 22re-1 to 2 for multiplying the existing coefficients
2re-m and m multipliers 22re-1 to 22re-
The output signal of m is added and the cross-correlation output signal cc is added. no re
The adder 23re output to the logarithmic value calculation circuit 10918
Have Further, the cross-correlation circuit 10902 is shown in FIG.
As shown, the signal sy Cascade to the input line of im
(M-1) delays connected to form a shift register
21im-1 to 21im-m-1 and the input signal s
y im and each delay device 21im-1 to 21im-m-1
For each output signal of
M multipliers 22im− for multiplying the set coefficient
1 to 22im-m and m multipliers 22im-1 to 22
cross-correlation output signal cc by adding output signals of im-m
Adder 23 that outputs im to the absolute value calculation circuit 10918
im.

The cross-correlation circuit 10902 receives the input signal sy
re and sy im is sequentially written in the shift register, and the value of each tap is set to the value of the coefficient table 10903 and each of the multipliers 22re-1 to 22re-m, 22im-1.
~ 22im-m multiplied by cross-correlation output cc re and cc get im. In the present embodiment, for example, the number of taps of the shift register is 32, and the coefficient table stores the data value of 32 clocks before the C64 section in the latter half of the preamble signal.

Output signal acr of autocorrelation circuit 10901
e directly to the moving average circuit 10912 and the delay unit 10
The signal is delayed by 48 clocks via 906, input, averaged (integrated), and absolute value calculation circuit 10917.
Entered in. Similarly, the output signal acim of the autocorrelation circuit 10901 is input to the moving average circuit 10913 directly and after being delayed by 48 clocks via the delay unit 10907, averaged (integrated), and the absolute value calculation circuit 10917. Entered in. Then, the absolute calculation circuit 109
At 17, the real part re and the imaginary part im are squared and the absolute value (re ² +
By calculating im ² ), the autocorrelation power ACP is obtained and output to the comparison circuit 10921.

The output signal acre of the autocorrelation circuit 10901 is input to the moving average circuit 10910 directly and after being delayed by 32 clocks via the delay unit 10904, and is averaged (integrated) to detect the frequency error. It is input to the circuit 10926. Similarly, the autocorrelation circuit 109
The output signal acim of 01 is input to the moving average circuit 10911 delayed by 32 clocks directly and via the delay unit 10905, averaged (integrated), and input to the frequency error detection circuit 10926.

Output signal cc of cross-correlation circuit 10902
re and cc im is the absolute value (re ² + im) obtained by squaring the real part re and the imaginary part im in the absolute value calculation circuit 10918.
² ) is calculated to obtain the autocorrelation power CCP, and the comparison circuit 10922 and the timing control unit 110 are obtained.
Is output to the peak search circuit 11001.

The input signal sy re and sy i
m is a real part re and an imaginary part im in the absolute value calculation circuit 10916.
And the absolute value (re ² + im ² ) is calculated, and the moving average circuit 10914 is directly connected to the delay unit 109.
The signal is delayed by 48 clocks via 08, input, averaged (integrated), and input to threshold circuit 10919. The output signal of the absolute value calculation circuit 10916 is sent directly to the moving average circuit 10915 and the delay unit 109.
The signal is delayed by 32 clocks via 09, input, averaged (integrated), and input to threshold circuit 10920.

The threshold circuit 10919 has a threshold value th for autocorrelation. ac is defined and supplied to the comparison circuit 10921. In addition, the threshold circuit 10920 determines the threshold value th cc is defined, and the comparison circuit 10922
Is supplied to.

In the comparison circuit 10921, the autocorrelation power A
CP and autocorrelation threshold th ac is compared, and the result is output to the timing window X circuit 10923 and the timing window Y circuit 10924.

In the timing control unit 110, the peak search circuit 11001 observes the peak timing of the cross-correlation power CCP by the burst detection unit 109 and outputs the timing to the timing counter 11002. The timing counter 11002 is triggered by the input of the trigger signal rxwndw to count up the timing signal TX,
TY and TC are output to the timing window X circuit 10923, the timing window Y circuit 10924, and the timing window C circuit 10925 of the burst detection unit 109, respectively. As a result, the comparison result of the comparison circuits 10921 and 10922 is multiplied by the timing window, and the first synchronization detection signal xpulse from the timing window X circuit 10923 is changed to the timing window Y.
The circuit 10924 outputs the second synchronization detection signal ypulse to the amplification gain control unit 111. Further, in the timing control unit 110, the peak search circuit 11001 receives the peak timing of the cross-correlation power CCP, and in the timing counter 11002, the third synchronization detection signal cpulse is output to the amplification gain control unit 111 after a fixed time from the peak timing. FFT timing signal TF
The FT is output to the OFDM demodulation unit 107.

FIG. 9 is a diagram showing a timing chart from the autocorrelation processing of the burst detection unit to the output of the synchronization detection signals xpulse and ypulse. In FIG. 9, (A) is the input signal S106 (sy re, sy
im) shows the preamble and reference portions, (B) shows the delayed signal S108 obtained by delaying the signal S106 by the delay unit 108, and (C) shows the autocorrelation power AC.
P, (D) shows the timing window X, (E) shows the timing window Y, and (F) shows the first synchronization detection signal xp.
and (G) is the second synchronization detection signal ypul.
se is shown.

As shown in FIGS. 9A and 9B, the preamble signal of the Wireless 1394 has 5 periods each of X section and Y section of 16 clock cycles, and as shown in FIG. And the autocorrelation power ACP increases in the Y section. By using the phase inversion pattern as shown in FIG.
As shown in (C), the second peak becomes flat. In this way, since the second peak is flat, even if the detection position shifts (within ± 8 samples), the frequency detection accuracy (S / N) is not affected. Then, as shown in FIGS. 9A, 9B, and 9D, the first half X section is multiplied by the timing window X, and
As shown in (A), (B), and (E), the arrival of each section is detected by multiplying the Y section in the latter half by the timing window Y, as shown in FIGS. The first synchronization detection signal xpulse and the second synchronization detection signal ypulse
Can be output.

FIG. 10 is a diagram showing a timing chart from the cross-correlation processing of the burst detection unit to the output of the third synchronization detection signal cpulse and the FFT timing signal TFFT. In FIG. 10, (A) is the input signal S106 (sy re, sy im), (B) shows the cross-correlation power CCP, (C) shows the timing window C, (D) shows the valid signal ccvalid output from the timing window C circuit 10925, and (E) shows the 3 shows a sync detection signal cpulse of (3), where (F) is an FFT
The timing signal TFFT is shown.

In this embodiment, since the data value of the previous 32 clocks of the C64 section is used as the cross-correlation coefficient table 10903, as shown in FIG.
The cross-correlation power CCP becomes maximum at the 32nd clock in the four sections. As shown in FIG. 10C, the cross-correlation power CCP
By setting the timing window C before and after the timing at which is maximum, more accurate peak detection can be performed. 32 clocks after the peak timing detected in this way, as shown in FIGS. 10 (E) and 10 (F), the third synchronization detection signal cppulse and the FFT timing signal TFFT are output. After that, as shown in FIG. 10F, the FFT timing signal TFFT is output after 64 clocks, and then repeatedly output at 72 clock cycles.

The frequency error detection circuit 10926 finds the phase difference from the real part and the imaginary part of the autocorrelation output signal, and from this, calculates the error frequency Δf as shown in the following equation (4).

[0094]

Δf = tan ⁻¹ (acim / acre) × (1/32) × 20 × 10 ⁶ (Hz) (4)

The amplification gain control section 111 includes the digital reception signal S106 after the gain control by the automatic gain control amplification section 101 from the reception signal processing section 106 and the A / D converter 1.
05 digital signal strength signal RSSI indicating the peak level of the received signal RS of the received signal power observing section 102
D, first and second synchronization detection signals S109W (x as synchronization timing window signals from the burst detection unit 109
pulse, ypulse) and the third synchronization detection signal S110 (cpls) by the timing control unit 110.
Based on e), as described in detail below, the automatic gain control amplifier 101 is synchronized with the synchronous burst detection timing.
The gain control signal Vagc is controlled through the D / A converter 104 by controlling the gain voltage by changing the control gain voltage Vagc for controlling the gain of the received signal to perform the gain control. Output to the amplification unit 101.

The gain control operation of the amplification gain control section 111 will be described below in detail with reference to the flowcharts of FIGS. 11, 12 and 13. In the present embodiment, in order to realize high-speed and high-performance level supplementation within the preamble section of the received signal, three-stage level supplementation is performed.

At the start of burst detection (S
At T1), the gain control signal V from the amplification gain control unit 111.
agc is output at the maximum value (ST2), and the gain of the automatic gain control amplification unit 101 is set to the maximum (first gain) (ST).
3) Burst detection is performed by the combination of the delay unit 108 and the burst detection unit 109. At this time, the output signal of the A / D converter 103 is distorted, but since it is not a data signal, the received signal quality does not deteriorate. Further, even if the preamble signal is distorted, burst detection can be performed without reducing the detection rate because the autocorrelation circuit 10901 is used in the burst detection unit 109.

In this way, the arrival of the preamble signal at the head of the received signal RS is waited for (ST4). In parallel with this, the received signal power observing section 102 observes the received signal power, and the electric field strength signal RSSI which is the received signal power signal is A
Digital signal RSSI via the D / D converter 105
Input as D (ST5). Here, as described above, the peak value (peak value) is detected instead of the average value in order to cope with a sudden signal change. A reset signal is given at the start of burst detection to reset the peak value detection circuit, and the maximum peak value after that is observed.

As the second stage, when burst is detected (ST
6) receives the first synchronization detection signal S109W (xpulse) from the burst detection unit 109 (ST7),
The gain is calculated based on the level of the digital electric field strength signal RSSID (ST8), the gain control signal Vagc is set to the calculated value CV1 (ST9), and the gain of the automatic gain control amplification section 101 is set via the D / A converter 104. Calculated value CV1
The second gain is set (ST10).

The control gain CG1 at this time is calculated based on the following equation.

[0101]

[Equation 5]       CG1 [dB] = VRSSI [dBv] −Vref1 [dBv] (5)

Here, VRSSI is the received signal power observing section 1
Vref1 indicates the received signal power value observed in 02, and Vref1 indicates the first reference signal power value that is an appropriate value that does not distort the A / D converter 103.

However, at this time, the automatic gain control amplifier 1
The gain of 01 includes analog signal processing in the process of calculating the peak value of the received signal power, and includes a slight variation, resulting in rough gain control. Therefore, A /
After passing through the D converter 103 without distortion, the amplification gain controller 111 integrates the digital value of the received signal to measure the accurate signal power (ST11).

As a third step, after a certain amount of time has passed in the second step, the second synchronization detection signal S109W (ypulse) from the burst detection section 109 is received (ST).
12), the gain is calculated based on the digital integrated value of the received signal S106 that has passed through the A / D converter 103 without distortion (ST13), and the gain control signal Vagc is set to the calculated value CV2 (ST14), and D / A The gain of the automatic gain control amplification unit 101 is calculated via the converter 104 as the calculated value CV2 (third value).
(Gain of) and optimize (ST15).

The control gain CG2 at this time is calculated based on the following equation.

[0106]

[Equation 6]       CG2 [dB] = VI [dBv] -Vref2 [dBv] (6)

Here, VI is the received signal power value after passing through the A / D converter 103 integrated by the amplification gain control section 111, and Vref2 is the second reference signal power value, which is the received signal power after gain control. The optimum values are shown.

In this way, the optimized gain value is fixed until the end of the data signal and the start of the next burst detection (ST16).

Then, when the third synchronization detection signal S110 (cpulse) is input by the timing control section 110, the processing shifts to step ST1. Since burst detection is to be started, a reset signal is given to the received signal power observing section 102, the peak detection circuit is reset, and the maximum peak value after that is observed.

As described above, high-speed and accurate level supplementation to the optimum gain value can be realized.

FIG. 14 is a circuit diagram showing a specific configuration example of the amplification gain control section 111 of FIG.

As shown in FIG. 14, the amplification gain control section 111 includes an initial gain table 11101, an RSSI adjustment table 11102, multipliers 11103 and 11104, adders 11105 to 11108, a delay section 11109 having a delay amount of 48 clocks, Delay device 11110, logarithmic conversion unit 11
111, a state machine circuit 11112, a gain selection circuit 11113, and a control gain adjustment table 11114.
have.

This amplification gain control section 111 has a timing pulse for synchronization detection, that is, a trigger signal rxwndw,
First synchronization detection signal xpu by burst detection unit 109
lse and the second synchronization detection signal ypulse, and the third synchronization detection signal cp by the timing control unit 110.
It has a state machine configuration based on the pulse width and has a different automatic gain control amplifier 10 in each of states 0 to 3.
The gain agc of 1 is controlled to be output.

FIG. 15 is a diagram showing a timing chart for explaining the operation of the amplification gain control section of FIG.
In FIG. 15, (A) is the input signal S106 (sy r
e, sy im), and (B) is a trigger signal rxwn.
dw, (C) is the first synchronization detection signal xpulse
, (D) shows the second synchronization detection signal ypulse, (E) shows the third synchronization detection signal cpulse,
(F) shows the state, and (G) shows the gain control signal Vagc.
And (H) shows the received signal RX output from the automatic gain control amplifier 101.

The operation in each state in the amplification gain control section of FIG. 14 will be described below with reference to FIG.

State 0 (Initial mode, rxwndw standby
Mode) initial gain table 111 based on flag signal StationID
Select the appropriate gain from 01. In this embodiment, the initial gain table 11101 is set so that the maximum gain is obtained. Then, as shown in FIGS. 15B, 15F, and 15G, the trigger signal rxwndw is output as a gain control signal Vagc from the control gain adjustment table 11114 through the gain selection circuit 11113 at the rising timing of the trigger signal rxwndw. Go to state 1.

State 1 (xpulse standby mode
D ) As shown in FIGS. 15F and 15G, the gain control signal Vag
The initial gain (maximum gain) determined by the initial gain table 11101 is output as c. The field strength signal RSSI is received via the A / D converter 105, and the RSSI gain gain based on the received signal power is received. rssi is calculated by the adder 11108 as in Expression (7). And, as shown in FIG.
As shown in (F) and (G), the first synchronization detection signal xp
gain selection circuit 11113 at the input timing of pulse
From the initial gain to the RS by the adder 11108
SI gain gain Switching to rssi, the gain control signal Vagc is output from the control gain adjustment table 11114 and the state 2 is entered.

[0118]

[Equation 7] gain rssi = rssiref-rssi + 40 (7)

Here, rssiref is a value obtained by subtracting 40 in advance in order to set the bit width to 8 bits by the RSSI reference value, and is corrected by adding 40 when the gain is calculated.

State 2 (ypulse standby mode )
D ) As shown in FIGS. 15F and 15G, the gain control signal Vag
c is the RSSI gain gain Output rssi. Input signal sy at multiplier 11103 Re is squared and the multiplier 11
Input signal sy at 104 The square of im is added and these are added by the adder 11105 to obtain the amplitude of the input reception signal. Further, the adder 11106, the delay unit 11109,
And a delay device 1110 to obtain a digital integral value, and the logarithmic converter 11111 receives the received signal level ad
ssi is calculated as in equation (8).

[0121]

## EQU00008 ## adssi = 4.times.10 log (log (re ² + im ² ) ... (8)

Then, the received signal level adssi, the optimum value of the received signal power after gain control adssiref, and the RSSI gain gain currently selected using rssi, adssi
Gain rssi is calculated as in equation (9). And
As shown in FIGS. 15D, 15F, and 15G, the selection gain of the gain selection circuit 11113 is changed to the RSSI gain gain at the input timing of the second synchronization detection signal ypulse. rssi to addsi gain by adder 11107 gain gain Switching to rssi, the gain control voltage signal Vagc is output from the control gain adjustment table 11114 and the state 3 is entered.

[0123]

[Equation 9] gain adssi = adssiref-adssi + gain rssi ... (9)

State 3 (cpulse standby mode )
D ) As shown in FIGS. 15F and 15G, the gain control signal Vag
c as the adssi gain gain Output rssi. Then, as shown in FIGS. 15E and 15F, the state 0 is entered at the input timing of the third synchronization detection signal cpulse. However, the gain control voltage signal Vagc is
i gain gain hold rssi

Next, the operation of the configuration of FIG. 1 will be described.

First, when burst detection is started,
The gain control signal Vagc is output from the amplification gain control unit 111 with the trigger signal rxwndw as a trigger, which is set to the maximum value. This gain control signal Vagc is supplied to the D / A converter 10
The automatic gain control amplification unit 10 is converted into an analog signal at 4
1 is supplied. The automatic gain control amplification unit 101 receives the gain control signal Vagc which is an analog signal, and sets the gain to the maximum first gain. In this state, the input signal RS waits for input.

In such a state, first, the preamble signal at the head of the received signal RS is the automatic gain control amplification section 1.
01 is input. In the automatic gain control amplification unit 101, the first half approximately X section of the preamble signal of the reception signal RS is amplified with the maximum gain and output to the A / D converter 103 as the signal RX. In parallel with this, the received signal RS
The preamble signal of is input to the received signal power observing section 102. In the received signal power observing section 102, the power of the received signal RS is observed and the peak voltage is measured, converted into an electric field strength signal RSSI which is a voltage signal having a value corresponding to the input received signal level, and A / D is obtained. Converter 10
5 is output. The electric field strength signal RSSI, which is the received signal power signal, is input to the amplification gain control unit 111 as a digital signal RSSID via the A / D converter 105.

In the A / D converter 103, the received signal R
The preamble signal portion of S is converted from an analog signal to a digital signal and is received as a signal RXD by the reception signal processing unit 10
6 is supplied. At this time, the output signal of the A / D converter 103 is distorted, but since it is not a data signal, the received signal quality does not deteriorate.

In the received signal processing unit 106, the input
The digital received signal RXD is the baseband signal bb
re (real part) and bb converted to im (imaginary part)
Change the sampling frequency of the S-band signal to a lower frequency.
Will be replaced. Then, at this time, the burst detection unit 109
Since the error detection frequency Δf is not supplied,
The frequency offset is not corrected, and the signal S106 (s
y re and sy im) is generated and the OFDM demodulation unit
107, delay unit 108, and burst detection unit 109
Is output.

In delay section 108, received signal processing section 106
Output signal S106, that is, signal sy re and s
y im delayed by burst period for burst detection
And output to the burst detection unit 109 as the signal S108.
I will be forced. In the burst detection unit 109, the received signal processing unit
Signal S106 (sy re and sy i
m) and the self-phase of the delay signal S108 by the delay unit 108
Functions and cross correlations are taken. And in the autocorrelation result
Based on the burst signal of the defined period of the communication system,
Detection is performed, and first, the first half X section of the preamble signal is detected.
The first synchronization detection signal S109W (x
pulse) is generated and output to the amplification gain control unit 111.
I will be forced. Note that even if the preamble signal is distorted,
Whether the auto-correlation circuit is used for the host detection unit 109
Therefore, burst detection is possible without reducing the detection rate.
is there.

Further, the burst detection unit 109 calculates the error frequency from the phase difference between the real part and the imaginary part of the received signal based on the autocorrelation result to generate the error detection frequency Δf,
It is output to the reception signal processing unit 106.

In the amplification gain control section 111, the burst synchronization detection signal S109W (xp
digital signal strength signal RSSI
The gain is calculated based on the level of D, and the gain control signal Vagc is set to the calculated value CV1. The gain control signal Vagc is converted into an analog signal by the D / A converter 104 and supplied to the automatic gain control amplification unit 101. The automatic gain control amplification unit 101 receives the gain control signal Vagc which is an analog signal, and sets the gain to the calculated second gain. However, at this time, the automatic gain control amplifier 10
The gain of 1 includes analog signal processing in the process of calculating the peak value of the received signal power, and includes a slight variation, resulting in rough gain control.

In the automatic gain control amplifier 101, the remaining X section and the latter half Y of the preamble signal of the received signal RS.
The section is amplified with a second gain corresponding to the received signal level and output as a signal RX to the A / D converter 103. In the A / D converter 103, the preamble signal portion of the reception signal RS is converted from an analog signal into a digital signal and supplied to the reception signal processing unit 106 as a signal RXD. At this time, since the input signal of the A / D converter 103 is amplified with a gain based on an appropriate value that does not distort the A / D converter 103, no distortion occurs in the output signal of the A / D converter 103. .

In the received signal processing unit 106, the input digital received signal RXD is the baseband signal bb.
re (real part) and bb is converted to im (imaginary part), and the sampling frequency of the baseband signal is converted to a low frequency. Then, the burst detector 109 corrects the frequency offset based on the error detection frequency Δf, and the signal S106 (sy re and sy im) is generated and output to the OFDM demodulation unit 107, the delay unit 108, and the burst detection unit 109.

In delay section 108, received signal processing section 106
Output signal S106, that is, signal sy re and s
y im delayed by burst period for burst detection
And output to the burst detection unit 109 as the signal S108.
I will be forced. In the burst detection unit 109, the received signal processing unit
Signal S106 (sy re and sy i
m) and the self-phase of the delay signal S108 by the delay unit 108
Functions and cross correlations are taken. And in the autocorrelation result
Based on the burst signal of the defined period of the communication system,
Detection is performed and the second half Y section of the preamble signal is detected.
Sync detection signal S109W (ypulse) indicating that
Is generated and output to the amplification gain control unit 111.

Further, the burst detection unit 109 calculates the error frequency from the phase difference between the real part and the imaginary part of the received signal based on the autocorrelation result, and generates the error detection frequency Δf,
It is output to the reception signal processing unit 106.

At this time, by adopting the phase inversion pattern as shown in FIG. 2, the autocorrelation power becomes flat at the second peak. In this way, since the second peak is flat, even if the detection position shifts (within ± 8 samples), the frequency detection accuracy (S
/ N) is not affected. Therefore, the carrier frequency is detected with high accuracy without deterioration in accuracy due to the carrier frequency detection position.

The amplification gain control section 111 receives the signal S106 that has passed through the A / D converter 103 without distortion with a gain based on the received signal power, integrates the digital value of the received signal, and measures the accurate signal power. To be done. Further, the amplification gain control unit 111 receives the second synchronization detection signal S109W (ypulse) from the burst detection unit 109, and based on the digital integrated value of the reception signal S106 that has passed through the A / D converter 103 without distortion, the gain Is calculated and the gain control signal Vagc is set to the calculated value CV2.

The gain control signal Vagc is converted into an analog signal by the D / A converter 104 and supplied to the automatic gain control amplification section 101. The automatic gain control amplifier 101 receives the gain control signal Vagc which is an analog signal,
The gain is set to the optimum calculated third gain.

In the automatic gain control amplification section 101, the remaining Y section of the preamble signal of the received signal RS and the reference C64 and data after C16 are amplified with the third gain according to the received signal level, and are amplified as A / R as the signal RX.
It is output to the D converter 103. A / D converter 1
In 03, the reference C64 and the data portion of the reception signal RS are converted from an analog signal to a digital signal and supplied to the reception signal processing unit 106 as a signal RXD. At this time, since the input signal of the A / D converter 103 is amplified with a gain based on an optimum value that does not distort the A / D converter 103, no distortion occurs in the output signal of the A / D converter 103. .

In the received signal processing unit 106, the input digital received signal RXD is the baseband signal bb.
re (real part) and bb is converted to im (imaginary part), and the sampling frequency of the baseband signal is converted to a low frequency. Then, the burst detector 109 corrects the frequency offset based on the error detection frequency Δf, and the signal S106 (sy re and sy im) is generated and output to the OFDM demodulation unit 107, the delay unit 108, and the burst detection unit 109.

In delay section 108, received signal processing section 106
Output signal S106, that is, signal sy re and s
y im delayed by burst period for burst detection
And output to the burst detection unit 109 as the signal S108.
I will be forced. In the burst detection unit 109, the received signal processing unit
Signal S106 (sy re and sy i
m) and the self-phase of the delay signal S108 by the delay unit 108
Functions and cross correlations are taken. And in the cross-correlation result
A certain cross-correlation power is supplied to the timing controller 110.
Based on this, peak timing is observed based on this
Third synchronization detection signal S after a predetermined time from the
110 (cpulse) is output to the amplification gain control unit 111
And the FFT timing signal TFFT is transmitted to the OFDM demodulation unit.
It is output to 107. Third synchronization detection signal S110 (c
The amplification gain control unit 111 that has received the pulse
Mode, that is, the standby mode for the trigger signal rxwndw
Return to code. After that, the optimized gain value is
The signal is fixed and fixed until the start of the next burst detection.

In OFDM demodulation section 107, output signal S106 of received signal processing section 106, that is, signal sy re
And sy Im is subjected to fast discrete Fourier transform in synchronization with the FFT timing signal TFFT supplied by the timing control unit 110 to demodulate an OFDM signal.

As described above, according to the present embodiment, the portion where the phase inversion pattern of the burst portion added to the beginning of the data symbol of the signal received by the receiving device 10 is equal is lengthened. As shown in FIG. 2, A1 in the case of Wireless 1394 in the first half X section
6, the pattern of IA16, A16, IA16, A16 is changed to A16, IA16, A16, IA16, IA16, and further, in the latter half Y section, Wireless1
A16, IA16, A16, IA16 in the case of 394,
Since the pattern is the same as that of IA16, it is possible to improve the accuracy of carrier detection without impairing the system identification performance. Further, it is possible to prevent the accuracy from deteriorating due to the detection position of the carrier frequency and improve the frequency detection accuracy.

Although the number of samples of the moving average circuit after the autocorrelation circuit is 48 in the above-described embodiment, the number of samples is increased to 64, for example, to increase the number of samples as shown in FIG. The second peak can be higher. As a result, it is possible to improve the detection accuracy at the optimum position and further to improve the detection accuracy even when the detection position is deviated as compared with the conventional method. In this way, the peak value of the frequency detection accuracy can be increased by extending the moving average section related to the autocorrelation, and thus the frequency detection accuracy can be increased.

Further, according to the present embodiment, when the trigger signal indicating the start of burst detection is received, the gain control signal is output to the automatic gain control amplification section so as to amplify it with the maximum value, and the burst detection section outputs the first gain control signal. When the burst synchronization detection signal is received, the second gain is calculated based on the received signal power value detected by the received signal power observing unit, and the gain control signal is automatically amplified by the gain control amplification so that the second gain is amplified. When the burst detection unit receives the second burst synchronization detection signal, the received reception signal power value is obtained. Since the third gain is calculated on the basis of the third gain, and the amplification gain control section 111 that outputs the gain control signal to the automatic gain control amplification section is provided so as to be amplified with the third gain, Possible to obtain a result.

High-speed and accurate level supplementation can be performed. As a result, there is an advantage that high-performance reception quality can be realized in a burst synchronous communication system such as a wireless LAN.

When the preamble signal can be detected in two stages by burst detection, rough gain control is performed when the first burst is detected, and precise gain control is performed when the next burst is detected. Can be recovered in case of mistake. Further, the pattern of the signal to be digitally integrated can be specified, and more accurate level supplement can be performed. Further, even if the first burst detection is erroneous, it is possible to determine whether or not the second burst detection can be performed, and it is possible to avoid the level capture at the wrong timing.

If the second burst detection is not performed within a fixed time after the first burst detection, the level supplement is reset to return to the first stage of the level supplement. The burst signal coming next can be detected with higher probability.

Further, when the synchronous transfer mode is supported and the reference signal is inserted in the data signal at regular intervals, fine adjustment for level supplementation is performed for each reference signal, and thus the multipath environment is improved. There is an advantage that the level supplementation below can be realized more accurately.

[0151]

As described above, according to the present invention,
It is possible to improve the accuracy of carrier detection without impairing the system identification performance. Further, it is possible to prevent the accuracy from deteriorating due to the detection position of the carrier frequency and improve the frequency detection accuracy.

[Brief description of drawings]

FIG. 1 is a block configuration diagram showing an embodiment of a burst synchronization receiver according to the present invention.

FIG. 2 is a diagram showing a burst signal unit including a preamble signal of a received signal according to the present invention.

FIG. 3 is a diagram for explaining an autocorrelation result related to the pattern of FIG.

FIG. 4 is a diagram showing a reference signal REF in a data signal section of a certain period or more in the Wireless 1394 system.
It is a figure which shows the signal form which is inserting.

5 is a circuit diagram showing a specific configuration example of a reception signal processing unit in FIG.

6 is a circuit diagram showing a specific configuration example of a burst detection unit and a timing control unit in FIG.

7 is a circuit diagram showing a configuration example of the autocorrelation circuit of FIG.

8 is a circuit diagram showing a configuration example of a cross-correlation circuit of FIG.

FIG. 9 is a diagram showing a timing chart from autocorrelation processing of a burst detection unit to output of synchronization detection signals xpulse and ypulse.

FIG. 10 is a diagram showing the cross-correlation processing of the burst detection unit, the synchronization detection signal cpulse and the FFT timing signal TFFT.
It is a figure which shows the timing chart until it outputs.

FIG. 11 is a flowchart for explaining the first stage of the gain control operation in the amplification gain control section according to the present invention.

FIG. 12 is a flow chart for explaining the second stage of the gain control operation in the amplification gain control section according to the present invention.

FIG. 13 is a flowchart for explaining a third step of the gain control operation in the amplification gain control section according to the present invention.

FIG. 14 is a circuit diagram showing a specific configuration example of the amplification gain control unit of FIG.

FIG. 15 is a diagram showing a timing chart for explaining the operation of the amplification gain control section of FIG. 14;

16 is a diagram for explaining another example of the autocorrelation result related to the pattern of FIG.

FIG. 17 is a diagram showing a burst signal unit including a typical preamble signal of a Wireless 1394 system.

FIG. 18 is a diagram for explaining general autocorrelation processing.

[Explanation of symbols]

10 ... Burst synchronization receiver, 101 ... Automatic gain control amplification section (AGCAMP), 102 ... Received signal power observation section,
103 ... A / D converter (ADC), 104 ... Digital / analog (D / A) converter (DAC), 10
5 ... A / D converter (ADC), 106 ... Received signal processing unit, 107 ... OFDM demodulation unit (DEMOD), 108
... delay unit (DLY), 109 ... burst detection unit (BD
T), 110 ... Timing control unit (TMG), 111 ...
Amplification gain controller (AGCTL).

Claims (19)

[Claims] 1. A signal in which a burst part including at least a preamble signal is added to a head part of a data signal and the preamble signal is divided into two stages of a first half section and a second half section for system identification, A receiving apparatus for detecting two peaks in the first half section and the second half section by an autocorrelation calculation, wherein the received signal has a pattern in which a shot symbol of a plurality of samples and a phase inversion symbol of the shot symbol are combined. A receiving apparatus in which a shot symbol and a phase inversion symbol of the shot symbol are combined so that a peak can be detected more in the second half section than in the first half section. 2. The receiving apparatus according to claim 1, wherein the received signal is a combination of a shot symbol and a phase-inverted symbol of the shot symbol such that a flat portion having a predetermined length is present at a peak in a second half section. 3. The receiving apparatus according to claim 1, wherein the moving average section involved in the autocorrelation calculation is set to a length such that the peak value of the second half section is higher than the peak value of at least the first half section. 4. The receiving apparatus according to claim 1, further comprising a detection unit that detects a carrier frequency of the received signal based on the autocorrelation result. 5. A signal in which a burst part including at least a preamble signal is added to the head part of a data signal, and the preamble signal is divided into two stages of a first half section and a second half section for system identification, A receiving apparatus for detecting two peaks in the first half section and the second half section by an autocorrelation calculation, wherein the received signal has a pattern in which a shot symbol of a plurality of samples and a phase inversion symbol of the shot symbol are combined. The shot symbol and the phase inversion symbol of the shot symbol are combined so that the peak can be detected more in the second half section than in the first half section, and the input received signal level is amplified with a gain according to the gain control signal. Automatic gain control amplification section to detect the received signal power to detect the received signal power Section, a delay section for delaying the output of the automatic gain control amplification section for a predetermined time, burst detection based on an autocorrelation calculation of the output signal of the automatic gain control amplification section and the output signal of the delay section, and the preamble. When the first half section of the signal is detected, the first burst synchronization detection signal is output, and when the second half section is detected, the second burst synchronization detection signal is output.
When receiving a burst detection unit that outputs the burst synchronization detection signal of 1 and a trigger signal that indicates the start of burst detection, the gain control signal is output to the automatic gain control amplification unit so that it is amplified with a preset first gain. When the first burst synchronization detection signal is received by the burst detection unit, the second gain is calculated based on the received signal power value detected by the received signal power observing unit, and the second gain is amplified with the second gain. As described above, the gain control signal is output to the automatic gain control amplification section, the received signal power value is obtained by receiving the output signal of the automatic gain control amplification section amplified by the second gain, and the burst detection section outputs the received signal power value. When the second burst synchronization detection signal is received, the third gain is calculated based on the obtained received signal power value, and the gain control is performed so that the third gain is amplified. A receiver having an amplification gain control section for outputting a control signal to the automatic gain control amplification section. 6. The reception according to claim 5, wherein the amplification gain control unit fixes the gain of the automatic gain control amplification unit to the third gain until the next burst detection is started after setting the third gain. apparatus. 7. The burst signal includes a reference signal following the preamble signal, receives the cross correlation calculation result of the burst detection unit to detect the reference signal, and outputs a third burst synchronization detection signal to the amplification gain. The amplification gain control unit further includes a timing control unit for outputting to the control unit, and when the amplification gain control unit receives the third burst synchronization detection signal, the amplification gain control unit shifts to a standby mode of the trigger signal, and automatically operates until the next trigger signal is input. The receiving device according to claim 5, wherein the gain of the gain control amplification unit is fixed to the third gain. 8. The burst detection unit detects a carrier frequency based on an autocorrelation result and selects an error detection frequency, receives the error detection frequency selected by the burst detection unit, and determines a frequency offset of a received signal. The receiving device according to claim 5, further comprising a correction unit that corrects the correction. 9. The timing control section outputs a timing signal after a lapse of a predetermined time from the peak position of the cross-correlation result, and the burst detection section detects a carrier frequency based on the auto-correlation result and detects an error detection frequency. The correction unit that receives the error detection frequency selected by the burst detection unit and corrects the frequency offset of the amplified reception signal, and the timing signal output from the timing control unit that is received by the correction unit The receiving device according to claim 7, further comprising a demodulation unit that demodulates a signal by performing a discrete Fourier transform. 10. The receiving apparatus according to claim 5, wherein the received signal is modulated based on an orthogonal frequency division multiplexing modulation method. 11. A signal in which a burst part including at least a preamble signal is added to the head part of a data signal, and the preamble signal is divided into two stages of a first half section and a second half section for system identification, A receiving apparatus for detecting two peaks in the first half section and the second half section by an autocorrelation calculation, wherein the received signal has a pattern in which a shot symbol of a plurality of samples and a phase inversion symbol of the shot symbol are combined. The shot symbol and the phase inversion symbol of the shot symbol are combined so that the peak can be detected more in the second half section than in the first half section, and the input received signal level is amplified with a gain according to the gain control signal. Of the automatic gain control amplification section and the output signal of the automatic gain control amplification section An analog / digital converter for converting the signal into a digital signal, a received signal power observing section for detecting the power of the received signal, a delay section for delaying the output of the automatic gain control amplification section for a predetermined time, and the analog / digital converter Burst detection is performed based on the correlation calculation between the digital output signal of the above and the output signal of the delay section, and when the peak of the first half section of the preamble signal is detected, the first burst synchronization detection signal is output and the peak of the second half section is detected. And a burst detection section for outputting a second burst synchronization detection signal and a trigger signal indicating the start of burst detection, the automatic gain control amplification section outputs the gain control signal so as to amplify the gain control signal with a preset first gain. When the first burst synchronization detection signal is received by the burst detection unit, The second gain is calculated based on the received signal power value detected by the received signal power observing section, and the gain control signal is output to the automatic gain control amplifying section so as to be amplified with the second gain. When the received signal power value of the analog / digital converter amplified by the second gain is received and integrated to obtain the received signal power value, and the second burst synchronization detection signal is received by the burst detector, the obtained received signal is obtained. A receiver having an amplification gain control section for calculating a third gain based on a power value and outputting the gain control signal to the automatic gain control amplification section so as to amplify the gain with the third gain. 12. The amplification gain control unit calculates the second gain based on a reference signal power value that does not distort the analog / digital converter by adding the second gain to the reception signal power value by the reception signal power observing unit. Item 11. The receiving device according to item 11. 13. The amplification gain control section calculates the third gain based on an optimized reference signal power value of the received signal power after gain control in addition to the calculated received signal power value. Receiver. 14. The first amplification gain control section does not distort the analog / digital converter by adding a second gain to the received signal power value of the received signal power observing section.
11. The calculation is performed based on the reference signal power value of, and the third gain is calculated based on the optimized second reference signal power value of the reception signal power after gain control in addition to the calculated reception signal power value. The receiver described. 15. The reception according to claim 11, wherein the amplification gain control unit fixes the gain of the automatic gain control amplification unit to the third gain until the next burst detection is started after setting the third gain. apparatus. 16. The burst signal includes a reference signal following the preamble signal, receives the cross-correlation calculation result of the burst detection signal to detect the reference signal, and outputs a third burst synchronization detection signal to the amplification gain. The amplification gain control unit further includes a timing control unit for outputting to the control unit, and when the amplification gain control unit receives the third burst synchronization detection signal, the amplification gain control unit shifts to a standby mode of the trigger signal, and automatically operates until the next trigger signal is input. The receiving device according to claim 11, wherein the gain of the gain control amplification unit is fixed to the third gain. 17. The burst detection unit detects a carrier frequency based on an autocorrelation result to select an error detection frequency, receives the error detection frequency selected by the burst detection unit, and receives the amplified received signal. The receiving device according to claim 11, further comprising a correction unit that corrects the frequency offset. 18. The timing control unit outputs a timing signal after a predetermined time has elapsed from the peak position of the cross-correlation result, and the burst detection unit detects the carrier frequency based on the auto-correlation result and detects the error detection frequency. The correction unit that receives the error detection frequency selected by the burst detection unit and corrects the frequency offset of the amplified reception signal, and the timing signal output from the timing control unit that is received by the correction unit The receiving device according to claim 16, further comprising a demodulation unit that performs a discrete Fourier transform on the signal to demodulate it. 19. The receiver according to claim 11, wherein the received signal is modulated based on an orthogonal frequency division multiplexing modulation method.