JP2003017574A - Semiconductor and protection circuit used therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a protection circuit having a parasite capacity, large voltage resistance, a large surge current capacity, high response speed and a small area. SOLUTION: An emitter is connected to a semiconductor emission element (protected element) 1 and first and second constant voltage diodes D1 , D2 and an anode electrode 5 connected reversely serially between an anode electrode 5 and a cathode electrode 6 of the protected element 1, a collector is connected to the cathode 6, the collector is connected a first bipolar transistor Q1 and the anode electrode 5 connecting a base at a connection point P of the first and second constant voltage diode D1 , D2 , the emitter is connected to the cathode electrode 6, and at least a second bipolar transistor Q2 connecting the base is possessed at a connection point of the first and second constant voltage diode D1 , D2 .

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device including a low protected element having a relatively low surge breakdown voltage and a protection circuit for protecting the protected element from an excessive voltage, and more particularly,
The present invention relates to a structure in which a protection circuit is monolithically integrated, and a structure in which the protection circuit and a protected element are integrated in a hybrid manner.

[0002]

2. Description of the Related Art Recently, as a blue semiconductor light emitting device,
A semiconductor device using a gallium nitride (GaN) -based compound semiconductor has attracted attention. However, a semiconductor light emitting device using a GaN-based compound semiconductor has a particularly low withstand voltage against a surge voltage as compared with a semiconductor light emitting device using a gallium phosphide (GaP) -based compound semiconductor, and is broken at about several tens of volts. There is.

It is well known that, in addition to such a semiconductor light emitting device, a semiconductor integrated circuit or the like inside an electronic device may be damaged by a surge entering through a communication line or a distribution line. The same applies to a surge having a large surge voltage but a small energy, such as an electrostatic surge. Further, the electrostatic surge also occurs in the manufacturing process of the semiconductor device.

In view of the above problem, as shown in FIG. 16, between the anode electrode 5 and the cathode electrode 6 of the semiconductor light emitting element 1 in the opposite direction to the semiconductor light emitting element (device to be protected) 1 using the constant voltage diode 91 as a protection circuit. There is an attempt to connect to. By using the constant voltage diode 91 as the protection circuit in this way, the constant voltage diode 9 can prevent an overvoltage exceeding a predetermined voltage.
Since it flows through the semiconductor light emitting device 1, it is possible to prevent the surge voltage from being applied to the semiconductor light emitting device 1.

Further, it has been proposed to connect two constant voltage diodes in series in opposite directions (hereinafter abbreviated as "bidirectional constant voltage diode"). FIG. 17 shows an example in which a bidirectional constant voltage diode 2 as a protection circuit is formed on the same semiconductor substrate (Japanese Patent Laid-Open No. 2001-15815).
(See the official gazette). In FIG. 17, the p ⁺ type semiconductor substrate 7 is shown.
The p-type semiconductor region 41 is arranged on the top. On the surface of the p-type semiconductor region 41, the first p ⁺ -type semiconductor region 45, n ⁺
The type semiconductor region 42 is arranged. The second p-type semiconductor region 43 is arranged on the surface of the n ⁺ -type semiconductor region 42. Further, the second p-type semiconductor region 43 has a second
P ⁺ -type semiconductor region 44 is arranged. Then, the insulating film 15 is arranged on the entire surface, and the first terminal electrode 52 is formed on the first p ⁺ type semiconductor region through the opening of the insulating film 15.
The second terminal electrode 6 on the second p ⁺ type semiconductor region 44.
2 are arranged respectively.

[0006]

By using a constant voltage diode 91 as a protection circuit as shown in FIG. 16, destruction of the semiconductor light emitting element (element to be protected) 1 can be suppressed to some extent. However, the reverse breakdown voltage of the semiconductor light emitting device 1 is determined by the value of the forward voltage of the constant voltage diode 91. Since the forward voltage of the constant voltage diode 91 is 1 V or less, it is not suitable for driving the semiconductor light emitting device 1 by the dynamic lighting circuit.

Generally, a semiconductor light emitting device (device to be protected) 1
Whether or not was destroyed in the middle of the manufacturing process can be determined by applying a minute voltage in the opposite direction and detecting a leak current to inspect. However, when the constant voltage diode 91 is connected in parallel to the semiconductor light emitting element 1 as shown in FIG. 16, if a voltage is applied in the opposite direction (the cathode electrode 6 is positive with respect to the anode electrode 5), the constant voltage diode 91 A voltage is applied to 91 in the forward direction. That is, as shown in FIG. 18, a very large forward current of the constant voltage diode 91 flows, so that the reverse leakage current of the semiconductor light emitting device 1 is masked and the leakage current cannot be detected. FIG. 18 shows the relationship between the voltage (reverse voltage) applied to the cathode electrode 6 of FIG. 16 and the output current. In the inspection process of the semiconductor device having the structure in which the semiconductor light emitting element and the constant voltage diode are connected in parallel as described above, it is impossible to select defective products even if a voltage is applied in the opposite direction.

At this time, a method of selecting a defective product by measuring a forward voltage of the semiconductor light emitting device and a phenomenon that a voltage value becomes low due to generation of a leakage current may be considered. However, it is difficult to set the selection range of the forward voltage value in consideration of the voltage value fluctuation range due to the process variation of non-defective products. Therefore, a semiconductor light emitting element that is originally a good product may be determined to be a defective product. As a result, the yield will be significantly reduced.

On the other hand, in a semiconductor device in which a surge voltage protection circuit, and further, a protected element and a protection circuit for this protected element are hybrid-assembled in the same mounting body,
Improvements in surge response speed, improvement in limiting voltage characteristics, improvement in surge current capacity, and reduction in size and weight are required.

If a bidirectional constant voltage diode 2 is used as a protection circuit as shown in FIG. 17, a dynamic lighting circuit can be driven. In this case, in order to increase the current capacity flowing in the protection circuit (bidirectional constant voltage diode) 2, it is necessary to increase the number of parallel connections of the bidirectional constant voltage diode 2. However, if the number of bidirectional constant voltage diodes connected in parallel is increased, the parasitic capacitance of the pn junction increases proportionally. Therefore, during dynamic lighting, the rise time and fall time in the switching characteristics increase, which causes an increase in switching loss in terms of electrical and optical characteristics.

In view of the above problems, it is an object of the present invention to provide a protection circuit having a small parasitic capacitance and a large current capacity, and a semiconductor device in which this protection circuit and a protected element are hybrid-integrated. .

A further object of the present invention is to provide a semiconductor device with a built-in protection circuit, which has a dramatically large current capacity, a high surge withstand voltage, and a high surge response speed.

Another object of the present invention is to provide a protection circuit capable of controlling the switch characteristics of a protected element, and a semiconductor device having the protection circuit built therein.

[0014]

In order to achieve the above object, the first feature of the present invention is (a) a protected element having an anode electrode and a cathode electrode; First and second constant voltage diodes connected in series in opposite directions between the anode electrode and the cathode electrode of the protected element having: (c) The emitter is connected to the anode electrode and the collector is connected to the cathode electrode. A first bipolar transistor (B having a base connected to a connection point with the first and second constant voltage diodes).
JT); (d) a second bipolar transistor (BJT) having a collector connected to the anode electrode, an emitter connected to the cathode electrode, and a base connected to the connection point with the first and second constant voltage diodes. The gist is that the semiconductor device is characterized by having at least.
Here, the "protected element having an anode electrode and a cathode electrode" means, for example, a small signal diode or GaN.
It means a diode or the like having a relatively low surge withstand voltage such as a semiconductor light emitting device.

According to the structure of the semiconductor device of the first aspect of the present invention, it is possible to construct a semiconductor device having a large current capacity and a high surge withstand voltage by utilizing the amplifying action of a bipolar transistor with respect to a large current at a high speed. it can. Therefore,
The parasitic capacitance due to the pn junction can be suppressed as compared with the case where only the bidirectional constant voltage diode is used. As a result, the dynamic lighting circuit can drive the light emitting diode at high speed.

In the structure of the semiconductor device of the first feature of the present invention, further, a source and a gate are connected to the anode electrode and a drain is connected to the cathode electrode, and a drain is connected to the anode electrode. A second insulated gate transistor connected to the cathode electrode and having a source and a gate connected thereto may be provided. As the first and second insulated gate transistors, a MOS field effect transistor (FET), MIS
FET, MOS electrostatic induction and transistor (SIT), M
ISSIT, high electron mobility and transistor (HEMT)
Etc. can be used.

Since the insulated gate type transistor is a voltage drive type element, the switching speed can be made higher than that of a current drive type bipolar transistor. Further, the insulated gate transistor can easily realize a structure having less parasitic capacitance than the bipolar transistor. Further, by using the structure in which the insulated gate type transistor is integrated with the bipolar transistor, the surge voltage exceeding the breakdown voltage of the insulated gate type transistor can be driven to absorb the surge voltage. Therefore,
By using the insulated gate type transistor together with the bipolar transistor, it is possible to construct a protection circuit having a very high speed, a high surge withstand voltage and a small parasitic capacitance.

Further, in the semiconductor device according to the first aspect of the present invention, a function of forcibly turning off the protected element is added by connecting the switch terminal to the connection point of the first and second transistors. can do. Furthermore,
When the element to be protected generates heat, the configuration of the overheat protection circuit using the temperature characteristic of the conduction voltage of the transistor is facilitated.

Particularly, the first and second constant voltage diodes, the first and second bipolar transistors, and the first and second insulated gate transistors of the semiconductor device according to the first feature of the present invention are the same. By monolithically integrating on a semiconductor substrate, a protection circuit (semiconductor integrated circuit) having a structure that can be easily connected to an existing protected element can be configured. At this time, no special process design is required for the protected element. At the same time, the protection circuit can be made smaller and lighter.

The second feature of the present invention is: (a) a semiconductor substrate of the first conductivity type; (b) a buried layer of the second conductivity type disposed on this semiconductor substrate; and (c) an upper portion of the buried layer. The second conductivity type epitaxial layer arranged; (d) the first conductivity type isolation region reaching the semiconductor substrate from the surface of the epitaxial layer around the epitaxial layer; (e) the first conductivity type isolation region arranged on the surface of the epitaxial layer. A first conductivity type base region and a second conductivity type collector contact region;
A second conductivity type emitter contact region and a second conductivity type first terminal electrode contact region disposed on the surface of the base region; and (g) a surface wiring that short-circuits the emitter contact region, the collector contact region, and the isolation region. The gist is that the protection circuit is characterized by having at least. Here, the "first conductivity type" and the "second conductivity type" are opposite conductivity types. That is, if the first conductivity type is n-type, the second conductivity type is p-type, and if the first conductivity type is p-type, the second conductivity type is n-type.

According to the structure of the protection circuit of the second aspect of the present invention, the first and second constant voltage diodes and the first and second bipolar transistors described in the first aspect are formed on the same semiconductor substrate. Corresponds to the monolithically integrated structure above. Therefore, the structure is such that the first terminal electrode can be connected to the anode electrode side and the second terminal electrode can be connected to the cathode electrode side of the existing protected element. The device structure is such that the first terminal electrode can be in ohmic contact with the first terminal electrode contact region and the second terminal electrode can be in ohmic contact with the back surface of the semiconductor substrate. That is, the semiconductor substrate functions as a contact region for the second terminal electrode.

In the structure of the protection circuit according to the second aspect of the present invention, the emitter contact region has an annular plane pattern, and the first terminal electrode contact region has a concentric plane pattern inside the emitter contact region. It is preferable to have and arrange. By forming the emitter contact region and the first terminal electrode contact region in such a plane pattern, it becomes possible to construct a protection circuit having high symmetry, which is hardly influenced by processing accuracy. Further, in the protection circuit of the second feature of the present invention, a switch function capable of controlling the switching characteristics of the protected element can be added by bringing the switch electrode for controlling the base current into ohmic contact with the base region.

A third feature of the present invention is: (a) a semiconductor substrate of the first conductivity type; (b) an epitaxial layer of the second conductivity type disposed on the semiconductor substrate (c) around the epitaxial layer, A first conductivity type isolation region reaching the semiconductor substrate from the surface of the epitaxial layer; (d) a first conductivity type first terminal electrode contact region disposed on the surface of the epitaxial layer; (v) a first conductivity type A set of base contact regions arranged on the surface of the epitaxial layer so as to be in contact with each other so as to sandwich the first terminal electrode contact region from both sides;
(F) A protection circuit having at least a first conductivity type collector / emitter contact / semiconductor region arranged on the surface of an epitaxial layer so as to be sandwiched between each of the base contact regions and an isolation region. And Here, the collector / emitter contact / combined semiconductor region functions as a collector contact region when a surge voltage having a positive value on the first terminal electrode contact region side is applied to the semiconductor substrate, and the collector / emitter contact semiconductor region is formed on the first terminal electrode contact region. When a surge voltage whose positive side is the semiconductor substrate side is applied, it functions as an emitter contact region.

According to the structure of the protection circuit of the third aspect of the present invention, like the protection circuit of the second aspect of the present invention, the first and second constant voltage diodes, the first and second transistors are provided. Can be monolithically formed on the same semiconductor substrate. Further, in the protection circuit of the third feature of the present invention, a switch function capable of controlling the switching characteristics of the protected element can be added by bringing the switch electrode into ohmic contact with the base contact region.

A fourth feature of the present invention is: (a) a first conductivity type semiconductor substrate; (b) a second conductivity type epitaxial layer disposed on this semiconductor substrate; and (c) around the epitaxial layer. A first conductivity type isolation region reaching the semiconductor substrate from the surface of the epitaxial layer; (d) three first conductivity type collector / emitters disposed on the surface of the second conductivity type epitaxial layer in contact with the isolation region. Contact / semiconductor region; (e) first terminal electrode contact region disposed on the surface of the epitaxial layer; (f) on the surface of the epitaxial layer in contact with the first terminal electrode contact region and the collector / emitter contact / semiconductor region. Arranged base contact region; (G) Gate insulating film arranged on the surface of the epitaxial layer; (H) On the first terminal electrode contact region A first terminal electrode in ohmic contact; (i) a first terminal electrode which is connected to the first terminal electrode and is disposed above the gate insulating film from the contact region of the first terminal electrode to the isolation region of the first conductivity type; 1 gate electrode;
(I) At least one set of second gate electrodes that are in ohmic contact with the first conductivity type isolation region and are disposed above the gate oxide film from the isolation region to the first terminal electrode contact region. The gist is that the protection circuit is characterized by.

According to the structure of the protection circuit of the fourth aspect of the present invention, the bidirectional constant voltage diode, the first and second bipolar transistors, and the first and second insulated gate transistors are formed on the same semiconductor substrate. Can be configured into Therefore, by using the insulated gate transistor and the bipolar transistor together, it is possible to configure a compact protection circuit that realizes improvement in surge response speed and surge current capacity. Further, in the structure of the protection circuit according to the fourth aspect of the present invention, the switch characteristics of the protected element can be controlled by bringing the switch electrode into ohmic contact with the base contact region through the opening provided in the insulating film. A switch function can be added.

A fifth feature of the present invention is: (a) protected element; (b) first conductivity type semiconductor substrate; (c) second conductivity type buried layer disposed on this semiconductor substrate; D) a second conductivity type epitaxial layer disposed on the buried layer; (e) a first conductivity type isolation region that reaches the semiconductor substrate from the surface of the epitaxial layer around the epitaxial layer; (f) an epitaxial layer. A first conductivity type base region and a second conductivity type collector contact region disposed on the surface of the substrate; (g) a second conductivity type emitter contact region and a second conductivity type first region disposed on the surface of the base region. (H) A semiconductor device having at least a surface wiring for short-circuiting an emitter contact region, a collector contact region, and an isolation region.

According to the structure of the semiconductor device of the fifth aspect of the present invention, the parasitic capacitance due to the pn junction of the constant voltage diode in the semiconductor device is kept small, and the semiconductor device of the hybrid integrated structure having a high surge withstand voltage is constructed. ing. Therefore, when a semiconductor light emitting element or the like is used as the protected element, it can be driven even by the dynamic lighting circuit. Further, it is possible to configure a semiconductor device capable of detecting the leakage current of the protected element in the inspection process.

The protected element according to the fifth feature of the present invention can be formed in the shape of a semiconductor chip and can be mounted on a semiconductor substrate in a flip chip structure. As a result, it is possible to reduce the area and size when mounting.

The sixth feature of the present invention is: (a) protected element; (b) first conductivity type semiconductor substrate; (c) second conductivity type epitaxial layer (d) disposed on this semiconductor substrate. ) A first conductivity type isolation region reaching the semiconductor substrate from the surface of the epitaxial layer around the epitaxial layer;
Conductive type first terminal electrode contact region; (f) A set of base contact regions arranged on the surface of the epitaxial layer so as to contact the first conductive type first terminal electrode contact region so as to sandwich it from both sides; (G) A semiconductor device having at least a first conductivity type collector / emitter contact / semiconductor region arranged on the surface of an epitaxial layer so as to be sandwiched between each of the base contact regions and an isolation region. And

According to the structure of the semiconductor device having the hybrid integrated structure according to the sixth aspect of the present invention, when the semiconductor light emitting element is used as the protected element, the dynamic lighting circuit can be driven. In addition, a semiconductor device capable of detecting the leak current of the protected element can be configured. The sixth aspect of the present invention
The semiconductor device having the feature (1) can be mounted in a flip chip structure with good matching when mounting the semiconductor chip forming the protected element on the semiconductor substrate.

The seventh feature of the present invention is: (a) protected element; (b) first conductivity type semiconductor substrate; (c) second conductivity type epitaxial layer disposed on this semiconductor substrate;
(D) A first conductivity type isolation region that reaches the semiconductor substrate from the surface of the epitaxial layer around the epitaxial layer; (e) Three isolation regions arranged on the surface of the second conductivity type epitaxial layer in contact with the isolation region. First conductivity type collector / emitter contact / semiconductor region; (f) First terminal electrode contact region disposed on the surface of the epitaxial layer; (g) First terminal electrode contact region and collector / emitter contact / semiconductor region. A base contact region disposed on the surface of the epitaxial layer in contact with;
(H) a gate insulating film arranged on the surface of the epitaxial layer; (b) a first terminal electrode in ohmic contact with the first terminal electrode contact region; and (e) a first terminal electrode connected to the first terminal electrode. A first gate electrode disposed above the gate insulating film so as to extend from the terminal electrode contact region to the first conductivity type isolation region; (l) ohmic contact with the first conductivity type isolation region, and from the isolation region to the first conductivity type isolation region; A gist of the semiconductor device is that it has at least one set of second gate electrodes arranged above the gate oxide film so as to reach one terminal electrode contact region.

According to the structure of the semiconductor device having the hybrid integrated structure according to the seventh aspect of the present invention, when the semiconductor light emitting element is used as the protected element, the semiconductor light emitting element is driven by the high switching speed of the insulated gate transistor. It is possible to protect from high-speed surges such as electrostatic discharge (ESD). Moreover, since the insulated gate transistor has less parasitic capacitance component than the bipolar transistor, it is more suitable for driving the semiconductor light emitting element by the dynamic lighting circuit. Also in the semiconductor device according to the seventh aspect of the present invention, defective products can be selected and a flip chip structure can be applied.

[0034]

BEST MODE FOR CARRYING OUT THE INVENTION Next, first to third embodiments of the present invention will be described with reference to the drawings, taking a semiconductor light emitting element as an example of a protected element. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals.
However, it should be noted that the drawings are schematic and the relationship between the thickness and the plane dimension, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, the specific thickness and dimensions should be determined in consideration of the following description. Also, it is needless to say that the drawings include portions having different dimensional relationships and ratios. Further, in the description of any of the following embodiments, in order to easily understand the internal structure of the impurity diffusion region in the semiconductor chip, semiconductors such as surface wiring and passivation insulation film, interlayer insulation film, field insulation film, etc. Illustration of the insulating film on the chip is omitted. Actually, in order to reduce the leakage current due to the light irradiation to the pn junction, it is desirable to provide the pn junction with a field plate (blind) made of Al.

(Structure of Mounted Body) First, before the description of the first to third embodiments of the present invention, a semiconductor light emitting element as a protected element and a mounted body in which this protective circuit is hybridly integrated. The structure of is explained. The semiconductor device illustrated in each of the first to third embodiments of the present invention is either a lamp type mounting body as shown in FIG. 1A or a chip type mounting body as shown in FIG. 1B. Is also applicable.

The lamp-type mounting body shown in FIG. 1A has a lead frame including an anode terminal 51 and a cathode terminal 61 facing the anode terminal 51, and a protected element mounted on the cathode terminal 61 of the lead frame ( The semiconductor light emitting device) 1 and the protection circuit 31. Further, the lamp-type mounting body includes a first bonding wire 71 for connecting the anode electrode 5 of the semiconductor light emitting element (element to be protected) 1 and the anode terminal 51, the cathode electrode 6 of the semiconductor light emitting element 1 and the cathode terminal 61. Has a third bonding wire 73 for connecting to. The protection circuit 31 is a semiconductor integrated circuit monolithically integrated on the same semiconductor substrate (same semiconductor chip). Furthermore, the first of the protection circuit 31
The terminal electrode 52 and the anode terminal 51 are connected by a second bonding wire 72. The semiconductor light emitting device 1 as a protected device is composed of, for example, a light transmissive insulator substrate 1c such as sapphire, an n-type GaN semiconductor region 1b, and a p-type GaN semiconductor region 1c. The protection circuit 31 has a second terminal electrode 62 on the back surface, and the second terminal electrode 62 is electrically connected to the cathode terminal 61 by soldering or a conductive adhesive.

The chip-type mounting body shown in FIG. 1B constitutes a disk-type package with an anode terminal 51 and a cathode terminal 61 made of a metal film on an insulating substrate 33 such as a ceramic substrate. The chip of the protected element (semiconductor light emitting element) 1 and the chip of the protection circuit 31 are arranged side by side on the cathode terminal 61 of this disk type package. As in the case of mounting as a lamp-type mounting body, the anode terminal 51 of the semiconductor light-emitting element 1 and the first terminal electrode 52 of the protection circuit 31 are respectively connected to the first bonding wire 71 and the first bonding wire 71 in the chip-type mounting body. Two bonding wires 72 are connected. On the other hand, at the cathode terminal 61, the cathode electrode 6 of the semiconductor light emitting device 1 is connected to the third bonding wire 7
Connected by 3. Further, the cathode terminal 61 and the second terminal electrode on the back surface of the protection circuit 31 are connected by soldering or the like.

In FIG. 1, the simplest protected element (semiconductor light emitting element) 1 is illustrated. However, in reality, a single hetero (SH) structure including a cladding layer or an ohmic contact layer or a double hetero (SH) structure is used. Of course, DH) can be adopted. In addition, a conductive substrate is used instead of the light transmissive insulator substrate 1c, and the n-type GaN semiconductor region 1b is directly soldered to the cathode terminal 61 via the conductive substrate so that the cathode electrode 6 and the cathode terminal 61 are connected to each other. The third bonding wire 73 may be omitted.

(First Embodiment) As shown in FIG. 2A, a semiconductor device according to a first embodiment of the present invention includes a semiconductor light emitting element 1 as a protected element, and a semiconductor light emitting element (target element). The protection element 1 is composed of a protection circuit 31 connected in parallel between the anode electrode 5 and the cathode electrode 6. This protection circuit 31 includes a bidirectional constant voltage diode 2 and
First bidirectional constant voltage diode 2 connected in parallel
Npn bipolar transistor Q ₁ , second npn
Type bipolar transistor Q ₂ .
The bidirectional constant voltage diode 2 is composed of reverse constant voltage diodes D ₁ and D ₂ whose anode electrodes are connected to each other. The base electrodes of the first bipolar transistor Q ₁ and the second bipolar transistor Q ₂ are both connected to the connection point P between the constant voltage diodes D ₁ and D ₂ . Further, as shown in FIG. 2B, the protection circuit 31 including the bidirectional constant voltage diode 2, the first bipolar transistor Q ₁ and the second bipolar transistor Q ₂ shown in FIG. 2A has the same semiconductor substrate. It is monolithically integrated on top.

The structure of the equivalent circuit shown in FIG. 2A is actually a semiconductor light emitting device (device to be protected) as shown in FIG.
It is realized as a hybrid integrated structure in which 1 and the protection circuit 31 are mounted in the same mounting body. That is, the first semiconductor chip (Ga) mounted with the semiconductor light emitting element (protected element) 1 is mounted.
N chip) and a second semiconductor chip (Si chip) in which the bidirectional constant voltage diode 2 and the first and second transistors Q ₁ and Q ₂ are monolithically integrated as shown in FIG. 2B. The hybrid integrated circuit can be mounted in a small area. The structure of this hybrid integrated circuit requires only three bonding wires. Therefore, there is no need to perform special process design and new design of frame and substrate. Therefore, the semiconductor device can be constructed at low cost.

The second semiconductor chip mounting the protection circuit 31 shown in FIG. 2B has a first terminal electrode 52 and a second terminal electrode 62. A semiconductor light emitting element (element to be protected) is provided between the first terminal electrode 52 and the second terminal electrode 62.
The structure is such that the first semiconductor chip on which 1 is mounted can be externally attached. An n-type epitaxial growth layer 9 (hereinafter abbreviated as “epitaxial layer”) is arranged on the p ⁺ -type semiconductor substrate 7 serving as a contact layer of the second terminal electrode 62 via the n ⁺ -type buried layer 8. There is. The epitaxial layer 9 is surrounded by the p ⁺ -type isolation region 10 and is electrically separated from other regions. On the surface of the epitaxial layer 9, as shown in FIG. 3, a p ⁺ type base region 11 and an n ⁺ type collector contact region 12 having a rectangular plane pattern are arranged. Moreover, p ⁺ -type n ⁺ -type emitter contact region 13 surface of the annular base region 11 is disposed, a first terminal electrode contact of n ⁺ -type a concentrically inside the annular emitter contact region 13 The area 14 is arranged. Here, the first terminal electrode contact region 14 and the p ⁺ type base region 1
1 and 1 form a first constant voltage diode (Zener diode) D ₁ . In addition, the p ⁺ type base region 11 and the n ⁺
The type emitter contact region 13 constitutes a _second constant voltage diode (Zener diode) D ₂ .

The insulating film 15 is disposed on the entire surface of the epitaxial layer 9, and the first terminal electrode 52 is formed in the first terminal electrode contact region 14 through the opening (contact hole) formed in the insulating film 15. There is ohmic contact. As the insulating film 15, an oxide film such as a thermal oxide film (SiO 2
₂ membranes) can be used. In addition, n ⁺ type collector contact region 12, n ⁺ type emitter contact region 13, p ⁺
The mold separation region 10 is short-circuited by the same surface wiring 16. As the surface wiring 16, for example, Al wiring, Al-S
metal wiring such as i wiring, Cu wiring, W wiring, or polycrystalline silicon (polysilicon) wiring to which impurities are added,
Polycide wiring using these silicides can be used. As a result, the n ⁺ -type emitter contact region 13,
The n ⁺ type collector contact region 12, the epitaxial layer 9, the p ⁺ type isolation region 10, the p ⁺ type semiconductor substrate 7, and the n ⁺ type buried layer 8 are kept at the same potential. On the other hand, the rear surface of the p ⁺ -type semiconductor substrate 7 and the second terminal electrode 62 is connected in ohmic contact with the p ⁺ -type semiconductor substrate 7.

Here, the first and second constant voltage diodes
The p ⁺ -type base region 11, which serves as a common anode region for D ₁ and D ₂ , has a first npn-type bipolar transistor Q ₁
And the common base region of the first bipolar transistor Q ₁ . That is, the first terminal electrode contact region 1
4, n ⁺ -type emitter contact region 13 is the first
Will become the collector region and the emitter region of the bipolar transistor Q ₁ . On the other hand, the n ⁺ -type buried layers 8 and n having the same potential
⁺ Type collector contact region 12, epitaxial layer 9
Respectively become the collector regions of the npn-type bipolar transistor Q ₂ , and the n ⁺ -type first terminal electrode region 14
Becomes the emitter region of the bipolar transistor Q ₂ .

Next, the operation of the protection circuit according to the first embodiment of the present invention will be described with reference to FIG.

(A) When a surge voltage having a positive polarity on the anode electrode side is applied: (a) The anode electrode 5 to the cathode electrode 6 (first terminal electrode 52 to the first terminal electrode 52 of the semiconductor light emitting element (element to be protected) 1) When a surge voltage whose positive electrode is on the anode electrode 5 side is applied to the second terminal electrode 62), the n ⁺ -type first terminal electrode region 1
The first constant voltage diode D ₁ having the cathode region 4 and the p ⁺ type semiconductor region 11 as the anode region conducts by zener breakdown; (b) When the first constant voltage diode D ₁ conducts, the n ⁺ type diode 1 terminal electrode region 14, p ⁺ type semiconductor region 11, n ⁺
The Zener current flows into the base region 11 of the _first bipolar transistor Q _{1 formed} of the type semiconductor region 13, so that the first transistor Q ₁ is turned on.
Since the n ⁺ type semiconductor region 13 and the p ⁺ type isolation region 10 are kept at the same potential, after all, the first terminal electrode 52 and the second
The terminal electrodes 62 of are short-circuited and the surge voltage can be absorbed.

(B) When a surge voltage having a positive polarity on the cathode electrode side is applied: (a) On the other hand, from the cathode electrode 6 to the anode electrode 5 (second terminal electrode 62) of the semiconductor light emitting element (element to be protected) 1. From the first terminal electrode 52) to the cathode electrode 6 side, a positive surge voltage is applied to the n ⁺ type semiconductor region 13
Is a cathode region and the p ⁺ -type semiconductor region 11 is an anode region, and the second constant voltage diode D ₂ is zener-breakdown and conducts. (B) the second constant voltage diode D ₂ conducts Zener current flows into the p ⁺ -type semiconductor region 11 as a second bipolar transistor Q ₂ of the base region, the second bipolar transistor Q ₂ is turned on . As a result, the first terminal electrode contact region 14 and the semiconductor substrate 7
The short circuit between them can absorb the surge voltage.

According to the first embodiment, as shown in FIG.
As shown, the semiconductor light emitting device (device to be protected) 1
The cathode electrode 5 to the first terminal electrode 52 of the protection circuit 31,
By connecting the lead electrode 6 to the second terminal electrode 62,
The existing semiconductor light emitting device (device to be protected) 1 can be easily and easily
It is a hybrid structure with a compact structure.
It is possible to configure a semiconductor device that is protected from
It At this time, the current capacity of the bidirectional constant voltage diode 2 is
First and second bipolar transistor Q₁ , Q_Two Is conducting
In order to achieve the required current capacity value.
it can. Furthermore, as is clear from the plan view of FIG.
It had a highly symmetrical flat pattern that is not easily influenced by the degree.
It becomes possible to configure a protection circuit. Semiconductor light emitting element
(Protected element) 1 of the anode electrode 5 and the cathode electrode 6
No matter which surge voltage is applied, the same surge withstand voltage
Is obtained.

Next, a protection circuit for a semiconductor device (element to be protected) according to a modification of the first embodiment of the present invention will be described with reference to FIGS. 4 and 5. As shown in FIG. 4, the protection circuit of the semiconductor device according to the modification of the first embodiment of the present invention has an ohmic contact with the p ⁺ -type base region 11 through the opening (contact hole) of the insulating film 15. It has a switch electrode 17 in contact therewith. Although the plan view is omitted, the switch electrode 17 is arranged concentrically between the first terminal electrode 52 and the surface wiring 16 around the first terminal electrode 52. Others are the same as the structure shown in FIG. 2B and FIG. 3, and thus duplicated description will be omitted.

The protection circuit of a semiconductor device according to a modification of the first embodiment of the present invention, as well as the protection circuit of the semiconductor device of the first embodiment shown in FIG. 2, p ⁺ -type base region 11 Are the first and second bipolar transistors Q ₁ and Q
₂ common base regions. That is, as shown in FIG. 5, a switch electrode is provided at the connection point P between the _first constant voltage diode D ₁ and the second constant voltage diode D ₂ . Therefore, the base region 11 is externally applied via the switch electrode 17.
Current is forced to turn on one of the first and second bipolar transistors Q ₁ and Q ₂ , and the anode electrode 5 of the semiconductor light emitting element (protected element) 1 is turned on.
The cathode and the cathode electrode 6 can be forcibly short-circuited to turn off the semiconductor light emitting device 1 as the protected device. That is, the switch electrode 17 can be used as a current terminal for forcibly turning off the semiconductor light emitting element (element to be protected) 1.

(Second Embodiment) As shown in FIG.
The semiconductor device according to the second embodiment of the present invention includes a semiconductor light emitting element (protected element) 1 and a protection circuit 34 for the semiconductor light emitting element (protected element) 1. The protection circuit 34 includes a first pnp-type bipolar transistor Q ₃ connected in parallel with the bidirectional constant-voltage diode 2,
And at least a second pnp-type bipolar transistor Q ₄ . In the first embodiment, since the first and second bipolar transistors Q ₁ and Q ₂ are npn type, the polarities of the bipolar transistors are different. Furthermore, the bidirectional constant-voltage diode 2 is different from that of the first embodiment in that the bidirectional constant-voltage diode 2 is composed of reverse-direction constant-voltage diodes D ₃ and D ₄ whose cathode electrodes are connected to each other. First bipolar transistor Q ₃ and second bipolar transistor Q
The base electrodes of ₄ are both constant voltage diodes D ₁ and D
It is connected to the connection point P with ₂ as in the first embodiment.

FIG. 6 shows details of the protection circuit 34 used in the semiconductor device according to the second embodiment of the present invention shown in FIG. As shown in FIG. 6, the protection circuit 34, p ⁺ -type semiconductor substrate 7, the p ⁺ type is separated by the p ⁺ type isolation regions on the semiconductor substrate 7 and p ⁺ -type semiconductor substrate 7 arranged n-type on Contacting the first terminal electrode contact region 18 so as to sandwich the first terminal electrode contact region 18 and the first terminal electrode contact region 18 arranged on the surfaces of the epitaxial layer 9 and the n-type epitaxial layer 9 from both sides. Between the pair of n ⁺ type base contact regions 19a and 19b, one pair of n ⁺ type base contact regions 19a and 19b, and the p ⁺ type isolation region 10 disposed on the surface of the n type epitaxial layer 9. It has at least p ⁺ -type collector / emitter contact / semiconductor regions 20a and 20b arranged on the surface of the n-type epitaxial layer 9 so as to be sandwiched between the two.
p ⁺ type collector / emitter contact dual-use semiconductor region 2
0a, the n ⁺ type base contact region 19a and the p ⁺ type isolation region 10 are in metallurgical contact with each other. Similarly, the p ⁺ type collector / emitter contact / semiconductor region 20b, the n ⁺ type base contact region 19b, and the p ⁺ type isolation region 10 are in metallurgical contact with each other.

Here, the p ⁺ type first terminal electrode contact region 18 and the n ⁺ type base contact regions 19a, 19 are formed.
b constitutes a set of first constant voltage diodes (Zener diodes) D ₃ . In addition, the n ⁺ type semiconductor region 19
The first constant voltage diode (Zener diode) D ₄ is constituted by the semiconductor region 20a serving also as the p ⁺ type collector / emitter contact a, and the n ⁺ type semiconductor region 19b and the p ⁺ type semiconductor region 19b.
⁺ Type collector / emitter contact semiconductor region 20
b constitutes a second constant voltage diode (Zener diode) D ₄ . p ⁺ type collector / emitter contact dual-use semiconductor regions 20a and 20b and p
^{The +} type isolation region 10 is in metallurgical contact and is electrically short-circuited. That is, the p ⁺ type collector / emitter contact / semiconductor regions 20a and 20b, the p ⁺ type isolation region 10 and the p ⁺ type semiconductor substrate 7 are kept at the same potential as continuous semiconductor regions of the same conductivity type. The insulating film 15 is disposed on the entire surface, and the first terminal electrode 52 is in ohmic contact with the first terminal electrode contact region 18 through the opening (contact hole) provided in the insulating film 15. On the other hand, the second terminal electrode 62 is in ohmic contact with the back surface of the p ⁺ type semiconductor substrate 1.

Where n⁺Type semiconductor regions 19a and 19b
Is the first pnp-type bipolar transistor Q_ThreeBase of
The contact region and the n-type epitaxial layer 9 are the first pn
p-type bipolar transistor Q_ThreeWill be the base area.
And p⁺The first terminal electrode region 18 of the mold has a first pn
p-type bipolar transistor Q_ThreeIn the emitter area of
It Same potential p⁺Type semiconductor substrate 7 and p⁺Type semiconductor region 2
0a and 20b are first pnp bipolar transistors
Q_ThreeWill be the collector contact region of. On the other hand, n ⁺Type
The source contact regions 19a and 19b are the second pnp type barriers.
Ipolara transistor Q_FourIn the base contact area of
The n-type epitaxial layer 9 is a second pnp-type bipolar layer.
Rat transistor Q_FourWill be the base area. And the first
The terminal electrode contact region 18 of the second pnp-type bipolar
-Transistor Q_FourOf the same potential
p⁺Type semiconductor substrate 7 and p⁺Type semiconductor regions 20a, 20b
Is the second pnp bipolar transistor Q_FourEmi of
It becomes the contact area.

Next, the operation of the protection circuit according to the second embodiment of the present invention will be described with reference to FIGS. 6 and 7.

(A) When a surge voltage whose positive side is the anode electrode side is applied: (a) From the anode electrode 5 to the cathode electrode 6 (from the first terminal electrode 52 to the second terminal electrode 62), the anode electrode 5
When a positive surge voltage is applied to the p ⁺ -type first terminal electrode contact region 18,
⁺ Type base contact regions 19a and 19b are base contact regions, n type epitaxial layer 9 is a base region, p
⁺ First pnp-type bipolar transistor Q ₃ of the emitter of the type semiconductor substrate 7 and the collector region - between the base is conductive is forward biased.

[0056] (b) the emitter of the first pnp-type bipolar transistor _{Q 3} - the inter-base is electrically conductive, ^{n +} -type base contact region 19a, and 19b cathode region, p
⁺ Type collector / emitter contact semiconductor region 20
a, 20b of the second constant voltage diode D ₄ to the anode region is rendered conductive in zener breakdown.

(C) When the second constant voltage diode D ₄ is turned on, the base current flows into the base of the first pnp bipolar transistor Q _{3 and} the transistor Q ₃ is turned on. Therefore, the first terminal electrode 52 and the second terminal electrode 62 are short-circuited to absorb the surge voltage.

(B) When a positive surge voltage is applied to the cathode electrode side: (a) On the other hand, from the cathode electrode 6 to the anode electrode 5 (second
When a surge voltage whose positive electrode is on the cathode electrode 6 side is applied from the terminal electrode 62 of the first terminal electrode 52) to the first terminal electrode contact region 18 of the collector region, n ⁺
The type semiconductor regions 19a and 19b are base contact regions,
The second pnp-type bipolar transistor Q _{4 having} the n-type epitaxial layer 9 as the base region and the p ⁺ -type semiconductor substrate 7 as the emitter region is forward-biased and conductive between the emitter and the base.

(B) When the emitter-base of the second pnp-type bipolar transistor Q ₄ conducts, the p ⁺ -type first terminal electrode contact region 18 becomes the anode region and n ^+.
First semiconductor regions 19a and 19b serving as cathode regions
The constant voltage diode D ₃ of zener breakdowns and conducts.

[0060] (c) a first constant voltage diode D ₃ When conductive, the second pnp bipolar transistor Q ₄ base current flows to the base of the second pnp bipolar transistor Q ₄ is turned on. Therefore, the second terminal electrode 62 and the first terminal electrode 52 are short-circuited to absorb the surge voltage.

As described above, according to the second embodiment, the first
Semiconductor light emitting element (element to be protected) 1 as in the embodiment of
Even if a surge voltage is applied to either the anode electrode 5 or the cathode electrode 6, the same surge withstand voltage can be obtained.

As shown in FIG. 9, the semiconductor device according to the modification of the second embodiment of the present invention includes a semiconductor light emitting element (protected element) 1 and an anode electrode of this semiconductor light emitting element (protected element). 5 and the cathode electrode 6 are connected to each other, and a protection circuit 34 is connected. 7 is different from FIG. 7 in that a switch terminal 81 is provided at a connection point P between the first and second constant voltage diodes D ₃ and D ₄ of the protection circuit 34. Figure 8
8A is a schematic top view of the protection circuit 34 shown in FIG. 9, and FIG. 8B is a schematic cross-sectional view taken along the line AA of FIG. 8A. As shown in FIG. 8B, n ⁺
The switch electrode 17 is provided on the type semiconductor region 19 and is in ohmic contact with the n ⁺ type semiconductor region 19 through an opening (contact hole) provided in the insulating film 15.
Also, as shown in FIG. 8A, the square first terminal electrode 5 is
2 and the square switch electrode 17 are arranged at a constant distance. In addition, the three p ⁺ type semiconductor regions 20i, 2
Since 0j and 20k are in metallurgical contact with the p ⁺ type isolation region 10, the p ⁺ type collector / emitter contact / semiconductor regions 20i, 20j, 20k,
The p ⁺ type isolation region 10 and the p ⁺ type semiconductor substrate 7 are kept at the same potential. However, three second constant voltage diodes configured by the n ⁺ type base contact region 19 and each of the three p ⁺ type semiconductor regions 20i, 20j, 20k
N ⁺ type semiconductor region 1 so that D ₄ can contact each other
9 and the p ⁺ -type isolation region 10 are connected at three places.

When a surge voltage is applied, the surge voltage can be absorbed by the same operation as that of the protection circuits shown in FIGS. 6 and 7. Further, in FIG. 9, when a forward current flows to the semiconductor light emitting element (element to be protected) 1 and the semiconductor light emitting element 1 is lit, a sufficient base current for making the first bipolar transistor Q ₃ conductive from the switch electrode 17 is supplied. When injected into the base of the bipolar transistor Q ₃ ,
Since the flown current from the anode electrode 5 through the first bipolar transistor Q _3, the semiconductor light emitting element 1 as the protected element is unlighted.

(Third Embodiment) As shown in FIG. 10 (b).
As described above, the semiconductor device according to the third embodiment of the present invention is
Semiconductor light emitting element (protected element) 1, semiconductor light emitting element (protected element)
Between the anode electrode 5 and the cathode electrode 6 of the protection element)
The protection circuit 36 is connected. Protection times
The path 36 is an anode electrode of the semiconductor light emitting device (device to be protected).
Series connection between the pole 5 and the cathode electrode 6 in opposite directions.
First and second constant voltage diodes D connected _Three, D_Four, A
The emitter is connected to the node electrode 5 and the cathode electrode 6 is connected.
First and second constant voltage diodes with collectors connected
D_Three, D_FourThe first pn whose base is connected to the connection point P with
p-type bipolar transistor Q_Three, The anode electrode 5
Is connected to the cathode and the cathode is connected to the emitter.
The first and second constant voltage diodes D_Three, D_FourConnection with
Second pnp-type bipolar transistor whose base is connected to point P
Langista Q_Four, The source and gate are on the anode electrode 5.
First connected, with drain connected to cathode electrode 6
Insulated gate transistor Q₅, The anode electrode 5
Rain is connected to the cathode 6 and the source and gate
Second insulated gate transistor Q connected to₆And
Have at least. Also, the first and second constant voltage die
Aether D_Three, D_FourThe switch electrode 17 is connected to the connection point P with
Has been continued. In the third embodiment of the present invention, an insulating gate is used.
Type transistor Q₅And Q₆As pMOSFET
I am using. As shown in FIG. 10B, the third aspect of the present invention
The protection circuit 36 mounted on the semiconductor device according to the embodiment
Is the same as the protection circuit according to the second embodiment shown in FIG.
And the third and fourth MOSFETs (insulated gate transistors
Dista) Q₅And Q₆It corresponds to the structure with added.

11 (a) and 11 (b) are cross-sectional views taken along the line BB in FIG. 10 (a), respectively. However, although the switch electrode 17 and the switch terminal 81 of the semiconductor light emitting element (protected element) 1 are provided in FIGS. 10 and 11, it is possible to operate even in a structure without the switch electrode 17 and the switch terminal 81. Of course.

As shown in FIGS. 10A and 11, the protection circuit 36 according to the third embodiment includes a p ⁺ type semiconductor substrate 7 and a p ⁺ type isolation region 10 arranged on the semiconductor substrate. The n-type epitaxial layer 9 separated and arranged on the semiconductor substrate 7, the first terminal electrode contact region 18 arranged on the surface of the epitaxial layer 9, and the p ⁺ -type separation region 10 in contact with the n-type epitaxial layer The three p ⁺ type collector / emitter contact / cumulative semiconductor regions 20 ⁱ , 20 j, 20 k, the p ⁺ type semiconductor regions 20 ⁱ , 20 j, 20 k and the n-type contacting the first terminal electrode contact region 18 arranged on the surface of the layer 9 of n disposed on the surface of the epitaxial layer 9 ⁺ -type base contact region 19, the gate insulating film 27 disposed on the surface of the epitaxial layer 9, a first terminal electrode Conta The was ohmic contact on the preparative region 18 1
Connected to the first terminal electrode 52 of the
Ohmic contact with the first gate electrode 24 and the isolation region 10 disposed on the gate insulating film 27 from the terminal electrode contact region 18 to the isolation region 10, and the isolation region 10 to the first terminal electrode contact region At least one set of second gate electrodes 23 a and 23 b is provided on the gate insulating film 27 so as to reach the position 18.

Here, the first terminal electrode contact region 1
The first constant voltage diode (Zener diode) D ₃ is constituted by 8 and the n ⁺ type base contact region 19. In addition, the n ⁺ type base contact region 19 and the three p ⁺
-Type semiconductor region 20i, 20j, the 20k, 3 single constant voltage diode (Zener diode) constituting the D _4. Further, each of the three p ⁺ -type collector / emitter contact / combined semiconductor regions 20i, 20j, 20k and p ⁺
The mold separation regions 10 are metallurgically in contact with each other. As a result, three p ⁺ type collector / emitter contact / semiconductor regions 20i, 20j, 20k, p ⁺ type isolation region 1 are formed.
The 0 and p ⁺ type semiconductor substrates 7 are kept at the same potential. n ⁺
The type semiconductor region 19 becomes a base contact region of the first pnp type bipolar transistor Q ₃ , and the n type epitaxial layer 9 becomes a base region of the first pnp type bipolar transistor Q ₃ . The p ⁺ type first terminal electrode region 18 becomes an emitter contact region of the bipolar transistor Q ₃ . Further, the p ⁺ type semiconductor substrate 7 having the same potential and the three p ⁺ type semiconductor regions 20i, 20j, 20k serve as collector contact regions of the bipolar transistor Q ₃ . On the other hand, the n ⁺ type base contact region 19 has the second p
It becomes the base contact region of the np type bipolar transistor Q ₄ , and the n type epitaxial layer 9 becomes the base region of the bipolar transistor Q ₄ . The first terminal electrode contact region 18 becomes the collector region of the bipolar transistor Q ₄ , and the p ⁺ type semiconductor substrate 7 and the three p ⁺ type semiconductor regions 20i, 20j, 20k having the same potential are the emitter contacts of the bipolar transistor Q ₄ . Further, the first gate electrode 24 becomes a region and becomes the gate electrode of the first p-insulated gate transistor Q ₅ . That is, the first terminal electrode region 18 becomes the source region of the first p insulated gate transistor Q ₅ , and the p ⁺ type isolation region becomes the drain region of the first p insulated gate transistor Q ₅ . On the other hand, 1
The pair of second gate electrodes 23a and 23b serve as the gate electrodes of the pair of second p-insulated gate type transistors Q ₆ .
That is, the first terminal electrode region 18 becomes the drain region of the second p insulated gate transistor Q ₆ and the p ⁺ type isolation region 10 becomes the source region of the second p insulated gate transistor Q ₆ .

The operation of the semiconductor device according to the third embodiment will be described with reference to FIGS. 10 and 11. However, the description of the same operation as that of the second embodiment of the present invention will be partially omitted.

(A) When a surge voltage having a positive polarity on the anode electrode side is applied: (a) Anode electrode 5 to cathode electrode 6 (first terminal electrode 52 to second terminal electrode 62), anode electrode 5
When a surge voltage whose side is positive is applied, the first terminal electrode 52 has a positive potential, the second terminal electrode 62 has a negative potential, and the first terminal electrode 52 has the same potential as the second terminal electrode 62. The second gate electrode 23 which is arranged apart from the terminal electrode 52.
a and 23b also have a negative potential.

[0070] (b) a gate electrode 23a, the hole of the channel is formed in the n-type epitaxial layer 6 bottom of the 23b, the second p insulated gate transistor _{Q 6} is turned
Turn on.

(C) When the surge voltage further increases and exceeds the withstand voltage of the second p insulated gate transistor Q ₆ , the first pnp bipolar transistor Q ₃ is turned on.

(B) When a surge voltage having a positive polarity on the cathode electrode side is applied: (a) On the other hand, from the cathode electrode 6 to the anode electrode 5 (second
When a surge voltage having a positive side on the cathode electrode 6 side is applied from the terminal electrode 62 of the first terminal electrode 52) to the first terminal electrode 52), the second terminal electrode 62 has a positive potential and the first terminal electrode 52 has a negative potential. Therefore, the first gate electrode 24 connected to the first terminal electrode 52 also has a negative potential.

(B) When the gate electrode 24 has a negative potential,
A channel for holes is formed in the n-type epitaxial layer 6 below the gate electrode 24, and the first p-insulated gate transistor Q ₅ is turned on.

(C) When the surge voltage further increases and exceeds the withstand voltage of the first p insulated gate transistor Q ₅ , the second pnp bipolar transistor Q ₄ is turned on.

In the third embodiment of the present invention,
1st and 2nd p insulated gate transistor Q₅, Q₆Is electric
It is a voltage drive type transistor and its switching speed is
Extremely faster than current-driven bipolar transistors
Is. Taking advantage of this advantage, bipolar transistors
In combination with the fast response speed, surge current capacity
A protection circuit 36 having a large size can be configured. Especially for electrostatic discharge
So it works effectively against fast surges. Furthermore,
First and second p insulated gate transistor Q ₅, Q₆Is
Since the parasitic capacitance is small, it can be driven by a dynamic lighting circuit.
Protection circuit for semiconductor light emitting device 1 as possible protected device
36 can be configured.

(Other Embodiments) Although the present invention has been described by the above embodiments, it should not be understood that the description and drawings forming a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

For example, hybrid integration can be achieved by a mounting structure different from the mounting structure shown in FIG. For example, FIG. 14 is an example in which the lamp-type mounting body or the chip-type mounting body corresponding to FIG. 1 is flip-chip mounted. In the lamp-type mounting body shown in FIG. 14A, the protection circuit 31 and the semiconductor light emitting device (device to be protected) 1 in the flip chip arrangement are provided on a lead frame composed of the anode terminal 51, the switch terminal 81, and the cathode terminal 61. It is implemented. That is, the protection circuit 31 is fixed to the cathode terminal 61 of the lead frame with a conductive adhesive such as Ag paste, and the semiconductor light emitting device (device to be protected) 1 in the flip chip arrangement is mounted on the protection circuit 31. Anode electrode 5 of semiconductor light emitting element (element to be protected) 1 and protection circuit 3
The first first terminal electrode 52 is connected with the micro bump 26a, and the cathode electrode 6 of the semiconductor light emitting device (device to be protected) 1 and the bump electrode 25 of the protection circuit 31 are connected with the micro bump 26b. On the other hand, the first protection circuit 31
The terminal electrode 52 and the anode terminal 51 are connected by the second bonding wire 72, and the switch electrode 17 and the switch terminal 81 of the protection circuit 31 are connected by the fourth bonding wire 74. Further, a light transmitting resin 32 is formed so as to cover the entire surface of the protection circuit 31 and the semiconductor light emitting element (element to be protected) 1 in the flip chip arrangement. As the conductive adhesive, solder or Ag paste can be used.

The chip-type mounting body shown in FIG. 14B has, for example, an anode terminal 51 on a substrate 33 made of ceramics or the like.
And a cathode terminal 61 are formed. The protective circuit 31 is fixed on the cathode terminal 61 with a conductive adhesive such as Ag paste. Further, a semiconductor light emitting element (element to be protected) is provided on the protection circuit 31 by flip chip.
1 is installed. On the other hand, it has a second bonding wire 72 connecting the anode terminal 51 and the first terminal electrode of the protection circuit 31, and a fourth bonding wire 74 connecting the switch terminal 81 and the switch electrode of the protection circuit 31. ing.

12 and 13 show details of the flip-chip mounting structure using a protection circuit 31 according to a modified example of the second embodiment. That is, this is an example in which the first semiconductor chip 28 constituting a protected element having a flip chip structure is mounted on the second semiconductor chip constituting the protection circuit 31 according to the modification of the second embodiment. FIG.
FIGS. 13A and 13B are cross-sectional views taken along the line BB of the semiconductor device shown in FIG.

As shown in FIG. 13A, on the A-A plane
The cross-sectional structure is the same as that of the modification of the second embodiment shown in FIG.
The protection circuit 31 has substantially the same cross-sectional structure. FIG.
As shown in (b), the first semiconductor element that constitutes the protected element.
When a semiconductor light emitting device is used as the body chip 28,
Cathode electrode of semiconductor light emitting device (device to be protected) 1
The bump electrode 25 connected to 6 is p⁺Mold separation area 10
Ohmic connection to p ⁺On the back surface of the semiconductor substrate 7
It is configured to have the same potential as the terminal electrode 62. Change
The anode electrode 5 of the semiconductor light emitting device (device to be protected) 1
Is a bump of the protection circuit 31 by the micro bump 26a.
It is connected to the electrode (first terminal electrode) 52. As a result,
The cathode electrode of the semiconductor light emitting device (device to be protected) 1
The second terminal electrode 62 of the protection circuit 31 has the same potential. one
On the other hand, the cathode electrode 6 of the semiconductor light emitting element (element to be protected) 1
Is a bump of the protection circuit 31 by the micro bump 26b.
It is connected to the electrode 25.

A semiconductor device having a flip mounting structure as shown in FIG. 14A can be formed, for example, as follows.

(A) First, a lead frame to be the switch terminal 81 having a bonding wire connecting portion, the anode terminal 51, and the cathode terminal 61 having an element mounting portion is prepared.

(B) On the other hand, the semiconductor light emitting device (device to be protected) 1 is provided with the micro bumps 26a, 2 by the stud method.
6b is formed, and the semiconductor light emitting device (device to be protected) 1 is connected to the protection circuit 31 by ultrasonic bonding or the like.

(C) Next, the protection circuit 31 and the semiconductor light emitting device (device to be protected) 1 are adhesively fixed to the device mounting portion of the cathode terminal 61 by the conductive Ag paste 78.

(D) Then, the connection portion of the switch terminal 81 and the switch electrode 17 of the protection circuit 31 are connected by the fourth bonding wire 74. Further, the connection portion of the anode terminal 51 and the first terminal electrode 52 of the protection circuit 31 are connected by the second bonding wire.

(E) Finally, the light-transmitting resin 32 is formed on the entire surface by the transfer molding method.

In another embodiment of the present invention, FIG.
The first and third bonding wires 71 and 73 connected to the semiconductor light emitting device (device to be protected) 1 shown in FIG. Further, needless to say, the flip chip structure as described above can be applied to any of the protection circuits of the first to third embodiments of the present invention.

Further, in the description of the first to third embodiments already described, gallium nitride (Ga) is used as the protected element.
The protection circuit used for the semiconductor light emitting device using the N) compound semiconductor has been described.
s) and a semiconductor light emitting device using a gallium arsenide-based compound semiconductor such as gallium arsenide phosphide (GaAsP).

Further, the semiconductor device using the semiconductor light emitting element as the protected element of the present invention has a small parasitic capacitance and can be driven by the dynamic lighting circuit, but it goes without saying that it can also be driven by the static lighting circuit or the duplex lighting circuit. is there. Further, conventionally, it was difficult to select defective products, but in the inspection process of the semiconductor device of the present invention,
As shown in FIG. 15, by applying a voltage with the cathode electrode being positive to the anode electrode of the semiconductor light emitting element, the leakage current of the semiconductor light emitting element can be detected. That is, the leak current of the semiconductor light emitting element is detected without being masked by the output current of the low voltage diode by utilizing the voltage-current characteristic of the bidirectional constant voltage diode. Thus, the first to third aspects of the present invention
In any of the semiconductor devices of the above embodiments, defective products can be sorted, and the yield can be improved in the manufacturing process of the semiconductor device as compared with the conventional case.

Furthermore, in the third embodiment, the first and second pnp type bipolar transistors Q ₃ and Q ₄ , the first and second p insulated gate type transistors Q ₅ and Q ₆ ,
A protection circuit is constituted by the first and second constant voltage diodes D ₃ and D ₄ whose cathodes are connected to each other. But Figure 1
0 and FIG. 11, the conductivity types of the semiconductor regions are all reversed so that the first and second constant voltage diodes D ₃ and D
₄ can be a bidirectional constant voltage diode whose anodes are connected to each other. In addition, the first and second pnp bipolar transistors Q ₃ and Q ₄ are connected to the first and second n
It can be a pn-type bipolar transistor. Further, it is needless to say that the first and second p-channel insulated gate transistors Q ₅ and Q ₆ can be first and second n-channel insulated gate transistors. Npn-type bipolar transistors generally operate faster than pnp-type bipolar transistors. Therefore, further improvement of the surge response speed can be expected.

As described above, needless to say, the present invention includes various embodiments not described here. Therefore, the technical scope of the present invention is defined only by the matters specifying the invention according to the scope of claims appropriate from the above description.

[0092]

According to the present invention, a protection circuit that can be easily connected to an existing protected element, has high versatility, and has high surge response speed, surge withstand voltage, and surge current capacity, and this protection circuit are provided. A hybrid integrated semiconductor device can be provided.

Further, according to the present invention, it is possible to provide a protection circuit in which a defective protected element can be easily selected in an inspection process, and a semiconductor device in which this protection circuit is hybrid-integrated.

Further, according to the present invention, the protection circuit can be reduced in size and weight, and the semiconductor device in which the protection circuit is hybrid-integrated can be reduced in size and weight.

Further, according to the present invention, when a semiconductor light emitting element is used as a protected element, it is possible to realize a semiconductor light emitting device with a small parasitic capacitance that can be driven even by a dynamic lighting circuit.

Further, according to the present invention, it is possible to provide a protection circuit having a switch function for a protected element, and a semiconductor device in which this protection circuit is hybrid-integrated.

[Brief description of drawings]

FIG. 1 (a) is a schematic overall view of a semiconductor device according to an embodiment of the present invention configured with a lamp-type mounting body, and FIG. 1 (b) is a schematic overall configuration with a chip-type mounting body. It is a general view.

2A is an equivalent circuit of the semiconductor device according to the first embodiment of the present invention, and FIG. 2B is a protection used for the semiconductor device according to the first embodiment of the present invention. It is a typical sectional view of a circuit.

FIG. 3 is a schematic top view of a protection circuit used in the semiconductor device according to the first embodiment of the present invention.

FIG. 4 is a schematic cross-sectional view of a protection circuit used in a semiconductor device according to a modification of the first embodiment of the present invention.

FIG. 5 is an equivalent circuit of a semiconductor device according to a modification of the first embodiment of the present invention.

FIG. 6A is a schematic top view of a protection circuit used in a semiconductor device according to a second embodiment of the present invention, and FIG.
FIG. 7 is a schematic cross-sectional view taken along the AA direction in FIG.

FIG. 7 is an equivalent circuit of a semiconductor device according to a second embodiment of the present invention.

FIG. 8A is a schematic top view of a protection circuit used in a semiconductor device according to a modification of the second embodiment of the present invention,
FIG. 8B is a schematic cross-sectional view taken along the line AA of FIG.

FIG. 9 is an equivalent circuit of a semiconductor device according to a modification of the second embodiment of the present invention.

10A is a schematic top view of a protection circuit used in a semiconductor device according to a third embodiment of the present invention, and FIG.
(B) is an equivalent circuit of the semiconductor device according to the third embodiment of the present invention.

11 (a) is a schematic cross-sectional view taken along the direction AA of FIG. 10, and FIG. 11 (b) is a schematic cross-sectional view taken along the direction BB of FIG. .

FIG. 12 is a schematic overall view of a semiconductor device according to another embodiment of the present invention.

13A is a schematic cross-sectional view taken along the line AA of FIG. 12, and FIG. 13B is a schematic cross-sectional view taken along the line BB of FIG. .

FIG. 14 (a) is a schematic overall view of a lamp-type mounting body according to another embodiment of the present invention, and FIG. 14 (b) is a schematic top-view schematic diagram of a chip-type mounting body. .

FIG. 15 is a diagram showing the relationship between voltage-current characteristics in the semiconductor device inspection method of the present invention.

FIG. 16 is an equivalent circuit of a semiconductor light emitting device using a conventional constant voltage diode as a protection circuit.

FIG. 17 is a schematic sectional view of a structure in which conventional bidirectional constant voltage diodes are monolithically integrated on the same semiconductor substrate.

FIG. 18 shows voltage-current characteristics when a conventional semiconductor light emitting element and a constant voltage diode are connected in parallel.

[Explanation of symbols]

1 Semiconductor Light Emitting Element (Protected Element) 1a p-type GaN semiconductor region 1b n-type GaN semiconductor region 1c Light-transmissive insulating substrate 2 Bidirectional constant voltage diode 5 Anode electrode 6 Cathode electrode 7 p ⁺ type semiconductor substrate 8 Embedded layer 9 Epitaxial layer 10 p ⁺ type isolation region 11 Base region 12 Collector contact region 13 Emitter contact region 14 First terminal electrode contact region 15 Insulating film (eg oxide film) 16 Surface wiring 17 Switch electrode 18 First terminal electrode contact region 19 , 19a, 19b Base contact regions 20a, 20b, 20i, 20j, 20k Collector /
Emitter contact / semiconductor region 23 Gate electrode 24 of the second MOS FET 24 Gate electrode 25 of the first MOS FET 25 Bump electrodes 26a, 26b Micro bump 27 Gate insulating film 28 Semiconductor chips 31, 34 on which a protected element is formed, 36 Protective Circuit 32 Light Transmissive Resin 33 Ceramic Substrate 34, 78 Ag Paste 51 Anode Terminal 52 First Terminal Electrode 61 Cathode Terminal 62 Second Terminal Electrode 71 First Bonding Wire 72 Second Bonding Wire 73 Third bonding wires 74 fourth bonding wire 81 switch terminal 91 constant-voltage diode 91a first constant voltage diode 91b the second constant voltage diode _{D 1,} D ₃ first constant voltage diode _{D 2,} D ₄ second constant voltage Diodes Q ₁ and Q ₃ First bipolar transistor Data _Q 2, _{Q 4} second bipolar transistor _{Q 5} first insulated gate transistor _{Q 6} second insulated gate transistor

─────────────────────────────────────────────────── ─── Continued Front Page (51) Int.Cl. ⁷ Identification Code FI Theme Coat (Reference) H01L 33/00 F Term (Reference) 5F003 AP06 BJ03 BJ06 BJ10 BJ12 5F038 BH04 BH06 BH15 EZ20 5F041 AA02 AA23 CA40 DA01 DA07 DA43 DA83 DB01 5F082 AA03 AA33 BA02 BA26 BA31 BA47 BA48 BC03 BC04 BC09 BC11 BC20 DA02 FA01 FA16 GA02 GA04

Claims (17)

[Claims] 1. A protected element having an anode electrode and a cathode electrode, first and second constant voltage diodes serially connected in opposite directions between the anode electrode and the cathode electrode, and the anode electrode. An emitter is connected to the cathode electrode, a collector is connected to the cathode electrode, a base is connected to a connection point with the first and second constant voltage diodes, and a collector is connected to the anode electrode. And a second bipolar transistor having an emitter connected to the cathode electrode and a base connected to a connection point with the first and second constant voltage diodes. 2. A first insulated gate transistor having a source and a gate connected to the anode electrode and a drain connected to the cathode electrode; and a drain connected to the anode electrode and a source and a gate connected to the cathode electrode. 2. The semiconductor device according to claim 1, further comprising a second insulated gate transistor connected to. 3. The switch terminal for controlling the base currents of the first and second bipolar transistors is provided at a connection point of the first and second constant voltage diodes. 2. The semiconductor device according to 2. 4. The first and second constant voltage diodes and the first and second bipolar transistors are monolithically integrated on the same semiconductor substrate according to claim 1 or 3. Semiconductor device. 5. The first and second constant voltage diodes, the first and second bipolar transistors, and the first and second insulated gate transistors are monolithically integrated on the same semiconductor substrate. The semiconductor device according to claim 2, wherein: 6. A semiconductor substrate of a first conductivity type, a buried layer of a second conductivity type arranged on the semiconductor substrate, an epitaxial layer of a second conductivity type arranged on the buried layer, A first conductivity type isolation region that reaches the semiconductor substrate from the surface of the epitaxial layer, a first conductivity type base region and a second conductivity type collector that are disposed on the surface of the epitaxial layer, around the epitaxial layer. A contact region, a second conductivity type emitter contact region and a second conductivity type first terminal electrode contact region disposed on the surface of the base region, the emitter contact region, the collector contact region, and the isolation region. A protection circuit having at least a surface wiring for short-circuiting. 7. The emitter contact region has an annular plane pattern, and the first terminal electrode contact region is arranged inside the emitter contact region to have a concentric plane pattern. The protection circuit according to claim 6. 8. A first-conductivity-type semiconductor substrate, a second-conductivity-type epitaxial layer disposed on the semiconductor substrate, and a periphery of the epitaxial layer, which reaches the semiconductor substrate from a surface of the epitaxial layer. A first conductivity type isolation region, a first conductivity type first terminal electrode contact region disposed on the surface of the epitaxial layer, and contacting the first terminal electrode contact region so as to sandwich the first terminal electrode contact region from both sides, A set of second-conductivity-type base contact regions arranged on the surface of the second-conductivity-type epitaxial layer, and a surface of the epitaxial layer so as to be sandwiched between each of the base-contact regions and the isolation region. A protection circuit comprising at least a first conductivity type collector / emitter contact / semiconductor region arranged. 9. A semiconductor substrate of a first conductivity type, an epitaxial layer of a second conductivity type disposed on the semiconductor substrate, and a periphery of the epitaxial layer, which reaches the semiconductor substrate from the surface of the epitaxial layer. A first-conductivity-type isolation region, three first-conductivity-type collector / emitter contact / semiconductor regions arranged on the surface of the epitaxial layer in contact with the first isolation-type isolation region, and on the surface of the epitaxial layer. A first terminal electrode contact region, a base contact region disposed on the surface of the second conductivity type epitaxial layer in contact with the first terminal electrode contact region and the collector / emitter contact / semiconductor region, and the epitaxial region A gate insulating film disposed on the surface of the layer and an ohmic contact on the first terminal electrode contact region And a first gate electrode that is connected to the first terminal electrode and that is disposed on the gate insulating film so as to extend from the first terminal electrode contact region to the isolation region. And at least one set of second gate electrodes disposed above the gate insulating film so as to make ohmic contact with the isolation region and reach from the isolation region to the first terminal electrode contact region. And a protection circuit. 10. The protection circuit according to claim 6, further comprising a switch electrode in ohmic contact with the base region. 11. The protection circuit according to claim 8, further comprising a switch electrode in ohmic contact with the base contact region. 12. An element to be protected, a semiconductor substrate of a first conductivity type, a buried layer of a second conductivity type arranged on the semiconductor substrate, and a second conductivity type arranged on the buried layer. An epitaxial layer; a first-conductivity-type isolation region that reaches the semiconductor substrate from the surface of the epitaxial layer, and a first-conductivity-type base region and a first-conductivity-type region that are disposed on the surface of the epitaxial layer; A second conductivity type collector contact region, a second conductivity type emitter contact region and a second conductivity type first terminal electrode contact region arranged on the surface of the base region, the emitter contact region and the collector contact region And a surface wiring that short-circuits the isolation region with each other. 13. A device to be protected, a semiconductor substrate of a first conductivity type, a second conductivity type epitaxial layer arranged on the semiconductor substrate, a periphery of the epitaxial layer, and a surface of the epitaxial layer from the surface. A first conductivity type isolation region reaching the semiconductor substrate, a first conductivity type first terminal electrode contact region disposed on the surface of the epitaxial layer, and the first terminal electrode contact region sandwiched from both sides. A pair of second-conductivity-type base contact regions disposed on the surface of the second-conductivity-type epitaxial layer, and sandwiched between each of the base-contact regions and the isolation region. A semiconductor device comprising at least a first conductivity type collector / emitter contact / semiconductor region arranged on the surface of an epitaxial layer. 14. A protected element, a semiconductor substrate of a first conductivity type, an epitaxial layer of a second conductivity type disposed on the semiconductor substrate, a periphery of the epitaxial layer, and a surface of the epitaxial layer from the surface of the epitaxial layer. A first conductivity type isolation region reaching the semiconductor substrate, three first conductivity type collector / emitter contact / semiconductor regions arranged on the surface of the epitaxial layer in contact with the isolation region, and a surface of the epitaxial layer A first terminal electrode contact region, and a base contact disposed on the surface of the second conductivity type epitaxial layer in contact with the first terminal electrode contact region and the collector / emitter contact / semiconductor region. A region, a gate insulating film disposed on the surface of the epitaxial layer, and on the first terminal electrode contact region A first terminal electrode that is in ohmic contact with the first terminal electrode, and a first terminal electrode that is connected to the first terminal electrode and that is disposed on the gate insulating film so as to extend from the first terminal electrode contact region to the isolation region. And a pair of second gate electrodes that are in ohmic contact with the isolation region and that are disposed on the gate insulating film so as to reach the isolation region from the isolation region to the first terminal electrode contact region. A semiconductor device having. 15. The semiconductor device according to claim 12, further comprising a switch electrode of a protected element that makes ohmic contact with the base region. 16. The semiconductor device according to claim 13, further comprising a switch electrode of the protected element that makes ohmic contact with the base contact region. 17. The semiconductor device according to claim 12, wherein the semiconductor chip in which the protected element is formed is mounted on the semiconductor substrate in a flip chip structure. .