JP2003009513A - Booster circuit and its power source circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To get optional high voltage and increase usable liquid crystal panels. SOLUTION: This booster circuit boosts the power voltage to the maximum voltage (n) times as high as the voltage of a driver circuit by having a plurality (n) of switches S1-9 and S10-14, for alternately switching a plurality (n) of capacitors C1-5 into parallel connection and series connection by specified oscillation signals by supplying power voltage. The booster circuit can vary the maximum output voltage up to (n) times by a control circuit for controlling the charge voltage of at least the capacitor C5 at the highest stage (nth stage from the grounding side). The control circuit consists of a comparison control circuit 10 which outputs a control signal by comparing the charge voltage of the capacitor at the highest stage with the reference voltage, and a switch S5 at the highest stage (the nth stage) which supplies power potential to the above capacitor at the highest stage switched by the above control signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a booster circuit,
In particular, the present invention relates to a high-potential booster circuit suitable for a power supply circuit of a liquid crystal controller driver.

[0002]

2. Description of the Related Art In recent years, a liquid crystal controller driver used in a mobile phone has a large display screen. As the screen size increases, the maximum drive voltage of the liquid crystal panel (hereinafter VLCD
Is higher). This is because the liquid crystal panel sequentially rewrites each pixel, but since the time for rewriting one screen is almost constant regardless of the size of the liquid crystal panel, the rewriting time for each pixel becomes shorter as the screen becomes larger.

The liquid crystal panel expresses shading by the amount of electric charge stored in each pixel. Therefore, it is necessary to raise the VLCD in order to maintain the same light and shade, that is, display quality even when the screen size is increased.

FIG. 4A is a circuit diagram of a power supply for a conventionally used liquid crystal controller driver when boosting the voltage by a factor of five.
This circuit includes a booster circuit 51 that boosts a power supply voltage (hereinafter referred to as VDD) by using an oscillation signal 19 of a predetermined frequency and outputs a boosted voltage 21, a capacitor C6 that holds the output 21 of the booster circuit 51, and a reference voltage. The reference voltage generation circuit 11 outputs Vref, and an amplifier (operational amplifier) 52 which compares the reference voltage Vref with the boosted voltage 21 as a power supply and the feedback voltage fed back by the ratio of the feedback resistors R1 and R2.

Further, FIG. 4B is a circuit showing a specific configuration of the booster circuit 51 of FIG. 4A. This circuit switches capacitors C1 to C5 connected in series, switches S1 to S9 that switch the capacitors C1 to C5 in parallel connection by an oscillation signal 19, an inverter 13 that inverts the oscillation signal 19, and an output of the inverter 13. It is composed of switches S10 to S14.

The operation of this circuit will be described in detail below. A rectangular wave oscillation signal 19 is input to the booster circuit 51 to control ON / OFF of the switches S1 to S9, and an oscillation signal 20 obtained by inverting the oscillation signal 19 by the inverter 13 controls ON / OFF of the switches S10 to S14. To do. When the oscillation signal 19 is "H", the switches S10 to S14 are turned off, the switches S1 to S9 are turned on, and the capacitor C1 is turned on.
~ C5 is the power supply voltage (hereinafter referred to as VDD) -ground (hereinafter referred to as G
(Referred to as ND) are connected in parallel, and each capacitor C1 to
C5 is charged to the VDD level.

When the oscillation signal 19 becomes "L", the switches S1 to S9 are turned off, the switches S10 to S14 are turned on, the capacitors C1 to C5 are connected in series, and the maximum voltage VOUT (= 5 × VDD) of the liquid crystal controller driver is obtained. ) Is generated. The amplifier 52 uses the maximum voltage VOUT (hereinafter referred to as VOUT) of the liquid crystal controller driver as a power source, boosts the output signal 18 (hereinafter referred to as Vref) of the reference voltage generation circuit 11 to a ratio determined by the ratio of the resistors R1 and R2, and outputs the output voltage. The VLCD 22 is generated. As described above, in this circuit, VOUT is determined by VDD × (number of capacitors), but its output can be generated only by an integral multiple of VDD.

Assuming that VLCD = 15.0V and VDD =
When there is a liquid crystal panel under the condition of 3.3V, in the conventional circuit, VOUT = 3.3 × 5 = 16.5V, so this liquid crystal panel can be driven. Here, if the VLCD required by the liquid crystal panel becomes 17.0 V due to the increase in screen size, the voltage is not sufficient in the 5 × booster circuit, so VOUT = 3.3 × 6 = 19. 8V
It is necessary to However, there is a maximum voltage (hereinafter referred to as absolute maximum voltage) that can be used in the manufacturing process used when manufacturing the liquid crystal controller driver, and VOUT
Cannot be higher than the absolute maximum voltage.

When the absolute maximum voltage is 18.0V, the maximum voltage VOUT exceeds the absolute maximum voltage, so that it is possible to drive the liquid crystal panel under the conditions of output voltage VLCD = 17.0V and VDD = 3.3V. It will not be possible. In the future, as the screen size increases, the V
It is easily predicted that liquid crystal panels that cannot be driven even though the LCD is below the absolute maximum voltage of the manufacturing process will become the mainstream.

In this conventional circuit, VOUT can be set only to an integral multiple of VDD. Further, since the optimum VLCD differs for each liquid crystal panel and the optimum VLCD also differs depending on the temperature of the liquid crystal panel, it is necessary to arbitrarily set the VLCD output by the liquid crystal controller driver. Therefore, if VOUT can be arbitrarily set, it can be directly used as the VLCD output by the liquid crystal controller driver.

As a method of arbitrarily setting this VOUT, there is a circuit disclosed in Japanese Patent Application Laid-Open No. 06-121526 (Prior art example 2). FIG. 5 is a circuit diagram of the conventional example 2, and FIG. 6 is a timing chart thereof. The second conventional example will be described below.

This circuit comprises a sawtooth wave oscillator 1, a comparator 3 for comparing the output of the sawtooth wave oscillator 1 with the output voltage of the variable resistor 2, and the output of the comparator 3 switches the connection of a capacitor C11. It is composed of an electronic switch 4 and a capacitor C12 that holds an output voltage.

The output of the oscillator 1 is connected to the positive input of the comparator 3 and the capacitor C11. Vref is applied to the negative input of the comparator 3, and the output of the comparator 3 is connected to the control of the switch 4 and the reset terminal of the oscillator 1. The capacitor C11 is connected between the output of the oscillator 1 and GND by the switch 4.
Alternatively, it is connected between VDD and VOUT. The capacitor C12 is connected between VOUT and GND.

When the output of the oscillator 1 is less than Vref, the output of the comparator 3 becomes "L", and the capacitor C11 is charged with the output of the oscillator 1. When the output of the oscillator 1 becomes the same voltage as Vref (t1 in FIG. 6), the output of the comparator 3 becomes “H”, the switch 4 is switched, VDD and the capacitor C11 are connected in series, and the capacitor C11 is charged. The voltage + VDD is output to VOUT. The output of the comparator 3 is also input to the reset terminal of the oscillator 1 and t1 to 1 / f
It is possible to set VOUT to an arbitrary value from VDD to 2 × VDD by shortening the period of time according to the value of Vref.

As described above, in Conventional Example 2, VOUT can be set to an arbitrary value. In the liquid crystal controller driver, a signal obtained by dividing the oscillation signal is used as a signal for rewriting the liquid crystal panel. The output voltage of the oscillator 1 of the conventional example 2 is GND to Vref, and the voltage is G in the normal frequency divider.
Since the ND-VDD signal is designed to be normally divided, the output of the oscillator 1 cannot be divided, so that the comparator 3
The output of will be divided. When the output of the comparator 3 is divided, the cycle becomes long when VOUT is high and becomes short when VOUT is low. However, the signal for rewriting the liquid crystal panel needs to have a short cycle when the VLCD of the liquid crystal panel is high and a long cycle when the VLCD of the liquid crystal panel is low. In order to eliminate the difference between the signal obtained by frequency division and the signal required for the liquid crystal panel, there is a method of changing the frequency division ratio according to the value of VOUT or changing the cycle of the oscillator 1 depending on the value of VOUT. In the conventional circuit, since the division ratio is fixed and the period of the oscillation signal is changed, the method of changing the division ratio depending on the value of VOUT requires an extra circuit. Further, in the method of changing the cycle of the oscillator 1, the cycle obtained by frequency division varies depending on the voltage values of VDD and VOUT.

[0016]

As described above, in the conventional circuit, since the oscillation signal is directly divided, VOUT
Is not affected by. Further, in the conventional example 2, VDD, VOU
Since it is necessary to consider the effects of both T, it becomes difficult to adjust the signal obtained by frequency division.

From the above, the first problem is that there is a liquid crystal panel which cannot be used in the conventional circuit although the VLCD required by the liquid crystal panel is less than the manufacturing process. A second problem is that it is difficult to reuse the oscillation signal in Conventional Example 2.

An object of the present invention is to solve the above problems and to provide a booster circuit capable of obtaining an arbitrary high voltage and increasing the number of usable liquid crystal panels.

[0019]

The configuration of the present invention has a plurality of n switches for supplying a power supply voltage and alternately switching a plurality of n capacitors between parallel connection and series connection by a predetermined oscillation signal. A booster circuit that raises the power supply voltage to a maximum voltage n times that of the driver circuit has a control circuit that controls the charging voltage of at least the uppermost stage capacitor (nth stage from the ground side), and the maximum output voltage up to n times The feature is that it can be changed.

In the present invention, the control circuit compares the charging voltage of the uppermost stage capacitor with the reference voltage and outputs a control signal, and the control signal switches the power source potential to the uppermost stage capacitor. The switch can be composed of an uppermost stage switch (nth stage switch) to be supplied, and switching between the 2nd to n-1th switches is performed by switching between the output of the comparison control circuit and the oscillation signal to obtain the maximum output voltage. Two
It has a switching circuit for outputting a second control signal for switching the second to n-1th switches by an oscillation signal or a control signal, and has a switching circuit capable of varying from 2 times to n times. The first switch can be switched by the second control signal.

Further, the comparison control circuit comprises a comparator for comparing the charging voltage with a reference voltage, a latch for holding the output of this comparator by an oscillation signal, and a flip-flop for using the output of this latch as a reset signal. be able to. Further, the liquid crystal power supply voltage circuit can be composed of only the booster circuit described above.

In the booster circuit of the present invention, VOUT is controlled by controlling the charging voltage of at least the final stage capacitor.
Can be set to any value, which allows VO
It aims to increase the number of usable liquid crystal panels by eliminating the difference between UT and VLCD.

According to the booster circuit of the present invention, the reference voltage Vr
ef and the charging voltage of the uppermost stage capacitor are compared by a comparison control circuit, and the charging voltage is controlled so that the uppermost stage switch is turned off when the charging voltage of the capacitor reaches the same voltage as Vref. Since VOUT is the sum of the charging voltage of each capacitor, it can be set to any value.

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a circuit diagram when used in a 5 × booster circuit as an embodiment of the present invention. In FIG. 1, the present invention is applied to a final stage capacitor C5 based on a charge pump type booster circuit. In FIG. 1, the output 14 of the comparison control circuit 10 is used for the switching control of the switch S5, and the output 14 also controls the switching of the switch S15. Further, the output S15 of the comparison control circuit 10 is inverted by the inverter 12, and the output S15 controls the switching of the switch S16. The comparison control circuit 10 includes a comparator 31, a latch 32, and a flip-flop 33.

In the comparison control circuit 10, the output signal 16 of the capacitor C5 is input to its positive input 17 via the switch S15, the output of the reference voltage generating circuit 11 is input to its negative input 18, and the control input C is oscillated. The signal 19 is input. The comparison control circuit 10 includes a comparator 31 that compares the positive input 17 and the negative input 18, a latch 32 that holds the control input C of the oscillation signal 19 for the output of the comparator 31, and an output of the latch 32. It is composed of a flip-flop 33 as an input.

The output of the comparison control circuit 10 is the switch S.
5, connected to the on / off control signal 14 of S15.
The inverter 12 receives the control signal 14 and receives the switch S16.
And outputs a control signal 15 for turning on / off. Switch S5
Is connected between VDD and the capacitor C5, and the switch S16 is connected between VDD and the positive input 17 of the comparison control circuit 10. The switches S1 to S4 are connected between VDD and the capacitors C1 to C5, respectively, and are connected to the switch S6.
-S9 and GND and capacitors C1-C5, respectively. The oscillation signal 19 is connected to the input that controls the on / off of the switches S1 to S9.

An inverted signal 20 obtained by inverting the oscillation signal 19 by the inverter 13 is connected to an input for controlling on / off of the switches S10 to S14. Switches S10 to S14
Are between switches S1 and S6, and switches S2 and S6, respectively.
7, switches S3 and S8, switches S4 and S9
In between, it is connected between switch S5 and VOUT. In addition, GND is connected to VOUT to smooth VOUT.
A capacitor C6 is connected between the and. The reference voltage generating circuit 11, the comparator 31, the latch 32, and the flip-flop 33 are well known to those skilled in the art and are not directly related to the present invention, and therefore their detailed configurations are omitted.

The operation of the circuit example of FIG. 1 will be described with reference to the timing chart of FIG. The oscillation signal 19 becomes “H”, and the control signal 14 output from the comparison control circuit 10 becomes the oscillation signal 19
Becomes "H" in synchronization with the rising edge of. Further, when the oscillation signal 19 becomes "H", the oscillation signal 20 becomes "L". At this time, the switches S16 and S10 to 14 are turned off, the switches S15 and S1 to S9 are turned on, and the capacitor C1 is turned on.
To C5 are connected in parallel between VDD and GND, and the capacitors C1 to C4 are charged to the VDD level. The charging voltage of the capacitor C5 is the output level V of the reference voltage generating circuit 11.
At ref, the comparison control circuit 10 detects the coincidence, sets the control signal 14 to "L", and turns off the switches S5 and S15.
S16 is turned on. As a result, the positive input 17 of the comparison control circuit 10 is set to VDD, and the output 14 of the comparison control circuit 10 is changed.
Can be set to "L" and the charging voltage Vref of the capacitor C5 can be maintained.

When the oscillation signal 19 becomes "L", the switches S1 to S9 are turned off and the switches S10 to S14 are turned on to connect the capacitors C1 to C5 in series.
UT (= 4 × VDD + Vref) is generated. VOU
T is consumed by a circuit or the like using this as a power source and gradually discharged. When the oscillation signal 19 becomes "H", the control signal 14 also becomes "H", the switches S16, S10 to S14 are turned off, and the switches S5, S15, S1 to S9 are turned on.

Since the capacitors C1 to C5 are returned from the series connection to the parallel connection, and the charging voltage of the capacitor C5 is consumed as described above and is equal to or lower than Vref, the positive input 17 of the comparison control circuit 10 becomes Vref. Below, the capacitor C5 is charged until the charging voltage of the capacitor C5 becomes Vref. Since this is repeated thereafter, VOUT can be set to an arbitrary value.

FIG. 3 is a circuit of another embodiment of the present invention. The basic configuration is the same as that of the embodiment of FIG.
Control signals 42 to 44 for turning on / off the switches S2 to S4
Is configured so that a range in which VOUT can be arbitrarily set is switched by using a switcher 41 that switches between the control signal 14 and the oscillation signal 19.

The operation of this embodiment will be described. When the range in which VOUT can be set is 4 × VDD to 5 × VDD,
The switch inside the switch 41 is switched so that the oscillation signal 19 is output to the control signals 42 to 44. Capacitor C5
The range in which VOUT can be set by controlling only the charging voltage is set to 4 × VDD to 5 × VDD.

The range in which VOUT can be set is from 3 × VDD to
When set to 5 × VDD, the switch inside the switch 41 is switched so that the oscillation signal 19 is output to the control signals 42 and 43 and the control signal 14 is output to the control signal 44. This controls the charging voltage of the capacitors C4 and C5 to VOUT
The range in which can be set can be 3 × VDD to 5 × VDD.

The range in which VOUT can be set is from 2 × VDD to
When set to 5 × VDD, the switch inside the switch 41 is switched so that the oscillation signal 19 is output as the control signal 42 and the control signal 14 is output as the control signals 43 and 44. This controls the charging voltage of the capacitors C3, C4 and C5 to V
The range in which OUT can be set is 2 × VDD to 5 × VDD.

The range in which VOUT can be set is VDD to 5 ×
When set to VDD, the control signal 14 to the control signals 42 to 44
The switch inside the switch 41 is switched so as to output. As a result, the range in which the charging voltage of the capacitors C2 to C5 is controlled and VOUT can be set is VDD to 5 × VDD. As a result, the setting range of VOUT is (4, 3, 2,
1) × VDD to 5 × VDD, which can be used in more liquid crystal panels and the range of use can be expanded.

[0036]

As described above, according to the configuration of the present invention, first, VOUT can be set to an arbitrary value between 4 × VDD and 5 × VDD, so that VOUT can be set to VLC.
Since it can be supplied to the liquid crystal panel as D, it can be used for a liquid crystal panel which cannot be used in the conventional circuit even though the required VLCD is less than the manufacturing process.

Second, since a rectangular wave is used for the oscillation signal and the cycle of the oscillation signal is not affected by VOUT, it can be easily reused in circuits other than the booster circuit. Third
For the liquid crystal panel used in the conventional circuit, V
Since OUT can be lowered to VLCD required by the liquid crystal panel, the power supply voltage of the circuit for driving the liquid crystal is lowered, and the consumption current can be VLCD / VOUT.

Fourth, the amplifier 31 of the conventional circuit is a VOU.
Since T was used as a power source, a high breakdown voltage element was used.
Since the comparison control circuit 10 uses VDD as a power source, it can be a low breakdown voltage element. The minimum size of a high breakdown voltage element is 5 times that of a low breakdown voltage element, and even if the L and W dimensions are the same, the area of a high breakdown voltage element is 1.3 times or more the area of a low breakdown voltage element. Can be reduced by about 20%.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a booster circuit according to an embodiment of the present invention.

2 is a timing diagram of the embodiment of FIG.

FIG. 3 is a circuit diagram of a booster circuit according to another embodiment of the present invention.

4A and 4B are a circuit diagram of a boosting power supply circuit of a conventional example and a circuit diagram of a boosting circuit used in the circuit example.

FIG. 5 is a circuit diagram of another conventional booster circuit.

6 is a timing chart of another conventional example of FIG.

[Explanation of symbols]

1 Sawtooth wave oscillator 2 variable resistors 3,31 comparator 4 electronic switches 10 Comparison control circuit 11 Reference voltage generation circuit 12,13 Inverter 14 Control signal 15,20 Inversion signal 16 Charging voltage 17 Positive input 18 Reference voltage 19 oscillation signal 21 VOUT 32 latch 33 flip-flops 41 Switch 42-44 control signal 51 Booster circuit 52 amp C1 to C6, C11, 12 capacitors R1, R2 resistance S1 to S16 switches

Claims (6)

[Claims] 1. A power supply voltage is provided to have a plurality of n switches for switching a plurality of n capacitors alternately between parallel connection and series connection according to a predetermined oscillation signal, so that the power supply voltage is a maximum of n times that of a driver circuit. The booster circuit that raises the voltage has a control circuit that controls the charging voltage of at least the uppermost stage capacitor (nth stage from the ground side) so that the maximum output voltage can be changed up to n times. Boost circuit. 2. A comparison control circuit in which a control circuit compares a charging voltage of the uppermost capacitor with a reference voltage and outputs a control signal; and a comparison control circuit which is switched by the control signal and supplies a power supply potential to the uppermost capacitor. The booster circuit according to claim 1, comprising a topmost (nth stage) switch. 3. The second to n−1th switches are switched by switching the output of the comparison control circuit and the oscillation signal so that the maximum output voltage can be varied from 2 times to n times. The booster circuit described. 4. A switching circuit for outputting a second control signal for switching the second to n−1th switches by an oscillation signal or a control signal, and the second to n−1th switches being a second switch. 4. The booster circuit according to claim 3, which is switched by the control signal of. 5. The comparison control circuit comprises a comparator that compares the charging voltage with a reference voltage, a latch that holds the output of this comparator by an oscillation signal, and a flip-flop that uses the output of this latch as a reset signal. Claim 2, 3 or 4
The booster circuit described. 6. A liquid crystal power supply voltage circuit comprising only the booster circuit according to claim 1.