JP2003008038A - Thin film solar battery and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thin film solar battery having a good reproducibility and a high conversion efficiency by suppressing a deterioration of interface characteristics due to a thermal diffusion in a manufacturing process. SOLUTION: The thin film solar battery comprises at least one pin junction p-type semiconductor layer 7 or an n-type semiconductor layer 3 made of an amorphous silicon thin film containing a microcrystal phase, an amorphous semiconductor layer containing its microcrystal phase, an i-type semiconductor layer 4 made of an amorphous silicon film, and an interface semiconductor layer of the amorphous silicon film in which a band gap is wider than that of the layer 4 and same conductivity type impurity as that of the amorphous silicon film containing the microcrystal phase is added in a low concentration and interposed in a junction interface between the amorphous semiconductor layer and the semiconductor layer 4. In this battery, the interface semiconductor layer has at least two layers (5, 6). An adding amount of an impurity of the interface semiconductor layer (i-type side interface layer) 5 of the interface side to the i-type semiconductor layer is smaller than that of the interface semiconductor layer (non-i-type side interface layer) 6 of the interface side to the p-type semiconductor layer or the n-type semiconductor layer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film solar cell whose main material is amorphous silicon (a-Si) or microcrystalline silicon (μc-Si), particularly a thin film solar cell having a plurality of pin junction structures laminated. The present invention relates to a battery and a manufacturing method thereof.

[0002]

2. Description of the Related Art A photoelectric conversion device using a non-single-crystal film, especially amorphous silicon (aS) which is a silicon-based non-single-crystal thin film.
i) and thin-film photoelectric conversion devices formed by plasma discharge of thin films of amorphous silicon germanium (a-SiGe), etc., can be manufactured in a large area, at low temperature, and at low cost compared to single-crystal silicon devices. Therefore, it is particularly expected to be applied to large-area thin-film solar cells for electric power.

However, this a-Si or a-SiGe solar cell has a lower conversion efficiency than a bulk crystal type solar cell such as single crystal Si or polycrystal Si, and further has a unique problem of conversion by light irradiation. It has a problem of photodegradation that reduces efficiency by about 10 to 30%. High efficiency by solving these problems,
As a method of achieving high reliability, a multi-layer thin film solar cell in which a plurality of pin cells are stacked to form a multi-junction is known.

This is a stack of a plurality of photoelectric conversion layers composed of p, i, and n type semiconductor layers on a substrate, and has an optical forbidden band width (hereinafter, optical band) relatively on the light incident side. (Also called a gap), and amorphous silicon germanium with a small optical bandgap is used for the photoelectric conversion layer far from the light incident side, and the infrared region of the infrared region that is difficult to be absorbed by amorphous silicon is used. The light is also efficiently absorbed to improve the conversion efficiency. Furthermore, there is also known a technique for further improving the conversion efficiency by adopting a graded structure in which the optical bandgap is changed within the layer by changing the atomic composition ratio in the film thickness direction of one semiconductor layer. There is.

The problem of photo-deterioration and the improvement of conversion efficiency due to the multilayer structure will be described in more detail below. The photodegradation is caused by photoinduced defects generated in the i layer. If the film thickness of the i-layer is reduced, the internal electric field becomes stronger, so that it is possible to suppress the efficiency reduction, but the amount of light absorption is reduced and the initial efficiency is reduced. Therefore, by stacking a plurality of cells each having a thin i-layer, the amount of light absorption can be increased more than in the case of one cell, and both high efficiency and high reliability can be achieved. Furthermore, if a cell using a narrow gap (small optical bandgap) material such as a-SiGe or thin film polycrystalline silicon for the i-layer is combined as a bottom or middle cell, a wavelength that could not be used in the a-Si cell is obtained. 800n
Infrared light of m or more can be absorbed, and high efficiency can be achieved.

As an example of a multi-junction a-Si solar cell,
A triple-junction solar cell with a-Si / a-SiGe / a-SiGe structure in which three pin junctions are stacked is known. The i-layer thickness of the top, middle, and bottom cells is, for example, 70 to 100 n, respectively.
m, 60-150 nm, 50-120 nm. In this case, it is important to control the film thickness and bandgap of each layer in order to obtain the current matching of each cell. The optical gaps of the top, middle, and bottom i layers are 1.75 to 1.8 eV and 1.5, respectively.
~ 1.6eV, 1.35 ~ 1.5eV.

As a technique for improving the efficiency of this triple cell,
Application of microcrystalline silicon (μc-Si) to the p-layer is conceivable. Since μc-Si has two phases, the exact bandgap cannot be defined, but the absorption coefficient for light with a wavelength of 300 to 800 nm is equal to or less than that of amorphous silicon carbide (a-SiC) that is usually used for p-layers. Therefore, when applied to the p-layer, the light absorption loss is small and the short-circuit current (Jsc) can be increased.

The inventors of the present invention added a trace amount of boron when the μc-Si p layer was applied to the middle and bottom cells.
found that inserting p / i interface layer was effective,
It was proposed by Japanese Patent Application No. 11-346206. The gist of the present invention is as follows. That is, “in an amorphous thin-film solar cell having at least one pin junction in which a p-type semiconductor layer made of an amorphous thin film, a substantially intrinsic i-type semiconductor layer, and an n-type semiconductor layer are stacked, The p-type semiconductor layer or the n-type semiconductor layer of the junction is composed of an amorphous silicon-based film (μc-Si-based film) containing a microcrystalline phase, and the semiconductor layer containing the microcrystalline phase and the amorphous silicon-based film (a -Si-based film) has a wider bandgap at the junction interface with the i-type semiconductor layer than the i-type semiconductor layer and is the same as the amorphous silicon-based film (μc-Si-based film) containing a microcrystalline phase. It is assumed that an interfacial semiconductor layer made of an amorphous silicon-based film (a-Si-based film) to which a conductivity type impurity is added at a low concentration is interposed. "For example, when the p-type semiconductor layer of the pin junction contains a microcrystalline phase ,
By sandwiching a low-concentration p-type amorphous semiconductor layer between the p-type semiconductor layer and the i-type semiconductor layer, the efficiency after light irradiation (Ef
f) etc. can be improved from the conventional one. The reason is that when a p / i interface layer containing an appropriate amount of impurities (B: boron) is sandwiched, the internal electric field generated in the p / i interface layer is weakened and voltage loss is reduced, resulting in an increase in diffusion potential. do it
Eff is considered to improve.

In particular, it is important that the microcrystalline silicon grows near the interface with the interface semiconductor layer. Depending on the film forming conditions of the amorphous silicon-based film (μc-Si-based film) containing the microcrystalline phase, a thin transition layer containing no microcrystalline phase may be formed in the initial stage of film formation. The presence of this layer adversely affects the absorption coefficient and the open circuit voltage (Voc).

The i-type semiconductor layer is amorphous silicon germanium
Interface (a-SiGe), the interface semiconductor layer is amorphous
Con (a-Si), the preferred amount of impurities in the film is 3
× 1O ¹⁷~ 8 × 1O¹⁹Atom / cm³Is.

[0011]

[Patent Document 1] Japanese Patent Application No. 11-34
It was found that the thin-film solar cell described in No. 6206 also has the following problems. That is, when the triple cell is manufactured by applying the combination of the p layer and the p / i interface layer as described above to the middle and bottom cells, the obtained efficiency is lower than the value expected from a single component cell, and the variation is small. However, when the cause was investigated in detail, it was found that the bottom cell was due to thermal deterioration.

The bottom cell is 200 ° C. when forming the middle cell.
Since it is exposed to a high temperature for about a relatively long time, it is considered that as a result, boron at the p / i interface thermally diffuses into the i layer and deteriorates the interface characteristics.

The present invention has been made in view of the above points, and an object of the present invention is to suppress the deterioration of the interface characteristics due to thermal diffusion in the manufacturing process, to obtain a thin film solar cell having good reproducibility and high conversion efficiency. To provide.

[0014]

In order to achieve the above object, the present invention has at least one pin junction in which a p-type semiconductor layer, a substantially intrinsic i-type semiconductor layer, and an n-type semiconductor layer are laminated. In a thin film solar cell, at least one p-type semiconductor layer or n-type semiconductor layer having a pin junction is made of an amorphous silicon-based thin film containing a microcrystalline phase, and an amorphous semiconductor layer containing the microcrystalline phase and an amorphous semiconductor layer. At the junction interface with the i-type semiconductor layer made of a silicon-based film, the bandgap is wider than that of the i-type semiconductor layer, and an impurity of the same conductivity type as the amorphous silicon-based film containing a microcrystalline phase is added at a low concentration. A thin-film solar cell having an interfacial semiconductor layer of an amorphous silicon film, wherein the interfacial semiconductor layer is at least two layers, and the interfacial semiconductor layer on the interface side with the i-type semiconductor layer (i-side interfacial layer). ) Impurity A pressurized quantity shall be made as small than the doping amount of the surface semiconductor layer at the interface side (non-i side interface layer) between the p-type semiconductor layer or n-type semiconductor layer (the first aspect of the present invention).

As an embodiment of the invention of claim 1,
The following are preferred: That is, in the thin-film solar cell according to claim 1, in the case of a multi-layer thin-film solar cell having a plurality of pin junctions, the two-layer interface semiconductor layers include all the pin junctions on the non-substrate side of the solar cell. It is formed at the interface between the p-type semiconductor layer and the i-type semiconductor layer in the pin junction (the invention of claim 2).

Further, in the thin-film solar cell according to claim 2, the two interface semiconductor layers are interface semiconductor layers (p / i) formed at an interface between the p-type semiconductor layer and the i-type semiconductor layer.
In addition to the interface layer), an interface semiconductor layer (n / i interface layer) formed at the interface between the n-type semiconductor layer and the i-type semiconductor layer is further provided (the invention of claim 3).

Further, in the thin-film solar cell according to any one of claims 1 to 3, the i-type semiconductor layer is any layer of amorphous silicon germanium, microcrystalline silicon, or microcrystalline silicon germanium. Invention of 4).

Furthermore, in the thin-film solar cell according to any one of claims 1 to 4, the semiconductor layers in the pin junction are stacked in the order of n, from the substrate side of the solar cell.
i, p or p, i, n (the invention of claim 5).

That is, according to the above invention, the p layer or the n layer is formed.
The distribution of the impurity addition amount of the interface semiconductor layer (hereinafter, also simply referred to as the interface layer) inserted between the layer and the i layer is given as i.
The amount of impurities added on the interface side with the layer is made smaller than that on the interface side with the p layer or the n layer.

For example, in a cell to which a p layer of μc-Si is applied, the interface layer inserted between the p layer and the i layer has a two-layer structure, the layer on the i layer side is boron-free, and the layer on the p layer side is The layer is boron added. More preferably, as in the third aspect of the invention, two interface layers are provided between the n layer and the i layer in addition to between the p layer and the i layer. The boron-free layer (i-side interface layer) on the i-layer side blocks thermal diffusion and suppresses deterioration of interface characteristics.

Here, the boron-free layer exhibits a sufficient effect when the thickness is 2 nm or more. Further, the i-layer side of the interface layer does not necessarily need to be boron-free, and the amount of doping gas added to the main gas may be 10 ppm or less.

That is, as the method for producing a thin film solar cell of the present invention, the invention of claim 6 below is preferable. In the method for manufacturing a thin-film solar cell according to any one of claims 1 to 5, the amount of impurities added to the i-side interface layer is 10 ppm or less in terms of a gas ratio to the main gas, and the film thickness is 2 nm or more. Invention of Item 6).

Further, in the method for manufacturing a thin film solar cell according to claim 6, the pin on the substrate side of the multilayer solar cell is used.
After forming the junction, the formation temperature of the pin junction or the transparent electrode layer formed on the pin junction is 150 to 200 ° C. (invention of claim 7). In a multilayer thin-film solar cell, a pin junction is formed on a substrate, and a plurality of pin junctions are further formed on this junction layer. In this case, as will be described later in detail, the lower pin junction layer is exposed to a temperature (150 to 200 ° C.) depending on the material of the thin film and the processing method. The thin film solar cell according to the present invention and the method for manufacturing the same are suitable.

[0024]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below.

Example 1 Results of Preliminary Experiment Using Single Cell A large number of a-SiGe single cells having different interface structures were manufactured, and experiments were conducted to evaluate the heat resistance and photodegradation characteristics of the cells.

First, a solar cell having a relatively small area was experimentally manufactured using a glass substrate. Substrate size is 81mm x 55mm
Then, four cells each having an area of 1 cm ² were prepared.

FIG. 1 is a cross-sectional view of the cell structure, which shows a-Si / aS
The bottom cell of iGe / a-SiGe triple cell was simulated. The manufacturing process will be described below. First, 81
A metal electrode layer 2 made of silver (Ag) was formed on a glass substrate 1 of mm × 55 mm by a sputtering method. After that, the a-Si films 3 to 7 were formed by the plasma CVD method.

First, at a substrate temperature of 200 to 250 ° C., a film thickness of 1
The n-layer 3 of a-Si having a thickness of 0 to 20 nm is formed, and then monosilane (SiH ₄ ) and germane (GeH ₄ ) are used as main gases and hydrogen (H ₂ ) is used as a diluent gas to form a film having a thickness of 80 to 120 nm. a-
The i layer 4 made of Si _0.6 Ge _0.4 was formed. The band gap of the i layer at this time is about 1.4 eV. Then, the substrate temperature is set to 180 to 230 ° C., SiH ₄ is used as a main gas, H ₂ is used as a diluting gas, and diborane (B ₂ H ₆ ) is used as a doping gas. The first p / i interface layer (i-side interface layer) ) 5 and 2nd p / i
The interface layer (non-i side interface layer) 6 was formed into a film.

In the series of trial manufacture in this embodiment, a two-layer structure is used.
The total film thickness of the p / i interface layer is fixed at 12 nm,
B of the second interface layer (non-i side interface layer) 6₂H₆Add 50
It was fixed at ppm. Then, the substrate temperature is set to 80 to 90 ° C.
And SiH_FourThe main gas, H₂The diluent gas, B₂H₆The doping moth
The p-layer 7 is made of μc-Si and has a thickness of 10 to 20 nm.
Was formed into a film. Hydrogen dilution degree (H₂/ SiH_Four) Is 20
0 times and the doping amount is B₂H₆/ SiH_Four= 0.5%. this
At this time, the boron concentration in the film is about 5 × 10²⁰Atom / cm ³And
It After forming the p-layer 7 of μc-Si, it is permeable by the sputtering method.
The bright electrode layer 17 has a thickness of 60 to 80 nm.
A layer of mutin (ITO) was formed.

Targeting the cells prototyped as described above,
A heating test and then a light irradiation test were performed, and the conversion efficiency of the cell was measured before and after each test. The bottom cell in an actual triple cell is usually 20 minutes for about 40 minutes when forming a middle cell film.
Exposed to a high temperature of 0 ° C. Therefore, in order to realize an equivalent heat history, the oven was set to 200 ° C. and a heating test was performed for 40 minutes. Then, a light irradiation test was carried out for 200 hours under 1 sun light irradiation. The conversion efficiency is based on the assumption that the bottom cell is under red filter light (cut-on wavelength 65
0 nm).

FIG. 2 shows the first p / i interface layer (i
Second p / i of side interface layer) and boron addition (B ₂ H ₆ addition amount 50ppm)
The measurement result of the conversion efficiency of the cell when the total thickness of the interface layer (non-i side interface layer) is set to 12 nm and the thickness of the first p / i interface layer (i side interface layer) is changed is shown. 1 for each condition
Four cells were prepared as cm ² cells, and the average value is shown in the column of conversion efficiency in the table. The film thickness of the i-side interface layer is 0n
m and 12 nm show the cases of a single layer structure with boron added (B ₂ H ₆ added amount 50 ppm) and without boron, respectively.

From the results shown in FIG. 2, the i-side interface layer has a thickness of 0 nm.
It is understood that the efficiency of cell No. 2 is reduced by 20% or more after the heating test, but the efficiency is hardly changed when the thickness of the i-side interface layer is 2 nm or more. This is considered to be because the i-side interface layer (first p / i interface layer) worked as a diffusion block layer, and it can be considered that a film thickness of 2 nm or more would be sufficient.

In FIG. 2, when attention is paid after the light irradiation test, the efficiency of the cell having the i-side interface layer of 0 nm is increased rather than immediately after the heating test. This is due to photo-induced defects p /
This is probably because the electric field profile near the i interface changed. On the other hand, the i-side interface layer is 12 nm (the non-i-side interface layer is 0 nm).
In the case of the cell of (nm), the deterioration is large, but it can be understood as a phenomenon related to the problem described in the above-mentioned Japanese Patent Application No. 11-346206 when boron is not added. As a result, in terms of the absolute value of the conversion efficiency, the cell in which the i-side interface layer of 1 to 6 nm is inserted is high.
It is clear that the layered structure is effective.

Next, FIG. 3 shows the result of measurement of the relationship between the amount of boron added to the i-side interface layer and the conversion efficiency of the cell. The thicknesses of the i-side interface layer and the non-i-side interface layer are 4 nm and 8 respectively.
The thickness was fixed to nm and the amount of boron added to the i-side interface layer was changed. The deterioration of properties due to the heating test begins to appear when the amount of B ₂ H ₆ added is 10 ppm, and becomes significantly large at 25 ppm or less.
Considering the efficiency after light irradiation, it can be said that the amount of B ₂ H ₆ added to the i-side interface layer is preferably 10 ppm or less.

(Example 2: Example of triple cell and its experimental result) Based on the above-mentioned examination result in the single cell,
A prototype triple-type solar cell with a-Si / a-SiGe / a-SiGe structure was fabricated. The structure of the prototype cell is shown in FIG. A glass substrate was used as the substrate 1, and four cells each having an area of 1 cm ² were prepared for each substrate. The layers 3 to 7 of the bottom cell are the same as in Example 1.
The detailed description is omitted because it is almost the same. However,
The film thicknesses of the first and second p / i interface layers were 4 nm and 8 nm, respectively, and the amounts of boron added were 0 ppm and 50 ppm, respectively.

[0036] Although the middle cell layers are also substantially the same as the bottom cell, the composition of the i layer is a-Si _0.75 Ge _{0. 25,} the band gap was large and 1.5～1.6EV. Further, the i-layer film thickness is 10
0 to 150 nm, and the substrate temperature during film formation is 180 to 2
The temperature was set to 30 ° C. and was slightly lower than the i layer of the bottom cell. n
Layer 8 was μc-Si / a-SiO. The middle cell does not receive the thermal history as much as the bottom cell, but the structure of the p / i interface layer is a two-layer structure similar to the bottom cell.

Next, after forming the second p-layer of μc-Si, a top n layer 13 having a μc-Si / a-SiO structure having a total film thickness of 15 to 20 nm was formed. After that, film thickness 70-100 nm
A-Si top i-layer 14, a-SiO top p / i interface layer 15
And a top p layer 16 of a-SiO 2 were sequentially formed, and finally ITO was formed as a transparent electrode 17 by a sputtering method.

An example of the substrate temperature (° C.) and the film forming time (min) for each forming layer in the triple cell shown in FIG. 4 is shown in FIG.
Shown in. As shown in FIG. 5, after the formation of the pin junction on the substrate side, the formation temperature of the pin junction or the transparent electrode layer formed on the pin junction is 150 to 200 ° C. In this case, the interface layer is the above-mentioned two layers. With the structure, a good triple cell without thermal deterioration can be manufactured.

In order to evaluate the cell manufactured as described above, the bottom and middle p / i were used as cells for comparison experiments.
A cell having a single layer structure (B ₂ H ₆ 50 ppm added) was prepared for each interface layer, and the characteristics were compared. 6A and 6B show the evaluation results of the characteristics of the triple cell, FIG. 6A shows the characteristics according to the example, and FIG. 6B shows the characteristics of the comparative cell. The number of prototype cells was set to 8 for each of the two types of structures. Figure 6
In, Voc is the open circuit voltage, Jsc is the short circuit current, FF is the fill factor, and Eff is the conversion efficiency.

As is apparent from FIGS. 6 (a) and 6 (b),
The cell to which the p / i interface layer having a two-layer structure according to this example is applied has a higher average conversion efficiency and a smaller variation than the comparative example. Normally, leakage is considered as a factor that deteriorates the cell characteristics, but it has been confirmed that all prototype cells produced this time are at a level that poses no problem. Therefore, it is considered that the low efficiency and the large variation in the comparative example are apparently due to the deterioration of the interface characteristics due to the thermal diffusion of boron,
It is considered that the deterioration phenomenon is suppressed in the cell of the present embodiment.

Further, the cell characteristics of this embodiment are the same as that of the top, middle, and bottom cells produced as single cells.
It was evaluated and found to be almost the same as the characteristic obtained by combining the IV characteristics. Therefore, it is considered that the deterioration of the characteristics of the triple cell according to this embodiment due to the influence of heat can be ignored.

Next, in order to confirm the light stability of the cell according to this embodiment, a continuous light irradiation test for 1 sun was carried out using a metal halide lamp. The result is shown in FIG. 7. FIG. 7 is a cell characteristic showing the relationship between the cell current (vertical axis) and the cell voltage (horizontal axis). In FIG. 7, A is the initial characteristic and B is 23.
The characteristics after continuous irradiation for 2 hours are shown. Further, the table in FIG. 7 shows the open circuit voltage (Voc), the short circuit current (Jsc), the fill factor (FF), and the conversion efficiency (Eff) at the initial stage and after the light irradiation.
As shown in FIG. 7, a high stabilization efficiency of 11% was obtained after 232 hours of light irradiation, confirming the effectiveness of this example.

As described above, in the present embodiment, the example in which the two-layer structure is adopted for the p / i interface layer has been described, but by further applying it to the n / i interface, the effect of suppressing thermal deterioration is further improved. Further, although a-SiGe has been described as an example of the i layer material, a narrow gap material such as microcrystalline silicon or microcrystalline silicon germanium can also be used.

FIG. 8 shows two interface semiconductor layers, an interface semiconductor layer (p / i interface layer) formed at the interface between a p-type semiconductor layer and an i-type semiconductor layer, and an n-type semiconductor layer. i
Regarding a triple cell including an interface semiconductor layer (n / i interface layer) formed at the interface with the type semiconductor layer, an example of the substrate temperature (° C.) and the film forming time (minute) at the time of forming each layer is shown.

In FIG. 8, in contrast to the embodiment of FIG.
1st n / i layer (non-i side interface layer), 2nd n / i layer (i side interface layer)
Is added to the bottom and middle cells, and the amount of impurities added to the i-side interface layer is smaller than the amount of impurities added to the non-i-side interface layer also in these n / i interface layers.

[0046]

As described above, according to the present invention, at least a thin film solar cell having at least one pin junction in which a p-type semiconductor layer, a substantially intrinsic i-type semiconductor layer, and an n-type semiconductor layer are laminated is provided. One p-type semiconductor layer or n-type semiconductor layer having a pin junction is made of an amorphous silicon-based thin film containing a microcrystalline phase, and is made of an amorphous semiconductor layer containing the microcrystalline phase and an amorphous silicon-based film. Amorphous silicon-based film having a wider bandgap at the junction interface with the i-type semiconductor layer than the i-type semiconductor layer and having a low concentration of impurities of the same conductivity type as the amorphous silicon-based film containing a microcrystalline phase Of the interface semiconductor layer, wherein the interface semiconductor layer is at least two layers, and the amount of impurities added to the interface semiconductor layer on the interface side with the i-type semiconductor layer (i-side interface layer) is , P-type semiconductor Alternatively, it may be smaller than the amount of impurities added to the interface semiconductor layer (non-i-side interface layer) on the interface side with the n-type semiconductor layer, and the amount of impurities added to the i-side interface layer may be 10 ppm or less in terms of gas ratio to the main gas. , Its film thickness is 2 nm
As described above, for example, in a middle cell and a bottom cell of a multi-junction cell such as an a-Si / a-SiGe / a-SiGe triple cell, an appropriate amount of boron is added to the p / i interface layer. It is possible to suppress thermal deterioration of the interface in the manufacturing process. This makes it possible to manufacture a solar cell with good reproducibility and high conversion efficiency.

[Brief description of drawings]

FIG. 1 is a sectional structural view of a single cell according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a relationship between an i-side interface layer film thickness and cell conversion efficiency according to the first embodiment.

FIG. 3 is a diagram showing the relationship between the i-side interface layer boron addition amount and the cell conversion efficiency in the first embodiment.

FIG. 4 is a sectional structural view of a triple cell according to a second embodiment of the present invention.

FIG. 5 is a diagram showing an example of a substrate temperature and a film formation time when each layer of the triple cell of the present invention is formed.

FIG. 6 is a diagram showing a characteristic evaluation result of a triple cell of the present invention in comparison with a conventional cell.

FIG. 7 is a diagram showing IV characteristics before and after the light irradiation test of the triple cell according to the present embodiment.

FIG. 8 is a diagram showing an example of a substrate temperature and a film formation time when forming each layer of different triple cells of the present invention.

[Explanation of symbols]

1: glass substrate, 2: metal electrode layer, 3, 8, 13: n
Layer, 4, 9, 14: i layer, 5, 10: i side interface layer, 6,
11: non-i side interface layer, 7, 12, 16: p layer, 15: p
/ I layer, 17: transparent electrode layer.

Claims (7)

[Claims] 1. A thin film solar cell having at least one pin junction in which a p-type semiconductor layer, a substantially intrinsic i-type semiconductor layer, and an n-type semiconductor layer are stacked, and at least one p-type semiconductor layer is provided.
The in-junction p-type semiconductor layer or n-type semiconductor layer is made of an amorphous silicon-based thin film containing a microcrystalline phase, and is made of an amorphous semiconductor layer containing the microcrystalline phase and an amorphous silicon-based film.
At the junction interface with the type semiconductor layer, the band gap is i
A thin-film solar cell that is wider than the type semiconductor layer and has an interfacial semiconductor layer of an amorphous silicon-based film in which an impurity of the same conductivity type as the amorphous silicon-based film containing a microcrystalline phase is added at a low concentration. The interface semiconductor layer is at least two layers, and the impurity addition amount of the interface semiconductor layer on the interface side with the i-type semiconductor layer (i-side interface layer) is the interface with the p-type semiconductor layer or the n-type semiconductor layer. The thin film solar cell is characterized in that it is smaller than the amount of impurities added to the side interface semiconductor layer (non-i side interface layer). 2. The thin-film solar cell according to claim 1, wherein in the case of a multi-layer thin-film solar cell having a plurality of pin junctions, the two-layer interface semiconductor layers exclude the pin junction on the side opposite to the substrate of the solar cell. A thin-film solar cell, which is formed at the interface between a p-type semiconductor layer and an i-type semiconductor layer in all pin junctions. 3. The thin film solar cell according to claim 2, wherein the two interface semiconductor layers are the p-type semiconductor layer and the i-type semiconductor layer.
In addition to the interface semiconductor layer (p / i interface layer) formed at the interface with the n-type semiconductor layer, an interface semiconductor layer (n / i interface layer) formed at the interface between the n-type semiconductor layer and the i-type semiconductor layer is further added. A thin-film solar cell comprising. 4. The thin-film solar cell according to claim 1, wherein the i-type semiconductor layer is any layer of amorphous silicon germanium, microcrystalline silicon or microcrystalline silicon germanium. Thin film solar cell. 5. The thin-film solar cell according to claim 1, wherein the semiconductor layers in the pin junction are stacked in the order of n, i, p or p, i, n from the substrate side of the solar cell. The thin film solar cell is characterized by: 6. The method for manufacturing a thin film solar cell according to claim 1, wherein the amount of impurities added to the i-side interface layer is 10 p in terms of a doping gas ratio to a main gas.
pm or less and the film thickness is 2 nm or more, The manufacturing method of the thin film solar cell characterized by the above-mentioned. 7. The method for manufacturing a thin film solar cell according to claim 6, wherein after forming a pin junction on the substrate side of the multilayer solar cell, a formation temperature of a pin junction or a transparent electrode layer formed on the pin junction. Is 150 to 200 ° C., a method of manufacturing a thin film solar cell.