JP2003007050A - Polarization erasing method for ferroelectric memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent imprint degradation by making the amount of polarization of a ferroelectric capacitor to be roughly zero. SOLUTION: First, '1' data are written in a ferroelectric capacitor. The polarizing characteristic of the capacitor is shifted to the position of P1 by stopping a voltage application to the capacitor after a prescribed voltage V0 is applied at both ends of the capacitor. Next, '0' data are written in the capacitor. The polarizing characteristic of the capacitor is shifted to the position of P5 by applying a reverse voltage -V0 to the capacitor for a preliminarily obtained polarization erasing time (Tth) and, thereafter, the polarizing characteristic of the capacitor is shifted to the position of P6 where polarization is '0' by stopping the application voltage. As a result, it is made possible to make the polarization of the capacitor to be zero and thus it is made possible to prevent the imprint degradation even with respect to a high temperature treatment in the succeeding packaging process by performing such a polarization erasing processing after a probe inspection.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention reduces the polarization amount of a ferroelectric capacitor (hereinafter referred to as "cooling").
The invention relates to a polarization erasing method of a ferroelectric memory for preventing imprint (also referred to as rubbing) deterioration of a ferroelectric capacitor.

[0002]

2. Description of the Related Art Ferroelectric memory (FeRAM) is a non-volatile memory that retains data even when the power is turned off, but has the characteristics of high-speed rewriting and low power consumption. ing. But F
The ferroelectric capacitor forming the eRAM has a reliability deterioration mode called imprint. this is,
This is a phenomenon in which rewriting of reverse data becomes difficult when a certain data is written and left for a long time. In addition, imprint deterioration becomes remarkable especially at high temperatures, and leaving it for a long time in a high temperature environment poses a problem.

In the unused state of the ferroelectric capacitor, FIG.
Polarization 0 is shown at the origin of the polarization characteristic diagram in FIG. However, once the voltage is applied, the polarization moves on the curve of P1-P2-P3-P4 according to the applied voltage, and when the voltage application is stopped, the two polarization states of P1 or P3 are retained, and this characteristic is utilized. And stores 1/0 of the data. Although various methods have been proposed for reading data, in general, an electric pulse is applied to one side of a ferroelectric capacitor, and the potential change of the other side due to the electric charge released by the electric pulse is used as a reference potential. The data is compared with. 1/0 of the data is positive polarization /
Corresponds to negative.

When a ferroelectric capacitor is left under a high temperature below a specific temperature known as the Curie temperature, imprint deterioration occurs, and the degree of imprint deterioration and the magnitude of polarization have a correlation. That is, by reducing the polarization, imprint deterioration can be suppressed, and by setting the polarization to 0, imprint deterioration can be completely prevented.

A general semiconductor device manufacturing flow is as follows:
The process is roughly divided into a wafer diffusion process, a probe inspection process, a package process, and a final inspection process, and the manufacturing flow of the ferroelectric memory is the same. However, a ferroelectric capacitor is formed in the wafer diffusion process, and the initial state of polarization is 0 at this time. However, in the probe inspection process, a WRITE / READ inspection is performed to confirm the operation of the ferroelectric memory. Ferroelectric capacitors are polarized in one direction. There is a treatment process at a high temperature exceeding 200 ° C. in the next packaging process, and if the packaging process is performed in a polarized state during probe inspection, the ferroelectric capacitor causes imprint deterioration.

However, by performing cooling before the packaging process, it is possible to reduce the polarization amount of the ferroelectric capacitor and suppress imprint deterioration. As a conventional cooling method, there is a method of alternately writing data 0/1 while gradually reducing the write voltage.

A conventional cooling method will be described with reference to FIG. In normal operation of a ferroelectric memory,
A voltage that causes saturation polarization (for example, 5
V, -5V) to hold the data. When storing data "1", the positive voltage V0 (for example, +5)
V), when storing data “0”, a negative voltage −V0 (for example, −5 V) is applied to cause saturation polarization, and then the applied voltage is stopped to shift to the states of P1 and P3, respectively, and the data is stored. Hold it. For example, data “1” is stored, and P
It is assumed that it is polarized in the 1 state. Here, a negative voltage -V1 (eg-
When 3 V) is applied, the amount of polarization shifts to P29, and when a positive voltage V1 (for example, +3 V) that does not reach saturation polarization is applied next, the amount of polarization shifts to P30 via point a. Here, when the voltage application to the ferroelectric capacitor is stopped, the polarization amount becomes P31. That is, the polarization amount is set to P by writing data 0/1 at a voltage that does not reach saturation polarization.
This means a decrease from 1 to P31. Next, by writing the data 0/1 at a voltage V2 (eg, 2.8 V) that is a predetermined lower voltage than the voltage V1, the polarization amount is reduced to P34. By performing the data 0/1 write operation while further lowering the voltage, the polarization amount can be reduced to the limit at which the semiconductor device can operate.

[0008]

However, in the above-described conventional cooling method, the limit of polarization reduction is determined by the peripheral control circuit operation limit (about 1.4V) of the semiconductor device, so that the polarization is completely erased. could not. Therefore, imprint deterioration could not be completely prevented.

SUMMARY OF THE INVENTION An object of the present invention is to provide a polarization erasing method for a ferroelectric memory which can prevent imprint deterioration by reducing the polarization amount of the ferroelectric capacitor to almost zero.

[0010]

A polarization erasing method for a ferroelectric memory according to claim 1 of the present invention comprises a plurality of memory cells, and a voltage is applied to a ferroelectric capacitor provided in each of the memory cells. A polarization erasing method for a ferroelectric memory, which stores predetermined data by applying and polarization, comprising: a first step of applying a predetermined voltage across a ferroelectric capacitor for polarization; The predetermined voltage of the step has a second step of applying a positive / negative reverse voltage to the ferroelectric capacitor, and the application time in the second step is the time for setting the polarization amount of the ferroelectric capacitor to 0 (polarization). Erase time).

By carrying out this method, for example, after probe inspection, the polarization amount of the ferroelectric capacitor can be made zero, and imprint deterioration can be prevented even at high temperature processing in the subsequent packaging process. It will be possible.

A polarization erasing method for a ferroelectric memory according to a second aspect of the present invention is the polarization erasing method for a ferroelectric memory according to the first aspect, in which a predetermined voltage is applied across the ferroelectric capacitor. A polarization step of polarization, a reverse voltage application step of applying a positive / negative reverse voltage for a predetermined time, and a data read step of reading the polarization amount of the ferroelectric capacitor as the potential of the data line to determine the data value. Is provided and the application time in the reverse voltage application step when the data value read in the data read step is inverted is repeated in the order of the polarization step, the reverse voltage application step, and the data read step while changing the application time in the reverse voltage application step. Calculate this application time when the polarization amount of the ferroelectric capacitor in the second step is set to 0 And performing first and second steps as (polarization cancellation time).

According to this method, the polarization erasing time of the ferroelectric capacitor can be easily measured with a semiconductor memory tester or the like, and the polarization erasing time measurement and the polarization erasing (first and second steps) are continuously performed. By performing the above, it becomes possible to easily erase polarization with a semiconductor memory tester or the like while suppressing device variations.

According to a third aspect of the present invention, there is provided a polarization erasing method for a ferroelectric memory, comprising a plurality of memory cells, wherein a voltage is applied to a ferroelectric capacitor provided in each of the memory cells for polarization. A polarization erasing method for a ferroelectric memory that stores predetermined data by means of a polarization step of applying a predetermined voltage to both ends of a ferroelectric capacitor to polarize, and a polarization step is a positive / negative reverse voltage for a predetermined time. There is a reverse voltage applying step for applying and a data reading step for determining the data value by reading the polarization amount of the ferroelectric capacitor as the potential of the data line, and the polarization step while changing the application time in the reverse voltage applying step. , Reverse voltage applying step and data reading step are repeated in order, and the data value read in the data reading step is inverted. And obtaining the application time of the reverse voltage application step when.

According to this method, the polarization erasing time of the ferroelectric capacitor can be easily measured with a semiconductor memory tester or the like.

According to a fourth aspect of the present invention, there is provided a ferroelectric memory polarization erasing method according to the second or third aspect, wherein the applied voltage in the polarization step is a ferroelectric capacitor. It is characterized in that it is a voltage for saturation polarization.

By this method, it is possible to stably measure the polarization elimination time without depending on the polarization state immediately before the start of measurement.

According to a fifth aspect of the present invention, in a polarization erasing method for a ferroelectric memory, a plurality of memory cells are provided, and a voltage is applied to a ferroelectric capacitor provided in each of the memory cells for polarization. A method of erasing polarization in a ferroelectric memory for storing predetermined data by means of a first step of applying a predetermined voltage to both ends of a ferroelectric capacitor for polarization and a predetermined voltage of the first step. Has a second step of applying a positive / negative reverse voltage to the ferroelectric capacitor, and the applied voltage in the second step is a voltage (polarization erasing voltage) that makes the polarization amount of the ferroelectric capacitor 0. Is characterized by.

By carrying out this method, for example, after probe inspection, the polarization amount of the ferroelectric capacitor can be made zero, and imprint deterioration can be prevented even at high temperature processing in the subsequent packaging process. It will be possible.

A polarization erasing method for a ferroelectric memory according to a sixth aspect of the present invention is the polarization erasing method for a ferroelectric memory according to the fifth aspect, wherein a predetermined voltage is applied across the ferroelectric capacitor. A polarization step of polarization, a reverse voltage application step of applying a positive / negative reverse voltage for a predetermined time, and a data read step of reading the polarization amount of the ferroelectric capacitor as the potential of the data line to determine the data value. Is provided, and the applied voltage in the reverse voltage applying step when the data value read in the data reading step is inverted by repeating the polarization step, the reverse voltage applying step, and the data reading step in order while changing the applied voltage in the reverse voltage applying step. Then, this applied voltage is used to set the polarization amount of the ferroelectric capacitor in the second step to 0. And performing first and second steps as (polarization cancellation voltage).

According to this method, the polarization erasing voltage of the ferroelectric capacitor can be easily measured with a semiconductor memory tester or the like, and the polarization erasing voltage measurement and the polarization erasing (first and second steps) are continuously performed. By performing the above, it becomes possible to easily erase polarization with a semiconductor memory tester or the like while suppressing device variations.

According to a seventh aspect of the present invention, there is provided a polarization erasing method for a ferroelectric memory, which comprises a plurality of memory cells, wherein a voltage is applied to a ferroelectric capacitor provided in each of the memory cells for polarization. A polarization erasing method for a ferroelectric memory that stores predetermined data by means of a polarization step of applying a predetermined voltage to both ends of a ferroelectric capacitor to polarize, and a polarization step is a positive / negative reverse voltage for a predetermined time. It has a reverse voltage applying step to be applied and a data reading step to read the polarization amount of the ferroelectric capacitor as the potential of the data line to judge the data value, and the polarization step while changing the applied voltage in the reverse voltage applying step. , Reverse voltage applying step and data reading step are repeated in order, and the data value read in the data reading step is inverted. And obtaining the applied voltage in the reverse voltage application step when.

According to this method, the polarization erase voltage of the ferroelectric capacitor can be easily measured with a semiconductor memory tester or the like.

A polarization erasing method for a ferroelectric memory according to claim 8 of the present invention is the polarization erasing method for a ferroelectric memory according to claim 6 or 7, wherein the applied voltage in the polarization step is a ferroelectric capacitor. It is characterized in that it is a voltage for saturation polarization.

By this method, it is possible to stably measure the polarization erasing voltage without depending on the polarization state immediately before the start of measurement.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The ferroelectric memory according to the present embodiment comprises a plurality of memory cells each having a ferroelectric capacitor, and a voltage is applied to the ferroelectric capacitors provided in each of the memory cells to polarize them. By doing so, predetermined data is stored.

(First Embodiment) First, the first embodiment of the present invention
A polarization erasing method of the ferroelectric memory in the embodiment will be described.

FIG. 1 shows the polarization hysteresis characteristic of the ferroelectric capacitor, and shows the relationship between the voltage applied to the ferroelectric capacitor and the polarization amount. For example, in the case of having the polarization of P1, when a negative voltage (-V0) is applied, P2
When the positive voltage is applied next, it moves to P4 via P3, and when the applied voltage is stopped in this state, P
Return to position 1. Here, sufficient time (several tens of nanoseconds) is required for the polarization reversal of the ferroelectric capacitor to be performed. For example, when the ferroelectric capacitor maintains the polarization state of P1, if a negative voltage −V0 is applied to both ends of the ferroelectric capacitor, P5 after time t1 and time t2.
After that (t1 <t2), the polarization state of P2 is entered. Here, when the applied voltage is stopped after the time t1, the state shifts to P6 where polarization is erased. Thus, the polarization can be completely eliminated by optimizing the application time. Here, the voltage application time Tth for setting the polarization to 0 (hereinafter referred to as “polarization elimination time”) can be obtained by using a measuring device using a Sawyer tower circuit capable of measuring the hysteresis of the ferroelectric capacitor. I can.

A polarization erasing method of the ferroelectric memory for returning the polarization to the initial state by utilizing the polarization characteristics of the ferroelectric capacitor will be described with reference to the polarization erasing flow of FIG. In FIG. 2, 1 is a step of writing 1 data to the ferroelectric capacitor, 2 is a step of setting a mode in which the time T1 applied to the ferroelectric capacitor can be arbitrarily controlled from the outside, and 3 is both ends of the ferroelectric capacitor. Step 4 is a step of setting the time T1 for applying a voltage to the polarization elimination time Tth, and 4 is a step of writing 0 data to the ferroelectric capacitor. Now, the polarization elimination flow of the ferroelectric capacitor will be described in detail.

First, in step 1, one data is written in the ferroelectric capacitor. As a result, in the polarization characteristic of FIG. 1, a predetermined voltage V0 is applied to both ends of the ferroelectric capacitor, and then the voltage application is stopped to move to the position P1.

Next, at step 2, the time T1 applied to the ferroelectric capacitor is set to a mode in which it can be arbitrarily controlled from the outside.

Next, at step 3, the time T1 for applying a voltage across the ferroelectric capacitor is set to the polarization elimination time Tth. The polarization elimination time Tth is previously measured by a separate device as described above.

Next, in step 4, 0 data is written in the ferroelectric capacitor. As a result, the reverse voltage −V0
By applying th, the polarization characteristic of FIG. 1 shifts to P5, and then the applied voltage is stopped to shift to P6 of polarization 0.

As described above, according to the present embodiment, by executing Step 1 to Step 4, the polarization is reduced to 0.
It becomes possible to By performing such a polarization erasing process after the probe inspection process is completed, it is possible to prevent imprint deterioration even in a high temperature process in a subsequent packaging process.

(Second Embodiment) Next, the second embodiment of the present invention will be described.
A polarization erasing method of the ferroelectric memory in the embodiment will be described.

In general, the polarization erasing time of the ferroelectric capacitor differs depending on the device due to production variations. Therefore, it is necessary to measure the polarization erasing time of each device before erasing. However, in the above-described first embodiment, the optimum time for polarization elimination is determined using a measuring instrument using a Sawyer tower circuit, but it is not efficient to apply it to the production process. Therefore, an efficient method of measuring the polarization elimination time using a semiconductor memory tester or the like is provided. This polarization elimination time measuring method will be described with reference to the polarization characteristics of FIG. 3 and the inspection method of FIG.

In FIG. 4, 5 is a step of setting the initial value of N to 1, 6 is a step of writing 1 data in the ferroelectric capacitor, and 7 is a time T1 to be applied to the ferroelectric capacitor from the outside. Step 8 to set to a controllable mode, step 8 to set the time T1 for applying voltage across the ferroelectric capacitor to 2 × N (ns), step 9 to write 0 data to the ferroelectric capacitor, 10
Is a step of canceling the mode in which the time applied to the ferroelectric capacitor can be arbitrarily controlled from the outside, 11 is a step of performing read determination by using the polarization amount of the ferroelectric capacitor as the potential of the data line, and 12 is a value of N. The step of increasing 1 and the step 13 of completing the measurement of the polarization elimination time are shown. Now, the polarization erase time measurement flow of the ferroelectric capacitor will be described in detail.

First, in step 5, a variable N = 1 for changing the writing time is set as an initial setting.

Next, in step 6, one data is written in the ferroelectric capacitor. As a result, in FIG. 3, the positive voltage V1 is applied and then the voltage is stopped to shift to the polarization state of P7.

Next, at step 7, the time to be applied to the ferroelectric capacitor is set to a mode in which it can be arbitrarily controlled from the outside.

Next, at step 8, the time for applying a voltage across the ferroelectric capacitor is set. For example, 2 × N =
Set to 2 ns.

Next, at step 9, 0 data is written in the ferroelectric capacitor. As a result, in FIG. 3, when the voltage is stopped after the negative voltage −V1 is applied for 2 ns, P
It transfers to P12 via 11.

Next, at step 10, the mode in which the time applied to the ferroelectric capacitor can be controlled externally is released.

Next, in step 11, data reading is performed. At this time, the ferroelectric capacitor is positively polarized in FIG. 3, and the data 1 is read.

Next, in step 12, N is incremented by 1 to 2
, And steps 6 to 11 are repeated. At this time, the writing time in step 8 is set to 2 × N = 4 ns, and the polarization shifts to P14 via P13 in FIG. 3 by the writing in step 9. P14 is still positive polarization, and the data 1 is read in the reading in step 11.

Further, in step 12, N is increased to 3 and steps 6 to 11 are repeated. At this time, the writing time in step 8 is set to 6 ns, and the writing in step 9 shifts the polarization to P16 via P15 in FIG. Here, the polarization becomes negative for the first time, and the data 0 is read for the first time in the reading in step 11.

When this read data is inverted from 1 to 0, the polarization state after the transition due to the writing in step 9 is almost 0. That is, the write time in step 8 when the read data is inverted from 1 to 0 is the polarization erase time Tth. Here, the accuracy of measurement of the polarization erasing time Tth can be improved by minimizing the increase in the writing time when repeating Step 6 to Step 11. In this way, the polarization elimination time can be obtained with high accuracy.

As described above, it is possible to measure the polarization elimination time of the ferroelectric capacitor using a semiconductor memory tester or the like.

In the present embodiment, the polarization elimination described in the first embodiment is carried out by using the polarization elimination time Tth thus measured. That is, the inspection flow of this embodiment is shown in FIG. In FIG. 5, 14 is shown in FIG.
The process step of polarization elimination time measurement indicated by and the process step 15 of polarization elimination shown in FIG.

First, in step 14, the polarization elimination time Tth is obtained by the above-mentioned polarization elimination time measuring method. Then, in step 15, the processing of FIG. 2 is performed, but at this time, the writing time in step 3 is set to the value obtained in step 14.

According to the present embodiment, the optimum erase time and polarization erase can be continuously performed for each device. Therefore, it becomes possible to continuously measure the polarization erasing time and the polarization erasing by using the semiconductor memory tester, and it is possible to easily perform the polarization erasing while suppressing the device variation by the probe test.

(Third Embodiment) Next, the third embodiment of the present invention will be described.
A polarization erasing method of the ferroelectric memory in the embodiment will be described.

FIG. 6 shows the polarization hysteresis characteristic of the ferroelectric capacitor, and shows the relationship between the voltage applied to the ferroelectric capacitor and the polarization amount. For example, in the case of having a polarization of P1, when a negative voltage (-V0) is applied, the time P
When the positive voltage is applied, the voltage moves to P4 via P3, and when the applied voltage is stopped in this state, the voltage returns to the position of P1. Here, for example, when the ferroelectric capacitor maintains the polarization state of P1, when a negative voltage -Vth is applied across the ferroelectric capacitor, the polarization state of P5 is entered. Next, when the applied voltage is stopped, it moves to the position of P6 and the polarization can be completely erased. Here, the polarization is 0
The applied voltage Vth (hereinafter, referred to as “polarization erasing voltage”) for the purpose can be obtained by using a measuring instrument using a Sawyer tower circuit capable of measuring the hysteresis of the ferroelectric capacitor.

A polarization erasing method of the ferroelectric memory for returning the polarization to the initial state by utilizing the polarization characteristics of the ferroelectric capacitor will be described with reference to FIG. In FIG.
16 is a step of writing 1 data to the ferroelectric capacitor, 17 is a step of setting the voltage V1 applied to the ferroelectric capacitor to a mode in which it can be arbitrarily controlled from the outside, 1
Reference numeral 8 represents a step of setting the voltage T1 applied to both ends of the ferroelectric capacitor to the polarization elimination voltage Vth, and 19 represents a step of writing 0 data to the ferroelectric capacitor. Now, the polarization elimination flow of the ferroelectric capacitor will be described in detail.

First, at step 16, one data is written in the ferroelectric capacitor. As a result, in the polarization characteristics of FIG. 6, a predetermined voltage V0 is applied to both ends of the ferroelectric capacitor, and then the voltage application is stopped to move to the position P1.

Next, at step 17, the write voltage applied to the ferroelectric capacitor is set to a mode in which it can be arbitrarily controlled from the outside.

Next, at step 18, the voltage applied across the ferroelectric capacitor is set to the polarization elimination voltage Vth. Vth is measured in advance.

Next, at step 19, 0 data is written in the ferroelectric capacitor. As a result, by applying a reverse voltage −Vth, after shifting to P5 in the polarization characteristic of FIG.
By stopping the applied voltage, the process shifts to P6 with zero polarization.

As described above, according to the present embodiment, by executing step 16 to step 19, the polarization can be erased, and the same effect as that of the first embodiment can be obtained.

(Fourth Embodiment) Next, the fourth embodiment of the present invention will be described.
A polarization erasing method of the ferroelectric memory in the embodiment will be described.

In general, the polarization erasing voltage of the ferroelectric capacitor differs depending on the device due to the variation in production. Therefore, it is necessary to measure the polarization erasing voltage of each device before erasing. However, in the third embodiment described above, the optimum voltage for polarization elimination is determined using a measuring instrument using a Sawyer tower circuit, but it is not efficient to apply it to the production process. Therefore, an efficient method for measuring the polarization erase voltage using a semiconductor memory tester or the like is provided. This will be described with reference to the polarization characteristics of FIG. 8 and the inspection method of FIG. In FIG. 9, 20 is a step for setting the initial value of N to 1, and 21 is 1 for the ferroelectric capacitor.
A step of writing data, 22 is a step of setting a voltage V1 applied to the ferroelectric capacitor to a mode in which it can be arbitrarily controlled from the outside, and 23 is a voltage V1 applied to both ends of the ferroelectric capacitor of 0.5 × N ( V), 24 is a step of writing 0 data to the ferroelectric capacitor, 25 is a step of releasing the mode in which the voltage applied to the ferroelectric capacitor can be arbitrarily controlled from the outside, 2
6 is a step for carrying out the read determination by using the polarization amount of the ferroelectric capacitor as the potential of the data line, and 27 is the value of N is 1
The increasing step 28 indicates the step of completing the measurement of the polarization elimination voltage. Now, the polarization erase voltage measurement flow of the ferroelectric capacitor will be described in detail.

First, at step 20, a variable N = 1 for changing the write voltage is set as an initial setting.

Next, at step 21, one data is written in the ferroelectric capacitor. As a result, in FIG. 8, the voltage is stopped after applying the positive voltage V1 to shift to the polarization state of P7.

Next, at step 22, the voltage applied to the ferroelectric capacitor is set to a mode in which the voltage can be arbitrarily controlled from the outside.

Next, at step 23, the voltage applied across the ferroelectric capacitor is set. For example, 0.5 × N
= 0.5V.

Next, at step 24, 0 data is written in the ferroelectric capacitor. As a result, in FIG.
When the voltage is stopped after applying 0.5 V, the process moves to P12 via P11.

Next, at step 25, the mode in which the voltage applied to the ferroelectric capacitor can be externally controlled is released.

Next, at step 26, data reading is performed. At this time, in FIG. 8, the ferroelectric capacitor is positively polarized, and 1 is read as the read data.

Next, in step 27, N is increased to 2 and
Steps 21 to 26 are repeated. At this time, the write voltage in step 23 is set to 0.5 × N = 1V, and in step 24, the polarization shifts to P14 via P13 in FIG. P14 is still a positive polarization, and the data 1 is read by step 26.

Further, in step 27, N is increased to 3, and steps 21 to 26 are repeated. At this time, the write voltage in step 23 is 0.5 × N = 1.5V
And the polarization is set to P in FIG. 8 by step 24.
It transfers to P16 via 15. For the first time, the polarization becomes negative and the data 0 is read out in step 26.

When this read data is inverted from 1 to 0, the polarization state after the transition due to the writing in step 24 is located at almost 0. That is, the write voltage of step 24 when the read data of step 26 is inverted from 1 to 0 is the polarization erase voltage Vth. Here, the polarization erase voltage Vth is reduced by minimizing the write voltage increase amount when repeating steps 21 to 26.
The measurement accuracy of can be improved. In this way, the polarization elimination voltage can be obtained with high accuracy.

As described above, the polarization erase voltage of the ferroelectric capacitor can be measured by using the semiconductor memory tester or the like.

In this embodiment, the polarization erasing voltage Vth thus measured is used to carry out the polarization erasing described in the third embodiment. That is, in the inspection method of the present embodiment, first, the polarization erasing voltage Vth is obtained by the polarization erasing voltage measuring method described above. Next, the processing of FIG. 7 is performed, but at this time, the write voltage in step 18 is set to the value of the polarization erase voltage Vth previously obtained.

According to this embodiment, the optimum erase voltage and the polarization erase can be continuously performed for each device. Therefore, it becomes possible to continuously measure the polarization erasing voltage and the polarization erasing using the semiconductor memory tester, and it is possible to easily and easily perform the polarization erasing while suppressing the device variation by the probe inspection.

Next, a description will be given of a more stable measurement method for the polarization erase time measurement in the second embodiment and the polarization erase voltage measurement in the fourth embodiment. This method will be described with reference to the ferroelectric capacitor unsaturated polarization characteristic diagram of FIG. 10 and the ferroelectric capacitor saturation polarization characteristic diagram of FIG.

In the polarization elimination time measuring method according to the second embodiment, the measurement result is different unless the polarization state immediately before starting step 6 in FIG. 4 is constant. When the applied voltage is equal to or higher than a certain voltage V0, the polarization characteristic is the curve (P
17-P18-P19-P20) leads to saturation polarization. However, when the applied voltage is lower than V0, the polarization characteristics move inside the saturation polarization curve, and even if the same applied voltage is applied, the polarization characteristics change in various ways depending on the immediately preceding polarization state.
Therefore, if the polarization state immediately before step 6 is constant, the polarization state after the end of step 6 is constant even if the applied voltage in step 6 is equal to or lower than the saturation polarization voltage.
If the polarization state immediately before step 6 is different, the polarization state after completion of step 6 is different, and a stable erase time cannot be measured.

For example, consider a case where the polarization state immediately before step 6 is different from (a) P21 and (b) P25 in FIG. When Step 6 is performed at a voltage equal to or lower than the saturation polarization voltage, P21-P22-P2 in the case of (a)
In the case of 3 and (b), it moves to P25-P26-P27. Next, after executing step 7, even if the time is set to be the same in step 8, if step 9 is executed, the polarization 0 state of P28 shifts in the case of (b), but P2 in the case of (a).
It shifts to 4 and the polarization is not erased. As described above, when the applied voltage in step 6 is equal to or lower than the saturation polarization voltage, different polarization states are shown after completion of step 6, and the polarization elimination time from the different polarization states is different, so that the erase measurement time becomes unstable. .

Therefore, by setting the applied voltage in step 6 to the saturation polarization voltage V0 as shown in FIG. 11, after the completion of step 6, in both cases (a) and (b), the state shifts to P1 and the polarization state. Is constant. In this way, stable erase time can be measured by making the polarization state constant by saturation polarization.

Although the case of the polarization elimination time measuring method in the second embodiment has been described above, the same applies to the polarization elimination voltage measuring method in the fourth embodiment.
By setting the applied voltage in step 21 of FIG. 9 to the saturation polarization voltage V0, after step 21 is completed, in both cases (a) and (b) described above, the P1 shifts and the polarization state becomes constant. As described above, the erase voltage can be measured stably by making the polarization state constant by saturation polarization.

[0080]

According to the polarization erasing method of the ferroelectric memory of the first aspect of the present invention, the polarization amount of the ferroelectric capacitor can be reduced to 0 by carrying out, for example, after the probe inspection, and the package thereafter. It is possible to prevent imprint deterioration even with high temperature processing in the process.

Further, according to the polarization erasing method of the ferroelectric memory according to the second aspect of the present invention, the polarization erasing time of the ferroelectric capacitor can be easily measured with a semiconductor memory tester or the like, and the polarization erasing time can be measured. By continuously performing the polarization erasing (first and second steps), it becomes possible to easily perform polarization erasing with a semiconductor memory tester or the like while suppressing device variations.

According to the polarization erasing method of the ferroelectric memory of the third aspect of the present invention, the polarization erasing time of the ferroelectric capacitor can be easily measured with a semiconductor memory tester or the like.

According to the polarization erasing method of the ferroelectric memory of the fourth aspect of the present invention, the stable polarization erasing time can be measured without depending on the polarization state immediately before the start of the measurement.

In the polarization erasing method for the ferroelectric memory according to the fifth aspect of the present invention, the polarization amount of the ferroelectric capacitor can be reduced to 0 by carrying out, for example, after the probe inspection, and in the subsequent packaging process. It is possible to prevent imprint deterioration even at high temperature processing.

Further, according to the polarization erasing method of the ferroelectric memory of the sixth aspect of the present invention, the polarization erasing voltage of the ferroelectric capacitor can be easily measured with a semiconductor memory tester or the like, and the polarization erasing voltage measurement can be performed. By continuously performing the polarization erasing (first and second steps), it becomes possible to easily perform polarization erasing with a semiconductor memory tester or the like while suppressing device variations.

According to the polarization erasing method of the ferroelectric memory of the seventh aspect of the present invention, the polarization erasing voltage of the ferroelectric capacitor can be easily measured with a semiconductor memory tester or the like.

According to the polarization erasing method of the ferroelectric memory of the eighth aspect of the present invention, the stable polarization erasing voltage can be measured without depending on the polarization state immediately before the start of the measurement.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of a ferroelectric capacitor polarization erasing method according to a first embodiment of the present invention.

FIG. 2 is a flowchart of a ferroelectric capacitor polarization erasing method according to the first embodiment of the present invention.

FIG. 3 is an explanatory diagram of a ferroelectric capacitor polarization elimination time measuring method according to a second embodiment of the present invention.

FIG. 4 is a flowchart of a ferroelectric capacitor polarization elimination time measuring method according to the second embodiment of the present invention.

FIG. 5 is a flowchart of a ferroelectric capacitor polarization erasing method according to a second embodiment of the present invention.

FIG. 6 is an explanatory diagram of a ferroelectric capacitor polarization erasing method according to a third embodiment of the present invention.

FIG. 7 is a flowchart of a ferroelectric capacitor polarization erasing method according to a third embodiment of the present invention.

FIG. 8 is an explanatory diagram of a ferroelectric capacitor polarization erase voltage measuring method according to a fourth embodiment of the present invention.

FIG. 9 is a flowchart of a ferroelectric capacitor polarization erasing voltage measuring method according to a fourth embodiment of the present invention.

FIG. 10 is an unsaturated polarization characteristic diagram of a ferroelectric capacitor used in the description of the embodiment of the present invention.

FIG. 11 is a saturation polarization characteristic diagram of a ferroelectric capacitor used in the description of the embodiment of the present invention.

FIG. 12 is an explanatory diagram of a cooling method for a conventional ferroelectric capacitor.

[Explanation of symbols]

1 Writing 1 data to the ferroelectric capacitor Step 2 Setting time T1 applied to the ferroelectric capacitor to a mode that can be controlled externally arbitrarily Step 3 Time T1 applying voltage across the ferroelectric capacitor
Is set to the polarization elimination time Tth Step 4 Writing 0 data to the ferroelectric capacitor Step 5 Setting the initial value of N to 1 Step 6 Writing 1 data to the ferroelectric capacitor Step 7 Applying to the ferroelectric capacitor Step 8: Set time T1 to a mode in which external control is possible arbitrarily Step 8 Time T1 to apply voltage across the ferroelectric capacitor
Is set to 2 × N (ns) Step 9 Writing 0 data to the ferroelectric capacitor Step 10 Releasing the mode in which the time applied to the ferroelectric capacitor can be arbitrarily controlled from the outside Step 11 Polarization of the ferroelectric capacitor Read determination is performed by using the amount as the potential of the data line Step 12 The value of N is increased by 1 Step 13 The measurement of the polarization elimination time is completed Step 14 The polarization elimination time measurement process 15 The polarization elimination process Step 16 The ferroelectric capacitor Step 17 of writing 1 data to step 18 of setting voltage V1 applied to the ferroelectric capacitor in a mode in which it can be arbitrarily controlled from the outside step 18 step of setting voltage T1 applied to both ends of the ferroelectric capacitor to polarization elimination voltage Vth 19 Writing 0 data to the ferroelectric capacitor Step 20 N Step 21 to set the period value to 1 Step 22 to write 1 data to the ferroelectric capacitor Step 22 Set to a mode in which the applied voltage V1 to the ferroelectric capacitor can be arbitrarily controlled from the outside Step 23 At both ends of the ferroelectric capacitor Step 24 for setting the applied voltage V1 to 0.5 × N (V) Step 24: Writing 0 data to the ferroelectric capacitor Step 25: Canceling the mode in which the voltage applied to the ferroelectric capacitor can be arbitrarily controlled from outside Step 26 Read determination is performed by using the polarization amount of the ferroelectric capacitor as the potential of the data line. Step 27 Increase the value of N by 1. Step 28. Complete the measurement of the polarization erase voltage.

Claims (8)

[Claims] 1. A polarization erasing method for a ferroelectric memory, comprising a plurality of memory cells, wherein predetermined data is stored by applying a voltage to a ferroelectric capacitor provided in each of the memory cells to polarize the ferroelectric capacitors. And applying a predetermined voltage to both ends of the ferroelectric capacitor to polarize it and applying a positive and negative reverse voltage to the predetermined voltage of the first step to the ferroelectric capacitor. And a second step, wherein the application time in the second step is a time to set the polarization amount of the ferroelectric capacitor to 0, the polarization erasing method of the ferroelectric memory. 2. A polarization step of applying a predetermined voltage to both ends of the ferroelectric capacitor for polarization, a reverse voltage applying step of applying a positive / negative reverse voltage to the polarization step for a predetermined time, and the ferroelectric material. And a data reading step for reading the amount of polarization of the capacitor as the potential of the data line to judge the data value, the polarization step while changing the application time in the reverse voltage applying step,
By repeating the reverse voltage applying step and the data reading step in this order, the application time in the reverse voltage applying step when the data value read in the data reading step is inverted is obtained, and this application time is calculated in the ferroelectric substance in the second step. 2. The polarization erasing method for a ferroelectric memory according to claim 1, wherein the first step and the second step are performed as a time for setting the polarization amount of the capacitor to zero. 3. A polarization erasing method for a ferroelectric memory, comprising a plurality of memory cells, wherein predetermined data is stored by applying a voltage to a ferroelectric capacitor provided in each of the memory cells to cause polarization. Wherein a polarization step of applying a predetermined voltage across both ends of the ferroelectric capacitor to polarize it, a reverse voltage applying step of applying a positive / negative reverse voltage for a predetermined period of time to the polarization step, and the ferroelectric capacitor Data reading step for reading the amount of polarization as the potential of the data line to determine the data value, and changing the application time in the reverse voltage applying step, the polarization step, the reverse voltage applying step, and the data reading step. The reverse voltage application step when the data value read in the data read step is inverted is repeated. Ferroelectric polarization erase method of a memory and obtaining the application time in-up. 4. The applied voltage in the polarization step is
4. A polarization erasing method for a ferroelectric memory according to claim 2, wherein the voltage is a voltage for saturation polarization of the ferroelectric capacitor. 5. A polarization erasing method for a ferroelectric memory, comprising a plurality of memory cells, wherein predetermined data is stored by applying a voltage to a ferroelectric capacitor provided in each of the memory cells to polarize the ferroelectric capacitors. And applying a predetermined voltage to both ends of the ferroelectric capacitor to polarize it and applying a positive and negative reverse voltage to the predetermined voltage of the first step to the ferroelectric capacitor. And a second step, wherein the applied voltage in the second step is a voltage that makes the polarization amount of the ferroelectric capacitor 0, the polarization erasing method of the ferroelectric memory. 6. A polarization step of applying a predetermined voltage across both ends of the ferroelectric capacitor to polarize it, a reverse voltage applying step of applying a positive / negative reverse voltage for a predetermined time to the polarization step, and the ferroelectric material. And a data reading step for reading the amount of polarization of the capacitor as the potential of the data line to determine the data value, the polarization step while changing the applied voltage in the reverse voltage applying step,
The reverse voltage applying step and the data reading step are repeated in this order to obtain the applied voltage in the reverse voltage applying step when the data value read in the data reading step is inverted, and this applied voltage is used as the ferroelectric substance in the second step. 6. The polarization erasing method for a ferroelectric memory according to claim 5, wherein the first step and the second step are performed with a voltage that sets the polarization amount of the capacitor to zero. 7. A polarization erasing method for a ferroelectric memory, comprising a plurality of memory cells, wherein predetermined data is stored by applying a voltage to a ferroelectric capacitor provided in each of the memory cells to polarize the same. Wherein a polarization step of applying a predetermined voltage across both ends of the ferroelectric capacitor to polarize it, a reverse voltage applying step of applying a positive / negative reverse voltage for a predetermined period of time to the polarization step, and the ferroelectric capacitor And a data reading step of determining the data value by reading the amount of polarization as the potential of the data line, the polarization step, the reverse voltage applying step, and the data reading step of changing the applied voltage in the reverse voltage applying step. The reverse voltage application step when the data value read in the data read step is inverted is repeated. Ferroelectric polarization erase method of a memory and obtaining the applied voltage in-up. 8. The applied voltage in the polarization step is
8. The polarization erasing method for a ferroelectric memory according to claim 6, wherein the voltage is a voltage for saturation polarization of the ferroelectric capacitor.