JP2002370362A - Recording head, head cartridge having the recording head, recorder using the recording head, and recording head element substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a recording head which can deal with high speed data transfer even when the power supply voltage is lowered. SOLUTION: In a recording head comprising a plurality of recording elements arranged in a specified direction and a drive circuit for the recording elements provided on the same element substrate, a clock generating circuit 106 generates a clock signal CLK2 having a frequency equal to two times that of an inputted clock signal CLK and a clock signal CLK1 obtained by delaying the CLK2, a selector 108 selects any one of the first or second signal depending on the state of a data signal DATA inputted in serial, and a shift register 103 stores data inputted by the data signal DATA sequentially according to a selected signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a recording head, a head cartridge having the recording head, a recording apparatus using the recording head, and a recording head element substrate, and more particularly, to a plurality of recording elements and the recording element. The present invention relates to a recording head in which a driving circuit for driving is provided on the same element substrate, a head cartridge having the recording head, a recording apparatus using the recording head, and a recording head element substrate.

[0002]

2. Description of the Related Art For example, as an information output device in a word processor, a personal computer, a facsimile, or the like, a recording device for recording desired information such as characters and images on a sheet-like recording medium such as a sheet of paper or a film. The serial recording method of performing recording while performing reciprocal scanning in a direction perpendicular to the feeding direction of the recording medium is generally widely used because it is inexpensive and easy to miniaturize.

A configuration of a recording head used in such a recording apparatus will be described with reference to an example of a recording head according to an ink-jet system that performs recording using thermal energy. Such an ink jet recording head is provided with a heating element (heater) at a portion communicating with an ejection port (nozzle) for ejecting ink droplets as a recording element, and applying a current to the heating element to generate heat. Recording is performed by discharging droplets. In such a recording head, it is easy to arrange a large number of ejection ports and heating elements (heaters) at a high density, thereby obtaining a high-definition recording image.

In such a recording head, if all the heating elements are driven simultaneously in order to discharge ink droplets from all the discharge ports, the current flowing instantaneously becomes large. Hundreds of heating elements are divided into a plurality of blocks and time-divisionally driven for each block, so that the current flowing instantaneously can be kept low.

In driving a large number of heating elements, a driving circuit for the heating elements is incorporated in the recording head so that the number of wirings between the recording head and the recording apparatus does not increase. In this case, the drive circuit is formed by a semiconductor manufacturing process on a substrate (element substrate, hereinafter also referred to as a heater board) such as a Si (silicon) wafer, which is the same as the heating element.

There are various configurations of the driving circuit, and a typical configuration will be described below.

Each heating element is controlled by a block control signal indicating a block number of each heating element and a recording signal corresponding to the block control signal. The block control signal is obtained by encoding the block number into binary data. The value obtained by dividing the total number of heating elements by the total number of blocks is the number of heating elements that can be driven simultaneously, and is the number of bits of the recording signal.

The drive circuit has a gate having the same number of bits as the number of heating elements and a drive transistor, and is provided with shift registers and latch circuits for the number of bits of the recording signal and the block control signal. A single piece of serial data is serially transferred from the printing apparatus to the shift register, and the shift register is latched. The decoding result of the latched block control signal, the latched recording signal, and the drive given for each block The driving transistor specified by the signal is driven via the gate. The structure of the driving transistor may be any of a bipolar transistor and an FET such as a MOS.

The configuration of a part for transferring a serial signal input to such a drive circuit to a shift register is as follows.
In order to transfer serial data at high speed, a device having a Schmitt trigger circuit having hysteresis characteristics and two 4-bit shift registers corresponding to each of them is used so as to capture data at the rising and falling edges of a clock. I have.

FIG. 10 shows a hysteresis characteristic with respect to a logic input provided between each input PAD of a printhead circuit board and an internal logic circuit, which is known from Japanese Patent Application Laid-Open No. 08-039809. FIG. 3 is a diagram for explaining a configuration and operation characteristics of a Schmitt circuit. The configuration of this circuit is as shown in FIG.
MOS inverter 1000 having a threshold of 0.7 times the power supply voltage VDD, MOS inverter 1001 having a threshold of 0.3 times VDD, a normal inverter 1002 having a threshold of 0.5 times VDD, and a flip-flop It comprises two NAND circuits 1003 and 1004 that operate as a loop.

The input / output characteristic of this circuit is such that, when a signal indicated by reference numeral 1010 is input, as shown in FIG.
The flip-flop constituted by the ND circuits 1003 and 1104 is first reset, and the output signal 1011 becomes low level. And the input signal 1010 is 0.7 × VD
When the voltage exceeds D, the output of the inverter 1000 goes low, the output of the NAND circuit 1103 goes high, and the output signal 1011 goes high. Next, when the potential of the input signal 1010 falls, the output of the inverter 1001 is inverted to a high level when the potential becomes equal to or lower than 0.3 × VDD, and the output of the NAND circuit 1004 Is inverted to a high level, whereby the output signal 1011 becomes a low level.

[0012]

By the way, a parallel interface has been generally used as a conventional printer interface. In that case, 5 V is used as a logic power supply of the printer body, and the 5 V is also used as a logic power supply in the inkjet recording head substrate in the head. The fact that some of the ICs in the internal circuit of the printer required a power supply of 5 V is also the background of the features of the ink jet recording head substrate which has been developed with a logic voltage of 5 V.

However, in recent years, the improvement of the IC design rule miniaturization technology and the adoption of a new interface have been added.
Preparing V has been disadvantageous in terms of cost and size. Therefore, recently, there has been a movement to adopt 3.3 V as a mainstream of the logic power supply voltage of the printer body. However, it has been confirmed that some problems occur when the logic power supply voltage of the head substrate, which has been used in the past, is reduced from 5 V to 3.3 V. This problem will be described below with reference to the drawings.

A description will be given of one of the problems, that is, a reduction in the image data transfer capability of the substrate in the ink jet recording head.

FIG. 12 shows an example of the configuration inside the substrate for an ink jet recording head. In the figure, reference numeral 1003 denotes a pad for receiving a signal from the outside. The pad 1003 includes a VDD terminal 1006 for receiving a logic power supply voltage, a VH terminal 1008 for receiving a heater drive power supply voltage, a GWDH terminal 1005 connected to the ground, a CSS terminal 1007, and the like. Have. Also, a logic circuit 100 such as a shift register which receives image data serially and outputs the image data in parallel.
2. A driver 1001 for driving a heater, a heater 1004, and the like are formed on one silicon substrate.

FIG. 13 shows the case where a 620-bit heater is formed in more detail. Here, a heater of 620 bits is driven at a maximum of 40 bits at the same time, and by repeating this 16 times, all heaters of 620 bits are driven (for one cycle). FIG. 14 shows the timing. Here, how fast the image data needs to be sent when driving all 620 bits at a drive frequency of 15 kHz (also used for existing products) required for performing a constant high-speed recording will be described.

15 kHz has a period of 66.67 μS. During this time, 40-bit image data must be transferred for 16 time divisions (blocks). When this is calculated, the transfer speed of the image data is required to be at least 12 MHz or more. Although this speed is not a large value when considered from a general CPU, etc., in the case of an ink jet recording head, if the operating carriage and the main body are connected by a long flexible substrate, etc., a friend will reduce the size of the carriage by reducing the size of the printer. There are also needs that need to be
The number 12 MHz was not a small value.

Under such circumstances, a decrease in transfer capability when the logic power supply voltage is reduced from 5 V to 3.3 V will be described with reference to FIG. FIG. 15A describes the voltage of the logic signal (power supply) and the maximum CLK frequency at which image data can be transferred.

As shown in the figure, the CLK frequency tends to decrease as the logic signal (power supply) voltage decreases.
This is because the driving capability of the MOS transistor used for the input circuit unit such as CLK for performing image data transfer and the shift register unit is simultaneously reduced due to the reduction of the logic power supply voltage used directly as the CMOS gate voltage. By doing. According to the figure, it can be seen that the driving capability (drain current Id) decreases due to the decrease in the gate voltage.

Further, in the case of an ink jet recording head substrate, it is necessary to drive the heater on the substrate to satisfy the speed in terms of temperature.
This is the ability characteristically required of an ink jet recording head substrate for discharging ink by a heater.
FIG. 15B shows the relationship between the substrate temperature and the CLK maximum frequency. Here, it is shown that the capacity is reduced when the voltage is changed to 3.3 V, and that the capacity tends to be further reduced as the temperature increases.

From the above, it has been found that there has been no problem with the CLK frequency of 12 MHz at 5 V so far, but the capability must be increased by 3.3 V.

In particular, if the voltage is simply reduced in the driving circuit configuration as described above, the following problem occurs.

When the logic circuit is operated at a low voltage, the amount of delay of the gate element increases, so that it becomes difficult to correctly take in the clock and data serially transferred from the printer to the printhead at high speed. For this reason, the data transfer speed cannot be increased, so that the time required for serial data transfer is inevitably increased, and this transfer time becomes a bottleneck, making it difficult to reduce the entire recording time.

Further, when the input signal is configured to pass through a Schmitt trigger circuit having a hysteresis characteristic,
A path (inverter 1000) for detecting that the input signal has changed from low level to high level, and a path (inverter 1) for detecting that the input signal has changed from high level to low level.
Since the number of stages of the inverter circuits 001 and 1002) is different, the delay due to the difference in the number of stages is added to the gate delay due to the lower voltage. At this time, in the clock and data serially transferred from the printer body to the printhead, the relationship between the setup and the hold time with respect to the clock edge, which was properly maintained until input to the printhead, collapsed in the printhead. In some cases, data cannot be taken in correctly.

Furthermore, in a configuration in which data is taken in at edges having a phase relationship opposite to each other between the rising edge and the falling edge of the clock, substantially two clocks are arranged in the drive circuit. Must be adjusted for each of these two systems of clocks, making synchronous design difficult. Also in this case, the data transfer speed cannot be increased, so that the time required for transferring the serial data is inevitably increased, and this transfer time becomes a bottleneck, making it difficult to shorten the entire recording time.

Since the heater board on which the drive circuit and the like are formed is a part of the recording head which is a consumable part, it is commonly used in many printers. It was studied from the aspect of the process. Therefore, when a new component is added due to the lowering of the power supply voltage, it is necessary to carefully consider not to increase the number of manufacturing steps and to maintain the overall balance.

In recent years, the demand for higher printing speed and higher printing resolution for printers has been increasing, and it has been desired to further speed up data transfer even when the power supply voltage is lowered. .

SUMMARY OF THE INVENTION The present invention has been made in view of the above situation, and has a recording head and a recording head capable of responding to a high-speed data transfer even when the power supply voltage is lowered. It is an object to provide a head cartridge having the same, a recording apparatus using the recording head, and a recording head element substrate.

[0029]

According to an aspect of the present invention, there is provided a recording head including a plurality of recording elements arranged in a predetermined direction and a driving circuit for driving the recording elements. A recording head provided on the same element base, wherein a clock for generating a first signal having a frequency twice as high as an input clock signal and a second signal obtained by delaying the first signal A generation circuit, a selection circuit that selects one of the first and second signals in accordance with a state of the data signal input serially, and an input of the data signal according to the signal selected by the selection circuit. And a shift register for sequentially storing data to be stored.

That is, according to the present invention, in a recording head in which a plurality of recording elements arranged in a predetermined direction and a driving circuit for driving the recording elements are provided on the same element substrate, an input clock signal A first signal having a frequency twice as high as the first signal and a second signal obtained by delaying the first signal are generated, and according to the state of the serially input data signal,
One of the first and second signals is selected, and data input as a data signal is sequentially stored in the shift register according to the selected signal.

In this way, even when the relationship between the setup and the hold time is broken due to the lowering of the power supply voltage, the internal state is changed according to the state of the data signal, for example, whether it is currently at the high level or the low level. The first generated by
And the second signal can be selected, and data can be correctly taken into the shift register by the selected clock signal.

Therefore, even when the power supply voltage is lowered, it is possible to cope with the high-speed data transfer.

[0033]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings.

In the embodiment described below, a printer is described as an example of a recording apparatus using an ink jet recording method.

In this specification, "recording" (sometimes referred to as "printing") refers not only to the formation of significant information such as characters and figures, but also to the perception of humans irrespective of significance. Regardless of whether or not the image has been exposed so as to be able to perform the process, the case where an image, a pattern, a pattern, or the like is widely formed on a recording medium or a case where the medium is processed is also described.

The "recording medium" is not limited to paper used in general recording apparatuses, but is widely applicable to ink, such as cloth, plastic films, metal plates, glass, ceramics, wood, and leather. Things are also represented.

Further, “ink” (sometimes referred to as “liquid”) is to be interpreted as widely as the definition of “recording (printing)”, and by being applied on a recording medium, A liquid that can be used for forming an image, a pattern, a pattern, or the like, processing a recording medium, or processing ink (for example, coagulating or insolubilizing a colorant in ink applied to the recording medium) is used.

The term "element substrate" used below does not indicate a mere substrate made of a silicon semiconductor, but a substrate provided with each element, wiring, and the like.

Further, the expression "on the element substrate" used in the following description indicates not only the upper side of the element substrate but also the surface of the element substrate and the inside of the element substrate near the surface. The term "built-in" as used in the present invention is not a term indicating that each element is simply disposed on a substrate, but is a step of manufacturing a semiconductor circuit. This indicates that the device is integrally formed and manufactured on an element substrate by, for example, the method described above.

First, a typical overall configuration and a control configuration of a recording apparatus using the recording head of the present invention described below will be described.

<Schematic Description of Apparatus Main Body> FIG. 1 is an external perspective view showing an outline of a configuration of an ink jet printer IJRA which is a typical embodiment using a recording head of the present invention. In FIG. 1, a carriage HC that engages with a spiral groove 5004 of a lead screw 5005 that rotates via driving force transmission gears 5009 to 5011 in conjunction with forward and reverse rotation of a drive motor 5013 has pins (not shown). Then, it is supported by the guide rail 5003 and reciprocates in the directions of arrows a and b. The print head IJ is provided on the carriage HC.
An integrated ink-jet cartridge IJC incorporating H and an ink tank IT is mounted.

Reference numeral 5002 denotes a paper holding plate,
The recording paper P is pressed against the platen 5000 over the moving direction of C. Reference numerals 5007 and 5008 denote photocouplers, which are home position detectors for confirming the presence of the carriage lever 5006 in this region and switching the rotation direction of the motor 5013.

Reference numeral 5016 denotes a member for supporting a cap member 5022 for capping the front surface of the recording head IJH.
Reference numeral 15 denotes a suction device that suctions the inside of the cap, and performs suction recovery of the recording head through the opening 5023 in the cap. 5
Reference numeral 017 denotes a cleaning blade. Reference numeral 5019 denotes a member which allows the blade to move in the front-rear direction. These members are supported by a main body support plate 5018. It goes without saying that the blade is not limited to this form, and a well-known cleaning blade can be applied to this embodiment.

Reference numeral 5021 denotes a lever for starting suction for recovery from suction, and a cam 5020 which engages with the carriage.
The driving force from the driving motor is controlled by a known transmission mechanism such as clutch switching.

The capping, cleaning, and suction recovery are configured so that desired operations can be performed at the corresponding positions by the action of the lead screw 5005 when the carriage comes to the area on the home position side. If a desired operation is performed at the timing, any of the embodiments can be applied.

<Description of Control Structure> Next, a control structure for executing the recording control of the above-described apparatus will be described.

FIG. 2 is a block diagram showing a configuration of a control circuit of the ink jet printer IJRA. In the figure showing a control circuit, 1700 is an interface for inputting a recording signal, 1701 is an MPU, 1702 is an MPU 17
ROM for storing a control program executed by 01, 17
Numeral 03 denotes a DRAM for storing various data (such as the recording signal and recording data supplied to the head). 170
Reference numeral 4 denotes a gate array (GA) that controls supply of print data to the print head IJH, and also controls data transfer between the interface 1700, the MPU 1701, and the RAM 1703. Reference numeral 1710 denotes a carrier motor for transporting the recording head IJH, and reference numeral 1709 denotes a transport motor for transporting the recording paper. Reference numeral 1705 denotes a head driver for driving the recording head, and reference numerals 1706 and 1707 denote motor drivers for driving the transport motor 1709 and the carrier motor 1710, respectively.

The operation of the above control configuration will be described. When a recording signal is input to the interface 1700, the gate array 1
The recording signal is converted into recording data for printing between the 704 and the MPU 1701. And the motor driver 1
The printheads 706 and 1707 are driven, and the printhead is driven according to the print data sent to the head driver 1705 to perform printing.

Although the control program executed by the MPU 1701 is stored in the ROM 1702 here,
An erasable / writable storage medium such as an EEPROM may be further added so that the host computer connected to the inkjet printer IJRA can change the control program.

As described above, the ink tank IT and the recording head IJH may be integrally formed to constitute a replaceable ink cartridge IJC. However, the ink tank IT and the recording head IJH are separated. It may be configured so that only the ink tank IT can be replaced when the ink runs out.

<Ink Cartridge> FIG. 11 shows an ink cartridge IJ in which an ink tank and a head are separable.
It is an external appearance perspective view which shows the structure of C. In the ink cartridge IJC, as shown in FIG. 11, the ink tank IT and the recording head IJH can be separated at the position of the boundary line K.
When the ink cartridge IJC is mounted on the carriage HC, the ink cartridge IJC is provided with an electrode (not shown) for receiving an electric signal supplied from the carriage HC side. Is driven to eject ink.

In FIG. 11, reference numeral 500 denotes an ink ejection port array. The ink tank IT is provided with a fibrous or porous ink absorber for holding ink.

<Printing Head> Hereinafter, an embodiment of the printing head of the ink jet printer having the above-described configuration will be described focusing on the configuration of a driving circuit formed on a substrate (on a heater board). In each of the embodiments described below, there are 64 recording elements, and each of these recording elements is divided into 16 blocks (division number N: 16), and one by one from each block. The printing elements (four printing elements) are driven simultaneously (the number of simultaneously driven printing elements M: 4).
The recording head having the configuration will be described as an example.

A member (not shown) for forming an ink ejection port and a flow path communicating with the ink ejection port is provided on the substrate corresponding to each recording element, thereby forming a recording head. are doing.

By heating the ink supplied to the recording element by driving the recording element, bubbles are generated by film boiling, and the ink is discharged from the discharge port.

FIG. 3 is a block diagram showing the configuration of a drive circuit of a recording head according to an embodiment of the present invention. The drive circuit according to the present embodiment includes the print signals D1 to D4 supplied to the printhead.
And an input unit (a) for outputting block control signals B1 to B4 via a shift register, and a drive unit (b) for driving each recording element.

The input section shown in FIG. 3A includes Schmitt trigger input circuits 102 and 105, a clock generation circuit 106, a selector 108, and an 8-bit shift register 10.
3, and receives print data DATA and a clock CLK supplied from the printer, which are constituted by print signals D1 to D4 and block control signals B1 to B4. The recording data DATA is input to the Schmitt trigger input circuit 102 and output as DATAI. The clock signal CLK is input to the Schmitt trigger input circuit 105 and output as CLKI.

The clock generation circuit 106 generates a clock CLK1 for capturing the HIGH level state of DATAI.
CLK2 for capturing the LOW level state
Is generated from CLKI. The selector 108 has a DATA
CLK1 and CL depending on the HIGH / LOW level state of I
K2 is switched and output as CLKO. The 8-bit shift register 103 serially stores DATAI according to CLKO output from the selector 108.

The drive section shown in FIG. 3B includes 4-bit latch circuits 104 and 109 and AND circuits 107 and 4-
16 decoder 110, AND circuits A1 to A64, power transistors T1 to T64, and heating elements H1 to H64
Consists of

The 4-bit latch circuit 104 latches the 4-bit recording signals DB0 to DB3 stored in the 8-bit shift register 103 in accordance with the latch signal LATCH supplied from the printer.
Latches the 4-bit block control data DB4 to DB7 stored in the 8-bit shift register 103 according to the latch signal LATCH supplied from the printer. AND circuit 107107 has an enable signal ENB
And a logical product of the 4-bit data latched by the 4-bit latch circuit 104 and each bit of the 4-bit data. The 4-16 decoder 110 decodes the block control signals B1 to B4 supplied from the printer and decodes the block control signals B1 to N4.
Generate 16.

The AND circuits A1 to A64 output the enable signal ENB input from the printer, the logical product outputs DE0 to DE4 of the 4-bit latch circuit outputs DB0 to DB3,
The logical AND with the block selection signals N1 to N16 output from the -16 decoder 110 is calculated. This AND circuit 1
The output from 07 determines the drive timing and pulse width of the heating element. The enable signal ENB is
It operates by negative logic. That is, the heating element can be driven when the enable signal ENB is "low".

According to the configuration shown in FIG. 3, the power supply voltage (V
H) and six signal lines (record data DATA, clock CL) including a ground voltage (GNDH) signal line.
K, enable signal ENB, latch signal LATCH, power supply voltage (VH), and ground voltage (GNDH)
Book by book) exists with the printer.

The recording data DATA and the clock C
The state of each signal of LK, enable signal ENB, and latch signal LATCH is shown in the timing chart of FIG. According to this timing chart, the operation is performed even when the timing for serially transferring the recording data DATA to the 8-bit shift register 103 and the timing for driving the heating element overlap. Since the transfer timing and the drive timing can be overlapped in time, the transfer timing interval and the drive timing interval can be reduced, and the recording speed of the printer can be improved.

FIG. 5 is a timing chart showing the states of the CLK and DATA signals input from the printer and the signals generated until they are input to the 8-bit latch circuit 103 shown in FIG. is there.

The Schmitt trigger circuit 102 of the present embodiment
And the input / output characteristics of the input / output 105 are as follows:
The output response time when transitioning to GH changes from HIGH to LO
The output response time at the time of transition to W is shorter. Therefore, HI of CLK and CLKI and DATA and DATAI
Compared with the GH section, CLKI and DATAI are temporally longer and the LOW section is shorter.

CLK2 is a differential waveform of CLKI, and has a frequency twice that of CLKI. CLK1 is generated by delaying CLK2. The selector 108 selects one of the signals according to the state of DATAI and outputs the signal as CLKO. Specifically, when DATAI is LOW, the signal changes to HIGH next, so that CLK2 is selected. When DATAI is HIGH, the signal changes to LOW next, so CLK1 is selected. Then, DATA is raised by the rising edge of CLKO.
I is taken into the 8-bit shift register 103. In this way, when the state change of DATAI is slow, the setup and hold time are secured by capturing with a slow clock CLK1, and conversely, when the state change of DATAI is fast, it is captured with an early clock CLK2. Secure hold time.

FIG. 6 shows a specific configuration example of the circuit shown in FIG. The clock generation circuit 106 in FIG. 3A includes an XOR 602, an inverter 601 and a delay circuit 603. The selector 108 selects A
An ND-OR circuit 604 is provided.

FIG. 7 is a timing chart showing the states of the CLK and DATA signals input from the printer and the signals generated before being input to the 8-bit latch circuit 103 shown in FIG. CLKI ′ in FIG.
This is the signal after the LKI has passed through the inverter 601.
Other functions and timings of the signals are the same as those in the timing chart shown in FIG.

FIG. 8 shows another embodiment of the clock generation circuit 106 shown in FIG. 3, and FIG. 9 shows a timing chart thereof. CLKI 805 is input to PLL 801 and CLK2
−806 is output, and CLK2-806 is changed to DFF802.
Divides by 2 and CLK3-80 of the DFF802 output
4 is fed back to the PLL 801 and CLK80
5, the phase of CLK2-806 and CLKI of 2
The multiplied clock is output. CLK1 which is a clock delayed from CLK2 is generated using the delay element 803.

As described above, according to the present embodiment,
In a recording head configured to capture serially input data at both the rising and falling timings of the supplied clock, even if the relationship between the setup and hold time is broken due to the lower power supply voltage, the data signal One of the internally generated clock signals can be selected in accordance with the state (whether it rises or falls next), and data can be correctly captured by the selected clock signal.

Therefore, even when the power supply voltage is lowered, data can be accurately taken in in response to both rising and falling edges of the clock, and the data transfer speed can be further improved. Becomes

[Other Embodiments] In the above embodiment, the output response time when the input signal transitions from LOW to HIGH is shorter than the output response time when the input signal transitions from HIGH to LOW. Is shown,
Conversely, when the response time when the input signal transitions from LOW to HIGH is long, CLKO output from the selector 108 is used as CLO when DATAI is LOW.
Needless to say, it is configured to select CLK2 at the time of KI or HIGH.

The above-described embodiment is particularly provided with a means (for example, an electrothermal converter) for generating thermal energy as energy used for ejecting ink even in an ink jet recording system. By using a method that causes a change in the state, it is possible to achieve higher density and higher definition of recording.

The typical configuration and principle are described in, for example, US Pat. Nos. 4,723,129 and 4,740.
It is preferable to use the basic principle disclosed in the specification of Japanese Patent No. 796. This method can be applied to both the so-called on-demand type and continuous type. In particular, in the case of the on-demand type, liquid (ink)
By applying at least one drive signal corresponding to the recorded information and providing a rapid temperature rise exceeding the nucleate boiling to the electrothermal transducer arranged corresponding to the sheet or the liquid path in which Since thermal energy is generated in the electrothermal transducer and film boiling occurs on the heat-acting surface of the recording head, bubbles in the liquid (ink) corresponding to this drive signal on a one-to-one basis can be formed. It is valid.

By discharging the liquid (ink) through the discharge opening by the growth and contraction of the bubble, at least one droplet is formed. When the drive signal is formed into a pulse shape, the growth and shrinkage of the bubble are performed immediately and appropriately, so that the ejection of a liquid (ink) having particularly excellent responsiveness can be achieved, which is more preferable.

As the pulse-shaped drive signal, those described in US Pat. Nos. 4,463,359 and 4,345,262 are suitable. Further, if the conditions described in US Pat. No. 4,313,124 relating to the temperature rise rate of the heat acting surface are adopted, more excellent recording can be performed.

As the configuration of the recording head, in addition to the combination configuration (a linear liquid flow path or a right-angled liquid flow path) of a discharge port, a liquid path, and an electrothermal converter as disclosed in the above-mentioned respective specifications, The configurations described in U.S. Pat. No. 4,558,333 and U.S. Pat. No. 4,459,600, which disclose a configuration in which the heat acting surface is arranged in a bending region, are also included in the present invention. In addition, Japanese Unexamined Patent Publication No. 59-123670 discloses a configuration in which a common slot is used as a discharge section of an electrothermal transducer for a plurality of electrothermal transducers, and an opening for absorbing a pressure wave of thermal energy is discharged. A configuration based on JP-A-59-138461, which discloses a configuration corresponding to each unit, may be adopted.

Further, as a full-line type recording head having a length corresponding to the width of the maximum recording medium that can be recorded by the recording apparatus, the length is determined by a combination of a plurality of recording heads as disclosed in the above specification. This may be either a configuration satisfying the above requirements or a configuration as a single recording head formed integrally.

In addition to the cartridge type recording head in which the ink tank is provided integrally with the recording head itself described in the above-described embodiment, the recording head is electrically connected to the apparatus main body by being mounted on the apparatus main body. A replaceable chip-type recording head, which enables a simple connection and supply of ink from the apparatus main body, may be used.

It is preferable to add recovery means for the printhead, preliminary auxiliary means, and the like to the configuration of the printing apparatus described above, since the printing operation can be further stabilized. Specific examples thereof include capping means for the recording head, cleaning means, pressurizing or suction means, preheating means using an electrothermal transducer or another heating element or a combination thereof. It is also effective to provide a preliminary ejection mode for performing ejection that is different from printing, in order to perform stable printing.

Further, the recording mode of the recording apparatus is not limited to the recording mode of only the mainstream color such as black, but may be a single recording head or a combination of plural recording heads. Alternatively, the apparatus may be provided with at least one of full colors by color mixture.

In the embodiments described above, the description is made on the assumption that the ink is a liquid. However, even if the ink solidifies at room temperature or lower, it is possible to use an ink that softens or liquefies at room temperature. Or, in the ink jet method, it is common to control the temperature of the ink itself in a range of 30 ° C. or more and 70 ° C. or less so that the viscosity of the ink is in a stable ejection range.
It is sufficient that the ink is in a liquid state when the use recording signal is applied.

In addition, in order to positively prevent the temperature rise due to thermal energy as energy for changing the state of the ink from the solid state to the liquid state, the temperature is positively prevented.
Alternatively, in order to prevent evaporation of the ink, an ink which solidifies in a standing state and liquefies by heating may be used. In any case, the application of heat energy causes the ink to be liquefied by application of the heat energy according to the recording signal and the liquid ink to be ejected, or to start to solidify when reaching the recording medium. The present invention is also applicable to a case where an ink having a property of liquefying for the first time is used.

In addition to the above, the recording apparatus according to the present invention is not only provided as an image output terminal of an information processing apparatus such as a computer, but also integrally or separately, a copying apparatus combined with a reader or the like, and a transmission / reception apparatus. It may take the form of a facsimile machine having functions.

The present invention can be applied to a system composed of a plurality of devices (for example, a host computer, an interface device, a reader, a printer, etc.), but can be applied to a single device (for example, a copying machine, a facsimile machine). Etc.).

[0086]

As described above, according to the present invention, even when the relationship between the setup and the hold time is broken due to the lowering of the power supply voltage, the state of the data signal, for example, whether it is currently at the high level or at the low level. In this case, one of the first and second signals generated internally can be selected according to, and the data can be correctly taken into the shift register by the selected clock signal.

Therefore, even when the power supply voltage is lowered, it is possible to cope with a high-speed data transfer.

Furthermore, by using two types of clocks, the clock frequency is not uniform, the radiation energy is dispersed, and the effect of reducing unnecessary radiation has been made possible.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating an appearance of a printer according to a preferred embodiment of the present invention.

FIG. 2 is a block diagram illustrating a control configuration of the printer of FIG.

FIG. 3 is a circuit diagram showing a configuration of a drive circuit according to the embodiment of the recording head.

FIG. 4 is a timing chart showing a state of a signal supplied to the recording head having the configuration shown in FIG.

FIG. 5 is a timing chart showing the state of each signal shown in FIG.

FIG. 6 is a circuit diagram showing a specific configuration of the circuit shown in FIG.

FIG. 7 is a timing chart showing the state of each signal shown in FIG.

FIG. 8 is a block diagram showing a configuration of a clock generation circuit having the configuration shown in FIG. 3;

9 is a timing chart of the configuration of the clock generation circuit 106 having the configuration shown in FIG.

FIG. 10 shows a conventional logic input hysteresis circuit.

FIG. 11 is a view showing an ink jet cartridge of the printer of FIG. 1;

FIG. 12 is a diagram showing a layout of a conventional substrate for an inkjet recording head.

FIG. 13 is a block diagram of a substrate for an inkjet recording head.

FIG. 14 is an example of drive timing of an inkjet recording head substrate.

FIG. 15 is a diagram showing the maximum image transferable CLK frequency with respect to a logic power supply voltage.

[Explanation of symbols]

 102, 105 Schmitt trigger circuit 103 shift register 106 clock generation circuit 108 selector 1700 interface 1701 MPU 1702 ROM 1703 RAM 1704 gate array (GA) 1705 head driver IJH recording head

 ────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Nobuyuki Hirayama 3-30-2 Shimomaruko, Ota-ku, Tokyo F-term in Canon Inc. (reference) 2C057 AF99 AG46 AG70 AG83 AK10 AR03 BA13 5K047 AA11 GG02 MM24 MM28 MM46 MM53

Claims (13)

[Claims] 1. A recording head having a plurality of recording elements and a driving circuit for driving the recording elements provided on the same element substrate, wherein the first recording head has a frequency twice as high as an input clock signal. And a clock generation circuit for generating a second signal obtained by delaying the first signal, and any one of the first and second signals according to a state of a serially input data signal. And a shift register for sequentially storing data input by the data signal in accordance with the signal selected by the selection circuit. 2. The recording head according to claim 1, further comprising a Schmitt circuit for providing a hysteresis characteristic for making a rising threshold value and a falling threshold value different from each other at an input portion of the clock signal and the data signal. 3. The clock generation circuit according to claim 1, wherein the clock generation circuit detects the rising and falling of the input clock and generates the first signal.
A recording head according to claim 1. 4. The apparatus according to claim 1, wherein the selection circuit selects one of the first and second signals according to whether the data signal is at a high level or a low level. 4. The recording head according to any one of items 3. 5. The selection circuit selects the second signal when the data signal is at a high level, and selects the first signal when the data signal is at a low level. The recording head according to claim 4, wherein 6. The selection circuit selects the first signal when the data signal is at a high level, and selects the second signal when the data signal is at a low level. The recording head according to claim 4, wherein 7. The clock generation circuit includes a logic circuit that performs an exclusive OR operation, an inverter, and a delay circuit,
The recording head according to claim 1, wherein the selection circuit includes an AND element and an OR element. 8. The printhead according to claim 1, wherein the printhead is an inkjet printhead that performs printing by discharging ink using the print element. 9. The recording head according to claim 8, wherein the recording element is an electrothermal conversion element that generates heat energy necessary for discharging ink. 10. A head cartridge comprising: the recording head according to claim 1; and an ink tank that stores ink to be supplied to the recording head. 11. A recording apparatus that performs recording using the recording head according to claim 1, wherein timing for transferring serial data to the recording head and driving the recording head. A recording apparatus for transmitting a control signal to the recording head such that the timing is at least partially overlapped. 12. A printhead element substrate in which a plurality of print elements and a drive circuit for driving the print elements are provided on the same element base, wherein the printhead element substrate has a frequency twice as high as an input clock signal. A clock generation circuit that generates a first signal and a second signal obtained by delaying the first signal; and a clock generation circuit that generates the first signal and the second signal in accordance with a state of a serially input data signal. A selection circuit for selecting any one of them, and a shift register for sequentially storing data input by the data signal in accordance with a signal selected by the selection circuit are provided on the element substrate. Printhead element substrate. 13. A method for capturing serial data in a printhead in which a plurality of printing elements and a drive circuit for driving the printing elements are provided on the same element substrate, wherein the method is twice as large as an input clock signal. And a second signal obtained by delaying the first signal, and generating a first signal having a frequency of Wherein the data inputted by the data signal is sequentially stored in a shift register in accordance with the selected signal.