JP2002368808A - Converter for atm cell and stm data - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a converter for an ATM cell and STM data, where standby systems can be configured to a minimum number to the utmost even when a plurality of active systems are required, that can reduce a switching time from the active system into the standby system. SOLUTION: When an ATM-INF (input output interface for ATM cells) 20 transmits an ATM cell to active system AAL1CLAD(ATM Adaptation Layer Type 1 Cell Assembly and Disassembly) 241 , 242 , a control file attachment device 22 generates a long cell 30 resulting from attaching path setting information of the active system AAL1CLAD 241 , 242 to the ATM cell, an ATM-SW21 switches the long cell 30 and transmits it to the active system AAL1CLAD 241 , 242 . The active system AAL1CLAD 241 , 242 map the ATM cell to a TS of an STM line according to the path setting information in the long cell. Thus, the system switching processing is performed only by switching by selectors 23, 26, and the system switching time can be shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an ATM cell and an STM.
The present invention relates to a data conversion device, and more particularly to a conversion device for converting ATM cells and STM data in a duplex configuration having a conversion unit for an active system (working system) and a standby system.

[0002]

2. Description of the Related Art In an existing digital circuit switching system, data between terminals (existing terminals) is transmitted in a synchronous transfer mode (STM: Synchronous Transf
er Mode). On the other hand, the asynchronous transfer mode (ATM: As
In the asynchronous transfer mode, data between ATM terminals is divided into, for example, 47 bytes of information, and a fixed length of 53 bytes is obtained by adding a 6-byte header to the information.
It is transmitted as a signal form called a TM cell (hereinafter, also simply referred to as a cell).

Accordingly, in a data transmission system for performing data transmission between an existing terminal and an ATM terminal, since the data transmission modes of the two are different, STM data from the existing terminal is converted into ATM cells and then transmitted to the ATM terminal. And ATM
It is necessary to convert the ATM cell from the terminal into STM data and then transmit it to the existing terminal. For this purpose, an ATM cell and STM data converter for performing the above-described bidirectional conversion are provided.

Here, in the above data transmission system, in order to improve the reliability of data transmission and always perform reliable transmission, an operation system (active system) using a data / cell conversion unit in a conversion device is used. In addition, a redundant system having the same configuration may be provided, and when a failure occurs in the active system, a redundant configuration may be adopted in which the standby system is switched to the standby system. Various proposals have been made for this purpose.

For example, Japanese Patent Application Laid-Open No. 11-68774 discloses a configuration for synchronizing data conversion operations by mutually notifying the start of conversion of ATM cells to STM data and the start of conversion of STM data to ATM cells. Is disclosed.

Japanese Patent Laid-Open Publication No. Hei 11-34010 discloses that an act (active) ATM switch and a standby (standby) ATM switch are synchronized with an act AAL1 terminal device and a standby AAL1 terminal device. The transmitted ATM cell is transmitted, and the act AAL1 terminator and the standby AAL1 terminator absorb the fluctuation of the received ATM cell, absorb the burst, and synchronize with the timing of receiving the ATM cell to the STM switch. STM
An arrangement for providing data is disclosed.

[0007]

SUMMARY OF THE INVENTION However, Japanese Patent Application Laid-Open
In the conventional apparatus described in JP-A-68774, a conversion start signal for each channel when converting an ATM cell received in the active system into STM data is supplied to the standby system, and further, the conversion start signal received from the standby system and the own system are transmitted. Is compared with the conversion start signal, and if there is a phase difference, the start of conversion from ATM cells to STM data is postponed in STM frame units, so that it takes time to set a path to the standby system. There is a problem.

In the conventional apparatus described in Japanese Patent Application Laid-Open No. 11-34010, it is necessary to provide the same number of terminating devices in both the operating system and the standby system.
As many backup systems are required, the larger the number of active systems, the more the device scale increases, and the cost of the entire system becomes extremely high. In addition, it takes time to set a path to the standby system by software, and as a result, there is a problem that data loss corresponding to the time spent in setting the path occurs.

[0009] The present invention has been made in view of the above points,
AT that can reduce system switching time from working system to standby system
It is an object of the present invention to provide a conversion device between M cells and STM data.

Another object of the present invention is to provide an ATM cell / STM data conversion device capable of suppressing the occurrence of data loss during system switching.

Further, another object of the present invention is to provide an ATM system in which a spare system can be constituted by a minimum number even if a plurality of operating systems exist.
An object of the present invention is to provide a cell and STM data conversion device.

[0012]

In order to achieve the above object, a first aspect of the present invention is an AT which is transferred in an asynchronous transfer mode.
When an M cell is input, the ATM cell is converted into STM data transferred in a synchronous transfer mode and output. When STM data is input, the ATM cell is converted into an ATM cell and output. A conversion unit of one standby system that converts STM data when an ATM cell is input and outputs it and converts it to an ATM cell when STM data is input, and an external ATM conversion unit. When a cell is entered,
A cell in which the path setting information of the ATM cell is added to the ATM cell is generated, input as an ATM cell to the active converter, and the data of the input cell is converted into the time of the STM line by the active converter based on the path setting information. ATM interface means for mapping to a slot to generate STM data and outputting the ATM cells input from the active conversion unit to the outside as it is, and ST input from the active conversion unit.
ST that multiplexes the M data and outputs it to the outside, separates the STM data input from the outside, and supplies it to the conversion unit of the operation system
The M interface means and the active conversion section are monitored for the occurrence of a failure. When a failure is detected, the connection between the active conversion section and the ATM interface means and the STM interface means is disconnected. And control means for switching control so that the STM interface means is connected to the conversion unit of the standby system.

According to the present invention, the conversion unit of the standby system is an ATM conversion unit.
The path setting information input from the interface means is AT
When a cell added to the M cell is received as input, the data of the input cell is set to ST based on the path setting information in the input cell.
Since the STM data is generated by mapping to the time slot of the M line, even if the system switching is performed from the conversion unit of the active system to the conversion unit of the standby system, path setting and path setting are performed for the conversion unit of the standby system. There is no need to inherit the active path setting information.

According to a second aspect of the present invention, in order to achieve the above object, the ATM interface means has a memory table in which path setting information of an active conversion unit is stored in advance in correspondence with an address. An additional device for searching an address of a memory table from a header of an input ATM cell and outputting path setting information corresponding to the searched address; and a path setting information output from the additional device for an externally input ATM cell. And a first output unit that outputs a cell in which path setting information is added to the ATM cell output from the switch unit to an active conversion unit or a standby conversion unit under the control of the control unit. Is configured. According to the second aspect, the path setting information can be accurately added to the ATM cell input from the outside.

In order to achieve the above object, in the third invention, the STM interface means in the first invention is connected to an active conversion unit or a standby conversion unit by switching control of the control means. A second selector and a second selector
And a multiplexing / demultiplexing unit connected to the second selector. The multiplexing / demultiplexing unit separates the externally input STM data and sends it to the second selector, and outputs the STM data input from the second selector. Are multiplexed and output to the outside.

In order to achieve the above object, according to a fourth aspect of the present invention, each of the active conversion unit and the standby conversion unit adds path setting information input from the ATM interface unit to the ATM cell. And a control memory for storing the STM data inputted from the STM interface means and the payload data of the cell stored in the control memory based on the path setting information stored in the control memory in the time slot of the STM line. Generate STM data by mapping and STM
Output to interface means or convert STM data stored in control memory into ATM cells
And a conversion circuit for outputting to the M interface means.

According to a fifth aspect of the present invention, in order to achieve the above object, the number of active conversion units is N (N is an integer of 2 or more).
There is an N + 1 redundant configuration in which the active conversion unit in which a failure has occurred is disconnected from the connection by the ATM interface unit and the STM interface unit and connected to the standby conversion unit. According to the present invention, only one conversion unit of the standby system can be used regardless of the number of conversion units of the active system.

According to a sixth aspect of the present invention, to achieve the above object, an ATM interface means
The path setting information added to the cell has at least information indicating whether or not each of a plurality of time slots constituting the STM data is valid, and the conversion unit indicates that the path setting information is valid. It is characterized in that STM data is generated by mapping data of an input cell to a time slot of an STM line corresponding to the time slot.

Further, in order to achieve the above object, in the seventh invention, the ATM interface means comprises a plurality of ATM interfaces.
The ATM cell is connected to an ATM switch that transfers data between terminals, and transfers ATM cells bidirectionally. The STM interface means is connected to an STM switch that switches data output from a plurality of existing terminals in a time-division manner. It is characterized by transferring data.

[0020]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a configuration diagram of an embodiment of an ATM cell / STM data conversion device according to the present invention, and FIG. 2 is a system configuration diagram of an example of a data transmission system to which the device of the present invention is applied. Prior to description of an embodiment of the present invention, first, a data transmission system to which the present invention is applied will be described with reference to FIG.

The data transmission system shown in FIG. 2 includes a synchronous transfer mode switch (STM-SW) 11 and an asynchronous transfer mode switch (ATM-SW) 12,
-SW11 and ATM-SW12 are connected to ATM adaptation layer 1 (AAL1: ATM Adaptation Layer Type).
IWF (Inter Working Function) 13 ending in 1)
When a conventional terminal 14 ₁ and 14 _2, and a ATM terminal 15 ₁ and 15 _2. The existing terminal and A
The number of TM terminals is not limited to two each as shown in FIG. 2, but may be one, three or more, and may not be the same.

The STM-SW 11 is a time division STM
Switching data and existing terminals 14 ₁ such as fixed phones
And connecting 14 ₂ to IWF13. ATM-SW12
Switches the ATM cell flowing between IWF13, ATM terminals 15 ₁ and 15 _2. IWF13 is the AT
A conversion device that performs bidirectional conversion between M cells and STM data, interworks STM-SW11 and ATM-SW12, converts STM data from STM-SW11 into ATM cells, and outputs the ATM cells to ATM-SW12. , AT
The ATM cells from the M-SW 12 are converted into STM data and output to the STM-SW 11.

FIG. 1 is a block diagram of an IWF 13 as an embodiment of an ATM cell / STM data converter according to the present invention. In FIG. 1, an IWF 13 includes an ATM-INF 20 for input / output interface of an ATM cell and an AAL1 CLAD (ATM Adaptati) which is a data-cell conversion unit.
on Layer Type1 Cell Assembly and Disassembly) 24
_1, 24 ₂ and 24 _3, the STM-INF25 to input and output interface of the STM data, the control unit 28 which collectively controls the various units in IWF13, is a CPU bus 29 that connects the whole of these I have. Control unit 2
Reference numeral 8 includes a central processing unit (CPU) and a memory, and performs a predetermined control operation according to a software program stored in the memory.

The ATM-INF 20 comprises an asynchronous transfer mode switch (ATM-SW) 21, a control field adding device 22, and a selector 23. The ATM-SW 21 switches the input ATM cell and inputs the switched ATM cell to the selector 23. The control field adding device 22 adds path setting information to the ATM cell input to the ATM-SW 21. Also,
The STM-SW 25 includes a selector 26 and a multiplexing / demultiplexing unit (M
UX / DMUX) are composed of 27. The selector 26 is connected to AAL1CLAD24 ₁ ~24 _3, multiplexing / demultiplexing unit 27 is connected to the STM-SW11 in FIG.

AAL1CLAD24₁~ 24₃Is the AT
Selector 23 in M-INF 20 and STM-INF 25
Is provided between the selector 26 and the
AAL1CLAD24₁And the second AAL1CLAD24
₂Indicates the operation system, and the third AAL1CLAD24₃Is
Indicates a reserve system. Here, the active AAL1CLAD is 2
4₁And 24₂AAL1CLAD of the reserve system
Is 24₃System switching by failure
Is the active AAL1CLAD24₁And 24₂Which of
When one of them becomes faulty, the faulty AAL1CL
AD24₁, 24 ₂The path setting information of the standby AAL1
CLAD24₃Must be set for

Therefore, the operation system A
When sending ATM cells to the AL1CLADs 24 ₁ and 24 ₂ , the control field adding device 22
Then, the path setting information of the active AAL1 CLADs 24 ₁ and 24 ₂ is added to the ATM cell having a fixed length of 53 bytes, and
An ATM-SW 21 that can generate a long cell 30 longer than a byte and process the long cell 30
AAL1CLAD24 ₁ after switching in
And sent to the 24 _2.

Operational system AAL1CLAD24₁And 24₂
And standby system AAL1CLAD24₃Is the user information security
Divided into cells, assembled from cells, lost cells / incorrectly inserted cells.
Functions such as delay processing and delay fluctuation compensation processing.
Also, it converts voice information etc. into STM data,
Has a function of converting STM data into ATM cells.
In addition, the operation system AAL1CLAD24₁And 24₂And spare
AAL1CLAD24 ₃Are the same configuration.
As shown at 24 in FIG. 3, AAL1SAR (ATM Adaptati
on Layer1 Segmentation And Reassembly) 31
And a trawl memory 32.

As shown in FIG. 3, AAL1SAR31
Temporarily stores the long cell 30 received from the ATM-INF 20 in the control memory 32 and, based on the path setting information stored in the control memory 32, stores the long cell 30 in the ATM.
Map cells to time slots (TS) and use STM
The data 35 is sent to the STM-INF 25. Although not shown in FIG. 3, the AAL1 SAR 31
After the STM data input from the M-INF 25 is temporarily stored in the control memory 32 and converted into ATM cells, the ATM cells are taken out of the control memory 32 and output to the ATM-INF 20.

Therefore, the active AAL1 CLADs 24 ₁ and 24 ₂ transmit the AAL1CLADs 24 ₁ and 24 ₂ according to the path setting information in the long cell.
By mapping the TM cell to the time slot (TS) of the STM line, the active AAL1CLAD24 ₁
And to delete the path setting processing for 24 ₂ and a standby system AAL1CLAD24 _3, operation system AAL1CLAD
24 ₁ and the protection system from one of the 24 ₂ AAL1CLAD2
4 system switching process to _3, only be switched to the selector 23 in the selector 26 and ATM-INF20 in STM-INF25, not generated path setting information takeover time, it is possible to shorten the system switching time.

Thus, in this embodiment, A
When the AL1CLAD system is switched, the standby AAL1CL
AD24 ₃ path information settings for is not performed, ATM-I
A in the control field adding device 22 in the NF 20
AAL based on the path setting information added to the TM cell
Since the 1SAR 31 maps the AAL1 cell to the time slot of the STM line, the faulty AAL1CLAD2
4 Transfer the path setting information of ₁ or 24 ₂ to the standby system AAL1CLA.
There is no need to take over for the D24 _3, AAL1C
Shortening of the LAD system switching time can be realized.

In the IWF 13 of FIG. 1, as described above,
The first of AAL1CLAD24 ₁ and the second AAL1CLA
D24 ₂ was used as a working system, the third of AAL1CLAD24 ₃
Is a standby system, and ATM-INF20 and STM-INF2
5, when _one of the active AAL1CLADs 24 ₁ and 24 ₂ fails, the failed AAL1CLAD 24
The path setting information of the AD 24 ₁ or 24 ₂ is transferred to the standby AAL.
2 + 1 duplex configuration to switch to 1CLAD24 ₃ is shown.

In the configuration of FIG. 1, the STM-IN
F25 receives the time slot (TS) based STM data input from the STM-SW 11 of FIG.
Furthermore, it transmits the STM data transmitted from AAL1CLAD24 _{1, 24} 2, _{24 3} to STM-SW11.
When receiving the STM data transmitted from the STM-SW 11 of FIG. 2, the multiplexing / demultiplexing unit 27 in the STM-INF 25 of FIG. 1 converts the STM data of one line into the STM data of two lines at half the speed. To separate. The multiplexing / demultiplexing unit 27 includes AAL1 CLADs 24 ₁ , 24 ₂ , 2
The STM data transmitted from 4 _3, when input through the selector 26, the STM data of the two lines speed is multiplexed to the STM data of two times the 1 line.

The selector 2 in the STM-INF 25 shown in FIG.
6, the multiplexing / the STM data input from the separation unit 27 outputs only for the operation system AAL1CLAD24 ₁ and 24 _2, sends STM data transmitted from the operation system AAL1CLAD24 ₁ and 24 ₂ to the multiplexing / separating unit 27 I do. When _one of the active AAL1 CLADs 24 ₁ and 24 ₂ fails, the failed AAL1C
LAD24 ₁ or 24 ₂ is the standby system AAL1CLAD24
₃ , when the selector 26 is switched to the STM-INF
PC between 25 and AAL1CLAD 24 ₁ , 24 ₂ , 24 ₃
125 of M (Pulse Code Modulation) interface
The PCM interface is switched in synchronization with a frame pulse (FP: Frame Pulse) having a period of μs.

AAL1CLADs 24 ₁ , 24 ₂ and 24
No. ₃ converts the STM data input from the STM-INF 25 into cells and outputs the cells to the ATM-INF 20.
The ATM cell input from the M-INF 20 is mapped to the TS of the STM data. ATM-INF20 of FIG.
Receives an ATM cell from the ATM-SW 12 in FIG. 2, switches the ATM cell by the internal ATM-SW 21, and sends it out to the internal selector 23.

The above-mentioned ATM-SW 21 operates the AAL1 CLADs 24 ₁ and 2 which are searched from the memory table set in the control field adding device 22.
4 ₂ of path setting information, input ATM cell and switching to output the above path setting information to the input ATM cell to generate a being switched multiplexed (time series synthesized) Ronguseru 30, the selector 23 To send to. The above search of the memory table is performed based on the header of the input ATM cell. The selector 23 is an ATM-S
The long cell 30 transmitted from the W21 is transferred to the active AAL1.
CLADs 24 ₁ and 24 ₂ are sent to the active AAL1C
When _one of the LADs 24 ₁ and 24 ₂ becomes faulty, the faulty AAL1 CLAD 24 ₁ or 24 ₂
To send a long cell 30 to the cell.

FIG. 4 shows a control field adding device 2.
2 shows an example of a memory map of a second memory table. As shown in the figure, the control field applying device 22 memory table, there is a region for working system AAL1CLAD24 ₁ and 24 _2, respectively, "control field" for each channel in each region, "ATM header" and "payload Buffer is stored. The number of channels is determined by the TS of the AAL1 SAR 31 shown in FIG.

The above-mentioned "control field"
Has an active AAL1CLAD24 ₁And 24₂ST
Relationship between TS on M-INF25 side and header of ATM cell,
Payload size for partial field cell support,
The data size is set by the control unit 28 in FIG.
In FIG. 4, “payload buffer” includes A
ATM cell payload input from TM-SW12
However, the “ATM header” contains the header of the ATM cell.
Each is stored. As mentioned earlier, this memory table
The long cell 30 generated based on the ATM-S
Is switched at W21 and sent to the selector 23.
You.

FIG. 5 shows the AAL1CLAD24 shown in FIG.
An example of a memory map of the control memory 32 in (24 _{1 to} 24 ₃ ) is shown. As shown in FIG. 5, the control memory 32 the relationship between the STM-INF25 side TS and ATM cell header in AAL1CLAD24 within _{1-24 3} is stored for each channel, also, STM-IN
STM data and ATM-INF input from F25
The ATM cell inputted from 20 is stored.

ATM-INF20 is AAL1CLAD
Receiving the ATM cells from 24 _{1-24 3,} the received AT
ATM-SW1 of FIG. 2 where M cell is connected to IWF13
2 while the A transmitted from the ATM-SW 12
Receives the TM cell and replaces the received ATM cell with AAL1CL
AD24 transferred to _{1-24 3.} The ATM-SW21 mounted on the ATM-INF20 is the active AAL1 CLA.
ATM cells received from D24 ₁ and 24 ₂ are transmitted to IWF 1
3 while switching to the ATM-SW 12 connected to the IWF 13, and switching the ATM cell input from the ATM-SW 12 connected to the IWF 13 to the control field adding device 2.
2 to AAL1CLAD
Switching to 24 ₁ and 24 _2.

The control unit 28 shown in FIG.
l Processing Unit) via the bus 29, the ATM-IN
Control of the ATM-SW 21, the control field adding device 22, and the selector 23 mounted on the F20,
Control of the selector 26 in the M-INF 25 and AAL1C
LAD24 AAL1SAR31 mounted in _{1-24 3}
And the control memory 32 is controlled.

Next, the operation of this embodiment will be described. In the embodiment of FIG. 1, two active AAL1CLs
AD24 ₁ and 24 ₂ of the path and the other information AAL
1CLAD24 not set to _{1 ~24 3,} ATM-IN
Set control field application device 22 in F20, when either of the two operational system AAL1CLAD24 ₁ and 24 ₂ is turned failure, the standby system AAL1C
When switching to LAD24 ₃ is backup system AAL1CL
AD24 without a path set for _3, the selector 23
The ATM-SW 21 switches the ATM cells input from the ATM-SW 12 in accordance with the memory table of FIG.

The control field adding device 22 comprises:
The address of the memory table shown in FIG. 4 is searched from the header of the input ATM cell, and the control field value set at that address and the output ATM cell header are added to the payload of the ATM cell input from the ATM-SW 12. The assigned long cell 30 is generated. Here, in FIG. 4, “Valid” in the “control field” indicates whether this channel is valid or invalid, and “data size” is 64 kbps, 128 k
Indicates a data rate such as bps or 384 kbps. “Valid TS” indicates a valid TS number for the line. For example, when processing 64 kbps data using TS2, “4” is set to “valid TS”.

The "payload size" indicates how many bytes of data are packed in the payload of the ATM cell. Normally, the payload size is 47 bytes excluding the AAL1 header.
When fill cell) is used, a value of 46 bytes or less is set, and the rest of the payload is padded to a total of 53 bytes. The "ATM header" is an STM
The information added to cell data is used to associate a time slot (TS) with an ATM cell header.

The control field adding device 22 comprises:
Based on the address of the ATM header in the 53-byte fixed-length ATM cell having the format shown in FIG. 6A input from the ATM-SW 12, the internal memory table shown in FIG. 4 is searched, and the ATM cell is operated. AAL1CL
It determines which channel cell should be transferred to AD 24 ₁ or AD 24 ₂ , reads the control field corresponding to the address, and outputs it to ATM-SW 20. As a result, the ATM-SW 20 becomes the ATM-S
The control field from the control field adding device 22 is switched and added to the ATM cell input from W12 to generate a long cell 30 having a format as shown in FIG. The generation and output of the long cell 30 are performed by the active AA
L1CLAD24 ₁ and 24 one to the failure of ₂ is performed at all times regardless of whether occurred.

[0045] The selector 23 is configured to allow delivery of Ronguseru 30 against a production system AAL1CLAD24 ₁ and 24 ₂ by the control unit 28, the operation system AAL1CL
The long cell 30 is transmitted to the ADs 24 ₁ and 24 ₂ . In FIG. 3, A in AAL1CLAD 24 ₁ and 24 ₂
The AL1SAR 31 receives the long cell 30 input from the ATM-INF 20 and stores it in the control memory 31. The storage destination memory address is determined by the input ATM header of the long cell 30.

The memory map of the control memory 31 is substantially the same as the contents of the memory table in the control field adding device 22 shown in FIG. 4, as shown in FIG. Is S
The STM data from the TM-INF 25 is a buffer for storing the STM data until one cell is reached, and data is input byte by byte at a cycle of 125 μs. 47 bytes are required to send out a cell to the ATM-INF 20. Also, "payload buffer"
Is for an ATM cell from ATM-INF 20:
A buffer for temporarily storing a payload of an ATM cell. Data is input in units of 47 bytes.
Each byte is transmitted in a period of 5 μs. The base address of each channel of the control memory 32 is determined from a time slot.

AAL1 in AAL1CLAD24 of FIG.
The SAR 31 transfers the payload in the long cell 30 (same as the payload of the 53-byte fixed-length ATM cell) according to the control field information in the long cell 30 stored in the control memory 31 to the TTM of the STM line.
Maps to S. To explain this further, the long cell 3 stored in the control memory 31 will be described.
0A is shown in FIG. 7A, TS0 to TSm in the control field
Is a 1-bit valid TS, and indicates whether the TS is valid (when it is 1, valid). FIG. 7B
Indicates the format of the STM data, TS0 to TSm
Indicates an 8-bit time slot.

For example, when only TS1 in the valid TS of the control field is "1" (when the bit is set), 8 bytes out of 47 bytes of the payload in the long cell 30 including the control field are shown in FIG. It is arranged (mapped) in an 8-byte time slot indicated by TS1 in the STM data shown in FIG. 7 (B). Also, the valid TS in the control field
If only TS1 and TS3 are “1” (when the bit is set), 8 out of 47 bytes of the payload in the long cell 30 including the control field are set.
Each byte is sequentially arranged (mapped) in an 8-byte time slot indicated by TS1 and TS3 in the STM data shown in FIG. 7B. Note that the pulse in FIG. 7B indicates a frame pulse.

In this way, the active AAL1CLAD2
4 STM data generated by ₁ and 24 _2, STM
Output to INF25. As a result, the standby AAL1
Because the path set is not required to CLAD24 _3, the operation system A
When a failure occurs in _one of the AL1CLADs 24 ₁ and 24 ₂ , the control unit 28 controls the selector 23 in the ATM-INF 20 and the selector 26 in the STM-INF 25.
To the active AAL1CLAD2 where the failure occurred
In four ₁ or 24 ₂ only changes the setting to the standby system AAL1CLAD24 ₃ may be implemented system switching.

That is, in this embodiment, two operations
AAL1CLAD24₁And 24 ₂Pass and other
Information of the operation system AAL1CLAD24₁And 24₂To
Without setting, control fee in ATM-INF20
Set to the field addition device 22, with a control field
AAL1CLAD24 with adder 22₁And 24₂Against
Add the path setting information (control field)
The transmitted long cell 30 is transmitted.

Then, the operation system AAL1CLAD24₁Passing
And 24₂Is the long received by internal AAL1SAR31
Based on the path setting information of the cell 30, the TS of the STM line
To map the payload data to
System AAL1CLAD24₁And 24₂Either of
AAL1CLAD24 at the time of failure ₃
When switching to
Long cell input to the active AAL1CLAD
BEIKAI AAL1CLAD24₃Is switched to
The active AAL1 in which a failure has occurred due to the selector 26
From the output of CLAD, the standby system AAL1CLAD24₃From
Output the output STM data to STM-INF25
Switch to In addition, the standby system AAL1CLAD2
4₃Is based on the input long cell path setting information,
The same operation as the active AAL1CLAD where the failure occurred
AAL1CLAD24 that failed because of₁Or
24 ₂AAL1CLAD24 from standby system₃Path against
There is no need to take over the setting information, and the selector 23
System switching can be realized by switching only
System switching time at the time of occurrence can be reduced.

The present invention is not limited to the above embodiment, and can be applied to N + 1 duplication (N is 1 or an integer of 3 or more). Also, active AAL1C
The spare AAL1CLAD because LAD failed
In a state where the standby AAL1CLAD is used instead of the failed AAL1CLAD,
When the failed AAL1 CLAD is restored, the restored AAL1 CLAD is switched back to the active system, and
AAL1CLAD which is a standby system until then and is currently in operation
May be switched back to the standby system, or the restored AAL1CLAD may be used as the standby system without switching.

[0053]

As described above, according to the present invention,
When the path setting information input from the ATM interface means receives a cell added to the ATM cell as an input, the spare conversion unit converts the data of the input cell based on the path setting information in the input cell into the STM line. Even if system switching is performed from the conversion unit of the active system to the conversion unit of the standby system by mapping to time slots and generating STM data, path setting and path setting information of the active system are performed for the standby conversion unit. Since it is not necessary to take over, the time for system switching to the conversion unit of the standby system can be shortened compared to the past,
Further, occurrence of data loss at the time of system switching can be suppressed.

Further, according to the present invention, since only one standby conversion unit can be provided regardless of the number of active conversion units, the configuration of the entire apparatus can be simplified and the configuration can be reduced inexpensively. it can.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

FIG. 2 is a system configuration diagram of an example of a data transmission system to which the present invention is applied.

FIG. 3 is a configuration diagram of an example of AAL1CLAD in FIG. 1;

FIG. 4 is an explanatory diagram of an example of a memory table of the control field adding device in FIG. 1;

FIG. 5 is a memory map diagram of an example of a control memory in FIG. 3;

FIG. 6 is an explanatory diagram of a format of an ATM cell and a long cell.

7 is an explanatory diagram of mapping of a payload to an STM line based on a control field in a long cell by AAL1SAR in FIG. 3;

[Explanation of symbols]

11 Synchronous transfer mode switch (STM-SW) 12, 21 Asynchronous transfer mode switch (ATM-S)
W) 13 converter _(IWF) 14 1, 14 ₂ existing terminal 15 _{1, 15} 2 ATM terminal 20 ATM interface (ATM-INF) 22 control field applying device 23, 26 selectors 24 _{1, 24} 2, 24 ₃ conversion unit ( AAL1CLAD) 25 STM interface (STM-INF) 27 Multiplexing / demultiplexing unit (MUX / DMUX) 28 Control unit 30 Long cell 31 AAL1SAR (conversion circuit) 32 Control memory 35 STM data

Claims (7)

[Claims] 1. When an ATM cell transferred in an asynchronous transfer mode is input, the ATM cell is converted into STM data transferred in a synchronous transfer mode and output. When the STM data is input, the ATM cell is output. One or more active converters for converting the cell into a cell and outputting the cell; and when the ATM cell is input, the cell is converted to the STM data and output. When the STM data is input, the ATM cell is converted. And a standby conversion unit that converts the data into an ATM cell and outputs the ATM cell when the ATM cell is input from outside.
A cell in which the path setting information of the M cell is added to the ATM cell is generated and input as the ATM cell to the active conversion unit, and the data of the input cell is converted by the active conversion unit based on the path setting information. ATM interface means for mapping the data to the time slot of the STM line to generate the STM data, and for outputting the ATM cell input from the active conversion unit as it is, to the outside, STM data is multiplexed and output to the outside, and the STM input from outside is
STM that separates data and supplies it to the working conversion unit
An interface unit for monitoring the occurrence of a failure in the active conversion unit, and when a failure is detected, disconnecting the connection between the active conversion unit and the ATM interface unit and the STM interface unit. Interface means and control means for switching the STM interface means so as to be connected to the standby conversion section, wherein the standby conversion section transmits the path setting information input from the ATM interface means to an ATM. When the cell added to the cell is received as input, the data of the input cell is mapped to a time slot of an STM line based on the path setting information in the input cell to generate the STM data. ATM cell and STM data converter. 2. The ATM interface means has a memory table in which path setting information of the active conversion section is stored in advance in association with an address, and the ATM interface means converts the ATM cell header input from the outside into the memory. An additional device for searching an address in a table and outputting the path setting information corresponding to the searched address; and adding the path setting information output from the additional device to the ATM cell input from the outside and outputting the ATM cell A switching unit that outputs the ATM cell output from the switching unit and the path setting information added to the ATM cell to the working conversion unit or the standby conversion unit under the control of the control unit. And the switching means controls the operation system through the first selector by switching control by the control means. 2. The ATM cell according to claim 1, wherein when the ATM cell is input from the conversion unit of (i) or the standby system, the ATM cell is output as it is.
TM data conversion device. 3. The STM interface means is connected to the second selector connected to the operating conversion unit or the standby conversion unit by switching control of the control means, and is connected to the second selector. Consisting of a multiplexing / demultiplexing unit,
The multiplexing / demultiplexing unit demultiplexes the STM data input from the outside and sends it to the second selector, and multiplexes the STM data input from the second selector and outputs the multiplexed data to the outside. A according to claim 1 or 2, wherein
Conversion device for TM cells and STM data. 4. The conversion unit of the active system and the conversion unit of the standby system, each of which is input from the ATM interface means, a cell in which path setting information is added to an ATM cell, or an input from the STM interface means. A control memory for storing the STM data to be stored, and mapping the data of the payload of the cell stored in the control memory to a time slot of an STM line based on the path setting information stored in the control memory. And converting the STM data stored in the control memory into the ATM cells and outputting the ATM cells to the ATM interface means. ATM cell and S described in 1.
TM data conversion device. 5. The operation system according to claim 1, wherein the number of conversion units in the active system is N (N is an integer of 2 or more).
2. The ATM cell and the STM according to claim 1, wherein the ATM converter and the STM are configured so that the active converter in which a failure has occurred is disconnected from the connection by the TM interface means and connected to the standby converter. Data conversion device. 6. The path setting information added to an input ATM cell by the ATM interface means,
Having at least information indicating whether each of the plurality of time slots constituting the TM data is valid,
2. The STM data according to claim 1, wherein the conversion unit maps the data of the input cell to a time slot of an STM line corresponding to a time slot indicating validity in the path setting information. ATM described
Cell and STM data converter. 7. The ATM interface means is connected to an ATM switch for transferring between a plurality of ATM terminals and transfers the ATM cells bi-directionally, and the STM interface means outputs time-divisionally from a plurality of existing terminals. 7. The ATM cell / STM data converter according to claim 1, wherein said STM data is bidirectionally transferred by being connected to an STM switch for switching said data.