JP2002353304A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device where mechanical strength of the wiring layer is high and a total dielectric constant can be decreased sufficiently, and to provide its manufacturing method. SOLUTION: This semiconductor device comprises a semiconductor substrate 101, a multilayer wiring of two layers or more which consists of a metal line formed on the semiconductor substrate 101 and an insulating film formed on the metal line, a metal plug 106 that is formed in the insulating film and connects the metal lines adjacent to the upper and lower sides of the insulating film, the insulating film 110 formed in the upper part of the multilayer wiring, an opening 111 formed so as to penetrate through the insulating film 110 in a top and bottom direction, and an air space 112 formed on the semiconductor substrate 101 so as to continue through the opening 111.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a semiconductor device having an air region between wirings and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, as the performance of semiconductor devices and the storage capacity have increased, there has been a remarkable demand for higher-density and multi-layer wiring. However, with the increase in the wiring density and the number of layers, the interaction between the wirings causes a delay in the electric signal,
As a result, problems have been pointed out such that the operation speed of the semiconductor device cannot be improved and power consumption cannot be reduced.

In order to solve such problems, reduction in wiring resistance and wiring capacitance has been studied, and new techniques have been developed for materials and manufacturing methods of semiconductor devices.
First, a technique of using copper (Cu, electric resistance of 1.8 μΩ) having a lower electric resistance than aluminum as a wiring material as compared with aluminum (Al, electric resistance of 3 μΩ) which is a conventional wiring material has been put to practical use. In order to reduce the wiring capacitance, a material having a low dielectric constant has been studied for the interlayer insulating film between the wirings, and fluorine having a low dielectric constant has been compared with a conventional SiO2 film (dielectric constant of 4.0 to 4.5). SiO2 film (S
iOF films and dielectric constants of 3.2 to 3.7) have been put to practical use. However, with the progress of higher density wiring and multi-layer research, it is strongly desired to reduce the dielectric constant of the interlayer insulating film.

As a method for reducing such wiring capacitance, an air gap structure or an aerial wiring structure in which an air region having the lowest dielectric constant is provided between wirings has been proposed. In a semiconductor device using the air gap structure and the aerial wiring structure, it is expected that wiring delay is suppressed.

[0005]

However, the semiconductor device using the air gap structure and the aerial wiring structure according to the conventional method can be easily manufactured without variation in the production thereof, and can withstand actual use. Was difficult to do. Here, problems of a semiconductor device using an air gap structure and an aerial wiring structure due to a conventional material and a manufacturing method will be described. First, in a semiconductor device having an air gap structure in which a gap is introduced between wirings, variation in wiring capacitance becomes a problem. An example of such an example is a technique disclosed in Japanese Patent Application Laid-Open No. H10-229121.

FIG. 5 is a cross-sectional view of a semiconductor device manufactured by using the technique. In FIG. 5, in this semiconductor device, a groove is formed in advance before forming a metal wiring 502 on a lower insulating film 501, and an air gap 503 extending upward from a position lower than the lower surface of the metal wiring between the metal wirings 502.
This is manufactured by forming an upper insulating film 504 provided with.

According to the semiconductor device manufactured as described above, when the distance between the metal wirings is reduced, an air gap is formed due to overlap due to overhang when the interlayer insulating film is buried, but the shape of the air gap is large. However, there is a problem that the variation greatly increases due to a large change due to the distance between the metal wirings and the like, and the dielectric constant also changes greatly.

Further, in a semiconductor device having an aerial wiring structure having no insulating film around the wiring, there is a problem that a process of removing the insulating film is complicated. An example of such an example is a technique disclosed in Japanese Patent Application Laid-Open No. 09-116004.

FIG. 6 is a sectional view of a semiconductor device manufactured by using the technique. In FIG. 6, this semiconductor device is:
A wiring 602 is formed on the lower insulating film 601 and the wiring 6
An air gap 604 is formed between the wirings 602 by bonding a polyimide film 603 to the wirings 602.

According to the semiconductor device manufactured as described above, the polyimide film 603 is bonded to the wiring 602 so that an insulating film does not exist between the wirings. It is a very difficult task to adhere without intervening uniformly. As another example, there is a technique disclosed in Japanese Patent Application Laid-Open No. H11-126820.

FIG. 7 is a sectional view of a semiconductor device for explaining a method of manufacturing a semiconductor device manufactured by using the technique. 7, an insulating film 702 made of SiO2 is formed on a lower temporary insulating film 703 made of a carbon film, and an upper temporary insulating film 704 made of a carbon film is formed on the insulating film 702. Upper temporary insulating film 704
After forming a groove having a wiring pattern, a contact hole is formed in the lower temporary insulating film 703 and the insulating film 702. Then, a metal is buried in the groove and the contact hole to form a wiring 701 and a plug. After repeating these steps a plurality of times, the uppermost insulating film 702
Forming a temporary film removing opening 705 from below, and removing the lower temporary insulating film 703 and the upper temporary insulating film 704 by ashing the temporary film removing opening 705 to manufacture a semiconductor device. Can be.

According to the semiconductor device manufactured as described above, by forming the opening penetrating from the uppermost insulating film to the lowermost temporary insulating film by etching, the film thickness increases as the number of wiring layers increases. Therefore, fabrication becomes very difficult. Further, there is not always a place where a through hole can be formed and a place where a temporary insulating film in the entire region can be further removed, and it is necessary to prepare a special wiring layout.

As another problem, the mechanical strength of the wiring layer is low. An example of such an example is the technique disclosed in the above-mentioned Japanese Patent Application Laid-Open No. H11-126820.

In FIG. 7, in the same wiring layer, the wirings are fixed to each other by an insulating film, so that the strength in the horizontal direction is relatively high. On the other hand, the upper layer wiring is supported only by the metal plugs by the lower layer wiring, so the supporting strength changes greatly depending on the number of metal plugs, and the mechanical strength in the thickness direction becomes very low in a region with few metal plugs, Handling becomes very difficult. Another example is disclosed in
The technology disclosed in Japanese Patent Application No. 0-294316 can be mentioned.

FIG. 8 is a sectional view of a semiconductor device manufactured by using the technique. In FIG. 8, this semiconductor device
A structure in which two or more layers of metal wirings 801 are sandwiched between upper and lower insulating films 802 is formed, and the metal wirings 801 of the same layer are arranged adjacently via an air layer 803.

According to the semiconductor device manufactured as described above, the lower layer wiring supports the upper layer wiring via the continuous insulating film 802.
The strength in the thickness direction is improved as compared with No. 820. However, in such a structure, there is a continuous insulating film between the upper and lower wirings and there are few voids, so that the dielectric constant of the entire multilayer wiring cannot be effectively reduced.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and it is an object of the present invention to facilitate a process of removing an insulating film, to have a high mechanical strength of a wiring layer, and to sufficiently lower an entire dielectric constant. And a method for manufacturing the same.

[0018]

According to a first aspect of the present invention, there is provided a semiconductor device having a semiconductor substrate and a metal substrate formed on the semiconductor substrate so as to include an air layer. A multi-layer wiring of two or more layers composed of a wiring and an insulating film having a metal plug for connecting vertically adjacent metal wiring, and an insulating film formed on the multilayer wiring and having an opening vertically penetrating therethrough. And the air layer is formed so as to be continuous through the opening.

According to a second aspect of the present invention, in the semiconductor device according to the first aspect, the metal wiring layer is a pseudo metal wiring which does not conduct with the metal wiring and other metal wirings. And an insulating film exists only on the metal wiring and the pseudo metal wiring.

According to a third aspect of the present invention, in the semiconductor device according to the first aspect, an insulating film that does not exist immediately below the metal wiring is etched by a wiring layer below the metal wiring. It is characterized by being removed by.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of sequentially forming a metal film and an insulating film on a semiconductor substrate, and forming a first resist pattern having a desired wiring shape. Using a mask as a mask, sequentially etching the insulating film and the metal film to obtain a metal wiring having the wiring shape and an insulating film existing only on the metal wiring; and covering the metal wiring and the insulating film. Forming a temporary insulating film, flattening the temporary insulating film so that the insulating film is exposed, and
Opening the connection hole opening by etching using a second resist pattern having a desired connection hole opening as a mask, and forming a metal plug by embedding a metal in the connection hole opening. A first step of forming a multilayer wiring composed of a metal film and an insulating film by repeating a plurality of times;
An insulating film is formed on the multilayer wiring, and the insulating film is etched using a resist pattern having an opening for removing the temporary insulating film as a mask to reach the uppermost temporary insulating film of the multilayer wiring. The second forming the opening
And a third step of removing all the temporary insulating films formed in the multilayer wiring through the openings.

According to the method of manufacturing a semiconductor device according to the fifth aspect of the present invention, in the method of manufacturing a semiconductor device according to the fourth aspect, the metal wiring and the insulating film on the metal wiring are formed by etching. Thereafter, an insulating film which does not exist immediately below the metal wiring in a wiring layer below the metal wiring is removed by etching.

[0023]

Embodiments of the present invention will be described below. (First Embodiment) FIGS. 1 and 2 are views for explaining a method of manufacturing a semiconductor device according to a first embodiment of the present invention.

1 and 2, reference numeral 101 denotes a semiconductor substrate; 102, a first metal film; 103, a first insulating film;
Reference numeral 04 denotes a resist film on which a pattern for forming a wiring is formed, 102a denotes a first metal wiring layer including one or more metal wirings formed by etching the first metal film 102, and 103a denotes a first metal wiring layer. 1 metal wiring layer 10
2a, a first insulating layer made of an insulating film formed on each metal wiring, 105 is a first temporary insulating film, 106 is a connecting metal plug formed in the insulating film, 107 is a second 108, a second insulating film; 107a, a first film formed by etching the second metal film 107;
Or a second metal wiring layer including a plurality of metal wirings, 10
8a is a second insulating layer made of an insulating film formed on each metal wiring constituting the second metal wiring layer 107a, 109 is a second temporary insulating film, and 110 is formed on the top of the semiconductor device The insulating film 111 is an opening for a connection hole formed between the insulating films 110, and 112 is an air layer which is an air region provided by the opening 111.

A method of manufacturing the semiconductor device having the above-described configuration will be described. First, as shown in FIG. 1A, for example, aluminum (A) is formed on a semiconductor substrate 101.
A first metal film 102 made of 1) and a first insulating film 103 made of, for example, SiO 2 are sequentially formed by sputtering and CVD, respectively.

Next, as shown in FIG. 1B, a resist film 104 on which a pattern for forming a wiring is formed is provided on the first insulating film 103, and the resist film 104 is used as a mask. The first insulating film 103 and the first metal film 102 are sequentially etched to form a first metal wiring layer 102a formed of a metal wiring having a wiring pattern formed thereon, and a first metal wiring layer 102a formed of an insulating film formed on the metal wiring. Insulating layer 10
3a is obtained.

Next, as shown in FIG. 1C, a first temporary insulating film 105 made of carbon is formed so as to cover the first metal wiring layer 102a and the first insulating layer 103a. The temporary insulating film 105 is planarized by a CMP method so as to remain only between the first insulating layer 103a and the first metal wiring layer 102a, and is formed so as to expose the surface of the first insulating film 103a.

Next, as shown in FIG. 1D, metal wirings adjacent to the upper and lower sides of the insulating film are formed at desired positions of the insulating film constituting the first insulating layer 103a by lithography, etching and CVD. A connection hole opening for connection is formed, and a metal is buried therein to form a metal plug 106.

Next, as shown in FIG. 1E, a second metal film 107 and a second insulating film 108 are further formed on the first insulating layer 103a by sputtering and CVD in this order. Next, as shown in FIG. 1F, the above-described FIG.
To form a second metal wiring layer 107a and a second insulating layer 108a in the same steps as in FIG.
A second temporary insulating film 109 is formed so as to remain only between 7a and the second insulating layer 108a.

As described above, the wiring structure composed of the metal wiring layer and the insulating layer is formed by lithography, etching, CVD,
Each step of the CMP is sequentially repeated a plurality of times to form an upper wiring layer.

Subsequently, as shown in FIG. 2A, after forming up to the fourth wiring layer, an insulating film 110 made of, for example, plasma SiN is formed on the uppermost insulating layer. Next, FIG.
As shown in (b), an opening 111 reaching the surface of the temporary insulating film formed on the uppermost wiring layer is formed in the insulating film 110 by using photolithography technology and etching technology.
To form

Next, as shown in FIG. 2C, the temporary insulating film formed in the multilayer wiring layer through the opening 111 is removed by ashing with oxygen plasma. That is, the area of the removed temporary insulating film is formed as the air layer 112. At this time, since the metal wiring and the insulating film are not continuous films, there is a portion where the upper and lower temporary insulating films always contact. Therefore, by removing the uppermost temporary insulating film with oxygen plasma, the oxygen plasma can reach the temporary insulating film in the lower layer portion, and all the temporary insulating films can be sequentially removed. As a result, it is possible to remove all layers of the temporary insulating film only by providing the opening 111 reaching the uppermost temporary insulating film.

As described above, according to the semiconductor device and the method of manufacturing the same according to the first embodiment, a multi-layer wiring composed of a metal wiring and an insulating film existing only on the metal wiring is formed on a semiconductor substrate. A metal plug for connecting the metal wiring vertically adjacent was provided inside, an insulating film was formed on the multilayer wiring, and the parts other than the metal wiring and the insulating film were made to be air layers, so that the insulating film was Since the vertically adjacent metal wiring is supported via the metal plug and the insulating film, the portion supported conventionally is wider, and high strength can be obtained in the horizontal direction and the thickness direction of the semiconductor device. Further, since a portion other than the insulating film formed on the uppermost portion of the semiconductor device has a continuous air layer, the dielectric constant of the metal wiring layer can be significantly reduced.

The air layer in the semiconductor device can be formed only by forming an opening provided in the uppermost insulating film. There is no need to provide an opening communicating from the uppermost layer to the lowermost layer, and the air layer can be easily formed. Further, there is no need to prepare a special layout for the wiring in order to remove the temporary insulating film in the entire region.

(Embodiment 2) FIG. 3 is a sectional view of a semiconductor device according to Embodiment 2 of the present invention. In FIG. 3, reference numerals 301 to 303 denote a first pseudo metal wiring, a second pseudo metal wiring, and a third pseudo metal wiring which are not electrically connected to other metal wirings, respectively. 304, 30
6, 308, and 310 are first to fourth metal wiring layers each including one or more metal wirings and pseudo metal wirings constituting each layer, and 305, 307, 309, and 311 are metal wiring and pseudo metal wirings. These are first to fourth insulating layers made of an insulating film formed on a metal wiring. In addition, in the other configurations, the same portions as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.

The structure of the semiconductor device thus configured will be described in detail. As shown in FIG. 3, in the semiconductor device, two or more wiring layers including a metal wiring layer and an insulating layer are provided on the semiconductor substrate 101, and a pseudo metal wiring forming the metal wiring layer exists without being in contact with the metal wiring. In this way, an insulating film always exists on each metal wiring and each pseudo metal wiring. In addition, a region where the metal wiring layer and the insulating layer were not present was used as the air layer 112.

The metal wiring forming the second metal wiring layer 306 is supported at both ends by the metal wiring forming the first metal wiring layer 304. The metal wiring forming the fourth metal wiring layer 310 has one of its both ends connected to the third pseudo metal wiring 303 and the second metal wiring layer 30.
6 and the other is supported by the metal wiring forming the third metal wiring layer 308, the second pseudo metal wiring 302, and the first pseudo metal wiring 301. I have.

As described above, according to the semiconductor device of the second embodiment, pseudo metal wirings not conducting with other metal wirings are formed in the metal wiring layer, and each metal wiring and each pseudo metal wiring are formed. Since the insulating film is provided only on the metal wiring, as shown in the fourth metal wiring layer 310, it is possible to support the upper metal wiring with a small number of metal wirings, and to support the lower metal wiring supporting the metal wiring layer. By providing a pseudo metal wiring in a low-strength portion of the metal wiring, the strength of the semiconductor device in the vertical direction can be improved.

(Embodiment 3) FIG. 4 is a view for explaining a method of manufacturing a semiconductor device according to Embodiment 3 of the present invention. In FIG. 4, reference numeral 401 denotes a first insulating layer formed of one or more insulating films, 402 denotes a second metal wiring layer formed of one or more metal wirings, and 403 denotes a second metal layer formed of one or more insulating films. An insulating layer, 404 is a resist film, 4
05 is a temporary insulating film, 410 is an insulating film, 411 is an opening,
412 is an air layer.

A method of manufacturing the semiconductor device thus configured will be described. First, as shown in FIG. 4A, the insulating film and the metal film are sequentially etched using the resist film 404 as a mask, and a second metal wiring layer 402 made of a metal wiring having a wiring pattern formed thereon is formed. To obtain a second insulating layer 403 made of an insulating film.

Next, as shown in FIG. 4B, a portion of the first insulating layer 401 where the metal wiring constituting the second metal wiring layer 402 does not exist is removed by etching. Next, as shown in FIG. 4C, the portion where the first insulating layer 401 is removed and the second metal wiring layer 402 in FIG.
And a temporary insulating film 405 covering the second insulating layer 403.
To form

Next, as shown in FIG. 4D, a multilayer wiring composed of a metal wiring layer and an insulating layer is formed by repeating the steps of FIGS. 4B and 4C.
Then, an insulating film 410 made of, for example, plasma SiN is formed on the multilayer wiring, and an opening 411 reaching the temporary insulating film 405 is provided.

Next, as shown in FIG. 4E, the temporary insulating film 405 formed in the multilayer wiring layer through the opening 411 is removed by ashing with oxygen plasma. That is, portions other than the metal wiring and the insulating film supporting each metal wiring are formed as the air layer 412.

As described above, according to the semiconductor device and the method of manufacturing the same according to the third embodiment, the insulating film that does not exist directly under the metal wiring is removed by etching in the wiring layer below the metal wiring, so that the metal Only when having wiring, by providing an insulating film on the lower metal wiring supporting the upper metal wiring, by removing unnecessary insulating film,
It can be replaced with an air layer having the lowest dielectric constant. For this reason, the dielectric constant of the multilayer wiring structure as a whole can be greatly reduced without reducing the supporting points and reducing the strength.

[0045]

As described above, according to the semiconductor device of the first aspect of the present invention, the metal wiring has a wide supported portion, and it is possible to obtain high strength in the horizontal and thickness directions of the semiconductor device. it can. Further, by providing an air layer, the dielectric constant can be reduced.

According to the semiconductor device of the second aspect of the present invention, a pseudo metal wiring is provided in a lower strength portion of a lower metal wiring supporting a metal wiring layer, thereby providing a semiconductor device. The vertical strength of the device can be improved.

According to the semiconductor device of the third aspect of the present invention, by removing an unnecessary insulating film, the removed portion can be replaced with an air layer having the lowest dielectric constant. For this reason, the dielectric constant of the multilayer wiring structure as a whole can be greatly reduced without reducing the supporting points and reducing the strength.

Further, according to the method of manufacturing a semiconductor device according to the fourth aspect of the present invention, the portion where the metal wiring is supported is wide, and high strength can be obtained in the horizontal direction and the thickness direction of the semiconductor device. Further, by providing an air layer, the dielectric constant can be reduced.

According to the semiconductor device of the fifth aspect of the present invention, by removing an unnecessary insulating film, the removed portion can be replaced with an air layer having the lowest dielectric constant. For this reason, the dielectric constant of the multilayer wiring structure as a whole can be greatly reduced without reducing the supporting points and reducing the strength.

[Brief description of the drawings]

FIG. 1 is a view illustrating a method of manufacturing a semiconductor device according to a first embodiment of the present invention;

FIG. 2 is a view illustrating a manufacturing method subsequent to the method of manufacturing the semiconductor device shown in FIG. 1;

FIG. 3 is a sectional view of a semiconductor device according to a second embodiment of the present invention;

FIG. 4 is a view illustrating a method of manufacturing a semiconductor device according to a third embodiment of the present invention;

FIG. 5 is a sectional view of a conventional semiconductor device.

FIG. 6 is a sectional view of another conventional semiconductor device.

FIG. 7 is a view for explaining a conventional method for manufacturing a semiconductor device.

FIG. 8 is a sectional view of still another conventional semiconductor device.

[Explanation of symbols]

 Reference Signs List 101 semiconductor substrate 102 first metal film 102a first metal wiring layer 103 first insulating film 103a first insulating layer 104, 404 resist film 105 first temporary insulating film 106 metal plug 107 second metal film 107a Second metal wiring layer 108 Second insulating film 108a Second insulating layer 109 Second temporary insulating film 110, 410 Insulating film 111, 411 Opening 112, 412, 706, 803 Air layer 301 First pseudo Metal wiring 302 second pseudo metal wiring 303 third pseudo metal wiring 304 first metal wiring layer 305, 401 first insulating layer 306, 402 second metal wiring layer 307, 403 second Insulating layer 308 Third metal wiring layer 309 Third insulating layer 310 Fourth metal wiring layer 311 Fourth insulating layer 405 Temporary insulating film 501 01 lower insulating film 502,701,801 metal wires 503,604 air gap 504 upper insulating film 602 the wiring 603 polyimide film 702 and 802 insulating film 703 under the temporary insulating film 704 upper provisional insulating film 705 temporary film removal opening

Claims (5)

[Claims] 1. A semiconductor device comprising: a semiconductor substrate; and an insulating film having a metal wiring formed on the semiconductor substrate so as to include an air layer and having a metal plug connecting upper and lower metal wirings. A multilayer wiring, comprising: an insulating film formed on the multilayer wiring and having an opening vertically penetrating therethrough, wherein the air layer is formed so as to be continuous through the opening. Semiconductor device. 2. The semiconductor device according to claim 1, wherein the metal wiring layer includes a metal wiring and a pseudo metal wiring that does not conduct with the other metal wiring, and is formed on the metal wiring and the pseudo metal wiring. Only an insulating film is present. 3. The semiconductor device according to claim 1, wherein an insulating film that does not exist immediately below the metal wiring is removed by etching in a wiring layer below the metal wiring. 4. A step of sequentially forming a metal film and an insulating film on a semiconductor substrate, and sequentially etching the insulating film and the metal film using a first resist pattern having a desired wiring shape as a mask. A step of obtaining a metal wiring having the wiring shape formed thereon and an insulating film existing only on the metal wiring, and forming a temporary insulating film so as to cover the metal wiring and the insulating film so that the insulating film is exposed. Flattening the temporary insulating film, and opening the connection hole opening by etching the insulating film using a second resist pattern having a desired connection hole opening as a mask; A first step of forming a multi-layer wiring composed of a metal film and an insulating film by repeating a step of forming a metal plug by burying a metal in the opening for the connection hole a plurality of times; Forming a film, and etching the insulating film using a resist pattern having the opening for removing the temporary insulating film as a mask to form an opening reaching the uppermost temporary insulating film of the multilayer wiring; 2
A method for manufacturing a semiconductor device, comprising: a step of removing all the temporary insulating films formed in the multilayer wiring through the openings. 5. The method for manufacturing a semiconductor device according to claim 4, wherein after forming the metal wiring and an insulating film on the metal wiring by etching, the metal wiring and the insulating layer above the metal wiring are present immediately below the metal wiring. A method for manufacturing a semiconductor device, comprising: removing an insulating film not to be etched by etching.