JP2002353200A - Method of manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make the treatment characteristics of a plurality of wafers uniform by eliminating the influence of temperature changes caused by continuous treatment. SOLUTION: A method of manufacturing semiconductor device uses a apparatus having a treatment chamber in which the wafers are successively and continuously treated and a preparatory chamber which supplies the wafers to the treatment chamber. In the method, temperatures of the wafers in the treatment chamber are fixed by controlling the temperatures of the wafers in the preparatory chamber correspondingly to the temperature changes which occur in the treatment chamber due to the continuous treatment. Since the temperatures of the treated wafers are fixed, the treatment characteristics of the wafers can be made uniform and the yield can be improved. In addition, since the temperature control is performed in the preparatory chamber, the treating time does not increase and no aging is required. Therefore, the consumption of dummy wafers can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a technique which is effective when applied to a method for manufacturing a semiconductor device for continuously processing a plurality of wafers.

[0002]

2. Description of the Related Art In the manufacture of semiconductor devices, semiconductor elements or wiring patterns are collectively formed in a plurality of element formation regions provided on a wafer of single crystal silicon or the like to form a predetermined circuit, and adjacent elements are formed. The wafer is cut at the scribing area between the formation areas, and dicing is performed to separate each element formation area as individual semiconductor chips, and the separated semiconductor chips are fixed to, for example, a base substrate or a lead frame. The semiconductor device is completed through a mounting process such as die bonding and wire bonding and a sealing process such as resin sealing.

In the formation of the semiconductor element or the wiring pattern, various processes such as implantation of impurities, formation of a conductive film or an insulating film, and patterning using a mask are performed. There are two types: batch-type processing for batch processing of multiple wafers, and single-wafer processing for sequential processing of multiple wafers, taking into account the increase in wafer diameter, the variety of devices, or the flexibility of manufacturing lines. As a result, single-wafer devices have become mainstream.

A single-wafer type apparatus has a processing chamber for performing the above-mentioned processing and a preliminary chamber, and a plurality of sheets are stored in a preliminary chamber provided for continuing the processing without breaking the vacuum in the processing chamber. The wafer is accommodated, the wafer is supplied from the preliminary chamber into the processing chamber, the processed wafer is collected in the preliminary chamber, the wafer is supplied again from the preliminary chamber into the processing chamber, and the wafer is continuously processed.

[0005]

In such single-wafer processing, processing is continuously performed in units of lots accommodated in cassettes or the like. However, some of the performed processing involves heat generation. In the dry etching, the stage is heated by the heat of the plasma as the process proceeds, and the temperature rises.

[0006] Since a change in the temperature of the wafer due to the temperature rise affects the processing, the processing characteristics may change depending on the processing order even for wafers of the same lot that are continuously processed. Such a temperature rise is such that the temperature rise rate is large at the beginning of the process, decreases as the process proceeds, and maintains a constant temperature when the temperature rises to a certain extent.

In order to reduce the influence of such a temperature change, an aging process in which a dummy wafer is used to perform an empty discharge is performed for the purpose of raising the initial temperature of the process in advance in the etching chamber. . However, the number of dummy wafers tends to be reduced in terms of production efficiency, and the use of dummy wafers only for raising the temperature is low in efficiency. In particular, in a multi-chamber apparatus provided with a plurality of processing chambers, aging processing must be performed for each chamber, and the same number of dummy wafers as the number of chambers is required, which is not efficient.

In order to keep the temperature constant, a method of leaving the wafer on a stage in an etching chamber and starting processing after the wafer has reached a predetermined temperature is also employed. However, a waiting time until the temperature rises is also considered. Is required, the processing time increases, and the throughput decreases.

SUMMARY OF THE INVENTION An object of the present invention is to provide a technique capable of eliminating the influence of a temperature change due to continuous processing and making the processing characteristics of a plurality of wafers uniform. The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0010]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows. In a method of manufacturing a semiconductor device using an apparatus having a processing chamber for sequentially and sequentially processing a plurality of wafers and a spare chamber for supplying a wafer to the processing chamber,
The temperature of the wafer in the preliminary chamber is controlled in accordance with the temperature change in the processing chamber due to the continuous processing, and the temperature of the wafer in the processing chamber is kept constant.

According to the present invention, since the temperature of the wafer to be processed is constant, the processing characteristics are made uniform and the yield can be improved. In addition, since the temperature is adjusted in the preliminary chamber, the processing time is not increased, and the aging process is not required, so that the consumption of the dummy wafer can be reduced.

Hereinafter, embodiments of the present invention will be described. In all the drawings for describing the embodiments, components having the same functions are denoted by the same reference numerals, and repeated description thereof will be omitted.

[0013]

(Embodiment 1) FIG. 1 is a plan view showing a schematic configuration of a single-wafer plasma etching apparatus used in an etching process according to an embodiment of the present invention. In this apparatus, a plurality of wafers 1 stored in a cassette 3 in a load lock chamber 4 are successively and sequentially carried to an etching processing chamber 2 by an arm 6 in a buffer chamber 5, and are processed by an arm 6 after the processing. It is configured to be collected in the cassette 3 in the unload lock chamber 7. That is, the load lock chamber 4, the buffer chamber 5, and the unload lock chamber 7 constitute a spare chamber for supplying a wafer to the processing chamber 2.

The preparatory chamber is provided for keeping the processing chamber 2 in a vacuum state airtight with respect to the outside at atmospheric pressure. If the vacuum in the processing chamber 2 is broken each time the wafer 1 is taken in and out of the processing chamber 2, there is a large loss of time for evacuation to a vacuum state, and in addition, there is a possibility of causing contamination in the processing chamber 2. If the load lock chamber 4 is evacuated for each lot stored in the cassette 3 by providing the spare chamber, the vacuum of the processing chamber 2 can be maintained. Since the volume of 4 is small, a vacuum is reached in a short time.

The spare chamber may be configured such that the buffer chamber 5 is omitted and the wafer 1 is directly supplied from the load lock chamber 4 to the processing chamber 2. The processing chamber 2 includes a plurality of processing chambers 2. As a multi-chamber type apparatus provided in parallel, each processing chamber 2 may be configured to sequentially and sequentially process a plurality of wafers 1 in parallel.

FIG. 2 is a longitudinal sectional view showing the processing chamber 2 of the etching apparatus shown in FIG. The processing chamber 2 is separated from the buffer chamber 5 by a slit valve 8. The slit valve 8 is opened, and the wafer 1 to be processed is placed on a stage 9 by an arm, and then the slit valve 8 is closed. The wafer 1 is placed on a lifter 10 that can move up and down with respect to the stage 9, and the wafer 1 is placed on the stage 9 by lowering the lifter 10.

In the processing chamber 2, a voltage of, for example, 380 kHz is applied to the coil 12 provided around the chamber 11,
A voltage of, for example, 13.56 MHz is applied to the wafer 1.
The high electric field generated by exciting the coil 12 at high frequency generates plasma in the chamber 11 in a vacuum state. The molecules of the reaction gas flowing from the intake port 13 are decomposed by the plasma to generate a reaction product, and the generated reaction product is vertically attracted to the surface of the wafer 1 by the high-frequency bias generated in the high-frequency excited wafer 1. Anisotropic etching of the wafer 1 is performed. The reaction gas flowing from the intake port 13 is exhausted from the exhaust port 14 and
A constant vacuum is maintained inside.

The entire stage 9 on which the wafer 1 to be processed is mounted can be moved up and down. As shown by a broken line in FIG. By changing the distance, the processing characteristics such as the etching rate, uniformity, and charge-up can be changed, and the etching processing conditions can be optimized.

FIG. 3 shows that, when 25 wafers are continuously etched by the apparatus shown in FIG. 1 and FIG. It is a graph which shows the example which measured. The stage of the processing chamber is set at 50 ° C., and as shown in FIG. 3, the temperature, which was about 60 ° C. for the first wafer due to plasma, increases with the progress of the processing.
The temperature rises to about 70 ° C. for the fifth sheet, and reaches 80 ° C. for the 25th sheet.

[0020] Due to such a temperature change, the etching characteristics change between wafers that have been continuously processed, and the uniformity of the processing is impaired. In particular, when anisotropic etching is performed using a resist mask in which a resist is patterned in a predetermined pattern, the side wall protective film in which the etching products of the resist mask are polymerized and adsorbed on the pattern side wall is subjected to neutral etching. Vertical etching is achieved because it protects the sidewalls from seeds and prevents undercuts. If the temperature of the wafer changes in such an etching process, the sidewall of the pattern is not sufficiently formed and the pattern sidewall is etched, and fine patterning becomes difficult.

For this reason, in the etching process of the present embodiment, the temperature of the wafer 1 in the load lock chamber 4 is controlled in accordance with the temperature change in the processing chamber 2, and as shown by a broken line in FIG. Then, the temperature of the wafer 1 in the processing chamber 2 is made constant.
FIG. 4 is a graph showing the temperature control of the wafer 1 in the load lock chamber 4. As shown in FIG. 4, by giving the wafer 1 a temperature change that lowers the temperature of the wafer as the process proceeds, the above-mentioned temperature change in the processing chamber 2 is offset, and the temperature of the wafer 1 in the processing chamber 2 is kept constant. become.

In order to control the temperature, a heating means such as a temperature adjusting plate or a lamp is provided in the load lock chamber 4, and the heating means heats the wafer 1 in the preliminary chamber. In the heating of the wafer 1, only the wafer 1 to be processed next may be heated, or all the wafers 1 remaining in the load lock chamber 4 may be heated. In some cases, the heating means may be connected to the buffer chamber 5.
May be provided.

The wafer processing of the present embodiment includes a case where a plurality of small-diameter wafers are simultaneously and sequentially processed.

As described above, the present invention has been specifically described based on the above embodiments. However, the present invention is not limited to the above embodiments, and can be variously modified without departing from the gist thereof. Of course. For example, in the above description, the present invention has been described with respect to the etching process, but the present invention can also be applied to other processes such as an ashing process and a CVD process for continuously processing a plurality of wafers.

[0025]

The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows. (1) According to the present invention, there is an effect that the temperature of a wafer during processing can be kept constant by controlling the temperature in the preliminary chamber. (2) According to the present invention, there is an effect that the processing characteristics can be stabilized by the effect (1). (3) According to the present invention, there is an effect that the yield can be improved by the effect (2). (4) According to the present invention, the effect (1) has an effect that an increase in processing time can be prevented. (5) According to the present invention, the effect (1) eliminates the need for the aging process, so that the consumption of the dummy wafer can be reduced.

[Brief description of the drawings]

FIG. 1 is a plan view showing a schematic configuration of an etching apparatus used for a method of manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a longitudinal sectional view showing a processing chamber in FIG.

FIG. 3 is a graph showing a change in temperature of a wafer in a processing chamber as the processing proceeds.

FIG. 4 is a graph showing temperature control of a wafer in a load lock chamber.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Wafer, 2 ... Processing chamber, 3 ... Cassette, 4 ... Load lock chamber, 5 ... Buffer chamber, 6 ... Arm, 7 ... Unload lock chamber, 8 ... Slit valve, 9 ... Stage, 10 ...
Lifter, 11: chamber, 12: coil, 13: intake port, 14: exhaust port.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F004 AA01 BA20 BB13 BB18 BB25 BC05 BC06 BC08 CA04 EA21 FA01 5F031 CA02 FA01 FA12 FA15 GA37 MA06 MA28 MA30 MA32 PA18 5F045 AF19 BB08 DP03 DP21 DQ17 EB08 EK11 EK10

Claims (4)

[Claims] 1. A method for manufacturing a semiconductor device using an apparatus having a processing chamber for sequentially and sequentially processing a plurality of wafers and a spare chamber for supplying a wafer to the processing chamber. A method for controlling the temperature of the wafer in the pre-chamber in accordance with the temperature change of the semiconductor device, and keeping the temperature of the wafer in the processing chamber constant. 2. The method according to claim 1, wherein in the wafer temperature control, the temperature of the wafer is lowered as the processing proceeds. 3. The method for manufacturing a semiconductor device according to claim 1, wherein heating means for controlling the temperature of the wafer is provided in a preliminary chamber. 4. The method according to claim 1, wherein the processing is plasma dry etching.