JP2002343824A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JP2002343824A
JP2002343824A JP2001143058A JP2001143058A JP2002343824A JP 2002343824 A JP2002343824 A JP 2002343824A JP 2001143058 A JP2001143058 A JP 2001143058A JP 2001143058 A JP2001143058 A JP 2001143058A JP 2002343824 A JP2002343824 A JP 2002343824A
Authority
JP
Japan
Prior art keywords
semiconductor device
bonding wire
wire
resistance
connection terminals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001143058A
Other languages
Japanese (ja)
Inventor
Katsunori Suzuki
勝則 鈴木
Toshio Kishi
俊夫 岸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2001143058A priority Critical patent/JP2002343824A/en
Publication of JP2002343824A publication Critical patent/JP2002343824A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
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    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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Abstract

PROBLEM TO BE SOLVED: To increase heat dissipation property of a bonding wire and to change the protecting resistance of an input terminal and the output impedance of an output terminal in a semiconductor device. SOLUTION: A semiconductor device is constituted in such a structure that a high-heat dissipation property and long-capacity or high-resistance value bonding wire 24a and a protective circuit 25 capable of selecting a resistance are made to connect with a specified pad 22a out of pads 22, the heat radiation property of the device is enhanced, a protective circuit having a high withstand value to an overcurrent is formed, and the output impedance of an output terminal coincides with that of a device connected with the outside of a package.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、半導体集積回路
のパッケージにワイヤボンディング技術を用いた半導体
装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device using a wire bonding technique for a package of a semiconductor integrated circuit.

【0002】[0002]

【従来の技術】従来の半導体装置には、半導体集積回路
のチップ上に設けられた複数のパッドとリードフレーム
とを、ボンディングワイヤによって接続するワイヤボン
ディング技術を用いたものがある。図7は、このワイヤ
ボンディング技術によって形成された半導体装置の従来
例の構成を示す構成図である。
2. Description of the Related Art Some conventional semiconductor devices use a wire bonding technique for connecting a plurality of pads provided on a chip of a semiconductor integrated circuit and a lead frame with bonding wires. FIG. 7 is a configuration diagram showing a configuration of a conventional example of a semiconductor device formed by the wire bonding technique.

【0003】図7において、11は半導体集積回路(チ
ップ)で、このチップ上には接続端子である複数のパッ
ド12が形成されており、各パッド12とリードフレー
ム13がボンディングワイヤ14によって結線されてい
る。各ボンディングワイヤ14は、例えばAu(金)や
Cu(銅)などの同じ材質からなり、パッケージのフレ
ームとチップ間の抵抗値、熱放出性および容量は各端子
で同一の電気特性を有していた。
In FIG. 7, reference numeral 11 denotes a semiconductor integrated circuit (chip) on which a plurality of pads 12 as connection terminals are formed, and each pad 12 and a lead frame 13 are connected by bonding wires 14. ing. Each bonding wire 14 is made of the same material, for example, Au (gold) or Cu (copper), and each terminal has the same electrical characteristics in terms of resistance, heat release, and capacitance between the package frame and the chip. Was.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、従来の
半導体装置では、パッケージのフレームとチップ間の抵
抗値および容量が同一であるため、入力端子の保護抵抗
や出力端子の出力インピーダンスを変えることができな
いという問題点があった。
However, in the conventional semiconductor device, since the resistance value and the capacitance between the package frame and the chip are the same, the protection resistance of the input terminal and the output impedance of the output terminal cannot be changed. There was a problem.

【0005】また、熱放出性が悪い場合には、熱の影響
で動作の安定した製品が得られないという問題点があっ
た。
[0005] In addition, when the heat release property is poor, there is a problem that a product with stable operation cannot be obtained due to the influence of heat.

【0006】この発明は上記問題点に鑑みてなされたも
ので、熱放出性を高めることができ、また入力端子の保
護抵抗や出力端子の出力インピーダンスを変えることが
できる半導体装置を得ることを目的とする。
SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide a semiconductor device which can increase heat dissipation and can change a protection resistance of an input terminal and an output impedance of an output terminal. And

【0007】[0007]

【課題を解決するための手段】上記目的を達成するた
め、この発明にかかる半導体装置は、半導体集積回路の
チップ上に複数の接続端子を設け、該各接続端子にボン
ディングワイヤをそれぞれ接続してなる半導体装置にお
いて、前記接続端子のうちの特定の接続端子に少なくと
も一つ接続される熱放出性が高いボンディングワイヤを
備えたことを特徴とする。
In order to achieve the above object, a semiconductor device according to the present invention has a plurality of connection terminals provided on a chip of a semiconductor integrated circuit, and bonding wires are respectively connected to the connection terminals. The semiconductor device according to claim 1, further comprising a bonding wire having a high heat release property connected to at least one of the connection terminals.

【0008】この発明によれば、ボンディングワイヤと
して例えば熱放出性の良い材質のワイヤを使用する。
According to the present invention, for example, a wire made of a material having good heat release properties is used as the bonding wire.

【0009】つぎの発明にかかる半導体装置は、上記の
発明において、前記特定の接続端子に接続されるボンデ
ィングワイヤは、熱放出性が高く、かつ抵抗値が大きい
ことを特徴とする。
The semiconductor device according to the next invention is characterized in that, in the above invention, a bonding wire connected to the specific connection terminal has a high heat release property and a large resistance value.

【0010】この発明によれば、ボンディングワイヤと
して例えば熱放出性の良く、かつ高い抵抗値を有する材
質のワイヤを使用する。
According to the present invention, for example, a wire made of a material having a good heat release property and a high resistance value is used as the bonding wire.

【0011】つぎの発明にかかる半導体装置は、半導体
集積回路のチップ上に複数の接続端子を設け、該各接続
端子にボンディングワイヤをそれぞれ接続してなる半導
体装置において、前記接続端子のうちの特定の接続端子
に少なくとも一つ接続される容量値が大きいボンディン
グワイヤを備えたことを特徴とする。
In a semiconductor device according to the present invention, a plurality of connection terminals are provided on a chip of a semiconductor integrated circuit, and a bonding wire is connected to each of the connection terminals. And a bonding wire having a large capacitance value connected to at least one of the connection terminals.

【0012】この発明によれば、ボンディングワイヤと
して例えばサージ電流に対して耐量が高くなるように大
容量の材質のワイヤを使用する。
According to the present invention, a large-capacity material wire is used as the bonding wire, for example, so that the resistance to surge current is high.

【0013】つぎの発明にかかる半導体装置は、上記の
発明において、前記特定の接続端子に接続されるボンデ
ィングワイヤは、容量値が大きく、かつ抵抗値が大きい
ことを特徴とする。
A semiconductor device according to the next invention is characterized in that, in the above invention, a bonding wire connected to the specific connection terminal has a large capacitance value and a large resistance value.

【0014】この発明によれば、ボンディングワイヤと
して例えばサージ電流に対して耐量が高くなるように、
大容量で大きい抵抗値の材質のワイヤを使用する。
According to the present invention, the bonding wire has a high resistance to, for example, surge current.
Use a wire with a large capacity and a high resistance.

【0015】つぎの発明にかかる半導体装置は、上記の
発明において、前記特定の接続端子は、出力パッドまた
は入力パッドからなることを特徴とする。
A semiconductor device according to the next invention is characterized in that, in the above invention, the specific connection terminal comprises an output pad or an input pad.

【0016】この発明によれば、出力パッドまたは入力
パッドに接続されるボンディングワイヤとして例えば熱
放出性の良く、かつ高い抵抗値を有する材質のワイヤ
や、サージ電流に対して耐量が高くなるように大容量の
材質のワイヤを使用する。
According to the present invention, as a bonding wire connected to the output pad or the input pad, for example, a wire made of a material having a good heat release property and a high resistance value, or having a high resistance to a surge current. Use large capacity wire.

【0017】つぎの発明にかかる半導体装置は、半導体
集積回路のチップ上に複数の接続端子を設け、該各接続
端子にボンディングワイヤをそれぞれ接続してなる半導
体装置において、前記接続端子のうちの特定の接続端子
に接続され、外部からの過電流に対する耐量の高い保護
回路を備えたことを特徴とする。
In a semiconductor device according to the next invention, a plurality of connection terminals are provided on a chip of a semiconductor integrated circuit, and a bonding wire is connected to each of the connection terminals. And a protection circuit having a high resistance against an overcurrent from the outside.

【0018】この発明によれば、パッドに保護回路を接
続させ、例えばサージ電流に対して各抵抗を選択した
り、パッケージ外部に接続されるデバイスとの出力イン
ピーダンスを合わせる。
According to the present invention, the protection circuit is connected to the pad, for example, each resistor is selected with respect to a surge current, or the output impedance of a device connected to the outside of the package is matched.

【0019】つぎの発明にかかる半導体装置は、上記の
発明において、前記保護回路は、前記耐量を得るための
複数の抵抗と、前記抵抗を選択する選択手段とを有する
ことを特徴とする。
A semiconductor device according to the next invention is characterized in that, in the above invention, the protection circuit has a plurality of resistors for obtaining the resistance and a selection means for selecting the resistors.

【0020】この発明によれば、例えば並列に接続され
た複数の抵抗とヒューズとからなる保護回路を特定の接
続端子に接続させて、サージ電流に対して各抵抗を選択
したり、パッケージ外部に接続されるデバイスとの出力
インピーダンスを合わせる。
According to the present invention, for example, a protection circuit including a plurality of resistors and a fuse connected in parallel is connected to a specific connection terminal to select each resistor with respect to a surge current, or to connect the protection circuit to the outside of the package. Match the output impedance with the connected device.

【0021】つぎの発明にかかる半導体装置は、上記の
発明において、前記半導体装置は、前記特定の接続端子
に接続される少なくとも上記に記載のボンディングワイ
ヤの一つをさらに備えたことを特徴とする。
A semiconductor device according to the next invention is characterized in that, in the above invention, the semiconductor device further comprises at least one of the bonding wires described above connected to the specific connection terminal. .

【0022】この発明によれば、例えば熱放出性が高
く、抵抗値が大きくまたは容量の大きい材質のワイヤ
と、出力インピーダンスを合わせまたは電流に対する耐
量を高める保護回路を使用する。
According to the present invention, for example, a wire made of a material having a high heat release property, a large resistance value or a large capacity, and a protection circuit for matching the output impedance or increasing the resistance to current are used.

【0023】[0023]

【発明の実施の形態】以下に添付図面を参照して、この
発明にかかる半導体装置の好適な実施の形態を詳細に説
明する。
Preferred embodiments of a semiconductor device according to the present invention will be described below in detail with reference to the accompanying drawings.

【0024】実施の形態1.図1は、この発明の実施の
形態1の半導体装置の構成を示す構成図である。図1に
おいて、チップ21上には、パッド22が複数形成され
ており、これらパッド22には入力パッドと出力パッド
の両方が存在する。パッケージのリードフレーム23
は、パッド22に対応して同じ数形成されており、パッ
ド22とリードフレーム23は、ボンディングワイヤ2
4を介して接続されている。
Embodiment 1 FIG. 1 is a configuration diagram showing a configuration of the semiconductor device according to the first embodiment of the present invention. In FIG. 1, a plurality of pads 22 are formed on a chip 21, and these pads 22 have both input and output pads. Package lead frame 23
Are formed in the same number corresponding to the pads 22, and the pads 22 and the lead frame 23 are
4 are connected.

【0025】このパッド22のうちの特定パッド22a
に接続されるボンディングワイヤ24aには、熱放出性
の高いワイヤを使用し、例えば半導体装置内からの熱の
放出が容易になるように構成する。このようなボンディ
ングワイヤとしては、例えば熱伝導率の良いAl(アル
ミニウム)の材質からなるものや径の太いものを使用し
て、熱の放出を良くしてチップに与える熱の影響を防い
でいる。
A specific pad 22a of the pads 22
The bonding wire 24a connected to the semiconductor device is a wire having a high heat release property, for example, so that heat can easily be released from the inside of the semiconductor device. As such a bonding wire, for example, a wire made of an Al (aluminum) material having a high thermal conductivity or a wire having a large diameter is used to improve heat release and prevent the influence of heat on the chip. .

【0026】また、上述したごとくチップ21上のパッ
ド22には、入力パッドと出力パッドの両方が存在して
いるが、その際に特定パッド22aに接続されるボンデ
ィングワイヤ24aに、他のボンディングワイヤ24と
異なるもの、例えばパッケージ外部からのサージ電流や
過電流など(以下、「過電流」という)に対して耐量の
高い保護回路を形成するように大容量のワイヤを用い、
またパッケージ外部に接続されるデバイスとの出力イン
ピーダンスを合わせるためには、この出力インピーダン
スを合わせることができる大きい抵抗値のワイヤを用い
る。これにより、この実施の形態にかかる半導体装置で
は、保護抵抗や出力インピーダンスを変えることが可能
となる。
As described above, the pad 22 on the chip 21 has both an input pad and an output pad. At this time, the bonding wire 24a connected to the specific pad 22a is replaced with another bonding wire. 24, a large-capacity wire is used to form a protection circuit with a high resistance to surge current or overcurrent from the outside of the package (hereinafter referred to as “overcurrent”),
In order to match the output impedance with a device connected to the outside of the package, a wire having a large resistance value capable of matching the output impedance is used. Thereby, in the semiconductor device according to the present embodiment, it is possible to change the protection resistance and the output impedance.

【0027】また、図1に示すように、特定パッド22
aに保護回路25を接続させて、チップを保護すること
も可能である。図2は、図1に示した保護回路の回路構
成を示す構成図である。図2において、保護回路25
は、並列に接続された複数の抵抗25a(実施の形態1
では4つ)と、各抵抗25aに接続される抵抗選択回路
25bとで構成されている。抵抗選択回路25bは、例
えばヒューズなどで構成されており、入力する電流に対
して各抵抗25aを任意に選択することが可能になって
いる。これにより、過電流に対して各抵抗25aを選択
して耐量を高めたり、パッケージ外部に接続されるデバ
イスとの出力インピーダンスを合わせることが可能とな
る。
Also, as shown in FIG.
It is also possible to connect the protection circuit 25 to a to protect the chip. FIG. 2 is a configuration diagram showing a circuit configuration of the protection circuit shown in FIG. In FIG. 2, the protection circuit 25
Is a plurality of resistors 25a connected in parallel (Embodiment 1)
And four) and a resistor selection circuit 25b connected to each resistor 25a. The resistance selection circuit 25b is formed of, for example, a fuse or the like, and can arbitrarily select each resistance 25a with respect to an input current. This makes it possible to select each resistor 25a against an overcurrent to increase the resistance and to match the output impedance with a device connected outside the package.

【0028】この実施の形態1によれば、熱放出性の高
いワイヤを使用することで、半導体装置内からの熱の放
出が容易になるので、熱の放出を良くしてチップに与え
る熱の影響を防いで動作の安定した半導体装置を得るこ
とができる。
According to the first embodiment, the use of a wire having a high heat release property facilitates the release of heat from the inside of the semiconductor device. A semiconductor device with stable operation can be obtained while preventing the influence.

【0029】また、この実施の形態1によれば、特定の
ボンディングワイヤに大容量のワイヤや高抵抗値のワイ
ヤを用いることで、過電流に対して耐量を高めたり、パ
ッケージ外部に接続されるデバイスとの出力インピーダ
ンスを合わせることができるので、チップに与える損傷
などを防止することができる。
Further, according to the first embodiment, by using a large-capacity wire or a high-resistance wire as a specific bonding wire, the resistance against overcurrent can be increased or the specific bonding wire can be connected to the outside of the package. Since the output impedance with the device can be matched, damage to the chip can be prevented.

【0030】なお、保護回路25は、図1に示した特定
のボンディングワイヤ24aとは別個に単独に用いても
上記の効果を奏するものである。
The above-described effect can be obtained even if the protection circuit 25 is used independently of the specific bonding wire 24a shown in FIG.

【0031】実施の形態2.図3は、この発明の実施の
形態2の半導体装置の構成を示す構成図である。以下の
図において、図1と同一構成部分には、同一符号を付す
ものとする。図3において、チップ21上のパッド22
の中には出力パッド22bが存在している。出力パッド
22bは、リードフレーム23と熱放出性の高いボンデ
ィングワイヤ24bを介して接続されている。ボンディ
ングワイヤ24bは、実施の形態1に示したボンディン
グワイヤ24aと同じ構成のもので、例えば半導体装置
内部から発生した熱を放出することで、チップに与える
熱の影響を防いでいる。
Embodiment 2 FIG. 3 is a configuration diagram showing a configuration of the semiconductor device according to the second embodiment of the present invention. In the following drawings, the same components as those in FIG. 1 are denoted by the same reference numerals. In FIG. 3, the pad 22 on the chip 21
There is an output pad 22b inside. The output pad 22b is connected to the lead frame 23 via a bonding wire 24b having a high heat release property. The bonding wire 24b has the same configuration as the bonding wire 24a described in the first embodiment, and emits heat generated from inside the semiconductor device, for example, to prevent the influence of heat on the chip.

【0032】さらに、ボンディングワイヤ24bは、リ
ードフレーム23を介してパッケージ外部につながるデ
バイスとの出力インピーダンスをあわせることができる
抵抗値の大きいワイヤを用いる。このボンディングワイ
ヤ24bは、図4の等価回路に示すように、高抵抗値の
抵抗として表すことができ、例えば抵抗値の大きい材質
のもの、例えばAlなどを用いる。なお、図4中、26
はMOSトランジスタなどで構成されるデバイスであ
る。
Further, as the bonding wire 24b, a wire having a large resistance value capable of matching output impedance with a device connected to the outside of the package via the lead frame 23 is used. As shown in the equivalent circuit of FIG. 4, the bonding wire 24b can be expressed as a resistor having a high resistance value. For example, a material having a high resistance value, such as Al, is used. In addition, in FIG.
Is a device composed of a MOS transistor or the like.

【0033】この実施の形態2によれば、出力パッドに
接続されるボンディングワイヤに、実施の形態1と同様
に、熱放出性の高いワイヤを使用することで、熱の放出
を良くしてチップに与える熱の影響を防いで動作の安定
した製品を得ることができるとともに、大きい抵抗値の
ワイヤを使用することで、パッケージ外部に接続される
デバイスとの出力インピーダンスを合わせることができ
る。
According to the second embodiment, a high heat release wire is used for the bonding wire connected to the output pad, similarly to the first embodiment, so that the heat release is improved and the chip In addition, it is possible to obtain a product with stable operation by preventing the influence of heat on the device, and to use a wire having a large resistance value to match the output impedance with a device connected outside the package.

【0034】実施の形態3.図5は、この発明の実施の
形態3の半導体装置の構成を示す構成図である。図5に
おいて、チップ21上のパッド22の中には入力パッド
22cが存在している。ここで入力パッド22cが、例
えばチップを構成する信号処理回路など(図示せず)に
接続される入力パッドの場合には、パッケージ外部から
発生するサージ電流などの過電流によってチップが損傷
を受けることがある。そこで、この実施の形態3では、
入力パッド22cに接続されるボンディングワイヤ24
cに、パッケージ外部からの過電流に対して耐量の高い
保護回路を形成するような容量の大きいワイヤを用いる
ことで、チップ21に与える損傷を防止している。この
ボンディングワイヤ24cは、図6の等価回路に示すよ
うに、抵抗および大容量のコンデンサとして表すことが
できる。
Embodiment 3 FIG. 5 is a configuration diagram showing a configuration of the semiconductor device according to the third embodiment of the present invention. In FIG. 5, an input pad 22c exists in a pad 22 on a chip 21. If the input pad 22c is an input pad connected to, for example, a signal processing circuit (not shown) constituting the chip, the chip may be damaged by an overcurrent such as a surge current generated from outside the package. There is. Therefore, in the third embodiment,
Bonding wire 24 connected to input pad 22c
The damage to the chip 21 is prevented by using a wire having a large capacity for forming a protection circuit having a high resistance against an overcurrent from the outside of the package. This bonding wire 24c can be represented as a resistor and a large-capacity capacitor as shown in the equivalent circuit of FIG.

【0035】さらに、ボンディングワイヤ24cは、上
記抵抗の抵抗値の大きいワイヤを用いることで、過電流
のチップ21内への流入を防ぐ保護回路を形成させ、チ
ップ21に与える損傷などを防ぐことができる。このよ
うな材質のものとしては、上記と同様に、例えばAlな
どを用いることができる。
Further, by using a wire having a large resistance value of the above-described resistance as the bonding wire 24c, a protection circuit for preventing an overcurrent from flowing into the chip 21 is formed, thereby preventing damage to the chip 21 and the like. it can. As such a material, for example, Al or the like can be used in the same manner as described above.

【0036】この実施の形態3によれば、入力パッドに
接続されるボンディングワイヤに、実施の形態1と同様
に、大容量のワイヤを使用することで、過電流に対して
耐量を高めて、半導体装置内への過電流の流入を防ぐこ
とができるので、チップに与える損傷を防止することが
できる。
According to the third embodiment, a large-capacity wire is used for the bonding wire connected to the input pad, as in the first embodiment, so that the resistance against overcurrent is increased. Since overcurrent can be prevented from flowing into the semiconductor device, damage to the chip can be prevented.

【0037】なお、この実施の形態3では、上記の構成
に限らず、例えば入力パッドに実施の形態1に示した複
数の抵抗とヒューズとからなる保護回路25を接続させ
ることも可能である。この場合には実施の形態1と同様
の効果を得ることができる。
In the third embodiment, the present invention is not limited to the above configuration. For example, the protection circuit 25 including a plurality of resistors and fuses shown in the first embodiment can be connected to the input pad. In this case, the same effect as in the first embodiment can be obtained.

【0038】また、この発明は、上記の実施の態様に限
定されるものではなく、本発明の要旨を逸脱しない範囲
で種々の変形実施が可能である。
The present invention is not limited to the above embodiment, and various modifications can be made without departing from the spirit of the present invention.

【0039】[0039]

【発明の効果】以上説明したように、この発明によれ
ば、ボンディングワイヤとして熱放出性の良いワイヤを
使用するので、半導体内部などの熱放出性を高めること
ができるという効果を奏する。
As described above, according to the present invention, since a wire having a good heat release property is used as a bonding wire, there is an effect that the heat release property inside the semiconductor can be enhanced.

【0040】つぎの発明によれば、ボンディングワイヤ
として熱放出性の良く、かつ高い抵抗値を有するワイヤ
を使用するので、半導体内部などの熱放出性を高めるこ
とができるとともに、パッケージ外部につながるデバイ
スとの出力インピーダンスを合わせるように、出力端子
の出力インピーダンスを変えることができるという効果
を奏する。
According to the next invention, since a wire having a high heat release property and a high resistance value is used as the bonding wire, the heat release property inside the semiconductor can be enhanced, and the device connected to the outside of the package can be obtained. This has the effect that the output impedance of the output terminal can be changed so that the output impedance of the output terminal is matched.

【0041】つぎの発明によれば、ボンディングワイヤ
として大容量のワイヤを使用するので、過電流に対して
耐量を高めることができ、これによってチップに与える
損傷などを防ぐことができるという効果を奏する。
According to the next invention, since a large-capacity wire is used as the bonding wire, the resistance against overcurrent can be increased, and the effect of preventing damage to the chip can be prevented. .

【0042】つぎの発明によれば、ボンディングワイヤ
として大容量、かつ高抵抗値のワイヤを使用するので、
過電流に対して耐量が高めることができるとともに、パ
ッケージ外部につながるデバイスとの出力インピーダン
スを合わせるように、出力端子の出力インピーダンスを
変えることができるという効果を奏する。
According to the next invention, a large-capacity, high-resistance wire is used as the bonding wire.
This has the effect of increasing the resistance against overcurrent and changing the output impedance of the output terminal so as to match the output impedance with the device connected to the outside of the package.

【0043】つぎの発明によれば、出力パッドまたは入
力パッドに接続されるボンディングワイヤとして熱放出
性の良く、かつ高い抵抗値を有するワイヤや、大容量の
材質のワイヤを使用するので、熱放出性を高めることが
でき、パッケージ外部につながるデバイスとの出力イン
ピーダンスを合わせるように出力端子の出力インピーダ
ンスを変えることができ、また過電流に対して耐量を高
めることができ、これによってチップに与える損傷など
を防ぐことができるという効果を奏する。
According to the second aspect of the present invention, since a wire having a good heat release property and a high resistance value or a wire of a large capacity material is used as a bonding wire connected to the output pad or the input pad, the heat release is achieved. The output impedance of the output terminal can be changed to match the output impedance of the device connected to the outside of the package, and the resistance to overcurrent can be increased. This has the effect of preventing such problems.

【0044】つぎの発明によれば、特定の接続端子に保
護回路を接続させるので、過電流に対して各抵抗を選択
したり、パッケージ外部に接続されるデバイスとの出力
インピーダンスを合わせることができ、これにより入力
端子の保護抵抗や出力端子の出力インピーダンスを変え
ることができるという効果を奏する。
According to the next invention, since the protection circuit is connected to the specific connection terminal, it is possible to select each resistance against an overcurrent and to match the output impedance with a device connected outside the package. Thus, there is an effect that the protection resistance of the input terminal and the output impedance of the output terminal can be changed.

【0045】つぎの発明によれば、複数の抵抗とこの抵
抗の選択手段とからなる保護回路を特定の接続端子に接
続させるので、過電流に対して各抵抗を選択したり、パ
ッケージ外部に接続されるデバイスとの出力インピーダ
ンスを合わせることができ、これにより入力端子の保護
抵抗や出力端子の出力インピーダンスを変えることがで
きるという効果を奏する。
According to the next invention, since a protection circuit comprising a plurality of resistors and a means for selecting the resistors is connected to a specific connection terminal, each resistor can be selected for an overcurrent or connected to the outside of the package. The output impedance of the input terminal and the output impedance of the output terminal can be changed.

【0046】つぎの発明によれば、熱放出性が高く、高
抵抗値または大容量のワイヤと、出力インピーダンスを
合わせまた大容量の保護回路を使用するので、半導体内
部などの熱放出性を高めることができるとともに、パッ
ケージ外部につながるデバイスとの出力インピーダンス
を合わせるようにでき、さらに過電流に対して耐量を高
めることができ、これによって入力端子の保護抵抗や出
力端子の出力インピーダンスを変えることができるとい
う効果を奏する。
According to the next invention, the heat radiation is high, the output impedance is matched with the wire having a high resistance value or a large capacity, and the large capacity protection circuit is used. In addition, the output impedance of the device connected to the outside of the package can be matched, and the resistance to overcurrent can be increased.This can change the protection resistance of the input terminal and the output impedance of the output terminal. It has the effect of being able to do it.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 この発明の実施の形態1の半導体装置の構成
を示す構成図である。
FIG. 1 is a configuration diagram showing a configuration of a semiconductor device according to a first embodiment of the present invention;

【図2】 図1に示した保護回路の回路構成を示す構成
図である。
FIG. 2 is a configuration diagram illustrating a circuit configuration of a protection circuit illustrated in FIG. 1;

【図3】 この発明の実施の形態2の半導体装置の構成
を示す構成図である。
FIG. 3 is a configuration diagram showing a configuration of a semiconductor device according to a second embodiment of the present invention;

【図4】 図3に示したボンディングワイヤの等価回路
を示す図である。
FIG. 4 is a diagram showing an equivalent circuit of the bonding wire shown in FIG.

【図5】 この発明の実施の形態3の半導体装置の構成
を示す構成図である。
FIG. 5 is a configuration diagram illustrating a configuration of a semiconductor device according to a third embodiment of the present invention;

【図6】 図5に示したボンディングワイヤの等価回路
を示す図である。
6 is a diagram showing an equivalent circuit of the bonding wire shown in FIG.

【図7】 ワイヤボンディングを用いた半導体装置の従
来例の構成を示す構成図である。
FIG. 7 is a configuration diagram showing a configuration of a conventional example of a semiconductor device using wire bonding.

【符号の説明】[Explanation of symbols]

11,21 チップ、12,22 パッド、13,23
リードフレーム、14,24,24a,24b,24
c ボンディングワイヤ、22a 特定のパッド、22
b 出力パッド、22c 入力パッド、25 保護回
路、25a 抵抗、25b ヒューズ。
11,21 chips, 12,22 pads, 13,23
Lead frame, 14, 24, 24a, 24b, 24
c bonding wire, 22a specific pad, 22
b Output pad, 22c input pad, 25 protection circuit, 25a resistor, 25b fuse.

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 5F038 AV15 BE07 BH02 BH13 BH16 EZ20 5F044 AA07 FF05  ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F038 AV15 BE07 BH02 BH13 BH16 EZ20 5F044 AA07 FF05

Claims (8)

【特許請求の範囲】[Claims] 【請求項1】 半導体集積回路のチップ上に複数の接続
端子を設け、該各接続端子にボンディングワイヤをそれ
ぞれ接続してなる半導体装置において、 前記接続端子のうちの特定の接続端子に少なくとも一つ
接続される熱放出性が高いボンディングワイヤを備えた
ことを特徴とする半導体装置。
1. A semiconductor device comprising a plurality of connection terminals provided on a chip of a semiconductor integrated circuit, and a bonding wire connected to each of the connection terminals, wherein at least one of the connection terminals has a specific connection terminal. A semiconductor device comprising a bonding wire having a high heat release property to be connected.
【請求項2】 前記特定の接続端子に接続されるボンデ
ィングワイヤは、熱放出性が高く、かつ抵抗値が大きい
ことを特徴とする請求項1に記載の半導体装置。
2. The semiconductor device according to claim 1, wherein the bonding wire connected to the specific connection terminal has a high heat release property and a large resistance value.
【請求項3】 半導体集積回路のチップ上に複数の接続
端子を設け、該各接続端子にボンディングワイヤをそれ
ぞれ接続してなる半導体装置において、 前記接続端子のうちの特定の接続端子に少なくとも一つ
接続される容量値が大きいボンディングワイヤを備えた
ことを特徴とする半導体装置。
3. A semiconductor device in which a plurality of connection terminals are provided on a chip of a semiconductor integrated circuit and a bonding wire is connected to each of the connection terminals, wherein at least one of the connection terminals has a specific connection terminal. A semiconductor device comprising a bonding wire connected to a large capacitance value.
【請求項4】 前記特定の接続端子に接続されるボンデ
ィングワイヤは、容量値が大きく、かつ抵抗値が大きい
ことを特徴とする請求項3に記載の半導体装置。
4. The semiconductor device according to claim 3, wherein the bonding wire connected to the specific connection terminal has a large capacitance value and a large resistance value.
【請求項5】 前記特定の接続端子は、出力パッドまた
は入力パッドからなることを特徴とする請求項1〜4の
いずれか一つに記載の半導体装置。
5. The semiconductor device according to claim 1, wherein said specific connection terminal comprises an output pad or an input pad.
【請求項6】 半導体集積回路のチップ上に複数の接続
端子を設け、該各接続端子にボンディングワイヤをそれ
ぞれ接続してなる半導体装置において、 前記接続端子のうちの特定の接続端子に接続され、外部
からの過電流に対する耐量の高い保護回路を備えたこと
を特徴とする半導体装置。
6. A semiconductor device in which a plurality of connection terminals are provided on a chip of a semiconductor integrated circuit and a bonding wire is connected to each of the connection terminals, wherein the connection terminal is connected to a specific one of the connection terminals. A semiconductor device comprising a protection circuit having a high resistance to an overcurrent from the outside.
【請求項7】 前記保護回路は、前記耐量を得るための
複数の抵抗と、該各抵抗を選択する選択手段とを有する
ことを特徴とする請求項6に記載の半導体装置。
7. The semiconductor device according to claim 6, wherein the protection circuit has a plurality of resistors for obtaining the resistance and a selection unit for selecting each of the resistors.
【請求項8】 前記半導体装置は、前記特定の接続端子
に接続された少なくとも請求項1〜4のいずれか一つに
記載のボンディングワイヤをさらに備えたことを特徴と
する請求項6または7に記載の半導体装置。
8. The semiconductor device according to claim 6, wherein the semiconductor device further comprises at least one of the bonding wires according to claim 1 connected to the specific connection terminal. 13. The semiconductor device according to claim 1.
JP2001143058A 2001-05-14 2001-05-14 Semiconductor device Pending JP2002343824A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001143058A JP2002343824A (en) 2001-05-14 2001-05-14 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001143058A JP2002343824A (en) 2001-05-14 2001-05-14 Semiconductor device

Publications (1)

Publication Number Publication Date
JP2002343824A true JP2002343824A (en) 2002-11-29

Family

ID=18989259

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001143058A Pending JP2002343824A (en) 2001-05-14 2001-05-14 Semiconductor device

Country Status (1)

Country Link
JP (1) JP2002343824A (en)

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