JP2002343727A - Method and device for growing crystal and method for manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To grow a crystal which is uniform also in the peripheral portion of a substrate as is in its central portion. SOLUTION: This method for growing a crystal includes the steps of: arranging a substrate 5 and a dummy substrate 8 shaped like a doughnut outside the substrate 5 in a treatment space in a crystal growing device; setting various treatment conditions including the temperature and the degree of vacuum of the treatment space and the amount of supply of a treatment gas; supplying a predetermined gas into the treatment space to form a crystalline layer on the principal surface of the substrate; arranging a susceptor 9 having a groove 10 responding to the peripheral edge of the substrate and having a predetermined width in the treatment space; and arranging the substrate on the principal surface of the susceptor 9 such that the peripheral edge of the substrate is at the groove and the dummy substrate shaped like a doughnut to surround the substrate. A crystal is grown while the susceptor 9 is being turned. One layer or a plurality of layers made of a compound semiconductor is formed by a MOCVD method.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor crystal growth technique, for example, to a technique effective when applied to a semiconductor laser manufacturing technique.

[0002]

2. Description of the Related Art A modulator integrated semiconductor laser is used as a light source in a wavelength division multiplexing transmission optical communication system. The modulator integrated semiconductor laser is described in, for example, “Electronic Materials”, November 1999, P22 to P26, issued by the Industrial Research Council. According to the document, the quantum well structure causes a quantum confined Stark effect when an electric field is applied to the quantum well. The optical modulator using the quantum confined Stark effect has an extinction ratio per unit length of the waveguide (between ON and OFF). (The ratio of the amount of light transmission at the time of OFF) is high. In device fabrication, MOCVD (Metal Orga) is applied on an n-type InP substrate.
nic Chemical Vapor Deposition)
It is described that an AsP multiple quantum well active layer and an absorption layer are formed. Further, it is described that it is important to optimize the band gap of the modulator in order to reduce the wavelength chirp that deteriorates the transmission characteristics of the modulator integrated semiconductor laser.

As a MOCVD apparatus, for example, GaAs
An s-based MOCVD apparatus is known. This GaAs-based M
About OCVD equipment (Unit 2),
Homepage, http://qdot.iis.u-tokyo.ac.jp/setsub
It is disclosed in i / mo2.html.

Further, crystal growth (epitaxial growth) by MOCVD (metal organic chemical vapor deposition) method.
The technique of performing MOCVD by setting a semiconductor substrate (wafer) on a flat susceptor when performing the method is described in “III-V Group Semiconductor Mixed Crystal (Photonics Series 6), P138 to P140” issued by Corona. .

Japanese Patent Application Laid-Open No. 7-58040 discloses a susceptor for a vapor phase growth apparatus capable of reducing the deformation of a semiconductor wafer and uniformly heating the semiconductor wafer. This susceptor is a susceptor for a vapor phase growth apparatus having a circular counterbore for supporting a plane portion of a semiconductor wafer, wherein the susceptor has one annular convex portion concentric with the circular counterbore. An inner concave portion whose cross section is a concave portion is provided inside, and an outer concave portion whose cross section is a concave portion is provided outside. The depth of the outer concave portion is 1.2 to 2.0 times the inner concave portion.

[0006]

The crystal growth technology in the manufacture of semiconductor devices is an important technology that affects device performance. MOCV as one of the equipments for crystal growth
D devices are known. In a conventional MOCVD apparatus, when growing a crystal on the surface (main surface) of a semiconductor substrate having a large area called a wafer, the wafer is mounted on a flat susceptor.

The applicant also frequently uses a MOCVD apparatus for forming a compound semiconductor layer. For example, in the manufacture of optical devices, an MO using a conventional flat susceptor
When the crystal was grown by the CVD method, it was found that the composition changed in the peripheral portion of the wafer, the lattice constant was reduced, and the wavelength was shortened.

[0008] This change in composition can be caused, for example, by a Fabry-Perot laser diode (FPLD).
ode), the oscillation wavelength changes, and a distributed feedback laser diode (DFBLD: Distributed feedback l)
In the case of an aser diode, the dynamic characteristics deteriorate due to the non-uniform amount of detuning, and the electroabsorption type (EA: Electro Absorp)
) DFB laser diode with modulator (EA
-DFBLD), the margin is reduced in the trade-off relationship between the extinction ratio and the optical output, and the yield is reduced. And
All of these phenomena cause a reduction in the manufacturing yield of the semiconductor laser device.

Therefore, the present inventors have recognized that the change in crystal composition at the periphery of the wafer is a difference in crystal growth caused by heat generated by MOCVD, and analyzed and examined the structure of a susceptor on which the wafer was mounted. The present invention has been made.

An object of the present invention is to provide a crystal growth method capable of performing uniform crystal growth at the periphery of a substrate as well as at the center.

Another object of the present invention is to provide a crystal growth apparatus capable of performing uniform crystal growth at the peripheral edge of the substrate as in the central portion.

Another object of the present invention is to provide a method of manufacturing a semiconductor device having a high yield and stable characteristics.

Another object of the present invention is to provide a method of manufacturing an optical device having a high yield and stable characteristics.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0015]

The following is a brief description of an outline of typical inventions disclosed in the present application.

(1) A diffraction grating is partially formed on the main surface side of a semiconductor substrate (wafer), and one or more semiconductor layer formations including one active layer formation and one or more processings are performed. Performing a combination process and then forming electrodes on a predetermined portion to form a plurality of rows of optical device structures including a semiconductor laser (DFBLD); and cleaving the semiconductor substrate at predetermined intervals along a direction orthogonal to the rows. Forming a plurality of strips, forming predetermined reflection films on both end faces of the strips, and dividing the strips into respective optical device structures. In the step of forming the semiconductor layer, the susceptor having a groove having a predetermined width formed along the periphery of the semiconductor substrate and extending along the periphery of the semiconductor substrate is formed on the upper surface (main surface). space After arranging the semiconductor substrate, the semiconductor substrate is placed on the upper surface of the susceptor so that the peripheral edge of the semiconductor substrate is located on the groove without contacting the susceptor, and a donut shape is formed to surround the semiconductor substrate. A dummy substrate is arranged, and various processing conditions including a temperature of the processing space, a degree of vacuum, and a processing gas supply amount are set. Thereafter, a predetermined gas is supplied into the processing space and the semiconductor substrate is rotated while rotating the susceptor. Wherein a plurality of semiconductor layers are formed on the main surface.

The active layer of the semiconductor laser is formed in a multi-quantum well (MQW) structure. As the semiconductor layer, an InGaAsP layer, an InGaAs layer, and an InP layer are formed using a gas containing arsine or phosphine to form a semiconductor laser having an oscillation wavelength of 1.55 μm band. A control optical device structure for controlling a semiconductor laser is formed on the semiconductor substrate. The control optical device structure is, for example, a modulator, an amplifier, an attenuator, and the like. In this example, a modulator section is formed as the control optical device structure. The depth of the groove is about 0.4 to 0.5 mm, and the length of the periphery of the semiconductor substrate protruding above the groove is larger than zero and smaller than 10 mm.

A crystal growth apparatus for forming a crystal layer in the manufacture of such an optical device has the following configuration.

A processing space for crystal growth, a stage arranged in the processing space and controlled in rotation, a susceptor mounted on the stage for mounting an object to be processed, a temperature and a degree of vacuum of the processing space. A processing atmosphere control device group for setting various processing conditions including a processing gas supply amount, wherein the heating temperature of the peripheral portion of the substrate is set to a temperature lower than the heating temperature of a region inside the substrate. It has temperature control means that can be set. Specifically, the upper surface (main surface) of the susceptor extends along the peripheral edge of the workpiece and corresponds to the peripheral edge so that the workpiece can be placed without the peripheral edge contacting the susceptor. Existing groove having a predetermined width is provided. The depth of the groove is about 0.4 to 0.5 mm. The length of the periphery of the substrate protruding above the groove is greater than zero and less than 10 mm.

According to the means of (1), (a) a susceptor having a groove corresponding to the periphery of a semiconductor substrate (wafer) is used in forming an active layer (multiple quantum well structure). Does not directly contact the susceptor. As a result, the temperature of the peripheral edge of the wafer does not rise as compared with the portion directly in contact with the susceptor inside the wafer, the composition of the semiconductor layer is less likely to change, and a uniform semiconductor layer can be formed over substantially the entire area of the wafer. it can. Therefore, in the manufacture of an optical device including a semiconductor laser manufactured using this semiconductor layer, the optical device can be manufactured up to the vicinity of the outer periphery of the wafer, and the cost of the optical device can be reduced by increasing the number of acquisitions.

(B) In the case of InGaAsP-based crystals, the difference between the thermal decomposition efficiencies of the raw materials AsH ₃ and PH ₃ is large near the growth temperature. Therefore, in a configuration in which the entire wafer is in contact with the susceptor, the periphery of the wafer is higher in temperature than the inner part, the composition of P is larger than the center, the composition wavelength is shorter, and the lattice constant is smaller. However, according to the present invention, the peripheral edge of the wafer does not directly contact the susceptor due to the presence of the groove, and the depth and width of the groove are optimized, so that the peripheral edge of the wafer is appropriately heated, and the entire area of the wafer is uniform. Temperature. As a result, a uniform InGaAsP-based semiconductor layer can be formed.

(C) When the optical device is a DFBLD, the uniformization of the oscillation wavelength is linked to the uniformity of the detuning amount, whereby the dynamic characteristics are improved and the yield is improved.

(D) In the case where the optical device is a modulator integrated semiconductor laser (DFBLD), the uniformization of the oscillation wavelength causes a margin in the trade-off relationship between the extinction ratio and the optical output.
The yield can be improved.

(E) According to the above (c), an optical device including a 1.5 μm band semiconductor laser can be manufactured with high accuracy and high yield.

(F) In the crystal growth apparatus, a groove is provided on the surface of the susceptor on which the object is placed so as to correspond to the object. For example, when the object to be processed is a semiconductor substrate (wafer), the groove is formed along the periphery of the wafer and corresponding to the periphery, and has such a width that the periphery of the wafer does not directly contact the susceptor. The depth and width of the groove are set such that the temperature of the peripheral edge of the wafer is the same as the temperature of the portion directly in contact with the susceptor inside the wafer. Therefore, a uniform semiconductor layer can be formed over the entire area of the wafer.

[0026]

Embodiments of the present invention will be described below in detail with reference to the drawings. In all the drawings for describing the embodiments of the present invention, components having the same functions are denoted by the same reference numerals, and their repeated description will be omitted.

(Embodiment 1) In Embodiment 1, first, a crystal growth method and a crystal growth apparatus for forming a semiconductor layer on the surface (main surface) of a semiconductor substrate (wafer) with reference to FIGS. Will be described. Thereafter, a method for manufacturing a semiconductor laser device (semiconductor laser) and a method for manufacturing a semiconductor laser module incorporating the semiconductor laser device will be described.

FIG. 2 shows an embodiment (Embodiment 1) of the present invention.
Crystal growth apparatus (M
FIG. 2 is a schematic diagram illustrating an outline of an OCVD apparatus.

The MOCVD apparatus shown in FIG. 2 is of a horizontal type, and has a chamber 1 for forming a processing space for crystal growth, a stage 2 disposed in the chamber 1 and having a stage for mounting an object to be processed, and the stage And a loader / unloader device 3 for loading / unloading an object to be processed with respect to the section 2. Here, a semiconductor substrate (wafer) 5 will be described as an object to be processed.

The wafer 5 is held on the tip of the arm 4 of the loader / unloader device 3. The wafer 5 is loaded into the chamber 1 by the loader / unloader device 3, and the wafer 5 is unloaded from the chamber 1. Loaded. That is, the preliminary chamber 7 is connected to the chamber 1. A gate 6 opened and closed by turning on and off a gate valve between the chamber 1 and the spare chamber 7.
Is provided.

When loading / unloading a wafer, the tip of the arm 4 is put into the preliminary chamber 7, and the preliminary chamber 7 is made airtight. Thereafter, the preliminary chamber 7 is set to a predetermined atmosphere, the gate valve 6 is opened, the arm 4 advances, and the wafer 5 is supplied onto the stage.
When unloading a wafer, the wafer is carried out of the chamber 1 while holding the wafer at the tip of the arm 4. In the first embodiment, the wafer is placed and handled on the upper surface (main surface) of the susceptor 9 as shown in FIG.

The susceptor 9 has a groove 10 corresponding to the peripheral edge of the circular wafer 5 as shown in FIG. The groove 10 has a predetermined groove width c and a predetermined depth b so that the peripheral edge of the wafer 5 does not directly contact the susceptor 9. Further, the wafer 5 projects from the inner peripheral surface of the groove by a predetermined length (projection length a). Therefore, the susceptor differs for each different diameter of the wafer. As shown in FIG. 1 by an alternate long and two short dashes line, an orientation flat surface (OF) 11 composed of straight edges indicating the directionality of the wafer is provided on the outer periphery of the wafer 5. Therefore, this OF11
The groove 10 is provided along. For example, the depth b of the groove 10 is about 0.4 to 0.5 mm, and the length a of the wafer 5 protruding from the inner peripheral surface of the groove is larger than zero and smaller than 10 mm. The groove width c is 5 to 16 m.
m.

A doughnut-shaped dummy wafer 8 is arranged outside the wafer 5 so as to surround the wafer 5. For example, a clearance of about 0 to 2 mm is generated between the inner peripheral surface of the dummy wafer 8 and the outer peripheral surface of the wafer 5.

The susceptor 9 is made of, for example, carbon. In this embodiment, In 5 is used as the wafer 5.
The P semiconductor substrate is placed on the susceptor 9. The dummy wafer 8 is also InP, like the wafer 5. Although not particularly limited, the wafer 5 has a diameter of 2 inches and a thickness of 450 inches.
μm, dummy wafer 8 has a diameter of 3 inches and a thickness of 600 μm
It is.

The stage (not shown) of the stage section 2 is configured to be rotated by a motor 12 disposed outside the chamber 1. Therefore, the susceptor 9 rotates during the processing, and the main surface of the wafer 5 is uniformly vapor-phase chemically grown.

Further, the MOCVD apparatus has a processing atmosphere control device group for setting various processing conditions including the temperature of the processing space in the chamber 1, the degree of vacuum, and the supply amount of the processing gas. As the processing atmosphere control device, for example, a temperature control system for controlling the temperature in the chamber 1,
Evacuation system for controlling the degree of vacuum in the chamber, chamber 1
A gas supply system for supplying a predetermined gas into the inside.

The temperature control system includes a high-frequency coil 13a wound around the outer wall of the chamber 1, and a control unit (not shown) for controlling the high-frequency coil 13a. The wall of the chamber 1 has a double-wall structure, and is provided with a supply port 13b and a discharge port 13c provided to communicate with a space in the double wall. Then, cooling water 13d is supplied from the supply port 13b to cool the inside of the chamber wall. The wastewater 13e whose temperature has risen is discharged from the discharge port 13c.

The evacuation system includes an evacuation pipe 14a connected to the chamber 1, a filter 14b, a vacuum pump 14c, and an exclusion device 14 sequentially connected to the evacuation pipe 14a.
d. When the vacuum pump 14c operates under the control of a control unit (not shown), the processing space in the chamber 1 has a predetermined degree of vacuum.

The gas supply system has a pipe 15 a connected to the chamber 1. This pipe 15a is one at the connection with the chamber 1, but is branched into a plurality at the supply side. In one pipe 15x, hydrogen (H ₂ )
Gas is supplied. This hydrogen gas is purified after passing through the purifier 15b, and is branched into three pipes 15a and joined to the pipe 15a. One of the three branches is connected to a cylinder 15f containing trimethylindium (TMI) to supply the TMI. The other one is connected to a cylinder 15g containing triethyl gallium (TEG) and supplies TEG. Further, flow control devices (MFC) 15c to 15e are attached to the three branch pipes 15a on the purifier 15b side.

The other conduit 15y is connected to arsine (AsH).
₃ ) is connected to a cylinder 15j filled with
m and connected to the conduit 15a. The other pipe 15z is a cylinder 1 filled with phosphine (PH ₃ ).
5k, and connected to the pipeline 15a via the MFC 15n.

In the present specification, a supporting portion for supporting a wafer as a substrate is called a susceptor. The stage section 2 shown in FIG. 2 has a rotating stage on its upper surface side, and has a structure in which a susceptor is mounted on this stage. In this type of apparatus in which the substrate is not rotated, the portion on which the substrate is placed may be simply referred to as a susceptor.

When a semiconductor layer is formed on the main surface of the wafer 5 by using the above-described MOCVD apparatus, for example, as shown in FIG. 3, a multilayer crystal layer (semiconductor layer including an active layer in the manufacture of a modulator integrated semiconductor laser) is formed. When the layer is formed, a good semiconductor layer can be formed over the entire area of the wafer.

That is, as shown in FIG. 1, a semiconductor substrate (wafer) 5 made of InP is placed on a susceptor 9, and a dummy wafer 8 is arranged around the wafer 5. The susceptor 9 is placed at a predetermined position on the stage 2 in the chamber 1, and the motor 12 is driven to rotate the susceptor 9 as shown by an arrow. On the other hand, while maintaining the inside of the chamber 1 at a predetermined temperature and a predetermined degree of vacuum by operating the temperature control system, the vacuum exhaust system, and the gas supply system, a predetermined gas is sent to the semiconductor layer on the main surface of the wafer 5. Form. At this time, the susceptor 9 has a predetermined temperature.
Therefore, the semiconductor substrate portion in contact with the susceptor 9 is also heated by heat transfer, and the outer peripheral portion of the semiconductor substrate 5 located on the groove 10 of the susceptor 9 is radiated from the susceptor portion at the groove bottom or the groove outer peripheral portion. It will be heated.

FIG. 3 shows a portion of the wafer, ie, the portion of the wafer on which a single modulator integrated semiconductor laser is formed. The diffraction grating 16 is partially formed in advance on the main surface of the semiconductor substrate (wafer) 5 made of InP. In order to perform selective crystal growth, two selective growth masks 23 extending in parallel are partially formed on the main surface of the wafer 5. This selective growth mask 23 is formed of an insulating film.

The wafer 5 is housed in the MOCVD apparatus shown in FIG. 2, and the temperature and the degree of vacuum in the chamber 1 are properly maintained. Arsine and phosphine are flowed into the chamber 1 using hydrogen gas as a carrier gas. InGaAsP
Layers, semiconductor layers such as an InGaAs layer and an InP layer are sequentially formed. A modulator integrated semiconductor laser having an oscillation wavelength of 1.55 μm band is finally formed from the wafer 5 of the first embodiment.

As shown in a partially enlarged view of FIG. 3, an n-type InG is formed on the main surface of a semiconductor substrate (wafer) 5 made of InP.
aAsP guide layer 24, active layer 2 having MQW structure
5, a p-type InGaAsP guide layer 26, a p-type InP clad layer 27, and an InGaAsP cap layer 28 are sequentially provided. The MQW layer is composed of an InGaAsP barrier layer and InG
The structure is such that the aAs well layer is repeatedly stacked, and the number of well layers is nine. The thickness of the well layer is about 5 nm, and the thickness of the barrier layer is 8 nm.

At this time, the present inventor measured how much the peripheral portion changes with respect to the central portion of the semiconductor substrate (wafer) 5. The measurement is photoluminescence (P
L) The measurement was performed. That is, a laser beam (laser beam having a wavelength of 488 nm by an Ar laser) emitted from a laser oscillator (output: 0.2 W) is spot-irradiated (spot diameter: 1 to 2 mm) onto the wafer 5, and the photoluminescence light is split into a spectroscope slit. (4 mm) to detect with a detector to obtain a PL wavelength as shown in FIG. 4 (the wavelength at the center is set to 0). A PbS light receiving element is used as a detector. This PbS light receiving element can detect a wavelength of about 1.0 μm to about 1.6 μm.

As shown in FIG. 4, the PL scanning is performed on the wafer 5 from the right side toward the center (open circles at the measurement points), from the left side toward the center (black circles at the measurement points), and from the upper side toward the center ( (Measurement point square), and shows the relative PL wavelength of each. The bold line indicates the distribution state of a susceptor that is normally used (normal product) described later.

Here, a semiconductor laser (product) having a relative PL wavelength within ± 5 mm is defined as a C grade product, a product having a relative PL wavelength within ± 3 mm as a B grade product, and a product having a relative PL wavelength within ± 1 mm. In the case of the A grade product, in the normal product distribution, the region where the relative PL wavelength is within ± 5 nm is 6 mm from the center of the wafer (wafer) from the edge of the wafer.
(Approximately 8.5 mm within ± 3 nm). Therefore, a semiconductor laser having a predetermined oscillation wavelength cannot be manufactured in a region extending to about 6 mm from the edge of the wafer, and the yield is reduced.

On the other hand, according to the crystal growth method according to the first embodiment, the relative PL wavelength varies within ± 5 mm up to the edge of the wafer, that is, over the entire surface of the wafer, and the portion close to the wafer periphery is reduced. A semiconductor laser having a uniform wavelength can be manufactured, and the yield is significantly improved.

A grade B product having a relative PL wavelength within ± 3 mm cannot be manufactured in a region of about 8.5 mm from the edge of the wafer in a normal product distribution, and the yield is naturally further lowered. In this case, according to the first embodiment, the area that cannot be manufactured even with the B grade product is 2.5 mm from the edge of the wafer.
This is an extremely narrow region of about 3 mm, and can greatly improve the yield and quality as compared with the case where a normal susceptor is used.

According to the first embodiment, the yield and the quality of the A grade product can be improved as compared with the related art.

Next, the relative PL when crystal growth was performed using the two types of susceptors used in the experiment by the present inventors.
The wavelength distribution will be described. FIG. 5 is an explanatory diagram in the case of using two types of susceptors by experiments, a normal susceptor, and the susceptor according to the first embodiment. FIG. 5A illustrates an example using the susceptor according to the first embodiment, and FIG. FIG. 5B shows an example of a first experimental product susceptor, FIG. 5C shows an example of a second experimental product susceptor, and FIG. 5D shows an example of a normal susceptor. In each figure, the upper part shows a schematic plan view of the wafer mounted on the susceptor, and the lower part shows a schematic sectional view.
Each wafer has a diameter of 2 inches (〜50 mm).

FIG. 5A shows a method of performing crystal growth using the grooved susceptor according to the first embodiment. Susceptor 9
A groove 10 is provided on the principal surface of the wafer 5 corresponding to the peripheral edge of the wafer 5. The depth b of the groove 10 is 1.2 mm, and the groove width c is 11 m
m, the diameter d of the inner periphery of the donut-shaped groove 10 is 39 mm, and the diameter e of the outer periphery of the donut-shaped groove 10 is 61 mm. The doughnut-shaped dummy wafer 8 for preventing displacement is a 3 inch InP wafer and has an inner diameter of 51.5 mm. The crystal growth is performed while the flat surface portion on the inner periphery of the groove 10 supports the wafer 5 in a close contact state. Therefore, the susceptor 9 having the structure of the first embodiment is also referred to as a susceptor having a convex structure, and the above d is also referred to as a convex width.

FIG. 5B shows an example of a susceptor of the first experimental product. The wafer 5b is placed on the main surface of a susceptor 9b made of quartz, and the outer peripheral edge of the wafer 5b is covered with a donut-shaped cover wafer 8b. This is a method of performing crystal growth. An inner peripheral lower portion of the donut-shaped cover wafer 8b is provided with a counterbore, and the counterbore portion covers the outer peripheral edge of the wafer 5b. The cover wafer 8b is made of silicon, and the thickness h of the bottom of the counterbore is 0.2 mm. Also, the cover wafer 8
The inner diameter j of b is 48 mm.

FIG. 5C shows an example of a second experimental product susceptor, which is a carbon susceptor 9c. The susceptor 9c is provided with a depression 17 having a flat bottom surface larger than the diameter of the wafer 5c. The diameter s of the depression 17 is 52 mm and the depth t is 0.35 mm. The inner diameter u of the donut-shaped dummy wafer 8c is 46 mm, and the inner peripheral edge rests on the wafer 5c.

FIG. 5D shows a commonly used quartz susceptor 9d on which a wafer 5d is mounted on a flat main surface. Then, a plurality of small pieces 18 obtained by dividing the InP wafer are arranged so as to be in contact with the peripheral edge of the wafer 5d.

The wafer is 2 inches thick and 450 μm thick In.
The dummy wafer is a donut-shaped InP plate having a thickness of 600 μm and an outer diameter of 3 inches.

The graph showing the relative PL wavelength distribution in FIG. 4 is based on the first embodiment (FIG. 5A), which has already been described, and the distribution curve indicated by a thick line in FIG.
It is a normal goods distribution curve by (d).

The graph showing the relative PL wavelength distribution in FIG. 6 is based on the first experimental susceptor shown in FIG. 5B. The distribution curve of the thick line shown in the graph is shown in FIG.
It is a normal goods distribution curve by (d). As can be seen from this graph, the region where the variation of ± 5 mm or more occurs is in a range of about 9 mm from the wafer edge or about 12 mm from the wafer edge. As a result, the number of optical devices obtained from the wafer decreases.

The graph showing the relative PL wavelength distribution in FIG. 7 is based on the second experimental product susceptor shown in FIG. 5C. The distribution curve of the thick line shown in the graph is shown in FIG.
It is a normal goods distribution curve by (d). As can be seen from this graph, the region where the variation of ± 5 mm or more occurs is in a range of about 8 mm from the wafer edge or about 9 mm from the wafer edge. As a result, the number of optical devices obtained from the wafer decreases.

From this, the crystal growth using the susceptor 9 having the groove 10 according to the first embodiment can improve the quality and the yield.

Next, the present inventors increased the amount of strain (strain between the well layer and the barrier layer) of the active layer of the MQW structure (product A) and reduced the amount of strain of the active layer (product B). ) Was examined for changes in the relative PL wavelength distribution.

In the case of a product having a large amount of strain (product A), the thickness of the well layer is 8 nm (the number of well layers is 7), the thickness of the barrier layer is 10 nm, and the composition wavelength of the barrier layer is 1.3 μm.
m, the amount of strain in the MQW well layer is relaxed
It is + 0.6% in the state and about + 1.2% in the strain state.

In the case where the strain amount is reduced (product B), when the thickness of the well layer is 7 nm (the number of well layers is 6) and the thickness of the barrier layer is 8 nm, the composition wavelength of the barrier layer is 1.16 μm. The strain amount of the MQW well layer is + 0.3% in the relaxed state and about +0.6 in the strain state.
%.

Here, the strain state is
The a and b axes are aligned with the spacing of the underlying substrate lattice, and the c axis is expanded and contracted (mainly in a thin film state). The relaxed state is released from the substrate lattice spacing,
This is a state where the b and c axes are aligned (mainly a thick film state).

8 to 10 show that the depth b of the groove 10 of the susceptor 9 is 0.2 mm (FIG. 8), 0.5 mm (FIG. 9),
It is a graph which shows the relative PL wavelength distribution in the example (product A) which formed the active layer which increased the amount of distortion by changing it to 0.7 mm (FIG. 10). The convex width is 39 mm in each case.
It is. When the depth b of the groove 10 is 0.5 mm (FIG. 9), the dispersion of the relative PL wavelength is small up to the vicinity of the peripheral edge of the wafer 5, which indicates that the groove 10 is suitable for manufacturing an optical device. On the other hand, when the depth b of the groove 10 is set to 0.2 mm (FIG. 8) and 0.7 mm (FIG. 10), the variation in the relative PL wavelength around the wafer is large, and the yield is reduced when used. It turns out that it falls.

FIG. 14 shows the relative PL wavelength and the susceptor 9.
7 is a graph showing a correlation with the depth of the groove 10 and 3 mm, 5 mm, 10 mm, and 15 mm from the edge of the wafer and a relative PL wavelength at a position closer to the center of the wafer. From these graphs, for example, when the variation of the relative PL wavelength is within ± 5 mm, the depth b of the groove 10 is set to 0.1.
By setting the range from point A below 4 mm to point B slightly above 0.55 mm, the relative PL wavelength can be varied within ± 5 mm. Therefore, it is understood that the groove depth may be selected and used depending on the grade of the product, and it is understood that the depth of the groove 10 is appropriately about 0.4 to 0.5 mm.

FIG. 11 shows an example in which the groove depth b is 0.2 mm and the width of the protrusion is reduced to 30 mm, that is, the width c of the groove 10 is increased. In this example, it can be seen that the relative PL wavelength is ± 5 mm or more in a region about 4 mm inside the edge of the wafer. In addition, the variation inside 4 mm or more becomes large.

FIGS. 12 and 13 are graphs showing the relative PL wavelength distribution in an example (product B) in which an active layer with a reduced amount of distortion is formed. The distribution of product B is shown in FIGS.
As can be seen from FIG. Therefore, the susceptor can be used in common.

FIG. 15 is a graph showing the correlation between the protruding length a of the peripheral edge of the wafer 5 into the groove 10 and the relative PL wavelength.
If the protruding length a = 0 mm, the distribution is not good because the state is close to that of FIG. 5D, and since the protruding length a = 10 mm is the PL wavelength movement from this wafer dimension position since most of the experiments up to now, It is thought that it is necessary to make the heat smaller and apply heat uniformly. Therefore, the distance between 0 and 10 mm and FIG.
Considering the graph of No. 5, when the depth is 0.45 mm, the protrusion length is optimally 3 to 5 mm.

As described above, in the crystal growth method of the first embodiment, the temperature of the peripheral portion of the semiconductor substrate (wafer) 5 is lower than the temperature of the region inside the semiconductor substrate (wafer) 5 by using the susceptor 9 having the groove 10. Can be set to temperature state. By using such a temperature control means, it is possible to form an active layer that emits a uniform photoluminescence wavelength up to the vicinity of the periphery of the wafer, thereby improving the yield of semiconductor lasers.

The temperature control means may be a semiconductor substrate (wafer) by combining a plurality of heating means such as a high-frequency coil heating means, a lamp heating means, and a laser heating means, in addition to the structure for preventing the susceptor and the dummy wafer from being misaligned. )
May be set to a temperature lower than the temperature of the inner region of the semiconductor layer to manufacture a uniform and uniform semiconductor layer.

Next, a method for manufacturing the optical device according to the first embodiment will be described with reference to FIGS. In the first embodiment, a method of manufacturing a semiconductor laser element as an optical device, particularly, a method of manufacturing a distributed feedback semiconductor laser (modulator integrated semiconductor laser) in which a modulator is integrated,
A semiconductor laser module incorporating the semiconductor laser device will be described. 16 to 29 are diagrams related to the manufacture of the semiconductor laser device, and FIGS. 30 to 37 are diagrams related to the manufacture of the semiconductor laser module.

In the first embodiment, a technique for manufacturing a plurality of DFB semiconductor lasers (modulator integrated semiconductor lasers) having a modulator from one wafer will be described. This modulator integrated semiconductor laser has multiple quantum wells (M
The oscillation wavelength for forming the active layer having the QW structure is 1550 nm.
It is a semiconductor laser suitable for a light source for wavelength division multiplexing transmission that forms a band.

The semiconductor laser device (distributed feedback semiconductor laser device with modulator) 20 has a rectangular structure having a semiconductor laser portion 21 and a modulator portion 22 along the optical waveguide direction as shown in FIG. I have. The semiconductor laser unit 21 is provided with a diffraction grating 16 along an optical waveguide for determining an oscillation wavelength. The diffraction grating 16 is not provided in the modulator section 22.

Next, a method for manufacturing such a distributed feedback semiconductor laser (element) 20 with a modulator will be described.
In the manufacture of the semiconductor laser device 20, for convenience of explanation,
A description will be given of a state in which a single semiconductor laser element (semiconductor laser chip) is manufactured.

As shown in the flowchart of FIG. 16, the semiconductor laser device 20 has a diffraction grating (S101), a selective growth mask (S102), a first multilayer growth layer (S103), and a second multilayer growth layer. Formation (S104), mesa formation (S105), buried growth layer formation (S106),
Cap layer removal (S107), separation groove formation (S10)
8), formation of an insulating film (S109), formation of a p-electrode (S11)
0), back surface etching (S111), n-electrode formation (S1)
12), cleavage (strip formation: S113), reflection film formation (S114), and division (chip formation: S115).

First, as shown in FIG. 17, a diffraction grating 16 is selectively formed on a semiconductor substrate (wafer) 5 (S
101). FIG. 17 shows a portion for forming a single semiconductor laser device. In the following description, such a semiconductor substrate (wafer) 5 is partially shown.
In the manufacture of a semiconductor laser device, a thin semiconductor layer is formed in each step. Accordingly, in the following drawings, each semiconductor layer may be thin, and some of the drawings may be omitted for clarity. In addition, reference numerals may be omitted at various places.

As shown in FIG. 17, the semiconductor substrate (wafer) 5 is made of an n-type InP substrate, and its surface (principal surface, upper surface in FIG. 17) has a diffraction grating in a region f where the semiconductor laser portion 21 is formed. No diffraction grating is formed in the region g where the modulator 16 is formed and the modulator section 22 as the control optical device is formed. The element (chip) in the state of the distributed feedback semiconductor laser element 20 has a length of 600 μm and a width of 400 μm.
μm, and the thickness is 100 μm. The length Lf of the region f extending in the length direction of the chip is 400 μm, the length Lg of the region g is 160 μm, and the separation groove between the region f and the region g (see FIG. 23) is 40 μm.

Next, as shown in FIG. 18, a selective growth mask 23 made of two insulating films having the same width is formed along the center of the semiconductor substrate 5 so as to intersect (perpendicularly) the diffraction grating 16. Is performed (S102). This selective growth mask 2
Numeral 3 is a laminated film composed of, for example, a SiO ₂ film and a PSG (phosphosilicate glass) film.

Next, using the selective growth mask 23, a first multilayer growth layer is formed by, for example, a selective growth method by MOCVD (metal organic chemical vapor deposition) (S1).
03). Due to the formation of the first multi-layered growth layer, as shown in the partial enlarged view of FIG.
nGaAsP guide layer 24, active layer 25 having MQW (multiple quantum well) structure, p-type InGaAsP guide layer 2
6, a p-type InP cladding layer 27 and an InGaAsP cap layer 28 are sequentially provided. MQW layer is InGaAs
The structure is such that the P barrier layer and the InGaAs well layer are repeatedly stacked, and the number of well layers is nine. The thickness of the well layer is about 5 nm, and the thickness of the barrier layer is 8 nm.

In the selective growth method, the width of the selective growth mask 23 covering the main surface of the semiconductor substrate 5 and the thickness of each layer of the quantum well formed by the difference in the opening width between the masks are different. Therefore, the mask width and the aperture width are appropriately selected. In the first embodiment, the opening width W of the two selective growth masks 23 is 18 μm or less, for example, 18 μm.

The first multi-layer growth layer is formed by the MOCVD apparatus shown in FIG. 2 and by using the susceptor 9 shown in FIG.

Next, after removing the selective growth mask 23, as shown in FIG. 20, a second multilayer growth layer is formed on the main surface side of the semiconductor substrate 5 (S104). The formation of this second multilayer growth layer is also performed by the MOCVD apparatus shown in FIG. 2 and by using the susceptor 9 shown in FIG. The second multilayer growth layer includes a p-type InP layer 29, a p-type InGaAs layer 30, and an undoped InP layer (cap layer) 3 containing no impurities.
It consists of 1. Note that the InGaAsP cap layer 2
8 is first removed when the second multilayer growth layer is formed.

Next, as shown in FIG. 21, after an insulating film 32 is formed in a stripe shape on the main surface of the semiconductor substrate 5, mesa etching is performed using the insulating film as an etching mask to form a stripe-shaped mesa 33 into a chip. It is formed substantially along the center (S105). Etching is n-type InGaAsP
The process is performed over the guide layer 24 to the surface layer of the semiconductor substrate 5. The width of the narrowest middle part of the mesa 33 is 1-2 μm.
About. This mesa 33 forms an optical waveguide portion. Instead of etching, a stripe-shaped optical waveguide portion may be formed by implanting protons.

Next, as shown in FIG.
InP doped with iron (Fe) in recessed parts on both sides of 3
The buried growth layer 34 is formed (S106). This In
The P buried growth layer 34 is also formed by the MOCVD shown in FIG.
This is performed by an apparatus and using the susceptor 9 shown in FIG.

Next, as shown in FIG.
Is removed, and the InP layer (cap layer) 31 is removed (S107). Thereafter, a separation groove 35 having a width of 40 μm is formed between the region f and the region g (S108). This separation groove 35 extends beyond the p-type InGaAs layer 30
It is provided so as to reach the surface portion of the P layer 29.
As a result, due to the presence of the separation groove 35, the current applied to the semiconductor laser is not applied to the modulator, and the current applied to the modulator is not applied to the semiconductor laser.

Next, as shown in FIG. 24, an insulating film 36 is selectively formed on the main surface side of the semiconductor substrate (wafer) 5 (S109). The insulating film 36 is formed of the mesas 3 in the regions f and g.
3, it is provided on the chip end side in the area f, and is provided on both end sides in the area g.

Next, as shown in FIG. 25, an electrode formation layer 37 is provided on the main surface side of the semiconductor substrate (wafer) 5, and thereafter this electrode formation layer 37 is formed in a predetermined pattern by selective etching. As shown in FIG. 26, a p-electrode is formed (S110). The electrode forming layer 37 has, for example, a two-layer structure in which the lower layer is made of Cr and the upper layer is made of Au. By etching, a p-electrode 38a for a semiconductor laser is formed in a region f, and a p-electrode 38 for a modulator is formed in a region g.
An electrode 38b is formed (see FIG. 26). Part of these p-electrodes is formed with a wire-bonding pad having an area capable of performing wire-bonding at a portion off the mesa 33.

Next, the semiconductor substrate (wafer) 5 is polished and etched on the back surface to form a predetermined thickness (S111). By this process, the semiconductor substrate (wafer)
5 has a thickness of about 100 μm.

Next, as shown in FIG. 27, an n-electrode 39 is formed on the back surface of the semiconductor substrate (wafer) 5 (S11).
2). The n-electrode 39 becomes, for example, a common electrode for both the semiconductor laser and the modulator. The n-electrode 39 is, for example, A
It has a three-layer structure in which uGeNi, Pd, and Au are sequentially laminated.

Next, as shown in FIG. 28, the semiconductor substrate (wafer) 5 is cleaved to form a strip 40 (S1).
13). The width L of this strip is 600 μm, which is the length of the distributed feedback semiconductor laser device. This strip 40
A reflective film is formed on both sides of the substrate by sputtering or the like (S114). A high reflection film 41 is formed on the exposed surface side of the semiconductor laser portion, and a low reflection film 42 is formed on the exposed surface side of the modulator portion.
Is formed. The low reflection film 42 has, for example, a reflectance of 1% or less, and the high reflection film 41 has a reflectance of 90% or more.

Next, the strips 40 are cut at predetermined intervals to produce a distributed feedback semiconductor laser device 20 having a width K as shown in FIG. The width K is 400 μm.

Such a distributed feedback semiconductor laser device 2
Reference numeral 0 denotes a semiconductor laser module 45 incorporated in a predetermined package as shown in FIG. Next, FIG.
Semiconductor laser module 4 with reference to FIGS.
5 (assembly) will be described.

As shown in the flowchart of FIG. 30, the semiconductor laser module 45 is mounted on a chip (S20).
1) The steps of mounting a support substrate (S202), wire bonding (S203), incorporating a fiber (S204), filling with a gel (S205), vacuum defoaming (S206), baking (S207), and packaging (S208). Manufactured through

First, a plastic case 51 (see FIG. 32) with a guide for guiding the optical fiber, a plastic cap 58 (see FIG. 36) attached so as to cover the case 51, and a semiconductor laser device on one surface 20 and a groove 47 for mounting a light receiving element and guiding an optical fiber extending toward the semiconductor laser element 20.
Support substrate (silicon platform) 48 having
(See FIG. 31).

Although details of each part of the silicon platform 48 will not be particularly described, as shown in FIG. 31, a metallized layer of a predetermined pattern is provided on one surface (main surface), and a part of the silicon platform 48 is a bonding part for connecting a mounting part and a wire. Pad part,
Further, a positioning mark and the like when the semiconductor laser element 20 and the like are mounted are formed. Further, the discharge grooves 49 intersect with the grooves 47 provided on the main surface of the silicon platform 48.
Is provided. The discharge groove 49 plays a role of guiding the adhesive flowing in when fixing the optical fiber to the outside and preventing the adhesive from flowing to the semiconductor laser element 20 side.

Therefore, as shown in FIG. 31, the semiconductor laser element 20 and the light receiving element 50 are fixed to predetermined mounting portions of the silicon platform 48 (S20).
1). Since both the semiconductor laser element 20 and the light receiving element 50 have electrodes provided on the upper surface and the lower surface, the electrodes on the lower surface are electrically connected to the mounting portion by this bonding structure. The light receiving element 50 receives the backward laser light emitted from the semiconductor laser unit 21 of the semiconductor laser element 20 and monitors the laser light intensity.

Next, as shown in FIG.
The silicon platform 48 is fixed to the base plate 52 with a bonding material, for example, silver paste (S20).
2). The case 51 includes an optical fiber cable 53, a fiber guide 51 b for guiding an optical fiber 54 protruding from the end of the optical fiber cable 53, and a box-shaped main body 5 to which the silicon platform 48 is attached.
1a. The main body 51a has the base plate 52 made of a metal plate and a plurality of leads 55 extending inside and outside the main body 51a. The lead 55 is bent downward at the base portion protruding from the main body portion 51a, and has a so-called dual in-line shape. The inner ends of some of the leads 55 are located on the sides of the base plate 52 and constitute pad portions to which wires are connected.

Next, the upper electrodes of the semiconductor laser element 20 and the light receiving element 50 and the wiring portion of the silicon platform 48 are electrically connected by wires, and the pads of the silicon platform 48 and the inner ends of the leads 55 are also electrically conductive. (S203).
The wires are indicated by thick lines in FIG. 32, and reference numerals are omitted.

Next, as shown in FIG. 33, the fiber is incorporated (S204). Optical fiber cable 53
The coating material of a predetermined length is removed from the tip of the core, and a core made of quartz and a cladding (125 μm in diameter) covering the core are formed.
The optical fiber 54 of m) protrudes. The surface of the clad is covered with a metallized layer. Therefore,
The portion of the optical fiber 54 and the portion of the optical fiber cable 53 are fitted into the groove 56 of the main body portion 51a and fixed using a bonding material (not shown).

Prior to this fixing, the tip of the optical fiber 54 is fitted into the groove 47 of the silicon platform 48 shown in FIG.
Is positioned and fixed so as to face the laser beam emitting portion at the end of the semiconductor laser element 20 on the modulator section 22 side mounted thereon. For example, the semiconductor laser device 20
Is driven, and the optical fiber 54 is fixed in a state where the amount of laser light emitted from the semiconductor laser element 20 to be taken in the optical fiber 54 is maximized. FIG. 34 is a schematic diagram showing the positional relationship between the semiconductor laser device 20 and the tip of the optical fiber 54. The distance Q between the tip surface of the optical fiber 54 and the emission surface of the semiconductor laser device 20 is about 50 μm.

Next, as shown in FIG.
1a is filled with the silicone gel 57 (S205), and then subjected to a vacuum defoaming process (S206).
The bubbles (voids) contained in 7 are removed. afterwards,
The silicone gel 57 is cured by baking (S2).
07). Thereby, moisture resistance becomes good.

Next, as shown in FIG.
The semiconductor laser module 45 having the package 59 as shown in FIG. 37 is manufactured (S208). The cap 58 has the same external shape as the case 51.

Thus, one semiconductor substrate (wafer) 5
Can produce a large number of distributed feedback semiconductor laser devices 20, and by incorporating these distributed feedback semiconductor laser devices 20 in a predetermined package, it is possible to produce a plurality of semiconductor laser modules 45 as shown in FIG. it can.

According to the first embodiment, the following effects can be obtained. (1) In forming the active layer (multiple quantum well structure) 25,
Since the susceptor 9 having the groove 10 corresponding to the periphery of the semiconductor substrate (wafer) 5 is used, the periphery of the wafer 5 does not directly contact the susceptor. As a result, the temperature of the peripheral edge of the wafer 5 does not rise as compared with the portion directly in contact with the inner susceptor portion, the composition of the semiconductor layer is less likely to change, and a uniform semiconductor layer is formed over substantially the entire area of the wafer 5. can do. Therefore, in the manufacture of an optical device including a semiconductor laser manufactured by performing such crystal growth, it can be used for the manufacture of an optical device up to the vicinity of the outer periphery of the wafer, and the yield can be improved and the cost can be reduced. .

(2) In the production of InGaAsP-based crystals, the difference between the thermal decomposition efficiencies of the raw materials AsH ₃ and PH ₃ is large near the growth temperature. Therefore, in a configuration in which the entire wafer is in contact with the susceptor, the periphery of the wafer is higher in temperature than the inner part, the composition of P is larger than the center, the composition wavelength is shorter, and the lattice constant is smaller. However, according to the present invention, the peripheral edge of the wafer 5 does not directly contact the susceptor 9 because of the presence of the groove 10, and the depth and width of the groove 10 are optimized, so that the peripheral edge of the wafer 5 is appropriately heated. ,
The entire wafer has a uniform temperature. As a result, InGaAs
An sP-based homogeneous semiconductor layer can be formed. Therefore, it is possible to manufacture the distributed feedback semiconductor laser device 20 having the uniform oscillation wavelength.

(3) In the case of DFBLD, the uniformization of the oscillation wavelength is linked to the uniformity of the detuning amount, whereby the dynamic characteristics are improved and the yield is improved.

(4) In the modulator integrated semiconductor laser,
Uniformization of the oscillation wavelength allows a margin in the trade-off relationship between the extinction ratio and the optical output, and can improve the yield.

(5) In the crystal growth apparatus, a groove 10 is provided on the surface of the susceptor 9 on which the object is placed, corresponding to the object. For example, when the object to be processed is a semiconductor substrate (wafer) 5, the groove 10
And has a width such that the peripheral edge of the wafer 5 does not directly contact the susceptor 9. The depth and width of the groove 10 are set so that the temperature of the peripheral edge of the wafer 5 is the same as the temperature of the part directly in contact with the susceptor 9 inside the wafer 5. Therefore, a uniform semiconductor layer can be formed over the entire area of the wafer 5.

(Embodiment 2) FIGS. 38 to 41 relate to a method of manufacturing an optical device according to another embodiment (Embodiment 2) of the present invention. 38 is a schematic plan view showing a susceptor and a wafer used in crystal growth, FIG. 39 is a cross-sectional view taken along line EE of FIG. 38, and FIG. 40 is FF of FIG.
FIG. 41 is a cross-sectional view taken along a line, and FIG. 41 is a graph showing a correlation between the relative PL wavelength and the protruding length of the periphery of the wafer protruding into the groove.

In the second embodiment, as shown in FIG.
In the configuration of the first embodiment, the semiconductor substrate (wafer) 5 is positioned by the claws 70 provided on the susceptor 9 without using a dummy wafer. Embodiment 1
Then, a donut-shaped groove 10 is formed on the upper surface (main surface) of the susceptor 9.
The semiconductor substrate 5 is placed inside the groove 10, the dummy wafer 8 is placed outside the groove 10, and the position of the semiconductor substrate 5 is defined by the inner peripheral edge of the dummy wafer 8.

On the other hand, in Embodiment 2, as shown in FIGS. 39 and 40, the upper surface 9g of the inner susceptor inside the groove 10 of the susceptor 9 is compared with the upper surface 9h of the outer susceptor groove outside the groove 10. As a result, the projection is provided partially from the susceptor portion (outer peripheral wall) outside the groove 10, and the claw 70 is formed. Although not particularly limited, three claws 70 are provided at intervals of 120 degrees. Then, the positioning of the semiconductor substrate 5 is performed by the plurality of claws 70. The distance between the outer edge of the semiconductor substrate 5 and the tip of the claw 70 is
For example, it is about 0 to 2 mm.

To give an example of an actual example, a thickness of 0.
In the case of a semiconductor substrate 5 having a diameter of 4 mm and a diameter of 50 mm, the groove 10
Has an inner diameter of 43.5 mm and an outer diameter of the groove 10 is 61 m.
m, the depth of the groove 10 from the upper surface 9g of the groove inner susceptor is 0.
45 mm.

The height of the groove outer susceptor upper surface 9h is substantially the same as the height of the upper surface of the semiconductor substrate 5 placed on the groove inner susceptor upper surface 9g. This is because the semiconductor substrate portion protruding from the edge of the upper surface 9g of the susceptor inside the groove is also heated by radiant heat from the bottom portion of the groove 10 and the outside portion of the groove of the susceptor 9 at a predetermined temperature. This is to make the crystal grow uniformly from the center of the semiconductor substrate 5 to the outer peripheral edge.

When crystal growth is performed using the susceptor 9 having such a configuration, a distribution state of the relative PL wavelength as shown in the graph of FIG. 40 is obtained. The horizontal axis indicates the diameter of the upper surface 9g of the groove inner susceptor. When the relative PL wavelength is ± 3 nm, the range A is a preferable range. That is, 5
In the case of a semiconductor substrate 5 having a diameter of 0 mm, the susceptor 9 and the groove 1
When the dimension 0 is selected as described above, the diameter of the groove inner susceptor upper surface 9g is preferably, for example, about 42 to 43.5 mm.

In the second embodiment, uniform crystal growth can be performed as in the first embodiment. In the second embodiment, workability is improved because the dummy substrate is not used.

Although the invention made by the inventor has been specifically described based on the embodiment, the invention is not limited to the above embodiment, and various modifications can be made without departing from the gist of the invention. Needless to say, for example, in the above embodiment, the diffraction grating is formed on the semiconductor substrate, and then the multilayer growth layer forming the optical waveguide is formed. However, the multilayer growth layer including the active layer is formed on the main surface of the semiconductor substrate. After the formation, a method of forming a diffraction grating on the surface of the semiconductor layer on the active layer can be similarly applied and has the same effect.

Further, in the above embodiment, an example was described in which a modulator was incorporated as a control optical device for controlling a semiconductor laser. However, the present invention is not limited to this.
For example, other control optical devices include an amplifier and an attenuator, but the present invention can be similarly applied to a semiconductor laser incorporating these.

When the present invention is applied to the manufacture of a Fabry-Perot type semiconductor laser without incorporating a control optical device,
Many semiconductor laser devices having a uniform oscillation wavelength can be manufactured from one wafer.

In the embodiment, the example of crystal growth of a compound semiconductor has been described. However, the present invention can be similarly applied to the crystal growth technology of another semiconductor such as silicon (Si), and can be uniformly applied to the vicinity of the periphery of a semiconductor substrate (wafer). A homogeneous semiconductor layer can be formed. Therefore, a high-quality semiconductor device can be manufactured at a high yield, and the manufacturing cost of the semiconductor device can be reduced.

[0123]

The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.

(1) It is possible to provide a crystal growth technique for forming a uniform and uniform crystal growth layer at the periphery of a semiconductor substrate (wafer) as in the central portion.

(2) Since a uniform and uniform crystal layer can be formed near the periphery of the semiconductor substrate (wafer), a high-quality semiconductor device can be manufactured.

(3) More semiconductor devices can be manufactured from one semiconductor substrate (wafer), and cost can be reduced.

(4) More optical devices can be manufactured from one semiconductor substrate (wafer), and the cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a perspective view, partially in section, showing a susceptor and a wafer used in a crystal growth method according to an embodiment (Embodiment 1) of the present invention.

FIG. 2 is a schematic diagram illustrating an outline of a crystal growth apparatus (MOCVD apparatus) used in the crystal growth method of the first embodiment.

FIG. 3 is a schematic view showing a part of a wafer on which a semiconductor layer is formed by the crystal growth method of the first embodiment.

FIG. 4 is a graph showing a relative PL wavelength distribution of a semiconductor layer formed by the crystal growth method of the first embodiment.

FIG. 5 is a schematic diagram showing the structure of a susceptor used in the crystal growth method of the first embodiment and the structures of two types of susceptors and a normal susceptor by experiments.

FIG. 6 is a graph showing a relative PL wavelength distribution of a semiconductor layer formed using the first experimental product susceptor.

FIG. 7 is a graph showing a relative PL wavelength distribution of a semiconductor layer formed using the second experimental product susceptor.

FIG. 8 is a graph showing a relative PL wavelength distribution of a semiconductor layer having a large amount of distortion formed by setting the depth b of the groove to 0.2 mm in the susceptor having the configuration of the first embodiment.

FIG. 9 is a graph showing a relative PL wavelength distribution of a semiconductor layer having a large amount of distortion formed by setting the depth b of the groove to 0.5 mm in the susceptor having the configuration of the first embodiment.

FIG. 10 is a graph showing a relative PL wavelength distribution of a semiconductor layer having a large amount of distortion formed by setting the groove depth b to 0.7 mm in the susceptor having the configuration of the first embodiment.

FIG. 11 is a graph showing a relative PL wavelength distribution of a semiconductor layer having a large amount of distortion formed by forming a groove having a depth b of 0.2 mm and a convex width of 30 mm in the susceptor having the configuration of the first embodiment. is there.

FIG. 12 is a graph showing a relative PL wavelength distribution of a semiconductor layer having a small amount of distortion formed by forming a groove having a depth b of 0.2 mm and a convex width of 30 mm in the susceptor having the configuration of the first embodiment. is there.

FIG. 13 is a graph showing a relative PL wavelength distribution of a semiconductor layer having a small amount of distortion formed by forming a groove having a depth b of 0.7 mm and a convex width of 39 mm in the susceptor having the configuration of the first embodiment. is there.

FIG. 14 is a graph showing the correlation between the relative PL wavelength of the susceptor having the configuration of the first embodiment and the groove depth of the susceptor.

FIG. 15 is a graph showing the correlation between the relative PL wavelength of the susceptor having the configuration of the first embodiment and the protrusion length of the peripheral edge of the wafer protruding into the groove.

FIG. 16 is a flowchart illustrating a method for manufacturing the semiconductor laser device of the first embodiment.

FIG. 17 is a perspective view of a part of a semiconductor substrate in which a diffraction grating is partially formed in the method for manufacturing a semiconductor laser device of the first embodiment.

FIG. 18 is a cross-sectional view illustrating a method of manufacturing the semiconductor laser device according to the embodiment;
FIG. 3 is a perspective view of a semiconductor substrate portion where two selective growth masks are formed so as to cross a diffraction grating groove.

FIG. 19 is a cross-sectional view of the method of manufacturing the semiconductor laser device,
It is a perspective view of the semiconductor substrate part in which the 1st multilayer growth layer was formed.

FIG. 20 is a cross-sectional view illustrating a method of manufacturing the semiconductor laser device according to the embodiment;
It is a perspective view of the semiconductor substrate part in which the 2nd multilayer growth layer was formed.

FIG. 21 is a cross-sectional view of the method of manufacturing the semiconductor laser device,
It is a perspective view of the semiconductor substrate part in which the mesa was formed.

FIG. 22 is a cross-sectional view illustrating the method of manufacturing the semiconductor laser device;
It is a perspective view of the semiconductor substrate part in which the buried growth layer was formed.

FIG. 23 is a cross-sectional view illustrating a method of manufacturing the semiconductor laser device according to the embodiment;
It is a perspective view of the semiconductor substrate part in which the separation groove was formed.

FIG. 24 is a cross-sectional view of the method of manufacturing the semiconductor laser device,
FIG. 3 is a perspective view of a semiconductor substrate portion on which an insulating film is formed.

FIG. 25 is a cross-sectional view of the method of manufacturing the semiconductor laser device,
It is a perspective view of the semiconductor substrate part in which the electrode formation layer was formed.

FIG. 26 is a cross-sectional view illustrating a method of manufacturing the semiconductor laser device according to the embodiment;
It is a perspective view of the semiconductor substrate part in which the p electrode was formed.

FIG. 27 is a cross-sectional view of the method of manufacturing the semiconductor laser device,
It is a perspective view of the semiconductor substrate part in which the n electrode was formed.

FIG. 28 is a cross-sectional view of the method of manufacturing the semiconductor laser device,
It is a perspective view of the semiconductor substrate part which formed the reflective film on the cleavage surface of the strip formed by cleavage.

FIG. 29 is a cross-sectional view of the method of manufacturing the semiconductor laser device,
It is a perspective view of the semiconductor laser element obtained by dividing a strip.

FIG. 30 is a flowchart showing a method of manufacturing a semiconductor laser module by incorporating a semiconductor laser element manufactured by the manufacturing method of Embodiment 1;

FIG. 31 is a perspective view showing a support substrate on which a chip is mounted in the manufacture of the semiconductor laser module.

FIG. 32 is a perspective view showing a case where a support substrate is mounted and wire bonding is completed in the manufacture of the semiconductor laser module.

FIG. 33 is a schematic perspective view showing a state where a fiber is incorporated into a case in the manufacture of the semiconductor laser module.

FIG. 34 is a schematic plan view showing the positional relationship between the fiber tip and the semiconductor laser device.

FIG. 35 is a schematic perspective view showing a case filled with a gel in the manufacture of the semiconductor laser module.

FIG. 36 is a schematic perspective view showing a state in which a cap is attached to a case in manufacturing the semiconductor laser module.

FIG. 37 is a perspective view showing a completed semiconductor laser module.

FIG. 38 is a schematic plan view showing a susceptor and a wafer used in a crystal growth method according to another embodiment (Embodiment 2) of the present invention.

FIG. 39 is a sectional view taken along the line EE in FIG. 38;

FIG. 40 is a cross-sectional view of FIG. 38 taken along the line FF.

FIG. 41 is a graph showing a correlation between the relative PL wavelength of the susceptor having the configuration of the second embodiment and the protrusion length of the peripheral edge of the wafer protruding into the groove.

[Description of Signs] 1 ... chamber, 2 ... stage unit, 3 ... loader / unloader device, 4 ... arm, 5, 5b, 5c, 5d ... semiconductor substrate (wafer), 6 ... gate, 7 ... preliminary chamber, 8, 8b,
8c, 8d: dummy wafer, 9, 9b, 9c, 9d: susceptor, 9g: upper surface of groove inner susceptor, 9h: upper surface of groove outer susceptor, 10: groove, 11: orientation flat surface (OF), 12: motor, 13 ... Temperature control system, 13a high frequency coil, 13b supply port, 13c
Outlet 13d Cooling water 13e Drainage 14 Vacuum exhaust system 14a Exhaust pipe 14b Filter 14
c: vacuum pump, 14d: exclusion device, 15: gas supply system, 15a, 15x, 15y, 15z: pipeline, 15
b: Purifier, 15c, 15d, 15e, 15m, 15n
… MFC, 15f, 15g… Cylinder, 15j, 15k
... cylinder, 16 ... diffraction grating, 17 ... hollow, 18 ... small piece,
Reference numeral 20: semiconductor laser element (distributed feedback semiconductor laser element with modulator), 21: semiconductor laser section, 22: modulator section,
23 ... selective growth mask, 24 ... n-type InGaAsP guide layer, 25 ... active layer, 26 ... p-type InGaAsP guide layer, 27 ... p-type InP clad layer, 28 ... InGaAs
P cap layer, 29 ... p-type InP layer, 30 ... p-type InG
aAs layer, 31: undoped InP layer, 32: insulating film, 33: mesa, 34: InP buried layer, 35: isolation groove, 36: insulating film, 37: electrode forming layer, 38a, 38b
... p electrode, 39 ... n electrode, 40 ... strip, 41 ... high reflection film, 42 ... low reflection film, 45 ... semiconductor laser module,
47 ... groove, 48 ... silicon platform (support substrate), 49 ... discharge groove, 50 ... light receiving element, 51 ... case,
51a: body portion, 51b: fiber guide, 52: base plate, 53: optical fiber cable, 54: optical fiber, 55: lead, 56: groove, 57: silicone gel,
58: cap, 59: package, 70: nail.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hiroaki Uehara 1-1 Nishiyokote-cho, Takasaki-shi, Gunma Hitachi East Semiconductor Corporation (72) Inventor Hironori Yanagisawa 1-1, Nishiyokote-cho, Takasaki-shi, Gunma Semiconductor East Hitachi (72) Inventor Yoshiaki Kato 1-1 Nishiyokote-cho, Takasaki City, Gunma Prefecture F-term (reference) 4K030 AA11 BA08 BA11 BA24 BA25 BA35 BB12 CA04 CA12 GA06 HA13 HA15 JA01 JA10 LA11 LA14 5F045 AA04 AB12 AB17 AB18 AC01 AC08 AC09 AF04 AF19 AF20 BB04 BB08 CA12 DA55 DP28 EB08 EJ04 EJ09 EK02 EK30 EM02 EM09 EN04 GB05 5F073 AA22 AA45 AA64 AA74 AA83 AB21 AB28 BA01 CA07 CB10 CB22 FA05 FA22 DA32 FA32 DA32 FA05

Claims (49)

[Claims] A step of mounting a substrate on a susceptor disposed in a processing space of a crystal growth apparatus; and a step of setting various processing conditions including a temperature, a degree of vacuum, and a supply amount of a processing gas in the processing space. A crystal growth method comprising a crystal growth step of supplying a predetermined gas into the processing space to form a crystal layer on a main surface of the substrate, wherein a heating temperature of a peripheral portion of the substrate is set to A crystal growth method, wherein the crystal is grown at a temperature lower than a heating temperature. 2. The crystal growth method according to claim 1, wherein the substrate is placed on the susceptor such that an outer peripheral portion of the substrate does not contact the susceptor. 3. A donut-shaped groove having a predetermined width extending along and along the periphery of the substrate on the upper surface of the susceptor, and having the same height on the susceptor inside and outside the groove. The substrate is placed on the susceptor inside the groove, and the periphery of the substrate is positioned on the groove without contacting the susceptor, and the donut-shaped dummy substrate is placed on the susceptor outside the groove. 3. The method according to claim 2, wherein the substrate is positioned at an inner peripheral edge of the dummy substrate. 4. The crystal growth method according to claim 3, wherein the thickness of the dummy substrate is the same as or approximate to the thickness of the substrate. 5. A donut-like groove having a predetermined width extending along and corresponding to the periphery of the substrate on the upper surface of the susceptor, and a plurality of claws protruding from an outer peripheral wall of the groove. 3. The method according to claim 2, wherein the substrate is positioned by the tips of the plurality of claws. 6. The crystal growth method according to claim 5, wherein the height of the upper surface of the groove outer susceptor outside the groove is higher than the upper surface of the groove inner susceptor inside the groove. 7. The crystal growth method according to claim 1, wherein crystal growth is performed while rotating said substrate. 8. A step of placing a substrate on a susceptor arranged in a processing space of a crystal growth apparatus; and a step of setting various processing conditions including a temperature, a degree of vacuum, and a supply amount of a processing gas in the processing space. A crystal growth method including a step of supplying a predetermined gas into the processing space to form a crystal layer on a main surface of the substrate, wherein the crystal growth method extends along the periphery of the substrate and corresponding to the periphery. Arranging a susceptor having a groove having a predetermined width formed on the upper surface in the processing space; and positioning the substrate on the upper surface of the susceptor such that a peripheral edge of the substrate is located on the groove without contacting the susceptor. A crystal growth method characterized by being placed on a top. 9. An upper surface of the susceptor has the same height inside and outside the groove, a donut-shaped dummy substrate is disposed on a susceptor outside the groove, and the groove is formed at an inner peripheral edge of the dummy substrate. 9. The method according to claim 8, wherein the positioning of the substrate disposed on the susceptor inside the substrate is performed. 10. A claw projecting from an outer peripheral wall of the groove at a plurality of positions, and the tips of the plurality of claws position the substrate mounted on the upper surface of the groove inner susceptor. 9. The crystal growth method according to item 8. 11. The crystal growth method according to claim 10, wherein the height of the upper surface of the groove outer susceptor outside the groove is higher than the upper surface of the groove inner susceptor inside the groove. 12. The crystal growth method according to claim 8, wherein crystal growth is performed while rotating said susceptor. 13. The crystal growth method according to claim 8, wherein one or more semiconductor layers are formed on the main surface of the semiconductor substrate. 14. The crystal growth method according to claim 8, wherein one or more compound semiconductor layers are formed on the main surface of the semiconductor substrate by MOCVD. 15. A processing atmosphere control apparatus group for setting various processing conditions including a processing space for performing crystal growth, a stage disposed in the processing space, and a temperature, a degree of vacuum, and a processing gas supply amount of the processing space. And a temperature control means capable of setting a heating temperature of a peripheral portion of the substrate to a temperature lower than a heating temperature of a region inside the substrate. 16. A processing space for performing crystal growth, a stage disposed in the processing space and controlled in rotation, a susceptor mounted on the stage for mounting an object to be processed, a temperature of the processing space, A processing atmosphere control device group for setting various processing conditions including a degree of vacuum and a processing gas supply amount, wherein a heating temperature of a peripheral portion of the substrate is lower than a heating temperature of a region inside the peripheral portion. A crystal growth apparatus comprising temperature control means capable of setting a state. 17. A processing space for performing crystal growth, a stage disposed in the processing space and controlled in rotation, a susceptor mounted on the stage for mounting an object to be processed, a temperature of the processing space, A crystal growth apparatus having a processing atmosphere control device group for setting various processing conditions including a degree of vacuum and a supply amount of a processing gas, wherein the processing object is placed so that a peripheral edge thereof can be placed without contacting the susceptor. A crystal growth apparatus, wherein a groove having a predetermined width is provided on an upper surface of the susceptor and extends along a peripheral edge of the workpiece and corresponding to the peripheral edge. 18. The crystal growth apparatus according to claim 17, wherein the depth of the groove is about 0.4 to 0.5 mm. 19. The crystal growth apparatus according to claim 17, wherein a length of the peripheral edge of the substrate protruding above the groove is larger than zero and smaller than 10 mm. 20. A claw projecting from the outer peripheral wall of the groove at a plurality of positions, and the tips of the plurality of claws position the substrate mounted on the upper surface of the susceptor inside the groove. 18. The crystal growth apparatus according to item 17. 21. The crystal growth apparatus according to claim 20, wherein the height of the upper surface of the groove outer susceptor outside the groove is higher than the upper surface of the inner groove susceptor inside the groove. 22. A semiconductor laser comprising a combination of one or more semiconductor layer formations including one active layer formation and one or more processing steps on a main surface of a semiconductor substrate, followed by electrode formation on a predetermined portion. Forming a plurality of rows of optical device structures including: cleaving the semiconductor substrate at predetermined intervals along a direction perpendicular to the rows to form a plurality of strips; A method of manufacturing an optical device, comprising: forming a predetermined reflective film; and dividing the strip into individual optical device structures, wherein the step of forming a multilayer semiconductor layer including the active layer includes: After disposing a susceptor in which a groove having a predetermined width extending along and corresponding to the periphery of the semiconductor substrate and formed on the upper surface thereof is formed in the processing space, the periphery of the semiconductor substrate contacts the susceptor. The semiconductor substrate is placed on the upper surface of the susceptor so as to be located on the groove without performing, and various processing conditions including a temperature of the processing space, a degree of vacuum, and a processing gas supply amount are set, and then the processing space is set. Supplying a predetermined gas into the semiconductor substrate to form a multi-layered semiconductor layer on the main surface of the semiconductor substrate. 23. An upper surface of the susceptor has the same height inside and outside the groove, a donut-shaped dummy substrate is arranged on a susceptor outside the groove, and the groove is formed at an inner peripheral edge of the dummy substrate. 23. The method for manufacturing an optical device according to claim 22, wherein the positioning of the substrate disposed on the susceptor inside the substrate is performed. 24. A claw projecting from an outer peripheral wall of the groove at a plurality of positions, and the tips of the plurality of claws are used to position the substrate mounted on the upper surface of the susceptor inside the groove. 23. The method for manufacturing an optical device according to 22. 25. The method of manufacturing an optical device according to claim 24, wherein the height of the upper surface of the groove outer susceptor outside the groove is higher than the upper surface of the groove inner susceptor inside the groove. 26. A diffraction grating is partially formed on the main surface side of a semiconductor substrate, and a combination of one or more semiconductor layer formations including one active layer formation and one or more processings is performed. Forming a plurality of rows of optical device structures including the semiconductor laser by forming electrodes on predetermined portions, and cleaving the semiconductor substrate at predetermined intervals along a direction orthogonal to the rows to form a plurality of strips A step of forming predetermined reflection films on both end surfaces of the strip, and a step of dividing the strip into optical device structures, wherein the active layer In the step of forming a multilayer semiconductor layer including: a susceptor having a groove having a predetermined width formed along the periphery of the semiconductor substrate and extending along the periphery is disposed in the processing space. rear The semiconductor substrate is placed on the upper surface of the susceptor such that the peripheral edge of the semiconductor substrate is located on the groove without contacting the susceptor, and the temperature of the processing space, the degree of vacuum, the processing gas supply amount, etc. A method of manufacturing an optical device, comprising: setting processing conditions; and then supplying a predetermined gas into the processing space to form a multi-layer semiconductor layer on a main surface of the semiconductor substrate. 27. An upper surface of the susceptor has the same height inside and outside the groove, a donut-shaped dummy substrate is disposed on a susceptor outside the groove, and the groove is formed at an inner peripheral edge of the dummy substrate. The method for manufacturing an optical device according to claim 26, wherein the positioning of the substrate disposed on the susceptor inside the substrate is performed. 28. A claw projecting from an outer peripheral wall of the groove at a plurality of positions, and the tips of the plurality of claws position the substrate mounted on the upper surface of the groove inner susceptor. 27. The method for manufacturing an optical device according to 26. 29. The method of manufacturing an optical device according to claim 28, wherein the height of the upper surface of the groove outer susceptor outside the groove is higher than the upper surface of the groove inner susceptor inside the groove. 30. The method according to claim 26, wherein the crystal growth is performed while rotating the susceptor. 31. The method according to claim 26, wherein a control optical device structure for controlling the semiconductor laser is formed on the semiconductor substrate. 32. The method for manufacturing an optical device according to claim 31, wherein a modulator section is formed as the control optical device structure. 33. The method according to claim 26, wherein the active layer of the semiconductor laser is formed in a multiple quantum well structure. 34. The semiconductor device according to claim 34, wherein the depth of the groove is about 0.4 to 0.5 mm, and the length of the periphery of the semiconductor substrate protruding above the groove is larger than zero and smaller than 10 mm. Item 29. The method for manufacturing an optical device according to item 26. 35. An InGaAsP layer or an InGaAs layer using a gas containing arsine or phosphine as the semiconductor layer.
27. A semiconductor laser having an oscillation wavelength of 1.55 .mu.m band by forming an s layer and an InP layer.
3. The method for manufacturing an optical device according to claim 1. 36. The light according to claim 26, wherein after a diffraction grating is partially formed on the main surface of the semiconductor substrate, a multilayer semiconductor layer including an active layer is formed on the diffraction grating. Device manufacturing method. 37. The method according to claim 26, wherein the diffraction grating is partially formed after forming a multi-layer semiconductor layer including an active layer on the main surface of the semiconductor substrate. 38. A diffraction grating is partially formed on the main surface side of the semiconductor substrate, and a combination of one or more semiconductor layer formations including one active layer formation and one or more processings is performed. Forming a plurality of rows of optical device structures including the semiconductor laser by forming electrodes on predetermined portions, and cleaving the semiconductor substrate at predetermined intervals along a direction orthogonal to the rows to form a plurality of strips Forming a predetermined reflective film on both end faces of the strip, manufacturing an optical device by dividing the strip into optical device structures, and mounting the optical device in a predetermined package. A step of forming a multi-layered semiconductor layer including the active layer, wherein the step of forming a multi-layered semiconductor layer including the active layer is performed along and along the periphery of the semiconductor substrate. After arranging a susceptor having a groove having a predetermined width formed on the upper surface in the processing space, the semiconductor substrate is so positioned that a peripheral edge of the semiconductor substrate is located on the groove without contacting the susceptor. Placed on the upper surface of the susceptor, set various processing conditions including the temperature of the processing space, the degree of vacuum, and the supply amount of processing gas, and then supply a predetermined gas into the processing space to set the main surface of the semiconductor substrate. A method of manufacturing a semiconductor laser module, comprising: forming a plurality of semiconductor layers on a substrate. 39. An upper surface of the susceptor has the same height inside and outside the groove, a donut-shaped dummy substrate is disposed on the susceptor outside the groove, and the groove is formed at an inner peripheral edge of the dummy substrate. The method for manufacturing an optical device according to claim 38, wherein the positioning of the substrate disposed on the susceptor inside the substrate is performed. 40. A claw projecting from an outer peripheral wall of the groove at a plurality of positions, and the tips of the plurality of claws position the substrate mounted on the upper surface of the susceptor inside the groove. 39. The method for manufacturing an optical device according to 38. 41. The method of manufacturing an optical device according to claim 38, wherein the height of the upper surface of the groove outer susceptor outside the groove is higher than the upper surface of the groove inner susceptor inside the groove. 42. The method of manufacturing a semiconductor laser module according to claim 38, wherein crystal growth is performed while rotating said susceptor. 43. The method according to claim 38, wherein a control optical device structure for controlling said semiconductor laser is formed on said semiconductor substrate. 44. The method according to claim 43, wherein a modulator section is formed as the control optical device structure. 45. The method according to claim 38, wherein the active layer of the semiconductor laser is formed in a multiple quantum well structure. 46. The semiconductor device according to claim 46, wherein the depth of the groove is about 0.4 to 0.5 mm, and the length of the periphery of the semiconductor substrate protruding above the groove is larger than zero and smaller than 10 mm. Item 39. The method for manufacturing a semiconductor laser module according to Item 38. 47. An InGaAsP layer or InGaAs layer using a gas containing arsine or phosphine as said semiconductor layer.
39. A semiconductor laser having an oscillation wavelength of 1.55 .mu.m band by forming an s layer and an InP layer.
3. The method for manufacturing a semiconductor laser module according to item 1. 48. The semiconductor according to claim 38, wherein after a diffraction grating is partially formed on the main surface of the semiconductor substrate, multiple semiconductor layers including an active layer are formed on the diffraction grating. Laser module manufacturing method. 49. The method of manufacturing a semiconductor laser module according to claim 38, wherein said diffraction grating is partially formed after forming a multi-layered semiconductor layer including an active layer on a main surface of said semiconductor substrate. .