JP2002333997A - System clock check method for microcomputer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the system clock check method of a microcomputer capable of detecting the generation of abnormality that an arithmetic processing speed is deteriorated in a system clock part. SOLUTION: A signal outputted from a microcomputer oscillation circuit 1 is branched, and supplied to a timer part 3 as a system different from a system to be supplied to a CPU, and dummy software whose arithmetic processing time is preliminarily known is executed by the CPU, and a time required for the execution is measured by a timer part, and when not less than a prescribed time is spent on the arithmetic processing of the dummy software, it is judged that abnormality is generated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcomputer system clock check method capable of detecting that an abnormality has occurred in a system clock section of a microcomputer used in a control device or the like.

[0002]

2. Description of the Related Art In the above-mentioned microcomputer, a clock signal generated by a microcomputer oscillation circuit is branched and supplied to a system clock section and a timer section. Arithmetic processing unit (CPU) that processes programs in the system clock section
The CPU processes a program in synchronization with a clock signal supplied from a microcomputer oscillation circuit.

[0003] As such a program, for example, when a microcomputer is built in a control device of a gas appliance,
There is a control program that controls the operation of gas appliances. This type of control program incorporates safety features,
For example, if it is not detected that the burner has been ignited even if a predetermined time has elapsed after the ignition operation, a function for closing a safety valve attached to a gas supply pipe for supplying gas to the burner is incorporated.

[0004]

When an abnormality occurs in the system clock section and the arithmetic processing in the CPU is completely stopped, for example, a watchdog timer circuit which constantly monitors the operation of the CPU stops the CPU. Detect and C
A predetermined process such as reset of the PU is performed. However, CP
When an abnormality such as a decrease in the processing speed of U occurs, it cannot be detected by a conventional countermeasure such as a watchdog timer circuit. And such a CP
If an abnormality occurs in which the processing speed of U decreases, if the CPU is programmed to perform a predetermined process after a predetermined time elapses on the program as in the above-described ignition confirmation function, the CPU wait time and There is a problem that the actual elapsed time does not match. For example, if the CPU is programmed to wait for 10 seconds and the CPU processing speed is reduced, the actual standby time becomes 10 seconds or more.

SUMMARY OF THE INVENTION In view of the above problems, the present invention provides a microcomputer system clock check method capable of detecting an abnormality such as a decrease in the arithmetic processing speed in the system clock section. As an issue.

[0006]

In order to solve the above problems, a microcomputer system clock check method according to the present invention comprises a microcomputer which supplies a clock signal output from a microcomputer oscillation circuit to a system clock section and a timer section. In a method of detecting an abnormality occurring in a system clock unit, a program processed in synchronization with a clock signal supplied to a system clock unit is processed, and a processing time of the program is reduced using a clock signal supplied to a timer unit. It is characterized in that when the measurement is performed and the processing time is longer than a preset processing time, it is determined that an abnormality has occurred in the system clock unit.

When an abnormality occurs in the system clock section and the arithmetic processing speed in the system clock section decreases, the time required for processing the program increases. Therefore, the program processing time in the system clock section is measured, and the time required for processing the program in a normal state of the system clock section is set in advance, and when the actual processing time is longer than the set time. It can be determined that an abnormality has occurred in the system clock unit.

The program used in this system clock check method only measures the processing time. Therefore, the above program may be a dummy program not related to the functions of the microcomputer.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to FIG. 1, reference numeral 1 denotes a microcomputer oscillation circuit having a built-in oscillation circuit having a crystal oscillator (not shown). This microcomputer oscillation circuit 1 has a frequency fx
Is set to oscillate. The signal of the frequency fx output from the microcomputer oscillation circuit 1 is branched and input to the prescaler 11 respectively. The prescaler 11 divides the frequency of the input signal of frequency fx and outputs four types of signals having different frequencies, for example, fx, fx / 2, fx / 4, and fx / 16.

Reference numeral 2 denotes a system clock section, which generates an operation clock signal for a central processing unit (CPU) not shown. Then, the selector 12 selects a signal of the frequency fx from the signals output from the prescaler 11 and supplies the selected signal to the system clock unit 2. This allows the CPU
Performs arithmetic processing in synchronization with a signal of frequency fx.

On the other hand, reference numeral 3 denotes a timer unit completely independent of the system clock unit 2, and a signal of a frequency fx / 4 is supplied via a selector 12. The timer unit 3 has a built-in timer for inputting a signal of the frequency fx / 4 and integrating the signal for each cycle. When the integrated value reaches a predetermined value, the integrated value is once reset to 0, and the integration is repeated up to the predetermined value.

Referring to FIGS. 2 and 3, when the flow shown in FIG. 2 is started, first, the integrated value of the timer in the timer section 3 is read (S1). Subsequently, dummy software is executed (S2). This dummy software is executed by a CPU that performs arithmetic processing in synchronization with an operation clock signal generated by the system clock unit 2. The contents of the dummy software are programmed so that a predetermined time is required when the CPU executes the program in synchronization with the signal of the frequency fx.

When the execution of the dummy software is completed, the integrated value of the timer in the timer section 3 is read again (S3). As for the integrated value read in S3 with respect to the integrated value read in S1 as described above, the newly integrated value increases during the execution time of the dummy software. Therefore, a difference ΔT between the integrated value read in S3 and the integrated value read in S1 is obtained (S4), and this ΔT is compared with a preset value α (S5). Α is a value corresponding to the time required when the CPU executes the dummy software at a normal operation processing speed. Therefore, there is no problem when ΔT is equal to or smaller than α. However, when ΔT is larger than α, some abnormality occurs in the system clock unit 2 and the CPU executes the arithmetic processing at a speed lower than the arithmetic processing speed of the century. Indicate what you are doing. The conventional watchdog timer cannot detect the occurrence of an abnormality unless the arithmetic processing is stopped. However, in the case of the present invention, when ΔT is larger than α, the process proceeds to step S6, and a predetermined error process is performed.

[0014]

As is apparent from the above description, the present invention can prevent the occurrence of an abnormality even if an abnormality occurs that cannot be detected by the conventional watchdog timer, that is, the operation processing speed of the CPU is reduced. Can be detected.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of an embodiment of the present invention.

FIG. 2 is a flowchart for performing abnormality detection.

FIG. 3 is a diagram for explaining integration in a timer unit;

[Explanation of symbols]

 1 microcomputer oscillation circuit 2 system clock section 3 timer section

Claims (2)

[Claims] 1. A method for detecting an abnormality occurring in a system clock section of a microcomputer for supplying a clock signal output from a microcomputer oscillation circuit to a system clock section and a timer section, the clock signal supplied to the system clock section. Process the program to be processed in synchronization with the timer, measure the processing time of the program using the clock signal supplied to the timer section, if the processing time is longer than the preset processing time, the system clock section A method of checking a system clock of a microcomputer, which determines that an abnormality has occurred. 2. The method according to claim 1, wherein the program is a dummy program not related to the function of the microcomputer.