JP2002330599A - Motor and disk device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a motor with high electric power efficiency and a disk device, which makes a highly accurate rotating-speed control in a prescribed direction without using a position-detecting element. SOLUTION: The disk device has a power transistor in a power supply part to rotatably drive its disk; a detected pulse signal Dt is outputted, by a voltage detection part responding to the terminal voltage of a coil; the energized span of the power transistor is controlled by an energizing operation block; a gradient-voltage signal, intermittently responding to the voltage difference between one of power-supply-terminal voltages of the three-phase coil and the common terminal voltage and having a prescribed voltage gradient, is generated by a gradient-generating device; a phase-pulse signal Pt is outputted, responding to the compared result of the gradient-voltage signal with a prescribed criterion voltage, by a phase-pulse-generating device; an instruction signal, which controls the rotating speed of the rotor and the disk with the phase-pulse signal Pt, is generated by an instruction part; and at least one power transistor is on-off operated with high-frequency switching, by a switching-operation block, responding to the instruction signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a motor and a disk drive including the motor.

[0002]

2. Description of the Related Art In recent years, motors for electronically switching a current path using a plurality of transistors have been widely used as motors for driving OA equipment and AV equipment. Disk devices such as an optical disk device (DVD device, CD device, etc.) and a magnetic disk device (HDD device, FDD device, etc.) are configured to include such a motor. FIG.
1 shows a conventional motor, and its operation will be described. The rotor 2011 has a field part made of a permanent magnet, and the position detector 2041 detects the magnetic field of the field part of the rotor 2011 with three position detecting elements. That is, from the three-phase output signals of the three position detecting elements responding to the rotation of the rotor 2011, the position detector 2041 obtains two sets of three-phase voltage signals Kp.
1, Kp2, Kp3 and Kp4, Kp5, Kp6 are created. The first distributor 2042 includes voltage signals Kp1, Kp2,
Three-phase lower signals Mp1, Mp2, Mp in response to Kp3
3 and the lower NPN-type power transistor 202
1, 2022, and 2023 are controlled. The second distributor 2043 generates three-phase upper signals Mp4, Mp5, and Mp6 in response to the voltage signals Kp4, Kp5, and Kp6, and generates upper PNP-type power transistors 2025, 2026.
2027 is controlled. Thereby, the coil 201
2, 2013 and 2014 are supplied with three-phase drive voltages.

[0003]

In this conventional configuration,
The power loss in the power transistor was large, and the power efficiency of the motor was extremely poor. NPN-type power transistors 2021, 2022, and 2023 and PNP-type power transistors 2025, 2026, and 2027 respond to the output signals of the three position detecting elements and have their emitters.
The voltage between the collectors is controlled in an analog
2, 2013, 2014. The residual voltage of each power transistor is large,
The product of the residual voltage and the drive current to the coil caused large power loss and heat generation. As a result, the power efficiency of the motor was poor, and the power consumption of the disk device was large. Also,
The temperature rise of the disk due to power loss and heat generation of the disk device is large, and bit errors often occur in information recording / reproduction on the disk.

In US Pat. No. 5,982,118, a power transistor is formed by using two sensor outputs.
A motor in which power consumption is reduced by performing WM operation (PWM: pulse width modulation) is described. However, FIG.
5 and US Pat. No. 5,982,118.
In the motor configuration described in the specification, three or two position detecting elements for detecting the rotational position of the rotor are included, so that space and wiring for mounting the position detecting elements are complicated, resulting in an increase in cost. . US Patent 5,12
No. 2,715 and U.S. Pat. No. 5,473,232 describe a motor that detects a terminal voltage of a coil and switches a current path to the coil in response to the detection timing. In the motor configuration disclosed in U.S. Pat. No. 5,122,715, the width of energization is 120 degrees, and vibration and noise are large. Moreover, it has a complicated configuration using a switching regulator. US Patent 5,47
In the motor configuration disclosed in Japanese Patent No. 3,232, the power transistors are operated by PWM to reduce the power loss. However, the width of conduction of each power transistor is 120 degrees, and vibration and noise are increased. Further, in the motor configuration of U.S. Pat. No. 5,473,232, the PWM
The timing at which the terminal voltage of the coil is detected is easily changed by the operation. Therefore, when the speed of the rotor is controlled by the detection pulse corresponding to the terminal voltage of the coil, the speed of the rotor fluctuates due to the temporal fluctuation of the detection pulse.

In magnetic disk devices such as HDDs and optical disk devices such as DVDs, it is necessary to minimize speed fluctuations (jitter) in order to stably perform recording / reproducing operations on high-density disks. However, when the power transistor performs the PWM operation, a very large high-frequency switching noise occurs, and the detection pulse fluctuates. Therefore, the reliability of the recording / reproducing operation of the disk device is significantly deteriorated, and it has been difficult to operate the power transistor in the PWM operation. An object of the present invention is to provide a motor and a disk device that solve the above-mentioned problems individually or simultaneously.

[0006]

According to the present invention, there is provided a motor comprising a rotor provided with a field portion for generating a field magnetic flux, and a Q-phase (where Q is 3 or more) provided on a stator. An integer) coil, voltage supply means having two output terminals for supplying a DC voltage, and Q number of power supplies for supplying power from the first output terminal side of the voltage supply means to one end of the Q-phase coil. A first power transistor, and Q second power transistors for supplying power from a second output terminal side of the voltage supply means to one end of the Q-phase coil;
And a voltage detecting means for generating a detection pulse signal in response to the terminal voltage of the Q-phase coil, and a phase pulse signal in response to the terminal voltage of the Q-phase coil. Phase detection means, state transition means for changing a holding state in response to a detection pulse signal of the voltage detection means, and the Q first power supply means in response to the holding state of the state transition means. Power supply control means for controlling a power supply section of the power transistor and the Q second power transistors; command means for generating a command signal corresponding to the rotation speed of the rotor by the phase pulse signal; In response to the command signal, at least one of the Q first power transistors and the Q second power transistors has a high frequency. A motor comprising a switching operation means for switching operation, wherein the energization control means 360 of each energization period of said Q pieces of first power transistors and said Q pieces of second power transistors
/ Q degree, the switching operation means generates a high-frequency switching pulse signal in response to the command signal, and causes the at least one power transistor to perform a high-frequency switching operation in response to the switching pulse signal. The phase detecting means generates a ramp voltage signal intermittently responding to a voltage difference between one of the power supply terminal voltages of the Q-phase coil and a common terminal voltage during a sampling period, and generates at least one gradient voltage signal during a period other than the sampling period. Ramp generating means for generating the ramp voltage signal having a substantially voltage ramp at a terminal of one capacitor element during a period, and generating the phase pulse signal in response to a comparison result between the ramp voltage signal and a reference voltage. And phase pulse generating means.

With this configuration, the switching operation means causes the power transistor of the power supply means to perform high-frequency switching, so that the power loss of the power transistor of the power supply means is greatly reduced, and the heat generated by the motor is greatly increased. Become smaller. The voltage detection means, the state transition means, and the conduction control means generate a detection pulse signal corresponding to the terminal voltage of the coil, and rotate the rotor in a predetermined direction in response to the detection pulse signal. Therefore, the position detecting element becomes unnecessary, and the configuration of the motor is simplified. Further, the energizing section of the first power transistor and the second power transistor is set to be longer than a period corresponding to 360 / Q degree in electrical angle, and the two power transistors are simultaneously energized in the switching of the current path. I have. As a result, the switching of the current path becomes smooth, the pulsation of the generated driving force is reduced, and the motor has low vibration and noise. Also, the ramp voltage signal generated at the terminal of one capacitor element intermittently responds to the voltage difference between one of the power supply terminal voltages of the Q-phase coil and the common terminal voltage during the sampling period. A voltage gradient is provided for at least one period. This makes it possible to create a ramp voltage signal almost exactly corresponding to the voltage difference between one of the power supply terminal voltages and the common terminal voltage. The phase detection means is
For example, a voltage difference between a specific one of a plurality of power supply terminal voltages and a common terminal voltage may be intermittently sampled. For example, a plurality of power supply terminal One of the terminal voltages may be selected, and the voltage difference between the selected power supply terminal voltage and the common terminal voltage may be intermittently sampled. As the common terminal voltage, the voltage of the common connection terminal of the Q-phase coil may be directly used,
For example, a voltage obtained by combining a plurality of power supply terminal voltages may be used. Since the ramp voltage signal intermittently responds to the voltage difference between one of the power supply terminal voltages and the common terminal voltage,
The ramp creating means can create a ramp voltage signal having an accurate voltage ramp at the terminals of a single capacitor element. Since the phase pulse signal responds to the ramp voltage signal, the phase pulse signal is not affected by the switching operation of the power transistor, and changes at an accurate timing. The command means generates a command signal corresponding to the rotation speed of the rotor by the phase pulse signal. The switching operation means causes the power transistor to perform a high-frequency switching operation in response to the command signal, and controls the power to the Q-phase coil. Thereby, the rotation speed of the rotor can be controlled with high accuracy. As a result, a motor that consumes less power, has less vibration and noise, and performs high-precision speed control can be realized at low cost.

A motor according to another aspect of the present invention includes a rotor provided with a field portion for generating a field magnetic flux, and a Q phase disposed on a stator (where Q is an integer of 3 or more).
And a voltage supply means having two output terminals for supplying a DC voltage, and Q first power supplies for supplying power from the first output terminal side of the voltage supply means to one end of the Q-phase coil. And a power supply means configured to supply power from the second output terminal side of the voltage supply means to one end of the Q-phase coil. Phase detecting means for generating a phase pulse signal corresponding to the terminal voltage of the Q-phase coil; state transition means for transitioning a holding state in response to the phase pulse signal of the phase detecting means; In response to the holding state, the Q first
Energizing control means for controlling energizing sections of the power transistor and the Q second power transistors; command means for generating a command signal corresponding to the rotation speed of the rotor by the phase pulse signal; Said Q
Switching operation means for performing high-frequency switching operation of at least one of the Q first power transistors and the Q second power transistors in response to the command signal. The energization control means sets each energization section of the Q first power transistors and the Q second power transistors to be greater than 360 / Q degrees, and the switching operation means outputs the command signal Generating a high-frequency switching pulse signal in response to
The power transistors in response to the switching pulse signal to perform a high-frequency switching operation, wherein the phase detecting means intermittently detects a voltage difference between one of the power supply terminal voltages of the Q-phase coil and a common terminal voltage during a sampling period. Gradient generating means for generating a ramp voltage signal responsive to the above, and generating the ramp voltage signal having a substantially voltage ramp at a terminal of one capacitor element in at least one period other than the sampling period; and the ramp voltage signal. And a phase pulse generating means for generating the phase pulse signal in response to the comparison result of the reference voltage.

With this configuration, since the switching operation means causes the power transistor of the power supply means to perform high-frequency switching, the power loss of the power transistor of the power supply means is greatly reduced, and the heat generation of the motor is greatly reduced. Become smaller. The phase detection means, the state transition means, and the conduction control means generate a phase pulse signal corresponding to the terminal voltage of the coil, and rotate the rotor in a predetermined direction in response to the phase pulse signal. Therefore, the position detecting element becomes unnecessary, and the configuration of the motor is simplified. Further, the energizing section of the first power transistor and the second power transistor is set to be longer than a period corresponding to 360 / Q degree in electrical angle, and the two power transistors are simultaneously energized in the switching of the current path. I have. As a result, the switching of the current path becomes smooth, the pulsation of the generated driving force is reduced, and the motor has low vibration and noise. Also, the ramp voltage signal generated at the terminal of one capacitor element intermittently responds to the voltage difference between one of the power supply terminal voltages of the Q-phase coil and the common terminal voltage during the sampling period. A voltage gradient is provided for at least one period. This makes it possible to create a ramp voltage signal almost exactly corresponding to the voltage difference between one of the power supply terminal voltages and the common terminal voltage. The phase detection means is
For example, a voltage difference between a specific one of a plurality of power supply terminal voltages and a common terminal voltage may be intermittently sampled. For example, a plurality of power supply terminal One of the terminal voltages may be selected, and the voltage difference between the selected power supply terminal voltage and the common terminal voltage may be intermittently sampled. As the common terminal voltage, the voltage of the common connection terminal of the Q-phase coil may be directly used,
For example, a voltage obtained by combining a plurality of power supply terminal voltages may be used. Since the ramp voltage signal intermittently responds to the voltage difference between one of the power supply terminal voltages and the common terminal voltage,
The ramp creating means can create a ramp voltage signal having an accurate voltage ramp at the terminals of a single capacitor element. Since the phase pulse signal responds to the ramp voltage signal, the phase pulse signal is not affected by the switching operation of the power transistor, and changes at an accurate timing. The command means generates a command signal corresponding to the rotation speed of the rotor by the phase pulse signal. The switching operation means causes the power transistor to perform a high-frequency switching operation in response to the command signal, and controls the power to the Q-phase coil. Thereby, the rotation speed of the rotor can be controlled with high accuracy. As a result, a motor that consumes less power, has less vibration and noise, and performs high-precision speed control can be realized at low cost.

A motor according to another aspect of the present invention includes a rotor having a field portion for generating a field magnetic flux,
Phase (here, Q is an integer of 3 or more) coil, voltage supply means having two output terminals for supplying a DC voltage, and a plurality of power transistors from the voltage supply means to the Q-phase coil in both directions. Power supply means for supplying a drive current of the phase, phase detection means for generating a phase pulse signal in response to the terminal voltage of the Q-phase coil, and the plurality of power supplies in response to the terminal voltage of the Q-phase coil. Energizing operation means for controlling an energizing section of the transistor; command means for generating a command signal corresponding to the rotation speed of the rotor by the phase pulse signal; and at least one of the plurality of power transistors of the power supply means. Switching operation means for performing high-frequency switching operation of the power transistors in response to the command signal, comprising: The energizing operation means sets each energizing section of the plurality of power transistors to be greater than 360 / Q degrees, and the switching operation means generates a high-frequency switching pulse signal in response to the command signal; In response to the switching pulse signal, one power transistor performs a high-frequency switching operation. And generating a ramp voltage signal having a substantially voltage ramp in at least one period other than the sampling period.
Slope generating means generated at the terminals of the capacitor elements,
Phase pulse generating means for generating the phase pulse signal in response to the ramp voltage signal.

With this configuration, since the switching operation means causes the power transistor of the power supply means to perform high-frequency switching, the power loss of the power transistor of the power supply means is greatly reduced, and the heat generated by the motor is greatly reduced. Become smaller. The energizing operation means controls the energizing section of the power transistor in response to the terminal voltage of the coil, and rotates the rotor in a predetermined direction. Therefore, the position detecting element becomes unnecessary, and the configuration of the motor is simplified. Further, the energizing section of the power transistor is set to be longer than a period corresponding to an electrical angle of 360 / Q degrees, and the two power transistors are simultaneously energized when the current path is switched. Thereby, the switching of the current path becomes smooth, the pulsation of the generated driving force becomes small,
A motor with low vibration and noise. Also, the ramp voltage signal generated at the terminal of one capacitor element intermittently responds to the voltage difference between one of the power supply terminal voltages of the Q-phase coil and the common terminal voltage during the sampling period. A voltage gradient is provided for at least one period. This makes it possible to create a ramp voltage signal almost exactly corresponding to the voltage difference between one of the power supply terminal voltages and the common terminal voltage. The phase detection means may intermittently sample a voltage difference between a specific one of the plurality of power supply terminal voltages and the common terminal voltage, for example, in response to an operation state of the energization control means. One of the plurality of power supply terminal voltages may be selected, and the voltage difference between the selected power supply terminal voltage and the common terminal voltage may be intermittently sampled. The common terminal voltage may directly use the voltage of the common connection terminal of the Q-phase coil, or may be, for example, a voltage obtained by combining a plurality of power supply terminal voltages. Since the ramp voltage signal intermittently responds to the voltage difference between one of the power supply terminal voltages and the common terminal voltage, the ramp generating means generates a ramp voltage signal having an accurate voltage ramp at a single capacitor element terminal. it can. Since the phase pulse signal responds to the ramp voltage signal, the phase pulse signal is not affected by the switching operation of the power transistor, and changes at an accurate timing. The command means generates a command signal corresponding to the rotation speed of the rotor by the phase pulse signal. The switching operation means causes the power transistor to perform a high-frequency switching operation in response to the command signal, and controls the power to the Q-phase coil. Thereby, the rotation speed of the rotor can be controlled with high accuracy. As a result, a motor that consumes less power, has less vibration and noise, and performs high-precision speed control can be realized at low cost.

A motor according to another aspect of the present invention includes a rotor having a field portion for generating a field magnetic flux;
Phase (here, Q is an integer of 3 or more) coil, voltage supply means having two output terminals for supplying a DC voltage, and a plurality of power transistors from the voltage supply means to the Q-phase coil in both directions. Power supply means for supplying a drive current of the phase, phase detection means for generating a phase pulse signal in response to the terminal voltage of the Q-phase coil, and the plurality of power supplies in response to the terminal voltage of the Q-phase coil. Energizing operation means for controlling an energizing section of the transistor; command means for generating a command signal corresponding to the rotation speed of the rotor by the phase pulse signal; and at least one of the plurality of power transistors of the power supply means. Switching operation means for performing high-frequency switching operation of the power transistors in response to the command signal, comprising: The energizing operation means sets each energizing section of the plurality of power transistors to be greater than 360 / Q degrees, and the switching operation means generates a high-frequency switching pulse signal in response to the command signal; In response to the switching pulse signal, one power transistor performs a high-frequency switching operation, and the phase detecting means outputs a first voltage signal intermittently responding to one of the power supply terminal voltages of the Q-phase coil. A second voltage signal generated at a terminal of the first capacitor element and intermittently responding to the common terminal voltage of the Q-phase coil during a sampling period is generated, and substantially generated during a required period other than the sampling period. A slope creating means for generating the second voltage signal having a voltage slope at a terminal of a second capacitor element; It is configured to include a phase pulse generating means for generating the phase pulse signal in response to a comparison result of the the pressure signal second voltage signal.

With this configuration, since the switching operation means causes the power transistor of the power supply means to perform high-frequency switching, the power loss of the power transistor of the power supply means is greatly reduced, and the heat generation of the motor is greatly reduced. Become smaller. The energizing operation means controls the energizing section of the power transistor in response to the terminal voltage of the coil, and rotates the rotor in a predetermined direction. Therefore, the position detecting element becomes unnecessary, and the configuration of the motor is simplified. Further, the energizing section of the power transistor is set to be longer than a period corresponding to an electrical angle of 360 / Q degrees, and the two power transistors are simultaneously energized when the current path is switched. Thereby, the switching of the current path becomes smooth, the pulsation of the generated driving force becomes small,
A motor with low vibration and noise. The first voltage signal generated at the terminal of the first capacitor element intermittently responds to one of the power supply terminal voltages of the Q-phase coil. The second voltage signal generated at the terminal of the second capacitor element intermittently responds to the common terminal voltage of the Q-phase coil during the sampling period, and has a voltage gradient during at least one period other than the sampling period. . The phase detection means may, for example, intermittently sample a specific one of a plurality of power supply terminal voltages,
For example, one of a plurality of power supply terminal voltages may be selected in response to the operation state of the energization control means, and the selected power supply terminal voltage may be intermittently sampled. The common terminal voltage may directly use the voltage of the common connection terminal of the Q-phase coil, or may be, for example, a voltage obtained by combining a plurality of power supply terminal voltages. Since the second voltage signal having the voltage gradient is responsive to the common terminal voltage,
Is at a relatively intermediate level, making it easier to add a precise voltage ramp to the second sample voltage. Since the phase pulse signal is responsive to the result of the comparison between the first voltage signal and the second voltage signal, the phase pulse signal is not affected by the switching operation of the power transistor, and changes at an accurate timing. The command means generates a command signal corresponding to the rotation speed of the rotor by the phase pulse signal. The switching operation means causes the power transistor to perform a high-frequency switching operation in response to the command signal, and controls the power to the Q-phase coil. Thereby, the rotation speed of the rotor can be controlled with high accuracy. As a result, a motor that consumes less power, has less vibration and noise, and performs high-precision speed control can be realized at low cost.

[0014] The disk device of the present invention comprises at least a head means for reproducing a signal from a disk or recording a signal on the disk, and at least processing an output signal of the head means to output a reproduction information signal. Or a data processing means for processing a recorded information signal and outputting the signal to the head means, a rotor having a field portion for directly rotating and driving the disk to generate a field magnetic flux, and a stator. , A Q-phase (here, Q is an integer of 3 or more) coil, voltage supply means having two output terminals for supplying a DC voltage, and a first of the voltage supply means.
And Q first power transistors for supplying power from the output terminal side to one end of the Q-phase coil, and power from the second output terminal side of the voltage supply means to one end of the Q-phase coil. Power supply means comprising: Q second power transistors for supplying power; voltage detection means for generating a detection pulse signal in response to a terminal voltage of the Q-phase coil; Phase detection means for generating a phase pulse signal corresponding to the terminal voltage of the coil, state transition means for transitioning the holding state in response to the detection pulse signal of the voltage detection means, and response to the holding state of the state transition means Energization control means for controlling energization intervals of the Q first power transistors and the Q second power transistors of the power supply means, and rotation of the rotor by the phase pulse signal. Command means for generating a command signal in response to the power signal, and at least one of the Q first power transistors and the Q second power transistors of the power supply means is connected to the command signal. And a switching operation means for performing a switching operation in response to the power supply section, wherein the energization control means comprises: an energization section for each of the Q first power transistors and the Q second power transistors. 3
The switching operation means generates a high-frequency switching pulse signal in response to the command signal, and causes the at least one power transistor to respond to the switching pulse signal to perform a high-frequency switching operation. The phase detecting means generates a ramp voltage signal intermittently responding to a voltage difference between one of the power supply terminal voltages of the Q-phase coil and a common terminal voltage during a sampling period, and generates at least a ramp voltage signal other than during the sampling period. Ramp generating means for generating the ramp voltage signal having substantially a voltage ramp at one terminal of one capacitor element during one period, and generating the phase pulse signal in response to a comparison result between the ramp voltage signal and a reference voltage And a phase pulse generating means.

With this configuration, since the switching operation means causes the power transistor of the power supply means to perform high-frequency switching, the power loss of the power transistor of the power supply means is greatly reduced, and the heat generation of the disk device is greatly increased. Become smaller. The voltage detection means, the state transition means, and the conduction control means generate a detection pulse signal corresponding to the terminal voltage of the coil, and rotate the rotor in a predetermined direction in response to the detection pulse signal. for that reason,
Since the position detecting element is not required, the configuration of the disk device is simplified. Further, the energizing section of the first power transistor and the second power transistor is set to be longer than a period corresponding to 360 / Q degree in electrical angle, and the two power transistors are simultaneously energized in the switching of the current path. I have. As a result, the switching of the current path becomes smooth, the pulsation of the generated driving force becomes small, and the vibration and
Noise is reduced. Also, the ramp voltage signal generated at the terminal of one capacitor element intermittently responds to the voltage difference between one of the power supply terminal voltages of the Q-phase coil and the common terminal voltage during the sampling period. A voltage gradient is provided for at least one period. This makes it possible to create a ramp voltage signal almost exactly corresponding to the voltage difference between one of the power supply terminal voltages and the common terminal voltage. The phase detection means may intermittently sample a voltage difference between a specific one of the plurality of power supply terminal voltages and the common terminal voltage, for example, in response to an operation state of the energization control means. One of the plurality of power supply terminal voltages may be selected, and the voltage difference between the selected power supply terminal voltage and the common terminal voltage may be intermittently sampled. The common terminal voltage may directly use the voltage of the common connection terminal of the Q-phase coil, or may be, for example, a voltage obtained by combining a plurality of power supply terminal voltages. Since the ramp voltage signal intermittently responds to the voltage difference between one of the power supply terminal voltages and the common terminal voltage, the ramp generating means generates a ramp voltage signal having an accurate voltage ramp at a single capacitor element terminal. it can. Since the phase pulse signal responds to the ramp voltage signal, the phase pulse signal is not affected by the switching operation of the power transistor, and changes at an accurate timing. The command means generates a command signal corresponding to the rotation speed of the rotor by the phase pulse signal. The switching operation means causes the power transistor to perform a high-frequency switching operation in response to the command signal, and controls the power to the Q-phase coil. As a result, the rotation speed of the disk can be controlled with high precision, and the reliability during recording and reproduction is improved. As a result, temperature rise due to power consumption and heat generation is small, disk vibration and noise are small,
A disk device suitable for recording and reproducing on a high-density disk can be realized at low cost.

According to another aspect of the present invention, there is provided a disk apparatus for reproducing a signal from a disk or recording a signal on a disk, and reproducing at least an output signal of the head means. An information signal for outputting an information signal or a signal processing of a recorded information signal and outputting the signal to the head means, and a field portion for directly rotating and driving the disk to generate a field magnetic flux are attached. A voltage supply means having a rotor, a Q-phase (here, Q is an integer of 3 or more) coil disposed on the stator, two output terminals for supplying a DC voltage, and a first of the voltage supply means Q first power transistors for supplying power from the output terminal side to one end of the Q-phase coil; and power supply from the second output terminal side of the voltage supply means to one end of the Q-phase coil. And the Q second power transistors for supplying a power supply means which is configured to include,
Phase detection means for generating a phase pulse signal in response to the terminal voltage of the Q-phase coil; state transition means for transitioning a holding state in response to the phase pulse signal of the phase detection means; and holding of the state transition means The Q first power transistors of the power supply means and the Q
Energization control means for controlling an energization section of the second power transistors; command means for generating a command signal corresponding to the rotation speed of the rotor by the phase pulse signal; and the Q number of power supply means. A disk drive comprising: one power transistor; and at least one of the Q second power transistors, which performs high-frequency switching operation in response to the command signal. The energization control means sets each energization section of the Q first power transistors and the Q second power transistors to 360 / Q
Degree, the switching operation means,
Generating a high-frequency switching pulse signal in response to the command signal; causing the at least one power transistor to perform a high-frequency switching operation in response to the switching pulse signal; A ramp voltage signal intermittently responding to the voltage difference between one of the power supply terminal voltages and the common terminal voltage, and the ramp voltage signal having a voltage gradient substantially in at least one period other than the sampling period is set to 1 And a phase pulse generating means for generating the phase pulse signal in response to a result of the comparison between the gradient voltage signal and the reference voltage.

With this configuration, since the switching operation means causes the power transistor of the power supply means to perform high-frequency switching, the power loss of the power transistor of the power supply means is greatly reduced, and the heat generation of the disk device is greatly reduced. Become smaller. The phase detection means, the state transition means, and the conduction control means generate a phase pulse signal corresponding to the terminal voltage of the coil, and rotate the rotor in a predetermined direction in response to the phase pulse signal. for that reason,
Since the position detecting element is not required, the configuration of the disk device is simplified. Further, the energizing section of the first power transistor and the second power transistor is set to be longer than a period corresponding to 360 / Q degree in electrical angle, and the two power transistors are simultaneously energized in the switching of the current path. I have. As a result, the switching of the current path becomes smooth, the pulsation of the generated driving force becomes small, and the vibration and
Noise is reduced. Also, the ramp voltage signal generated at the terminal of one capacitor element intermittently responds to the voltage difference between one of the power supply terminal voltages of the Q-phase coil and the common terminal voltage during the sampling period. A voltage gradient is provided for at least one period. This makes it possible to create a ramp voltage signal almost exactly corresponding to the voltage difference between one of the power supply terminal voltages and the common terminal voltage. The phase detection means may intermittently sample a voltage difference between a specific one of the plurality of power supply terminal voltages and the common terminal voltage, for example, in response to an operation state of the energization control means. One of the plurality of power supply terminal voltages may be selected, and the voltage difference between the selected power supply terminal voltage and the common terminal voltage may be intermittently sampled. The common terminal voltage may directly use the voltage of the common connection terminal of the Q-phase coil, or may be, for example, a voltage obtained by combining a plurality of power supply terminal voltages. Since the ramp voltage signal intermittently responds to the voltage difference between one of the power supply terminal voltages and the common terminal voltage, the ramp generating means generates a ramp voltage signal having an accurate voltage ramp at a single capacitor element terminal. it can. Since the phase pulse signal responds to the ramp voltage signal, the phase pulse signal is not affected by the switching operation of the power transistor, and changes at an accurate timing. The command means generates a command signal corresponding to the rotation speed of the rotor by the phase pulse signal. The switching operation means causes the power transistor to perform a high-frequency switching operation in response to the command signal, and controls the power to the Q-phase coil. As a result, the rotation speed of the disk can be controlled with high precision, and the reliability during recording and reproduction is improved. As a result, temperature rise due to power consumption and heat generation is small, disk vibration and noise are small,
A disk device suitable for recording and reproducing on a high-density disk can be realized at low cost.

According to another aspect of the present invention, there is provided a disk apparatus for reproducing a signal from a disk or recording a signal on a disk, and reproducing at least an output signal of the head means. An information signal for outputting an information signal or a signal processing of a recorded information signal and outputting the signal to the head means, and a field portion for directly rotating and driving the disk to generate a field magnetic flux are attached. A rotor, a Q-phase (here, Q is an integer of 3 or more) coil disposed on the stator, voltage supply means having two output terminals for supplying a DC voltage, and a plurality of power transistors for controlling the voltage. Power supply means for supplying drive current in both directions from the supply means to the Q-phase coil, and a phase for generating a phase pulse signal in response to a terminal voltage of the Q-phase coil Output means, energizing operation means for controlling an energizing section of the plurality of power transistors in response to a terminal voltage of the Q-phase coil, and generating a command signal in response to a rotation speed of the rotor by the phase pulse signal. A disk device comprising: command means for performing a high-frequency switching operation of at least one power transistor among the plurality of power transistors of the power supply means in response to the command signal. The energizing operation means makes each energizing section of the plurality of power transistors larger than 360 / Q degrees, and the switching operation means creates a high-frequency switching pulse signal in response to the command signal; At least one power transistor is responsive to the switching pulse signal for high frequency switching. Performing a switching operation, the phase detection means generates a ramp voltage signal intermittently responding to a voltage difference between one of the power supply terminal voltages of the Q-phase coil and a common terminal voltage during the sampling period, The ramp voltage signal having a substantially voltage ramp during at least one period of time
Slope generating means generated at the terminals of the capacitor elements,
Phase pulse generating means for generating the phase pulse signal in response to the ramp voltage signal.

With this configuration, since the switching operation means causes the power transistor of the power supply means to perform high-frequency switching, the power loss of the power transistor of the power supply means is greatly reduced, and the heat generation of the disk device is greatly reduced. Become smaller. The energizing operation means controls the energizing section of the power transistor in response to the terminal voltage of the coil, and rotates the rotor in a predetermined direction. Therefore, the position detecting element becomes unnecessary, and the configuration of the disk device is simplified. Further, the energizing section of the power transistor is set to be longer than a period corresponding to an electrical angle of 360 / Q degrees, and the two power transistors are simultaneously energized when the current path is switched. This allows
The switching of the current path becomes smooth, the pulsation of the generated driving force is reduced, and the vibration and noise of the disk are reduced. Also, the ramp voltage signal generated at the terminal of one capacitor element intermittently responds to the voltage difference between one of the power supply terminal voltages of the Q-phase coil and the common terminal voltage during the sampling period. A voltage gradient is provided for at least one period. This makes it possible to create a ramp voltage signal almost exactly corresponding to the voltage difference between one of the power supply terminal voltages and the common terminal voltage. The phase detection means may intermittently sample a voltage difference between a specific one of the plurality of power supply terminal voltages and the common terminal voltage, for example, in response to an operation state of the energization control means. One of the plurality of power supply terminal voltages may be selected, and the voltage difference between the selected power supply terminal voltage and the common terminal voltage may be intermittently sampled. The common terminal voltage may directly use the voltage of the common connection terminal of the Q-phase coil, or may be, for example, a voltage obtained by combining a plurality of power supply terminal voltages. Since the ramp voltage signal intermittently responds to the voltage difference between one of the power supply terminal voltages and the common terminal voltage, the ramp generating means generates a ramp voltage signal having an accurate voltage ramp at a single capacitor element terminal. it can. Since the phase pulse signal responds to the ramp voltage signal, the phase pulse signal is not affected by the switching operation of the power transistor, and changes at an accurate timing. The command means generates a command signal corresponding to the rotation speed of the rotor by the phase pulse signal. The switching operation means causes the power transistor to perform a high-frequency switching operation in response to the command signal, and controls the power to the Q-phase coil. As a result, the rotation speed of the disk can be controlled with high precision, and the reliability during recording and reproduction is improved. As a result, a disk device suitable for recording and reproducing on a high-density disk with low temperature rise due to power consumption and heat generation, low disk vibration and noise can be realized at low cost.

According to another aspect of the present invention, there is provided a disk apparatus for reproducing a signal from a disk or recording a signal on a disk, and reproducing at least an output signal of the head means. It is provided with an information processing means for outputting an information signal, or a signal processing of a recording information signal and outputting it to the head means, and a field portion for directly rotating and driving the disk to generate a field magnetic flux. A rotor, a Q-phase (here, Q is an integer of 3 or more) coil provided on the stator, voltage supply means having two output terminals for supplying a DC voltage, and a plurality of power transistors for controlling the voltage. Power supply means for supplying drive current in both directions from the supply means to the Q-phase coil, and a phase for generating a phase pulse signal in response to a terminal voltage of the Q-phase coil Output means, energizing operation means for controlling an energizing section of the plurality of power transistors in response to a terminal voltage of the Q-phase coil, and generating a command signal in response to a rotation speed of the rotor by the phase pulse signal. A disk device comprising: command means for performing a high-frequency switching operation of at least one power transistor among the plurality of power transistors of the power supply means in response to the command signal. The energizing operation means makes each energizing section of the plurality of power transistors larger than 360 / Q degrees, and the switching operation means creates a high-frequency switching pulse signal in response to the command signal; At least one power transistor is responsive to the switching pulse signal for high frequency switching. Performing a switching operation, the phase detection means generates a first voltage signal intermittently responding to one of the power supply terminal voltages of the Q-phase coil at a terminal of a first capacitor element, and during a sampling period, A second voltage signal is generated intermittently in response to the common terminal voltage of the Q-phase coil, and the second voltage signal having a substantially voltage gradient in a required period other than the sampling period is converted to a second capacitor. Slope generating means for generating at a terminal of the element, and phase pulse generating means for generating the phase pulse signal in response to a comparison result between the first voltage signal and the second voltage signal. I have.

With this configuration, since the switching operation means causes the power transistor of the power supply means to perform high-frequency switching, the power loss of the power transistor of the power supply means is greatly reduced, and the heat generation of the disk device is greatly reduced. Become smaller. The energizing operation means controls the energizing section of the power transistor in response to the terminal voltage of the coil, and rotates the rotor in a predetermined direction. Therefore, the position detecting element becomes unnecessary, and the configuration of the disk device is simplified. Further, the energizing section of the power transistor is set to be longer than a period corresponding to an electrical angle of 360 / Q degrees, and the two power transistors are simultaneously energized when the current path is switched. This allows
The switching of the current path becomes smooth, the pulsation of the generated driving force is reduced, and the vibration and noise of the disk are reduced. The first voltage signal generated at the terminal of the first capacitor element intermittently responds to one of the power supply terminal voltages of the Q-phase coil. The second voltage signal generated at the terminal of the second capacitor element intermittently responds to the common terminal voltage of the Q-phase coil during the sampling period, and has a voltage gradient during at least one period other than the sampling period. . The phase detecting means may, for example, intermittently sample a specific one of a plurality of power supply terminal voltages, or, for example, a plurality of power supply terminal terminals in response to an operation state of the energization control means. One of the voltages may be selected and the selected power supply terminal voltage may be intermittently sampled. The common terminal voltage may directly use the voltage of the common connection terminal of the Q-phase coil, or may be, for example, a voltage obtained by combining a plurality of power supply terminal voltages. The phase detection means selects one of the power supply terminal voltages for generating the first voltage signal, for example, in response to the operation state of the energization operation means. Since the second voltage signal having the voltage slope is responsive to the common terminal voltage, the second sample voltage is at a relatively intermediate level, and it is easy to add an accurate voltage slope to the second sample voltage. Become. Since the phase pulse signal is responsive to the result of the comparison between the first voltage signal and the second voltage signal, the phase pulse signal is not affected by the switching operation of the power transistor, and changes at an accurate timing. The command means generates a command signal corresponding to the rotation speed of the rotor by the phase pulse signal. The switching operation means causes the power transistor to perform a high-frequency switching operation in response to the command signal, and controls the power to the Q-phase coil. As a result, the rotation speed of the disk can be controlled with high precision, and the reliability during recording and reproduction is improved. As a result, a disk device suitable for recording and reproducing on a high-density disk with low temperature rise due to power consumption and heat generation, low disk vibration and noise can be realized at low cost. These and other configurations and operations will be described in detail in the description of the embodiments.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments according to the present invention will be described below with reference to the accompanying drawings.

Embodiment 1 FIGS. 1 to 28 and 3
FIG. 4 shows a motor according to the first embodiment of the present invention and a disk device including the motor. FIG. 1 is a block diagram showing the overall configuration of the motor according to the first embodiment. The rotor 11 is provided with a field part that generates a plurality of poles of field magnetic flux by magnet magnetic flux. Here, the rotor 11
Is constituted by two-pole permanent magnet magnetic flux. In general, a field portion that generates a field magnetic flux having a plurality of poles such as two poles, four poles, and six poles can be configured. Three-phase coil 12,
The reference numerals 13 and 14 are disposed on the stator and electrically displaced from each other by 120 degrees relative to the rotor 11. Here, the electrical angle of 360 degrees corresponds to a pair of angular widths of the N pole and the S pole of the rotor 11. Each coil 12,
One ends of 13, 13 are commonly connected as a common connection terminal,
The other end is connected to the output terminal side of the power supply unit 20 as a power supply terminal. Three-phase coils 12, 13, 14
Generates a three-phase magnetic flux by the three-phase driving currents I1, I2, and I3, generates a driving force by interaction with the field portion of the rotor 11, and gives the driving force to the rotor 11. Disc 1
Is integrally fixedly attached to the rotor 11, and is directly driven to rotate by the rotor 11.

The disk 1 records digital information signals (for example, high-quality audio / video signals), and the head 2 composed of an optical head or a magnetic head reproduces the information signals from the disk 1. Information processing unit 3
Processes an output signal from the head 2 and outputs a reproduction information signal (for example, a high-quality audio / video signal). Alternatively, the disk 1 can record a digital information signal, and the head 2 composed of an optical head or a magnetic head records the information signal on the disk 1. The information processing unit 3 converts a recording signal obtained by subjecting an input recording information signal (for example, a high-quality audio / video signal) to signal processing by the
For recording on the disk 1 by the head 2.

FIG. 34A shows an example of a disk device for reproducing a signal. The rotor 11 directly drives the disk 1 to rotate. On the disk 1, digital information signals are recorded at a high density. The head 2 reproduces a signal of the information signal on the rotating disk 1 and outputs a reproduction signal Pf. The information processing section 3 digitally processes the reproduction signal Pf from the head 2 and outputs a reproduction information signal Pg.
Here, the illustration of the stator and the coil is omitted. FIG. 34B shows an example of a disk device that performs signal recording. The rotor 11 directly drives the disk 1 to rotate.
The disc 1 is a recordable disc, and can record digital information signals at high density. The information processing section 3 digitally processes the input recording information signal Rg, and outputs a recording signal Rf to the head 2. The head 2 records the recording signal Rf on the rotating disk 1 at a high density, and forms a new information signal on the disk 1. As the head 2, a read-only head, a recording / playback head, or a recording-only head is used depending on the situation.

The power supply unit 20 shown in FIG.
In response to the lower energization control signals M1, M2, M3 and the upper energization control signals N1, N2, N3, a current path from the voltage supply unit 25 to the three-phase coils 12, 13, 14 is formed. Electric power is supplied to the coils 12, 13, and 14. FIG. 2 shows a specific configuration of the power supply unit 20. The power supply unit 20 shown in FIG. 2 includes three lower power supply paths that form a power supply path between the negative terminal side (ground side) of the voltage supply unit 25 and each of the power supply terminal sides of the three-phase coils 12, 13, and 14. Side power transistors 101, 102, and 103 and three upper power transistors forming a power supply path between the positive terminal side (Vm side) of the voltage supply unit 25 and the respective power supply terminal sides of the coils 12, 13, and 14. 105, 106, and 107. The upper power diodes 105d, 106d,
107d is an upper power transistor 105,
It is reversely connected in parallel to 106 and 107. The lower power diodes 101d, 102d, and 103d are respectively
The lower power transistors 101, 102, and 103 are reversely connected in parallel. Here, the lower power transistors 101, 102, and 103 each have an N-channel M
It is constituted by a field effect power transistor having an OS structure, and includes lower field effect power transistors 101 and 10.
Parasitic diodes 2103 are reversely connected from the current outflow terminal side to the current inflow terminal side.
They are used as lower power diodes 101d, 102d, and 103d. The upper power transistor 105,
Reference numerals 106 and 107 denote N-channel MOS structure field effect power transistors, respectively, and upper field effect power transistors 105, 106 and 107.
The parasitic diodes formed by being reversely connected from the current outflow terminal side to the current inflow terminal side are used as upper power diodes 105d, 106d and 107d, respectively.

Note that the upper power transistor and the lower power transistor used in the first embodiment are not limited to field effect transistors, and other types of transistors such as IGBT transistors may be used. Further, the upper power transistor and the lower power transistor are not limited to the same polarity field effect transistors, but may be different polarity field effect transistors. For example, a field-effect power transistor having a P-channel MOS structure can be used as the upper power transistor, and a field-effect power transistor having an N-channel MOS structure can be used as the lower power transistor.

The lower operation circuit 111, 1 of the power supply unit 20
The lower power transistors 101, 102, and 10 respond to the lower energization control signals M1, M2, and M3.
3 is performed. The lower power transistors 101, 102, and 103 include three-phase coils 12, 1
A current path for supplying the negative-side currents of the three-phase drive currents I1, I2, and I3 to the power supply 3, 14 is formed. Lower energization control signal M
Reference numerals 1, M2 and M3 are digital PWM signals (pulse width modulation signals) in each energizing section, and the lower power transistors 101, 102 and 103 perform on / off high-frequency switching operation. For example, when the lower power transistor 101 is on, the power supply terminal voltage V1 of the coil 12 becomes 0 V or substantially 0 V, and supplies a negative drive current I1 to the coil 12. When the lower power transistor 101 is turned off, the upper power diode 105d (or the upper power transistor 10d) is turned off.
5) turns on. That is, due to the inductance action of the coil 12, the power supply terminal voltage V1 of the coil 12
Becomes Vm or approximately Vm, and continuously supplies a negative drive current I1 to the coil 12. Thereby, the coil 1
2 is a PWM voltage that digitally changes between approximately 0 V and approximately Vm. As described above, in the respective energized sections of the lower power transistors 101, 102, and 103, the power supply terminal voltages V1, V2, and V3 of the coils 12, 13, and 14 become the PWM voltages, respectively.

The upper operation circuit 115, 1 of the power supply unit 20
The upper power transistors 105, 106, and 10 respond to the upper energization control signals N1, N2, and N3.
7 is turned on and off. Usually, the upper power transistors 105, 106, and 107 are three-phase coils 1
A current path for supplying the positive-side currents of the three-phase driving currents I1, I2, and I3 to 2, 13, and 14 is formed. The high-voltage output circuit 120 generates and outputs a high potential Vu that is higher than the positive potential Vm of the voltage supply unit 25 by a predetermined value. As a result, the high potential Vu can be applied to the conduction control terminal side of the upper power transistor, and the N-channel field effect power transistor can be fully turned on. Note that the power loss of the upper power diode can be reduced by performing the off-on high-frequency switching operation of the lower-side power transistor that is in phase with the on-off high-frequency switching operation in a complementary manner.

The current detecting section 21 includes a resistor 12 for detecting a current.
And a current proportional to the supply current or the combined supply current Ig supplied from the voltage supply unit 25 to the three-phase coils 12, 13, 14 via the three lower power transistors 101, 102, 103. The detection signal Ad is output. The voltage detection unit 30 in FIG. 1 includes a voltage comparator 41 and a detection pulse generator 42. Voltage comparator 4
Reference numeral 1 denotes three-phase power supply terminal voltages V1, V2, and V3 of the three-phase coils 12, 13, and 14, and the three-phase coil 1
The common terminal voltages Vc of 2, 13, and 14 are input, and the three-phase power supply terminal voltage and the common terminal voltage are selectively compared, and a selection voltage comparison signal Bj corresponding to the comparison result is output. The detection pulse generator 42 selects the selection voltage comparison signal Bj
And outputs a detection pulse signal Dt from which high-frequency switching noise included in is removed. FIG. 3 or FIG. 4 shows a specific configuration of the voltage comparator 41. FIG. 5 shows the detection pulse generator 4
2 shows a specific configuration.

The three comparator circuits 151, 152, 153 of the voltage comparator 41 in FIG. 3 compare the three-phase power supply terminal voltages V1, V2, V3 with the common terminal voltage Vc, and respond to the comparison result. Phase comparison pulse signals b1, b2, b
3 is output. Inverter circuits 155, 156, 157
Outputs pulse signals b5, b6, and b7 obtained by inverting the comparison pulse signals b1, b2, and b3. Signal selection circuit 16
0 switch circuits 161, 162, 163, 164, 1
65 and 166 are selection command signals B of the selection command circuit 150
Pulse signals b1, b2, b3, b5, b according to s1
6 and b7 are selected and output as a selected voltage comparison signal Bj. The selection command circuit 150 is a selection command signal Bs corresponding to the holding state of the state transition unit 31 described later
1 is output to the signal selection circuit 160. Signal selection circuit 16
0 forms a pulse signal which substantially compares the power supply terminal voltage and the common terminal voltage reflecting the energization state of the three-phase coils 12, 13, and 14, and outputs the pulse signal as a selection voltage comparison signal Bj.

FIG. 4 shows another configuration of the voltage comparator 41.
The combined voltage circuit 170 of the voltage comparator 41 in FIG. 4 converts the three-phase power supply terminal voltages V1, V2, and V3 into resistors 171 and 17 respectively.
2, 173 to produce a combined common terminal voltage Vcr. The switch circuits 181, 182, and 183 of the first signal selection circuit 180 are connected to the power supply terminal voltage V in accordance with the first selection command signal Bs2 of the selection command circuit 195.
One of 1, V2, and V3 is selectively input to the comparator circuit 185. The comparator circuit 185 compares the selected power supply terminal voltage with the combined common terminal voltage Vcr,
The comparison pulse signal b8 is output. Inverter circuit 186
Outputs a pulse signal b9 obtained by inverting the comparison pulse signal b8. Switch circuit 1 of second signal selection circuit 190
91 is a second selection command signal Bs of the selection command circuit 195
3 to select one of the pulse signals b8 and b9,
It is output as a selection voltage comparison signal Bj. Selection command circuit 1
Reference numeral 95 outputs a first selection command signal Bs2 and a second selection command signal Bs3 in response to a holding state of the state transition unit 31 described later. The voltage comparator 41 shown in FIG. 4 forms a pulse signal that substantially compares the power supply terminal voltage and the common terminal voltage reflecting the energization state of the three-phase coils 12, 13, and 14, and selects the selected voltage. Output as a signal Bj.

The noise elimination circuit 201 of the detection pulse generator 42 shown in FIG. 5 eliminates noise mixed in the selection voltage comparison signal Bj by the high frequency switching operation of the power supply unit 20, and the noise responsive to the switching to the output signal Ca. Avoid pulsing. Noise removal circuit 201
Is composed of, for example, an AND circuit 211, and logically synthesizes a selection voltage comparison signal Bj and a noise removal signal Wx of a switching control unit 22 described later. That is, the output signal Bj of the voltage comparator 41 is logically gated by the noise removal signal Wx. Thereby, the noise removal circuit 2
01, the noise removal signal Wx is “L”.
When the noise removal signal Wx is "H" (high potential state), the level of the selection voltage comparison signal Bj is directly output when the signal is in the (low potential state). As a result, even if a noise pulse is generated in the selection voltage comparison signal Bj by the high-frequency switching operation of the power supply unit 20, the noise signal is removed from the output signal Ca of the noise removal circuit 201, and the output signal Ca responds to the comparison result of the terminal voltage of the coil. It becomes a precise pulse signal.

The pulse generation circuit 202 changes the detection pulse signal Dt to "H" at the time when the rising edge of the output signal Ca of the noise removal circuit 201 comes. The pulse generation circuit 202 includes, for example, a D-type flip-flop 2
12, an "H" level input to the data terminal is triggered by an output signal Ca of the noise elimination circuit 201 input to the clock terminal. As a result, the detection pulse signal Dt changes to “H” at the rising edge of the output signal Ca of the noise removal circuit 201, and holds that state. A state transition unit 31 described later generates a third timing adjustment signal F3 after a required time from the rise of the detection pulse signal Dt, and changes the state of the D-type flip-flop 212 of the pulse generation circuit 202 to “L”.
Reset to. Accordingly, the state of the detection pulse signal Dt changes in response to the rising edge of the selection voltage comparison signal Bj from which the noise pulse has been removed, and the state of the detection pulse signal Dt remains unchanged until the arrival of the next third timing adjustment signal F3. Hold.

The state transition section 31 and the energization control section 32 shown in FIG.
Form a current-carrying operation block, and form three-phase coils 12, 1
The three-phase coils 12, 1 in response to the terminal voltages of 3, 14
The energization of 3, 14 is controlled. The state transition unit 31
It comprises a timing adjuster 43 and a state holder 44. The timing adjuster 43 delays the first timing adjustment signal F1 delayed by the first adjustment time T1 and the second adjustment time T2 each time the rising edge of the detection pulse signal Dt of the voltage detection unit 30 arrives. It outputs a second timing adjustment signal F2 and a third timing adjustment signal F3 delayed by a third adjustment time T3. The state holder 44 changes the holding state in response to the first timing adjustment signal F1 and the second timing adjustment signal F2, and the first state signals P1 to P6 and the second state signal corresponding to the holding state. Q1 to Q6 are output. FIG. 6 shows a specific configuration of the timing adjuster 43, and FIG. 7 shows a specific configuration of the state holder 44.

The edge detecting circuit 301 of the timing adjuster 43 shown in FIG. 6 generates a first differential pulse signal Da and a second differential pulse signal Db from the rising edge of the detection pulse signal Dt. The second differential pulse signal Db is output as a pulse immediately after the first differential pulse signal Da. Second
Of the counter circuit 304 and the third counter circuit 305
At the pulse generation edge of the first differentiated pulse signal Da, a value corresponding to the internal data signal Dc at that time of the first counter circuit 303 is loaded. Thereafter, when the edge of the second differential pulse signal Db occurs, the first counter circuit 303 is reset. That is, the occurrence of the rising edge of the detection pulse signal Dt causes the second counter circuit 304 and the third counter circuit 305 to store the internal data signal Dc of the first counter circuit 303 at that time.
Is loaded, and the first counter circuit 303
Resets the internal state to zero or a predetermined value.

The clock circuit 302 outputs a first clock signal CK1, a second clock signal CK2, and a third clock signal CK3. The first counter circuit 303
The first clock signal CK1 is clocked, and the internal data is counted up each time a pulse of the first clock signal CK1 arrives. When the internal data increases to a predetermined value, the first counter circuit 303 stops counting up further and holds that value. The second counter circuit 304 receives the clock of the second clock signal CK2 and counts down the internal data every time a pulse of the second clock signal CK2 arrives. Second counter circuit 3
When the internal data is reduced to zero or a predetermined value, the counter 04 stops counting down any further and outputs a first zero pulse signal Df. First pulsing circuit 307
Differentiates the first zero pulse signal Df and outputs a first timing adjustment signal F1. Logic gate circuit 306
Holds the output clock signal Dk in the “L” state before the first zero pulse signal Df is generated, and outputs the third clock signal CK3 as the output clock signal Dk after the first zero pulse signal Df is generated, The signal is supplied to the third counter circuit 305. The third counter circuit 305 outputs the output clock signal D
When the clock k is input, the internal data is counted down every time a pulse of the output clock signal Dk arrives. When the internal data is reduced to zero or a predetermined value, the third counter circuit 305 stops counting down further and outputs a second zero pulse signal Dg. The second pulsing circuit 308 differentiates the second zero pulse signal Dg,
The second timing adjustment signal F2 is output. The delay pulsing circuit 310 differentiates a signal delayed for a required time from the generation time of the second zero pulse signal Dg, and outputs a third timing adjustment signal F3 which is a differentiated pulse signal. The delay pulsing circuit 310 has a configuration similar to that of the third counter circuit 305, the second pulsing circuit 308, and the like.

FIG. 15 illustrates the relationship between these signal waveforms (the horizontal axis in FIG. 15 is time). The first counter circuit 303 counts a count value corresponding to a time interval T0 between rising edges of the detection pulse signal Dt (FIG. 15).
(A)). The second counter circuit 304 outputs the first zero pulse signal Df with a delay of a first adjustment time T1 (T1 <T0) proportional to the time interval T0 (FIG. 15).
(B)). As a result, the first timing adjustment signal F1 becomes a pulse signal delayed from the time of occurrence of the rising edge of the detection pulse signal Dt by a first adjustment time T1 that is substantially proportional to the time interval T0 ((FIG. c)
reference). After the rising edge of the first zero pulse signal Df occurs, the third counter circuit 305 outputs the second zero pulse signal Dg with a delay of a required time proportional to the time interval T0 ((FIG. 15) d)). as a result,
The second timing adjustment signal F2 is the detection pulse signal Dt
A second adjustment time T2 (T1 <T2 <T0) substantially proportional to the time interval T0 from the occurrence of the rising edge of
It becomes a pulse signal delayed by only this amount (see (e) of FIG. 15). Similarly, the delay pulsing circuit 310 outputs a third timing adjustment signal F3 delayed by a required time from the time when the rising edge of the second zero pulse signal Dg occurs (see FIG. 15 (f)). As a result, the third timing adjustment signal F3 becomes the third timing adjustment signal F3 that is substantially proportional to the time interval T0 from the time when the rising edge of the detection pulse signal Dt occurs.
Becomes a pulse signal delayed by the adjustment time T3 (T2 <T3 <T0). The pulse generation circuit 202 of the detection pulse generator 42 resets the detection pulse signal Dt by generating the third timing adjustment signal F3 (see FIG. 15A).

The state holder 44 shown in FIG. 7 includes a first state holding circuit 320 and a second state holding circuit 330. The first state holding circuit 320 includes six D-type flip-flops 321, 322, 323, 324, 3
25,326. Six D-type flip-flops 321,322,323,324,325,326
, One of the flip-flops goes to the “H” state, and the other flip-flops go to the “L” state. At the rising edge of the first timing adjustment signal F1,
Flip-flops 321,322,323,324,3
The states 25 and 326 transition, and the “H” state moves sequentially like a ring counter. First state holding circuit 3
Reference numeral 20 denotes six flip-flops 321, 322, 32
3, 324, 325 and 326 are output as first state signals P1, P2, P3, P4, P5 and P6. The second state holding circuit 330 includes six D-type flip-flops 331, 332, 333, 334, 335, 3
36, and the flip-flops 331 and 33
The first state signals P1, P2, P3, P4, P5, P6 are applied to the data input terminals of 2,333,334,335,336.
Are entered respectively. At the rising edge of the second timing adjustment signal F2, the flip-flop 3
31,332,333,334,335,336 are the first
The state signals P1, P2, P3, P4, P5, and P6 are input to the internal state, and the output is changed. The second state holding circuit 330 includes six flip-flops 331 and 33
2,333,334,335,336
As the state signals Q1, Q2, Q3, Q4, Q5, Q6.

As described above, the holding state of the state holder 44 (the comprehensive state of P1 to P6 and Q1 to Q6) is changed from the first holding state to the second holding state by the arrival of the first timing adjustment signal F1. State from the second holding state to the third state by the arrival of the second timing adjustment signal F2 thereafter.
To the holding state. Then, a total of 12 holding states are sequentially transitioned. The energization control unit 32 in FIG. 1 includes three-phase lower energization control signals M1 and M in response to the first state signals P1 to P6 and the second state signals Q1 to Q6 of the state transition unit 31.
2, M3, and three-phase upper energization control signals N1, N2, and N3. Therefore, the section through which the three-phase coils 12, 13, 14 are energized is determined by the first state signal and the second state signal. In addition, the energization control unit 32 responds to the main PWM pulse signal Wm and the auxiliary PWM pulse signal Wh of the switching control unit 22 to control the lower energization control signals M1, M2, M3.
And the upper energization control signals N1, N2, N3 are converted into PWM pulses. FIG. 8 shows a specific configuration of the energization control unit 32.

The first selection circuit 4 of the power supply control unit 32 shown in FIG.
01 is a first selection signal Mm using the first state signals P1 to P6 and the second state signals Q1 to Q6 of the state transition unit 31.
1, Mm2, Mm3 are created. During the period when the three-phase first selection signals Mm1, Mm2, and Mm3 are in the “H” state, the three lower power transistors 101,
102, 103, and corresponds to a three-phase coil 1
This corresponds to an energizing section in which negative-polarity side currents of the three-phase drive currents I1, I2, and I3 flow through 2, 13, and 14, respectively. The second selection circuit 402 outputs the first state signal P1 of the state transition unit 31.
To P6 and the second state signals Q1 to Q6 to generate second selection signals Nn1, Nn2, Nn3. The period during which the second selection signals Nn1, Nn2, Nn3 are in the “H” state is
Upper power transistors 105 and 10 of power supply unit 20
6,107 energized sections, and three-phase coils 12, 1
This corresponds to an energization section in which positive-polarity side currents of the three-phase drive currents I1, I2, and I3 are supplied to 3, 3 respectively.

The first pulse synthesizing circuit 403 logically synthesizes the main PWM pulse signal Wm of the switching control section 22 and the first selection signals Mm1, Mm2, Mm3, respectively, and forms a lower energization control pulse in the energization section. Signals M1, M2,
Output M3. The second pulse synthesizing circuit 404 includes an upper auxiliary signal Wj and first selection signals Mm1, Mm2, and Mm3.
Are respectively logically synthesized, and the auxiliary energization control signals Mm5, Mm
6, Mm7 is output. Due to the connection of the switch circuit 461 of the auxiliary selection circuit 406, the upper auxiliary signal Wj becomes a signal that matches the auxiliary PWM pulse signal Wh of the switching control unit 22, or goes to the “L” state. When the switch circuit 461 of the auxiliary selection circuit 406 is connected to the Sa side, the upper auxiliary signal Wj matches the auxiliary PWM pulse signal Wh,
The second pulse synthesis circuit 404 outputs the first selection signal Mm1,
The auxiliary energization control signals Mm5, Mm6, and Mm7 are output by pulsing the "H" section of Mm2 and Mm3. When the switch circuit 461 of the auxiliary selection circuit 406 is connected to the Sb side, the upper auxiliary signal Wj goes to “L” state,
Auxiliary energization control signals Mm5, Mm
m6 and Mm7 become "L". Third pulse synthesis circuit 4
05 is an upper energization control signal N1, N2, N3 obtained by combining the second selection signals Nn1, Nn2, Nn3 and the auxiliary energization control signals Mm5, Mm6, Mm7 by logical OR for each phase.
Is output.

FIG. 16 shows the signal relationship among the first selection signals Mm1, Mm2, Mm3, the second selection signals Nn1, Nn2, Nn3, the first state signals P1 to P6, and the second state signals Q1 to Q6. . In FIG. 16, the horizontal axis indicates time. The first state signals P1 to P6 are six-phase signals in which a signal that becomes “H” shifts at each generation timing of the first timing adjustment signal F1 (see FIGS. 16A to 16F). . The second state signals Q1 to Q6 are six-phase signals in which the signal that becomes “H” shifts at each generation timing of the second timing adjustment signal F2 ((g) to (l) in FIG. 16).
reference). The first selection signals Mm1, Mm2, and Mm3 are created by logically synthesizing the first state signals P1 to P6 and the second state signals Q1 to Q6, and have an electrical angle greater than (360/3) degrees. This is set to a three-phase signal having an H "section (see (p) to (r) in FIG. 16). Specifically, the first selection signals Mm1, Mm2, and Mm3 are set to "H" of about 140 degrees.
It is set to a three-phase signal having a section. Here, the electrical angle of 360 degrees corresponds to a pair of angles of the north pole and the south pole of the rotor. Similarly, the second selection signals Nn1, Nn2, Nn
3 is a first state signal P1 to P6 and a second state signal Q1
~ Q6 by logical synthesis, and the electrical angle is (360 /
3) The signal is set to a three-phase signal having an “H” section larger than the degree (see (m) to (o) in FIG. 16). Specifically, the second selection signal Nn1, Nn2, Nn3 is about 140
It is set to a three-phase signal having an “H” section of the degree.

The command section 35 shown in FIG. 1 includes, for example, a speed control circuit, and the command signal Ac of the command section 35 is a voltage signal generated by the speed control circuit. The command unit 35 detects the rotation speed of the disk 1 and the rotor 11 based on the phase pulse signal Pt of the phase detection unit 36, and generates a command signal Ac corresponding to the difference between the rotation speed of the disk 1 and the target speed. Therefore, the command signal Ac of the command unit 35 is a voltage signal corresponding to the phase pulse signal Pt of the phase detection unit 36. The command signal from the speed control circuit of the command unit 35 can be changed not only according to the rotation speed of the disk 1 and the rotor 11 but also according to the rotation phase, and this configuration is also included in the present invention. The switching control unit 22 shown in FIG.
And the command signal Ac of the command unit 35, and the main PWM pulse signal Wm and the auxiliary PWM pulse signal W responding to the comparison result.
h, a noise elimination signal Wx, and a synchronization pulse signal Ws. The switching control unit 22 outputs the main PWM pulse signal W
m and the auxiliary PWM pulse signal Wh to the energization control unit 32, the noise removal signal Wx to the detection pulse generator 42 of the voltage detection unit 30, and the main PWM pulse signal Wm and the synchronization pulse signal Ws to the phase detection unit 36. Is output to the inclination generator 47. FIG. 9 shows a specific configuration of the switching control unit 22.

The switching controller 22 shown in FIG. 9 includes a comparison pulse unit 501 and a PWM pulse unit 502. The comparison pulser 501 compares the command signal Ac with the current detection signal Ad, and responds to the basic PWM based on the comparison result.
It outputs a pulse signal Wp. The PWM pulser 502
From the basic PWM pulse signal Wp to the main PWM pulse signal Wm
And an auxiliary PWM pulse signal Wh, a noise removal signal Wx, and a synchronization pulse signal Ws. FIG. 10 or FIG. 11 shows a specific configuration of the comparison pulser 501, and FIG.
A specific configuration of the M pulser 502 will be described.

The comparison pulse unit 501 shown in FIG. 10 includes a comparison circuit 511 and a time delay circuit 512. The comparison circuit 511 includes a command signal Ac and a current detection signal A.
When the current detection signal Ad becomes larger than the command signal Ac, the comparison signal Ap is changed to “H”. The basic PWM pulse signal Wp of the time delay circuit 512 becomes “L” for a predetermined time Tf triggered by the arrival of the rising edge of the comparison signal Ap, and changes to “H” after the predetermined time Tf elapses. FIGS. 17A and 17B show the signal relationship between the comparison signal Ap and the basic PWM pulse signal Wp. Here, the horizontal axis in FIG. 17 is time. The comparison signal Ap becomes “L” when the current detection signal Ad is smaller than the command signal Ac.
When the current detection signal Ad becomes larger than the command signal Ac, it changes to “H”. During a predetermined time Tf from the time when the comparison signal Ap changes to “H”, the basic PWM pulse signal W
p becomes “L”. The basic PWM pulse signal Wp is "L"
, The power supply by the lower power transistor is stopped, the current detection signal Ad becomes zero, and the comparison signal Ap becomes “L”. When the required time Tf elapses, the basic PWM
The pulse signal Wp changes to “H”, and the power supply to the coil by the lower power transistor is restarted. Thus, the basic PWM pulse signal Wp becomes a PWM signal (pulse width modulation signal) responsive to the result of the comparison between the current detection signal Ad and the command signal Ac.

FIG. 11 shows a comparison pulse generator 501 having another configuration. The comparison pulse generator 501 shown in FIG.
, Reference pulse circuit 522 and basic PWM pulse circuit 523
It consists of. The comparison circuit 521 outputs the command signal A
c and the current detection signal Ad, and when the current detection signal Ad becomes larger than the command signal Ac, the comparison signal Ap is changed to “H”. The reference pulse circuit 522 outputs a reference pulse signal Ar at predetermined time intervals. The basic PWM pulse circuit 523 includes, for example, a flip-flop, and sets the internal state to “H” and sets the basic PWM pulse signal Wp to “H” when a rising edge of the reference pulse signal Ar occurs. The basic PWM pulse circuit 523 sets the internal state to “L” and sets the basic PWM pulse signal Wp to “L” by the occurrence of the rising edge of the comparison signal Ap. FIGS. 18A to 18C show signal relationships among the reference pulse signal Ar, the comparison signal Ap, and the basic PWM pulse signal Wp. Here, the horizontal axis in FIG. 18 is time. At the rising edge of the reference pulse signal Ar, the basic PWM pulse signal Wp becomes “H”, and at the rising edge of the comparison signal Ap, the basic PWM pulse signal Wp becomes “L”.
become. Thus, the basic PWM pulse signal Wp becomes a PWM signal responsive to the result of the comparison between the current detection signal Ad and the command signal Ac. When the reference pulse signal Ar is “H”
, The basic PWM pulse signal Wp is forcibly set to “L”, and the basic PWM pulse signal Wp is surely changed between “H” and “L” at predetermined time intervals (for example, 10
0 kHz).

The PWM pulse generator 502 shown in FIG.
First overall delay circuit 551 and second overall delay circuit 552
And a logic synthesis output circuit 553. The first overall delay circuit 551 delays the basic PWM pulse signal Wp of the comparison pulser 501 by a first predetermined time Ta or about Ta as a whole.
a is output. The second overall delay circuit 552 delays the first overall delay pulse signal Wa entirely by a second predetermined time Tb or about Tb.
b is output. The logic synthesis output circuit 553 has a basic PWM
The pulse signal Wp, the first overall delay pulse signal Wa and the second
Are logically synthesized to output a main PWM pulse signal Wm, an auxiliary PWM pulse signal Wh, a noise removal signal Wx, and a synchronization pulse signal Ws.

FIGS. 19A to 19G show a basic PWM pulse signal Wp, a first whole delay pulse signal Wa, a second whole delay pulse signal Wb, a main PWM pulse signal Wm, and an auxiliary PWM pulse signal Wh. The waveform relationship between the noise removal signal Wx and the synchronization pulse signal Ws is shown. Here, the horizontal axis in FIG. 19 is time. The first overall delay pulse signal Wa is the basic PW
A signal obtained by delaying the M pulse signal Wp as a whole by a first predetermined time Ta, and the second whole delay pulse signal Wb
Is a signal obtained by delaying the first entire delay pulse signal Wa by the second predetermined time Tb as a whole (FIG. 19A)
To (c)). Since the main PWM pulse signal Wm is obtained by outputting the first whole delay pulse signal Wa via the buffer circuit 561, the first whole delay pulse signal Wm
The waveform becomes the same as a (see (b) and (d) of FIG. 19).
The auxiliary PWM pulse signal Wh is the basic PWM pulse signal W
p and the second whole delay pulse signal Wb are logically synthesized by the NOR circuit 562, and have a waveform shown in FIG. The “H” section of the auxiliary PWM pulse signal Wh is within the “L” section of the main PWM pulse signal Wm, and both the main PWM pulse signal Wm and the auxiliary PWM pulse signal Wh do not go to “H” at the same time. . That is, the “H” section of the auxiliary PWM pulse signal Wh and the main PWM
A time difference between the first predetermined time Ta and the second predetermined time Tb is provided between the “H” sections of the pulse signal Wm. The noise removal signal Wx is the basic PWM pulse signal W
p and the second entire delay pulse signal Wb by an exclusive NOR circuit 5
63, and are logically synthesized according to FIG.
The waveform shown in FIG. "L" of this noise removal signal Wx
The section includes a change time point of the main PWM pulse signal Wm and has at least a predetermined time width Tb from the change time point.
This noise elimination signal Wx is input to the noise elimination circuit 201 of the detection pulse generator 42 of the voltage detector 30, and removes noise mixed in the comparison detection signal of the terminal voltage of the coil with the high-frequency switching operation of the power transistor. . Note that the noise removal signal Wx may be created by logically synthesizing the main PWM pulse signal Wm and the second overall delay pulse signal Wb using an exclusive NOR circuit. The “L” section of the noise removal signal Wx at this time substantially includes a point in time when the switching operation of the power transistor changes from off to on and a point in time from on to off. That is, the noise removal signal Wx is the basic PWM pulse signal Wp
And is set to "L" for a predetermined time including a change time point of the switching operation of the power transistor. The synchronizing pulse signal Ws is a negative signal of the basic PWM pulse signal Wp and the first whole delay pulse signal Wp.
This is obtained by logically synthesizing a by a logical product, and has a waveform shown in FIG. The “H” section of the synchronizing pulse signal Ws starts from “H” of the main PWM pulse signal Wm.
This occurs immediately before the change to L ”. That is, just before the power transistor that performs the high-frequency switching operation changes from on to off, the synchronization pulse signal Ws has an“ H ”section of a required width.

The phase detector 36 shown in FIG.
And a phase pulse generator 48. The slope creator 47 samples the difference voltage between the terminal voltages of the coils, and creates a slope voltage signal SL in which the sample voltage has a required voltage slope. The phase pulse generator 48 generates a phase pulse signal Pt in response to the gradient voltage signal SL of the gradient generator 47. FIG. 13 shows a specific configuration of the gradient generator 47, and FIG. 14 shows a specific configuration of the phase pulse generator 48.

The gradient creator 47 shown in FIG. 13 includes power supply terminal voltages V1, V2, V3 of the three-phase coils 12, 13, 14.
Is selectively detected. The switch circuits 611, 612, and 613 of the signal selection circuit 610
According to the 50 phase selection command signal Ps1, the terminal voltages V1,
One of V2 and V3 is selectively input to the amplification buffer circuit 620. The phase selection command circuit 650 outputs a phase selection command signal Ps1, a first polarity selection signal Ps2, and a second polarity selection signal Ps3 corresponding to the holding state of the state holder 44 of the state transition unit 31 of the energization operation block. . Therefore, the signal selection circuit 610 includes three-phase coils 12, 13,.
The power supply terminal voltage corresponding to the state of current supply to the power supply terminal 14 is detected. The switch circuit 619 receives the common terminal voltage Vc of the common connection terminal or the combined common terminal voltage Vc of the combined voltage circuit 615.
cr (or the reference voltage of the reference voltage source 614) is selected, and one of them is output to the amplification buffer circuit 620. Here, as a preferred example, the switch circuit 619
Will be described when the common terminal voltage Vc of the common connection terminal is selected. The amplification buffer circuit 620 includes the three-phase coil 1
An amplified voltage signal Vd obtained by amplifying a voltage difference between one of the power supply terminal voltages V1, V2, and V3 and the common terminal voltage Vc is output. Note that the combined voltage circuit 615 includes three-phase coils 12, 1 by resistors 616, 617, 618.
A combined common terminal voltage Vcr is created by combining the power supply terminal voltages V1, V2, and V3 of the power supply terminals 3 and 14. The combined common terminal voltage Vcr is slightly different from the common terminal voltage Vc, but substantially coincides with the common terminal voltage Vc.
Therefore, in the following description, the common terminal voltage Vc may be replaced with the combined common terminal voltage Vcr.

The switch circuit 625 outputs the synchronization pulse signal W
s or the main PWM pulse signal Wm,
Output as the sampling pulse signal Wt. Here, the case where the switch circuit 625 selects the synchronization pulse signal Ws will be described, but the main PWM pulse signal Wm may be used. The sampling switch circuit 621 is turned on (closed) when the sampling pulse signal Wt is “H”, and turned off (open) when the sampling pulse signal Wt is “L”. When the sampling switch circuit 621 is turned on, the capacitor circuit 622 having the capacitor element 623 outputs the amplified voltage signal Vd of the amplification buffer circuit 620.
Is sampled. That is, the capacitor circuit 622
Samples the amplified voltage signal Vd corresponding to the voltage difference between one of the power supply terminal voltages and the common terminal voltage during the period in which the sampling pulse signal Wt has become “H”. Thereby, the ramp voltage signal SL, which is the output signal of the capacitor circuit 622, intermittently responds to the voltage difference.

The charging circuit 630 includes an upper current source circuit 631
, A lower current source circuit 632, an upper switch circuit 633, and a lower switch circuit 634. The phase selection command circuit 650 outputs the first polarity selection signal Ps2 to the AND circuit 641 and outputs the second polarity selection signal Ps3 to the AND circuit 642. Second polarity selection signal Ps3
May be a signal obtained by inverting the first polarity selection signal Ps2. The switch circuit 644 selects one of the sampling pulse signal Wt and the negative potential and outputs the selected signal as an input signal of the inverter circuit 643. AND circuit 641
Logically synthesizes the output signal of the inverter circuit 643 and the first polarity selection signal Ps2, and outputs the upper switch signal Wf1. The upper switch signal Wf1 may be the first polarity selection signal Ps2. The upper switch signal Wf1 is "
When H ”is reached, the upper switch 633 of the charging circuit 630 is turned on, and the upper current source circuit 631 charges the capacitor circuit 622 with a predetermined current. That is, the upper current source circuit 631 increases the gradient voltage signal SL. The AND circuit 642 logically combines the output signal of the inverter circuit 643 and the second polarity selection signal Ps3 and outputs a lower switch signal Wf2.
May be the second polarity selection signal Ps3. When the lower switch signal Wf2 becomes “H”, the lower switch circuit 634 of the charging circuit 630 is turned on, and the lower current source circuit 63
2 charges the capacitor circuit 622 with a predetermined current. That is, the lower current source circuit 632 charges in a direction to decrease the gradient voltage signal SL. As a result, the capacitor circuit 6
22, the slope voltage signal SL formed at the terminal of one capacitor element 623 includes power supply terminal voltages V1, V2, V
3 intermittently responds to the voltage difference between the common terminal voltage Vc and the common terminal voltage Vc, and has a required voltage gradient corresponding to the charging current of the charging circuit 630. The charging current to the capacitor element 623 by the upper current source circuit 631 and the lower current source circuit 632 of the charging circuit 630 changes in proportion to or approximately in proportion to the target rotation speed of the disk 1 or the rotor 11 by the command unit 35. Thereby, the voltage gradient of the gradient voltage signal SL changes in response to the (target) rotation speed of the disk 1 or the rotor 11.

The phase pulse generator 48 shown in FIG. 14 includes a comparator circuit 660 and a phase pulse circuit 670. The phase pulse signal Pt corresponding to the result of the comparison between the gradient voltage signal SL of the gradient generator 47 and the reference voltage value. Is output.
The comparator circuit 660 compares the slope voltage signal SL of the slope creator 47 with a predetermined voltage value of the reference voltage circuit 661, and outputs a comparison signal St. Phase pulse circuit 670
Are the first polarity selection signal Ps2 and the second polarity selection signal Ps2.
The comparison signal St of the comparator circuit 660 in response to s3
And outputs a polarity selection comparison signal obtained by inverting or inverting the polarity.
The phase pulse circuit 670 includes a flip-flop circuit. Is set. Phase pulse circuit 670 outputs a phase pulse signal Pt corresponding to the holding state of the flip-flop circuit.

FIG. 20 shows signal waveforms for explaining the operation of the gradient generator 47 and the phase pulse generator 48. The phase selection command signal Ps1, the first polarity selection signal Ps2, and the second polarity selection signal Ps3 of the phase selection command circuit 650 determine the positive polarity change of the difference voltage between the power supply terminal voltage V1 of the coil 12 and the common terminal voltage Vc. The case where the selection is made will be described. Drive current I1
Power supply terminal voltage V of coil 12 when power is not supplied to
The waveform of No. 1 is shown in FIG. The horizontal axis in FIG. 20 is time. The lower power transistor is simultaneously turned on and off in response to the main PWM pulse signal Wm. Therefore, when the lower power transistor is on, the power supply terminal voltage V1 has a value corresponding to the induced voltage, and when the lower power transistor is off, the power supply terminal voltage V1 is substantially equal to the positive potential of the voltage supply unit 25. Become. Similarly, the common terminal voltage Vc has a substantially intermediate value when the lower power transistor is on, and is substantially equal to the positive potential of the voltage supply unit 25 when the lower power transistor is off.
The synchronization pulse signal Ws is generated in synchronization with the main PWM pulse signal Wm, and the synchronization pulse signal Ws becomes “H” immediately before the lower power transistor changes from on to off (see FIG. 20B). Since the synchronization pulse signal Ws is the sampling pulse signal Wt, the capacitor circuit 622 outputs the amplified voltage signal Vd corresponding to the difference between the power supply terminal voltage V1 of the coil 12 and the common terminal voltage Vc at the time of generation of the synchronization pulse signal Ws. Is sampled.
The sample voltage of the capacitor circuit 622 at the time of sampling becomes a sample value corresponding to the difference voltage between the power supply terminal voltage V1 of the coil 12 and the common terminal voltage Vc (circled point in FIG. 20C). The output voltage signal SL of the capacitor circuit 622 when the charging operation is not performed is a step-like voltage signal as shown by a broken line in FIG.

The capacitor circuit 622 includes a charging circuit 630
Is charged with the required current. Phase selection command circuit 6
50 is a first polarity selection signal Ps2 in response to the holding state of the state holder 44 of the state transition unit 31 of the energizing operation block.
And the second polarity selection signal Ps3. Coil 12
In the section where the voltage difference between the power supply terminal voltage V1 and the common terminal voltage Vc has a positive polarity slope, the first polarity selection signal Ps2 becomes “H” and the second polarity selection signal Ps3
Becomes “L”. Accordingly, the charging circuit 630 charges the capacitor circuit 622 from the upper current source circuit 631, and gradually increases the output voltage signal SL of the capacitor circuit 622 (see FIG. 20C). That is, the output voltage signal SL of the capacitor circuit 622 becomes a ramp voltage signal corresponding to the voltage difference between the power supply terminal voltage V1 of the coil 12 and the common terminal voltage Vc. The comparator circuit 660 of the phase pulse generator 48 compares the ramp voltage signal SL of the capacitor circuit 622 with a predetermined reference voltage of the reference voltage circuit 661,
A comparison signal St corresponding to the comparison result is output. The waveform of the comparison signal St of the comparator circuit 660 is shown in FIG. The phase pulse circuit 670 generates a polarity selection comparison signal obtained by inverting (or inverting) the comparison signal St in response to the first polarity selection signal Ps2 and the second polarity selection signal Ps3. The phase pulse circuit 670 resets the flip-flop circuit by the third timing adjustment signal F3, and sets the flip-flop circuit by the polarity selection comparison signal. The holding state of the flip-flop circuit is output as a phase pulse signal Pt (see (e) of FIG. 20).

FIG. 21 shows another signal waveform for explaining the operation of the slope creator 47 and the phase pulse creator 48. The phase selection command signal Ps1, the first polarity selection signal Ps2, and the second polarity selection signal Ps3 of the phase selection command circuit 650 are
The case where the negative polarity change of the difference voltage between the power supply terminal voltage V1 and the common terminal voltage Vc of No. 2 is selected will be described. The waveform of the power supply terminal voltage V1 of the coil 12 when the drive current I1 is not supplied is shown in FIG. The horizontal axis in FIG. 21 is time. The synchronization pulse signal Ws is generated in synchronization with the main PWM pulse signal Wm, and immediately before the lower power transistor changes from on to off, the synchronization pulse signal Ws is generated.
Becomes "H" (see FIG. 21B). The amplified voltage signal Vd corresponding to the voltage difference between the power supply terminal voltage V1 of the coil 12 and the common terminal voltage Vc at the time when the synchronization pulse signal Ws is generated is sampled. The sample voltage of the capacitor circuit 622 at the time of sampling becomes a sample value corresponding to the difference voltage between the power supply terminal voltage V1 of the coil 12 and the common terminal voltage Vc (circled points in FIG. 21C). The output voltage signal SL of the capacitor circuit 622 when the charging operation is not performed is a step-like voltage signal as shown by a broken line in FIG.

The phase selection command circuit 650 sets the first polarity selection signal Ps2 to "L" in a section where the difference voltage between the power supply terminal voltage V1 of the coil 12 and the common terminal voltage Vc has a negative polarity slope. , The second polarity selection signal Ps3
Accordingly, the charging circuit 630 charges the capacitor circuit 622 from the lower current source circuit 632, and gradually reduces the output voltage signal SL of the capacitor circuit 622 (see FIG. 21C). , Capacitor circuit 6
The output voltage signal SL of 22 is a ramp voltage signal corresponding to the difference voltage between the power supply terminal voltage V1 of the coil 12 and the common terminal voltage Vc. The comparator circuit 660 of the phase pulse creator 48 outputs the ramp voltage signal SL of the capacitor circuit 622.
And a predetermined reference voltage of the reference voltage circuit 661, and outputs a comparison signal St corresponding to the comparison result. The waveform of the comparison signal St of the comparator circuit 660 is shown in FIG.
Shown in The phase pulse circuit 670 generates a polarity selection comparison signal in which the comparison signal St is inverted (or non-inverted) in response to the first polarity selection signal Ps2 or the second polarity selection signal Ps3. The phase pulse circuit 670 resets the flip-flop circuit by the third timing adjustment signal F3, and sets the flip-flop circuit by the polarity selection comparison signal. The holding state of the flip-flop is output as a phase pulse signal Pt (see FIG. 21E).

Thus, the change point in time of the phase pulse signal Pt corresponds to the timing when the difference voltage between one of the power supply terminal voltages of the three-phase coils 12, 13, and 14 and the common terminal voltage becomes a predetermined value. Correspond exactly to the rotation phase. For example, the change point of the phase pulse signal Pt corresponds to the zero cross phase of the induced voltage of the coil, that is, the timing at which the back electromotive force becomes zero. The gradient creator 47 creates a gradient voltage signal SL that smoothly changes within one cycle of high-frequency switching of the power transistor, and the phase pulse creator 48 generates a phase pulse signal Pt at an accurate timing in response to the gradient voltage signal SL. Is output. Therefore, the phase pulse signal Pt of the phase detector 36 is not affected by the high frequency switching of the power transistor, and is a more accurate timing signal than the detection pulse signal Dt of the voltage detector 30.

FIG. 22 shows the ramp voltage signal SL of the ramp generator 47 when the charging current is small. Slope voltage signal SL
Is a sample voltage corresponding to the voltage difference between the power supply terminal voltage of the coil and the common terminal voltage at the time of sampling by the synchronization pulse signal Ws, so that a large error does not occur even when the charging current is small and the voltage gradient is small. FIG. 23 shows the ramp voltage signal SL of the ramp generator 47 when the charging current is large. Since the ramp voltage signal SL becomes a sample voltage corresponding to the voltage difference between the power supply terminal voltage of the coil and the common terminal voltage at the time of sampling by the synchronization pulse signal Ws, a large error occurs even when the charging current is large and the gradient is large. do not do. Note that the horizontal axis in FIGS. 22 and 23 is time.

FIG. 24 shows a phase selection command signal Ps1 (a three-phase phase selection command signal Ps11, Ps1
s12, Ps13), the first polarity selection signal Ps2 and the second
5 shows the polarity selection signal Ps3. Disk 1 and rotor 11
, The voltage difference between the power supply terminal voltage of the coil to be detected and the common terminal voltage is sequentially switched. The state holder 44 of the state transition section 31 of the energization operation block sequentially changes the holding state with the rotation of the rotor 11, and responds to the holding state of the state holder 44 to change the phase selection command signal Ps 1 of the phase selection command circuit 650. (Three phase selection command signal Ps1
1, Ps12, and Ps13) sequentially change every 60 electrical degrees (see (a) to (c) of FIG. 24). The phase selection command signals Ps11, Ps12, and Ps13 turn on or off the switch circuits 611, 612, and 613 of the switch circuit 610, respectively, to select the power supply terminal voltages V1, V2, and V3 of the three-phase coils 12, 13, and 14. The switching is sequentially performed as the rotor 11 rotates. In response to the holding state of the state holder 44, the first polarity selection signal Ps2 and the second polarity selection signal Ps3 of the phase selection command circuit 650 are set to an electrical angle of 60.
“H” and “L” change every time ((d) of FIG. 24,
(E)). Here, the second polarity selection signal Ps3 is an inverted signal of the first polarity selection signal Ps2. The first polarity selection signal Ps2 corresponds to the gradient polarity of the voltage difference between the power supply terminal voltage for phase detection and the common terminal voltage. The state transition unit 31 of the energization operation block outputs the third timing adjustment signal F3 in response to the generation of the detection pulse signal Dt of the voltage detection unit 30 (see (f) of FIG. 24). The third timing adjustment signal F3 is generated considerably earlier than the generation timing of the next phase pulse signal Pt. Therefore, a detection edge of the phase pulse signal Pt occurs after the arrival of the timing adjustment signal F3 ((g) in FIG. 24).
Arrow)). In this manner, the phase pulse signal Pt of the phase detection unit 36 becomes an accurate timing signal in response to the voltage difference between the power supply terminal voltage of the coil and the common terminal voltage, and is rotated by 60 degrees or approximately 60 degrees in electrical angle. A rising edge, which is a detection edge, is generated every time.

Next, the overall operation and advantages of the first embodiment will be described. In response to the first state signals P1 to P6 and the second state signals Q1 to Q6 of the state transition unit 31,
The energization control unit 32 outputs lower energization control signals M1 to M3 and upper energization control signals N1 to N3, and selects a coil to be energized. The power supply unit 20 includes three lower power transistors 101, 102,
103 and three upper power transistors 105 and 10
6, 107 are turned on and off, and the three-phase coils 12,
Power is supplied to the power supplies 13 and 14.

Switching control section 22 and current detection section 21
Forms a switching operation block, and a three-phase coil 1
Pulse-like drive voltage V converted into PWM signals at 2, 13, and 14
1, V2, and V3 are supplied. In response to the main PWM pulse signal Wm of the switching control unit 22,
The lower energization control signals M1, M2, and M3 of the energization controller 32 are PWM pulse signals. One or two lower power transistors 10 of the power supply unit 20 selected by the lower energization control signals M1, M2, M3 of the energization control unit 32
1, 102, and 103 simultaneously perform on-off high-frequency switching operations to supply the three-phase coils 12, 13, and 14 with the three-phase drive currents I1, I2, and I3 on the negative side. Lower power transistors 101 and 10 of power supply unit 20
When all 2 and 103 are turned off, one or two upper power diodes 105d and 1 connected to the coil of the current-carrying phase due to the inductance action of the coil.
06d and 107d are turned on and the three-phase coil 12,
Negative side currents of the three-phase drive currents I1, I2, and I3 are continuously supplied to 13 and 14. As a result, the three-phase coil 1
The power supply terminal voltages V1, V2, V3 of 2, 13, and 14 are high-frequency switching voltages. Thereby, the lower power transistors 101, 102, 10 of the power supply unit 20
3 greatly reduces the power loss.

The upper power transistors 105, 106, and 107 of the power supply unit 20 include three-phase coils 12, 13,
14 are supplied with the positive currents of the drive currents I1, I2 and I3. A case where the upper auxiliary signal Wj of the energization control unit 32 is fixed at “L” will be described. This corresponds to a case where the switch circuit 461 of the auxiliary selection circuit 406 is connected to the Sb side. In this case, the upper energization control signal N
1, one of the power supply units 20 selected by N2 and N3
Or two upper power transistors 105, 10
6, 107 at the same time (no PWM operation),
The three-phase driving currents I1, I3 are supplied to the three-phase coils 12, 13, and 14, respectively.
The positive currents of I2 and I3 are supplied. As a result, the upper power transistors 105, 106,
The power loss of 107 is significantly reduced. The lower power transistors 101, 102, 10 of the power supply unit 20
3 and upper power transistors 105, 106, 107
Are three-phase coils 12, 1 with the rotation of the rotor 11.
To three and 14, three-phase drive currents I1, I2 and I3 in both directions alternating between positive polarity and negative polarity are supplied.

The case where the upper auxiliary signal Wj of the power supply controller 32 matches the auxiliary PWM pulse signal Wh of the switching controller 22 will be described. This corresponds to a case where the switch circuit 461 of the auxiliary selection circuit 406 is connected to the Sa side. The auxiliary PWM pulse signal Wh is a PWM that turns off and on complementarily to the on / off PWM of the main PWM pulse signal Wm.
M signal. Upper energization control signal N of energization controller 32
Reference numerals 1, N2, and N3 include a PWM pulse signal responsive to the auxiliary PWM pulse signal Wh, and turn on an upper power transistor of the same phase in a section where the upper power diode is turned on. That is, the upper power transistor having the same phase as the lower power transistor that performs the on / off high-frequency switching operation is subjected to the on / off high-frequency switching operation complementarily to the on / off high-frequency switching operation of the lower power transistor. Thereby, the power loss generated in the upper power diode can be reduced, and the power loss and heat generation can be further reduced. Note that the auxiliary PWM pulse signal Wh is auxiliary and its operation may be eliminated (the switch circuit 461 is connected to the Sb side) as described above.

The current detecting section 21 supplies the current supplied from the voltage supply section 25 to the three-phase coils 12, 13, 14 via the three lower power transistors 101, 102, 103 of the power supply section 20, or the combined current. The supply current Ig is detected, and a current detection signal Ad is output. This combined supply current Ig is
Three-phase drive current I to three-phase coils 12, 13, 14
1, I2, and I3. The switching control unit 22 includes a current detection signal Ad and a command signal A.
c, and outputs a main PWM pulse signal Wm and an auxiliary PWM pulse signal Wh corresponding to the comparison result. Lower power transistors 101, 102, 1 of power supply unit 20
Reference numeral 03 denotes an on / off high-frequency switching operation in response to the main PWM pulse signal Wm, and performs three-phase coils 12, 13,.
The power supply terminal voltages V1, V2, and V3 to the power supply 14 are set to the PWM voltage. As a result, the combined supply current Ig becomes equal to the command signal Ac.
In response to the current control. As a result, the drive currents I1, I2, and I3 to the three-phase coils 12, 13, and 14 can be accurately controlled in response to the command signal Ac, and pulsation of the generated drive force can be reduced. That is, the disk 1 and the rotor 11
Vibration and noise can be greatly reduced.

The lower power transistor of the power supply unit 20 is simultaneously turned on and off by a high-frequency switching operation in response to the main PWM pulse signal Wm which is a single pulse signal of the switching control unit 22. Is simple. When the upper auxiliary signal Wj is fixed at “L”, the upper power transistor of the power supply unit 20 is PWM
Since it does not operate, the energization switching is extremely easy. Even when the upper power transistor of the power supply unit 20 is operated in response to the single PWM signal in response to the auxiliary PWM pulse signal Wh to perform an off-on high-frequency switching operation, the main PWM pulse signal Wm And auxiliary PWM
A gap time can be easily provided between the pulse signals Wh, and simultaneous lowering of the lower power transistor and the upper power transistor of the same phase can be easily prevented.

The voltage comparator 41 of the voltage detector 30 directly compares the three-phase power supply terminal voltages V1, V2, and V3 with the common terminal voltage Vc. The first state signals P1 to P6 and / or the second state signals Q1 to Q1 of the state transition unit 31
In response to Q6, the selection command circuit outputs a selection command signal. The comparison result of the power supply terminal voltages selected by the selection command signal is output as a selection voltage comparison signal Bj. Thereby, the power supply terminal voltage of the coil corresponding to the holding state of the state transition unit 31 can be easily selected, detected and compared, and a pulse-like selection voltage comparison signal Bj corresponding to the selected and detected comparison result is obtained. . That is, the coil 1 to be detected and compared with the rotation of the disk 1 and the rotor 11
It is possible to select the power supply terminal voltages 2, 13, and 14 and obtain a selection voltage comparison signal Bj directly corresponding to the comparison result of the terminal voltages selected and detected.

The noise elimination circuit 201 of the detection pulse creator 42 of the voltage detection unit 30 performs logic gate processing on the selected voltage comparison signal Bj of the voltage comparator 41 with the noise elimination signal Wx, and performs the PWM included in the selected voltage comparison signal Bj. An output signal Ca from which the influence of noise has been removed is obtained. That is, the noise removal signal Wx of the switching control unit 22 is
The pulse signal Wm is kept at “L” for at least a predetermined time from the change point including the change point. Therefore, by taking the AND logic of the noise removal signal Wx and the selection voltage comparison signal Bj, noise mixed into the selection voltage comparison signal Bj accompanying the PWM operation of the power transistor is removed. As a result, the output signal Ca of the noise elimination circuit 201 accurately reflects the comparison result between the power supply terminal voltage of the coil and the common terminal voltage. In particular, the power supply unit 2
0 is a single pulse signal from the main P
Since the high-frequency switching operation is performed in response to the WM pulse signal Wm, the noise removal signal Wx for removing the influence of the PWM noise can be easily created.

The pulse generation circuit 2 of the detection pulse generator 42
02, the detection pulse signal Dt is set to “H” by the arrival of the rising edge of the output signal Ca of the noise removal circuit 201.
And the detection pulse signal Dt is reset to “L” by a third timing adjustment signal F3 generated after a third adjustment time T3 from the time of the change. Thereby, for example, chattering occurs in the comparison output between the power supply terminal voltage and the common terminal voltage, and the output signal Ca of the noise elimination circuit 201 is output.
, The detection pulse signal Dt of the pulse generation circuit 202 changes only once. Therefore, the malfunction of the state transition unit 31 using the detection pulse signal Dt is prevented.

The timing adjuster 43 of the state transition section 31
Detects the arrival of the rising edge of the detection pulse signal Dt, and measures the time interval T0 of the arrival of the detection edge of the detection pulse signal Dt by the first counter circuit 303. Second
The counter circuit 304 has a first adjustment time T corresponding to the time interval T0 from the time when the edge of the detection pulse signal Dt arrives.
A first timing adjustment signal F1 delayed by one is output. In addition, the second counter circuit 304 and the third counter circuit 305 delay the second timing adjustment signal F2 delayed by a second adjustment time T2 corresponding to the time interval T0 from the arrival of the edge of the detection pulse signal Dt. Output. Further, the delay pulsing circuit 310 detects the detection pulse signal Dt.
The third timing adjustment signal F3 delayed by a third adjustment time T3 corresponding to the time interval T0 from the time when the edge occurs.
Is output (see (f) of FIG. 15). Here, each adjustment time has a relationship of T1 <T2 <T3 <T0.

The state holder 44 of the state transition unit 31
In response to the timing adjustment signal F1, the state of the first state holding circuit 320 is changed, and the first state signals P1 to P1 are changed.
Shift P6. In addition, the state holder 44 of the state transition unit 31 changes the holding state of the second state holding circuit 330 in response to the second timing adjustment signal F2, and shifts the second state signals Q1 to Q6. Each time the first timing adjustment signal F1 and the second timing adjustment signal F2 arrive, the first state signals P1 to P6 and the second state signals Q1 to Q1
Q6 is sequentially shifted (see FIG. 16). The first selection circuit 401 and the second selection circuit 402 of the energization control unit 32
Are the first state signals P1 to P6 of the state transition unit 31 and the second
The first selection signal Mm in response to the state signals Q1 to Q6
1, Mm2, Mm3 and second selection signals Nn1, Nn2,
Create Nn3. First selection signals Mm1, Mm2, M
m3 determines an energizing section of the lower power transistors 101, 102, and 103 of the power supply unit 20, and supplies three-phase driving currents I1, I2, and I3 to the three-phase coils 12, 13, and 14, respectively.
An energizing section for supplying the negative current of I3 is determined. The second selection signals Nn1, Nn2, and Nn3 are the upper power transistors 105, 106, and 10 of the power supply unit 20, respectively.
7 is determined, and an energization section in which the three-phase driving currents I1, I2, and I3 are supplied with the positive-polarity side currents to the three-phase coils 12, 13, and 14 is determined. The energization control unit 32 logically combines the first selection signals Mm1, Mm2, and Mm3 with the main PWM pulse signal Wm of the switching control unit 22 to generate lower energization control signals M1, M2, and M3. The lower power transistors 101, 102, and 103 are turned on and off by a PWM switching operation. As a result, power loss and heat generation of the lower power transistor are significantly reduced.

Switch circuit 461 of auxiliary selection circuit 406
Is connected to the Sb side, the upper auxiliary signal Wj
Becomes “L”, and the auxiliary energization control signals Mm5, Mm6, M
m7 also becomes “L”. Therefore, the energization control unit 32
To generate the upper-side energization control signals N1, N2, and N3 that match the selection signals Nn1, Nn2, and Nn3 of the power supply unit 20.
The upper power transistors 105, 106, and 107 are turned on and off (the high-frequency switching operation is not performed).
This reduces power loss and heat generation in the upper power transistor. Further, when the switch circuit 461 of the auxiliary selection circuit 406 is connected to the Sa side, the upper auxiliary signal Wj matches the auxiliary PWM pulse signal Wh,
, The auxiliary energization control signals Mm5, Mm6 and Mm7 are generated by pulsing the "H" section of the selection signals Mm1, Mm2 and Mm3. Third pulse synthesis circuit 40 of energization control unit 32
5 logically synthesizes the second selection signals Nn1, Nn2, Nn3 and the auxiliary energization control signals Mm5, Mm6, Mm7 to create upper energization control signals N1, N2, N3. In a section corresponding to the second selection signals Nn1, Nn2, Nn3,
Upper power transistors 105 and 10 of power supply unit 20
6, 107 are turned on / off (high-frequency switching is not performed). First selection signals Mm1, Mm2, M
m3, the upper power transistor 1 of the power supply unit 20 responds to the auxiliary PWM pulse signal Wh.
05, 106, and 107 are turned on and off by a high-frequency switching operation. Thereby, the upper power transistor 1
05, 106, 107 and upper power diode 105
Power loss and heat generation due to d, 106d, and 107d are greatly reduced.

The gradient creator 47 of the phase detecting section 36 supplies the power supply terminal voltages V1, V of the three-phase coils 12, 13, 14 to each other.
2, and an amplified voltage signal Vd corresponding to a voltage difference between one of V3 and the common terminal voltage Vc is intermittently sampled by one capacitor element 623 of the capacitor circuit 622, and a sample voltage is obtained by the capacitor circuit 622. The amplified voltage signal Vd is sampled by the capacitor circuit 622 in synchronization with a switching pulse signal that causes the power transistor to perform a high-frequency switching operation. This sampling is the synchronization pulse signal Ws or the main PWM pulse signal Wm,
The amplified voltage signal Vd is sampled during the PWM period when the power transistor is on. The charging circuit 630 includes the capacitor element 6 of the capacitor circuit 622.
23 is supplied with a charging current. As a result, a gradient voltage signal SL having a required voltage gradient is obtained at the terminal of the capacitor element 623 of the capacitor circuit 622. That is, the ramp voltage signal SL is supplied to the power supply terminal voltages V1, V2, and V3 of the three-phase coils 12, 13, and 14 during the sampling period.
The sample voltage becomes a sample voltage intermittently responding to the voltage difference between one of V3 and the common terminal voltage Vc, and has a substantially required voltage gradient in a required period other than the sampling period. Accordingly, even when the power transistor of the power supply unit 20 performs the high-frequency switching operation, the ramp voltage signal SL has a waveform substantially corresponding to the back electromotive force of the coil. The phase pulse generator 48 compares the gradient voltage signal SL of the gradient generator 47 with a predetermined reference voltage, and generates a phase pulse signal Pt corresponding to the comparison result. Thus, even when the power transistor is performing a high-frequency switching operation, the detection edge of the phase pulse signal Pt is created at an accurate timing corresponding to the back electromotive force of the coil.

The phase selection command circuit 650 changes the phase selection command signal Ps1, the first polarity selection signal Ps2, and the second polarity selection circuit Ps3 in response to the holding state of the state transition section 31 of the energizing operation block. Thus, the voltage difference between the power supply terminal voltage and the common terminal voltage to be sequentially detected is switched in synchronization with the rotation of the rotor. That is, the rotor 1
By detecting the back electromotive force of the coil to be phase-detected with one rotation, the detection edge of the phase pulse signal Pt is obtained at every 60 degrees or almost 60 degrees of electrical angle. Command unit 35
Detects the rotation speed of the disk 1 or the rotor 11 based on the phase pulse signal Pt of the phase detection unit 36, and outputs a command signal Ac corresponding to the rotation speed. That is, the rotation speeds of the disk 1 and the rotor 11 are controlled. Since the detection edge of the phase pulse signal Pt is generated at the timing of the accurate rotation phase, the speed of the disk 1 and the rotor 11 can be controlled with high accuracy, and the rotation jitter of the disk 1 can be greatly reduced. This makes it possible to improve the recording accuracy of the head 1 and the information processing unit 3 on the disk 1 and / or reduce the jitter of a reproduction information signal from the disk 1, and perform high-density recording and / or reproduction on the disk. A disk device can be realized.

In the first embodiment, a detection pulse signal and a phase pulse signal are created by comparing the power supply terminal voltage of the three-phase coil with the common terminal voltage, and the rotor 11 and the The disk 1 is rotationally driven. This eliminates the need for a position detecting element for detecting the rotational position of the rotor 11 or the disk 1. In addition, the power transistor that supplies the drive current in both directions to the three-phase coil is turned on and off by a high-frequency switching operation, thereby greatly reducing the power loss of the power transistor. That is, the lower power transistor is subjected to a full on / off high frequency switching operation, and the upper power transistor is fully turned on / off.
The power path was turned off to switch the current path, thereby significantly reducing the power loss of the power transistor. In the first embodiment, the phase detection unit 36 uses one capacitor element to
L is generated, and a phase pulse signal Pt corresponding to the ramp voltage signal SL is generated. The slope creator 47 supplies power supply terminal voltages V1, V2, and V of the three-phase coils 12, 13, and 14.
In response to the voltage difference between one of the three and the common terminal voltage Vc, a ramp voltage signal SL having a required voltage ramp is generated at the terminal of one capacitor element. This ramp voltage signal S
L and a required reference voltage were compared, and a phase pulse signal Pt corresponding to the comparison result was created. Accordingly, the phase pulse signal Pt changes at an accurate timing corresponding to the back electromotive force of the coil being detected. The command unit 35 generates a command signal corresponding to the rotation speed of the disk 1 and the rotor 11 based on the phase pulse signal. The switching operation block causes the power transistor to perform a high-frequency switching operation in response to the command signal. Thereby, the rotation speeds of the disk 1 and the rotor 11 can be accurately controlled. That is, even if the power transistor is performing the high-frequency switching operation, the phase pulse signal Pt changes at an accurate timing, and the fluctuation of the rotation speed of the disk 1 becomes extremely small. As a result, a high-density recording operation on the disk 1 and a low-jitter reproduction operation from the disk 1 become possible, and a high-performance disk device can be realized.

One capacitor element 623 and the sample voltage corresponding to the voltage difference between one of the power supply terminal voltages of the three-phase coils and the common terminal voltage in synchronization with the switching pulse signal Wt are intermittently applied to the terminals of the capacitor element 623. Sampling circuit (switch circuit 610,
A slope circuit 47 including a switch circuit 619, an amplification buffer circuit 620, and a sampling switch circuit 621) and a charging circuit 630 for supplying a charging current to the capacitor element 623 continuously or intermittently. Thus, the above-described gradient voltage signal SL can be easily created. If the synchronizing pulse signal Ws synchronized with the switching pulse signal is used as the sampling pulse signal Wt, it is common to one of the power supply terminal voltages of the three-phase coils immediately before the high-frequency switching operation of the power transistor changes from on to off. Since a sample voltage corresponding to the voltage difference between the terminal voltages can be sampled, an accurate sample voltage from which the influence of high-frequency switching has been removed can be sampled at the terminal of the capacitor element 623. As a result, an accurate phase pulse signal Pt can be created with a simple configuration.

In the charging circuit 630, the capacitor element 6 by the upper current source circuit 631 and the lower current source circuit 632
The charging current to the motor 23 is changed in proportion to or substantially in proportion to the (target) rotation speed of the disk 1 or the rotor 11 by the command unit 35. Thereby, the voltage gradient of the gradient voltage signal SL changes in response to the (target) rotation speed of the disk 1 or the rotor 11. As a result, even when the (target) rotation speed is switched, an accurate gradient voltage signal SL corresponding to the back electromotive force of the coil can be generated, and the phase detection unit 36
The phase pulse signal Pt changes at an accurate timing in response to the ramp voltage signal SL. As a result, highly accurate rotation speed control of the disk 1 can be realized. In the first embodiment, the command unit 35 is configured to include an operation mode in which the target rotation speed of the disk 1 is changed according to the radial position of the head 2, and the command unit 35 responds to the (target or actual) rotation speed of the disk 1. The voltage gradient of the gradient voltage signal SL is appropriately adjusted by changing the charging current to the capacitor element 623. Thus, the speed of the disk 1 can be accurately controlled at a variable speed by CLV or ZCLV (zone CLV) in response to the radial position of the head 2. As a result, in the disk device of the first embodiment, high-density recording and / or reproduction on the disk 1 can be realized.

Power supply terminal voltages V1, V of three-phase coils
Although the voltage difference between the common terminal voltage Vc and one of V2 and V3 is sampled via the amplification buffer circuit 620, the present invention is not limited to such a case. For example, although the performance slightly deteriorates, the power supply terminal voltage V
1, V2, and V3 may be combined to create a combined common voltage Vcr, and the combined common terminal voltage Vcr may be used as the common terminal voltage. Further, by sequentially changing the power supply terminal voltages V1, V2, and V3 detected in accordance with the operation of the energizing operation block, the number of detection points of the phase pulse signal Pt is increased, and the control performance of the rotational speed is improved. However, the present invention is not limited to such a case. For example, a voltage difference between one specific power supply terminal voltage and a common terminal voltage is intermittently detected to generate a ramp voltage signal, and a phase pulse responding to the ramp voltage signal is generated. A signal may be created.

The switching operation block includes a current detector 21 for generating a current detection signal Ad corresponding to a combined supply current Ig from the voltage supply unit 25 to the three-phase coils 12, 13, and 14, a current detection signal Ad and a command. A switching controller 22 for generating a switching pulse signal Wm in response to the signal Ac. At least one of the three lower power transistors 101, 102, 103 and the three upper power transistors 105, 106, 107 performs a high frequency switching operation in response to the switching pulse signal Wm. With this configuration, the three-phase coils 12, 13, 1
The four-phase drive currents I1, I2, and I3 to the current controller 4 can be accurately controlled in response to the command signal. Also, in the current path switching operation, even if two of the three lower power transistors or the three upper power transistors are simultaneously energized, the drive current to the three-phase coil is commanded. Can be easily and accurately controlled. In particular, by performing one or both of the three lower power transistors and the three upper power transistors in a high-frequency switching operation in response to a single switching pulse signal, a simple configuration can be applied to a three-phase coil. The supply current can be accurately controlled in response to the command signal. Further, since the plurality of power transistors perform the high-frequency switching operation substantially in response to the single switching pulse signal, the sampling operation in the phase detection unit 36 becomes simple and stable.

In the first embodiment, the state transition section 31 and the conduction control section 32 form a conduction operation block.
The state transition unit 31 changes its holding state from the first holding state to the second holding state in response to a first timing adjustment signal F1 generated after a first adjustment time T1 from the arrival of the detection pulse signal. . Next, in response to a second timing adjustment signal F2 generated after a second adjustment time T2 (T2> T1) from the arrival of the detection pulse signal, the state transition unit 31 changes the holding state from the second holding state to the third holding state. To the holding state. The energization control unit 32 generates a three-phase lower energization control signal and a three-phase upper energization control signal in response to the holding state of the state transition unit 31, and generates three lower power transistors and three upper power Controls the current supply section of the transistor. As a result, each energizing section of the three lower power transistors and the three upper power transistors has an electrical angle of 360/3 = 12.
It can be larger than 0 degrees. Further, the switching operation block performs combined supply from the voltage supply unit 25 to the three-phase coil while causing at least one of the three lower power transistors and the three upper power transistors to perform high-frequency switching operation. The current is controlled in response to the command signal. This allows at least one
In the current path switching operation, two of the three lower power transistors or the three upper power transistors are operated while controlling the combined supply current in response to the command signal by causing the power transistors to perform high-frequency switching operation. Power transistors at the same time. That is, even if the two power transistors are simultaneously energized, the supply current to the three-phase coil is accurately controlled in response to the command signal. Since the switching operation of the current path is made smooth by simultaneously turning on the two power transistors, the pulsation of the generated driving force is greatly reduced. As a result, a position detecting element is not required, power consumption is small, disk vibration and noise are small, and a high-performance motor or disk device can be realized at low cost. Further, the vibration and noise of the disk are greatly reduced, and the recording and reproduction on the disk are stabilized.

The state transition section 31 changes the first adjustment time T1 and the second adjustment time T2 in response to the arrival interval T0 of the detection pulse signal. Thereby, even when the rotational speed of the disk changes over a wide range, the energizing sections of the three lower power transistors and the three upper power transistors can be surely made larger than 360/3 = 120 degrees. In the first embodiment, the energizing section of the upper power transistor and the lower power transistor is set to 140
Degree (about 130 degrees to 150 degrees). This conduction section may be enlarged, for example, at 125 degrees or more and 180 degrees or less in order to reduce vibration and noise. In the first embodiment, an example in which the energizing section of the power transistor changes accurately in response to the rotation speed has been described, but the present invention is not limited to such a case. A first switching operation in which one or two of the three lower power transistors are turned on / off by a high-frequency switching operation, and one power supply terminal voltage is subjected to a high-frequency switching operation. The first switching operation and the second switching operation are alternately performed with the rotation of the rotor 11 by realizing a second switching operation of performing a high-frequency switching operation of the power supply terminal voltage of the power supply terminal. As described above, since only the lower power transistor performs the high frequency switching operation, the power supply terminal voltages V1, V2, V
3 does not fall below the ground potential. As a result, when the lower power transistor, the upper power transistor, and many other transistors and resistors are joined and separated on a single silicon chip to form an integrated circuit, unnecessary power accompanying the high-frequency switching operation of the lower power transistor is eliminated. The operation of the parasitic transistor is eliminated, and the operation of another integrated transistor is not hindered. That is, the whole operation becomes extremely stable. However, not limited to such a configuration,
The current supplied to the coil can be controlled by causing at least one of the lower power transistor and the upper power transistor to perform a high-frequency switching operation.

In the first embodiment, detection is performed between the first stop period including the time point when the power transistor performing the high-frequency switching operation changes from off to on and the second stop period including the time point when the power transistor changes from on to off. The detection operation of the pulse signal is stopped, and the detection operation of the detection pulse signal in response to the comparison result of the terminal voltage of the coil is performed during the remaining time excluding the first stop period and the second stop period. This makes it possible to easily prevent erroneous detection and malfunction due to noise accompanying the PWM switching operation of the power transistor. As a result, by switching the current path to the coil in response to the detection pulse signal, the rotor 11 and the disk 1 can be rotationally driven with high accuracy. That is, it is possible to realize a disk device that drives the disk 1 to rotate with high precision. In the first embodiment, the detection operation of the detection pulse signal is performed during the required periods on both the ON side and the OFF side of the power transistor performing the high-frequency switching operation. However, the present invention is not limited to such a case. For example, the detection operation of the detection pulse signal may be stopped on the off side of the power transistor that performs the high-frequency switching operation, and the detection operation of the detection pulse signal may be performed only during the required period on the on side.

The voltage detector 30 according to the first embodiment includes a voltage comparator 41 for comparing the terminal voltages of the coils, and a detection pulse generator 42 including a noise removing circuit 201. The noise elimination circuit 201 logically gates the selected voltage comparison signal of the voltage comparator 41 with the noise elimination signal in response to the main PWM pulse signal, which is a switching pulse signal, and includes a point in time when the switching pulse signal changes from off to on. The selected voltage comparison signal of the voltage comparator 41 is invalidated in the first predetermined time and the second predetermined time including the change time point from ON to OFF. Thereby, PWM
Erroneous detection due to noise accompanying the switching operation can be easily prevented. The voltage detection unit 30 includes the detection pulse generator 42, changes the state of the flip-flop in response to the occurrence of the rising edge (or the falling edge) of the output signal of the noise removal circuit 201, and responds to the state of the flip-flop. The detection pulse signal is created. This prevents the detection pulse signal from being excessively generated and stabilizes the energization control operation. That is, the disk 1 and the rotor 11 are driven to rotate stably. Note that the flip-flop is reset by the third timing adjustment signal after a third adjustment time has elapsed from the edge of the detection pulse signal corresponding to the state change of the flip-flop. Since the third adjustment time changes in response to the edge interval of the detection pulse signal, the rotor 1
Even if the rotation speed of the first motor changes, it is possible to reliably prevent the generation of an excessive pulse. This effect is particularly great when the disk 1 and the rotor 11 are started and accelerated.

In the first embodiment, the on-off high-frequency switching operation of the lower power transistor is complementarily performed by the on-off high-frequency switching operation of the upper power transistor of the same phase. Thereby, the power loss due to the upper power diode is reduced. In order to prevent the lower power transistor and the upper power transistor from being turned on at the same time, a gap time is provided between their operations. Within this gap time, the influence of the ON voltage of the upper diode occurs, so that the noise removal signal Wx
As a result, the operation of detecting the terminal voltage of the coil is stopped within the gap time. In addition, since these operations are performed in response to a single pulse signal, it can be easily realized with a very simple circuit configuration. In the first embodiment, 1
One or two upper power transistors are simultaneously operated in a complementary off-on high-frequency switching operation. However, the invention is not limited to such a case, and only one upper power transistor has a complementary off-on high-frequency switching operation. Switching operation may be performed.

The upper auxiliary signal Wj of the first embodiment is set to “L”.
In the fixed state, the upper diode is turned on when the lower power transistor is turned off. In the detection of the terminal voltage of the coil by the voltage detection unit 30, there is a possibility that erroneous detection may occur due to the influence of the ON voltage of the upper diode. In order to prevent such an erroneous detection of the terminal voltage of the coil in the section where the upper diode is turned on, the noise removal signal Wx is devised so that the coil is only turned on in the ON operation section of the lower power transistor that performs the high-frequency switching operation. The terminal voltage may be detected. The PWM pulse generator 502 of the switching control unit 22 shown in FIG.
By changing (FIG. 9) to the configuration shown in FIG. 25,
The above operation can be realized. This will be described.

The PWM pulse generator 502 of the switching control unit 22 shown in FIG. 25 includes an overall delay circuit 811 and a logic synthesis output circuit 812. The entire delay circuit 811 is a basic PWM of the comparison pulser 501 (FIG. 9).
The pulse signal Wp is entirely delayed by a predetermined time Tc or about Tc to output an entire delay pulse signal Wc. The logic synthesis output circuit 812 performs logic synthesis of the basic PWM pulse signal Wp and the entire delay pulse signal Wc, and outputs a main PWM pulse signal Wm, an auxiliary PWM pulse signal Wh, a noise removal signal Wx, and a synchronization pulse signal Ws. Here, the synchronization pulse signal Ws is made to coincide with the noise removal signal Wx,
The noise removal signal Wx is a sampling pulse signal. 26A to 26E show the basic PWM pulse signal W.
p, total delay pulse signal Wc, and main PWM pulse signal Wm
7 shows a waveform relationship among an auxiliary PWM pulse signal Wh, a noise removal signal Wx, and a synchronization pulse signal Ws. The horizontal axis in FIG. 26 indicates time. The entire delay pulse signal Wc is a signal obtained by delaying the basic PWM pulse signal Wp as a whole by a predetermined time Tc (see FIGS. 26A and 26B). Since the main PWM pulse signal Wm is obtained by outputting the basic PWM pulse signal Wp via the buffer circuit 821, it has the same waveform as the basic PWM pulse signal Wp (FIG. 2).
6 (c)). The auxiliary PWM pulse signal Wh is
It is fixed to the “L” state (see (d) of FIG. 26).
The noise removal signal Wx and the synchronization pulse signal Ws are based on the basic PW
The M pulse signal Wp and the entire delay pulse signal Wc are logically synthesized by the AND circuit 822, and have a waveform shown in FIG. Thus, the “L” section of the noise elimination signal Wx includes the “L” section of the main PWM pulse signal Wm, and is a predetermined period from the time when the main PWM pulse signal Wm changes from “L” to “H”. It has a time width Tc.

By configuring the PWM pulse unit 502 of the switching control unit 22 as shown in FIG.
In response to the pulse signal Wm, the lower power transistor performs an on / off high frequency switching operation. Auxiliary PWM
Since the pulse signal Wh is "L", the upper power transistor does not perform the high-frequency switching operation. During the period when the noise removal signal Wx is “L”, the voltage detection unit 30 stops detecting the terminal voltage of the coil. Also, the synchronization pulse signal W
In a section where s is “H”, the phase detector 36 samples a sample voltage corresponding to one of the power supply terminal voltages of the three-phase coils and the common terminal voltage. Therefore, the phase detector 36 performs sampling during the period when the power transistor is on. The phase detector 36 generates a ramp voltage signal by giving a required voltage gradient to the sample voltage, and compares the ramp voltage signal with a predetermined reference voltage to generate a phase pulse signal. Further, during a predetermined time Tc including a time point when the power transistor changes from off to on, the voltage detection unit 30 stops the operation of detecting the terminal voltage of the coil. The detection operation of the detection pulse signal directly responding to the result of the comparison of the terminal voltages is performed. Thereby, in the phase detection unit 36 and the voltage detection unit 30, erroneous detection and malfunction due to noise accompanying the PWM switching operation of the power transistor can be prevented.

The PWM pulse generator 502 of the switching control unit 22 shown in FIG. 12 can be changed to the configuration shown in FIG. This will be described. The PWM pulse generator 502 of the switching control unit 22 shown in FIG.
Are the first overall delay circuit 851 and the second overall delay circuit 8
52 and a logic synthesis output circuit 853. The first overall delay circuit 851 includes a comparison pulse
Of the basic PWM pulse signal Wp is entirely delayed by a first predetermined time Ta or about Ta to output a first overall delayed pulse signal Wa. The second whole delay circuit 852 outputs a second whole delay pulse signal Wb obtained by delaying the first whole delay pulse signal Wa as a whole by a second predetermined time Tb or about Tb. The logic synthesis output circuit 853 includes a basic PWM pulse signal Wp and a first overall delay pulse signal Wa.
And the second overall delay pulse signal Wb, and
It outputs a WM pulse signal Wm, an auxiliary PWM pulse signal Wh, a noise removal signal Wx, and a synchronization pulse signal Ws. Here, the synchronization pulse signal Ws is the noise removal signal Wx
Matches. FIGS. 28A to 28F show basic PWM.
The pulse signal Wp, the first overall delay pulse signal Wa, the second
3 shows the waveform relationship among the entire delay pulse signal Wb, the main PWM pulse signal Wm, the auxiliary PWM pulse signal Wh, the noise removal signal Wx, and the synchronization pulse signal Ws. Here, the horizontal axis in FIG. 28 is time. The first overall delay pulse signal Wa is a signal obtained by delaying the basic PWM pulse signal Wp as a whole by a first predetermined time Ta, and the second overall delay pulse signal Wb is the first overall delay pulse signal Wa. Is totally delayed by the second predetermined time Tb (see (a) to (c) of FIG. 28). The main PWM pulse signal Wm is composed of the basic PWM pulse signal Wp and the first overall delay pulse signal W.
a is output through an AND circuit 861.
The waveform is as shown in FIG. The auxiliary PWM pulse signal Wh is obtained by logically synthesizing the basic PWM pulse signal Wp and the first whole delay pulse signal Wa by the NOR circuit 862, and has a waveform shown in FIG. The “H” section of the auxiliary PWM pulse signal Wh is the main PWM
It is within the “L” section of the pulse signal Wm, and both the main PWM pulse signal Wm and the auxiliary PWM pulse signal Wh do not go “H” at the same time. That is, a time difference of the first predetermined time Ta is provided between the “H” section of the auxiliary PWM pulse signal Wh and the “H” section of the main PWM pulse signal Wm. Noise removal signal Wx and synchronization pulse signal W
s is obtained by logically synthesizing the basic PWM pulse signal Wp and the second whole delay pulse signal Wb by the exclusive NOR circuit 863, and has a waveform shown in FIG. The “L” section of the noise elimination signal Wx includes a change time point of the main PWM pulse signal Wm, and has at least a predetermined time width Tb from the change time point. The “L” section of the noise removal signal Wx includes the change time point of the auxiliary PWM pulse signal Wh, and at least a predetermined time width T from the change time point.
b or more. This noise removal signal Wx is output to the noise removal circuit 2 of the detection pulse generator 42 of the voltage detection unit 30.
01, and removes noise generated in the comparison detection signal of the terminal voltage of the coil in accordance with the high-frequency switching operation of the power transistor.

The “H” section of the synchronization pulse signal Ws is
It does not include the change time point of the WM pulse signal Wm or the auxiliary PWM pulse signal Wh. The phase detector 36 outputs the synchronization pulse signal W
The sampling voltage corresponding to the voltage difference between the power supply terminal voltage and the common terminal voltage is sampled by s. The phase detector 36 detects the sample voltage even during the period when the power transistor that performs high-frequency switching is off, so that the detection accuracy is slightly deteriorated. Can be. Further, the phase detecting section 36 charges the capacitor element with a required charging current in the “L” section of the synchronization pulse signal Ws, and creates a ramp voltage signal having a required voltage gradient.

Second Embodiment Next, a motor according to a second embodiment of the present invention and a disk device including the motor will be described. FIG. 29 is a block diagram showing the overall configuration of the second embodiment. In the second embodiment, the input signal to the state transition unit 31 in the first embodiment is a phase pulse signal Pt of the phase detection unit 36. In the second embodiment, the first embodiment is used.
The same components as those described above are denoted by the same reference numerals, and description thereof is omitted.

The command section 635 outputs a command signal Ac and a switch switching signal Ax corresponding to the rotational speeds of the disk 1 and the rotor 11 based on the phase pulse signal Pt of the phase detecting section 36. The changeover switch unit 680 switches the connection in response to the switch changeover signal Ax. The command unit 635 sets the switch switching signal Ax to “L” when the rotation speed of the rotor 11 is lower than a predetermined value, and the switch unit 680 sets a
And the detection pulse signal Dt of the voltage detection unit 30 is input to the state transition unit 31. The command unit 635 is the rotor 1
When the rotation speed of the switch 1 is higher than a predetermined value, the switch switching signal Ax is set to “H”, the switch 680 is connected to the b side, and the phase pulse signal Pt of the phase detector 36 is input to the state transition unit 31. . Therefore, when the rotation speeds of the disk 1 and the rotor 11 are smaller than the predetermined value (Ax
= “L”), the detection pulse signal Dt of the voltage detection unit 30
The energizing operation to the three-phase coils 12, 13, 14 is performed in response to This configuration is the same as that of the first embodiment, and a detailed description is omitted.

In a state where the speed of the disk 1 and the rotor 11 is controlled to a predetermined rotation speed (Ax = “H”), the three-phase coils 12, 13, 13 An energization operation and a speed control operation to the power supply 14 are performed. Therefore, in this state, the voltage detection unit 30 becomes unnecessary. The timing adjuster 43 of the state transition unit 31
In response to the phase pulse signal Pt, a first timing adjustment signal F1, a second timing adjustment signal F2, and a third timing adjustment signal F3 are created. That is, the first timing adjustment signal F1 is output after the delay of the first adjustment time T1 from the arrival of the phase pulse signal Pt, and the phase pulse signal Pt is output.
, A second timing adjustment signal F2 is output after a delay of the second adjustment time T2 from the arrival of the phase pulse signal, and a third timing adjustment signal F3 is output after a delay of the third adjustment time T3 from the arrival of the phase pulse signal Pt. Here, the first adjustment time T1, the second adjustment time T2, and the third adjustment time T3 change in proportion or substantially in proportion to the time interval T0 of the detection edge of the phase pulse signal Pt. Also, each adjustment time is T1 <T2 <
T3 <T0 is set.

The specific configuration and operation of the state holder 44, the energization control unit 32, the power supply unit 20, the current detection unit 21, and the switching control unit 22 of the state transition unit 31 in the second embodiment are as described in the above embodiment. Embodiment 1 is the same as Embodiment 1 and detailed description is omitted. In the second embodiment, the switching operation of the current path to the coil is performed in response to the phase pulse signal of the phase detector. The phase detector generates an accurate phase pulse signal corresponding to the rotation phase of the rotor 11 in response to the voltage difference between the power supply terminal voltage of the coil and the common terminal voltage. Thus, the operation of switching the energization of the three-phase coil can be accurately performed in response to the phase pulse signal. As a result, the pulsation of the generated driving force is reduced, and highly accurate disk rotation can be realized. Also, in the second embodiment, many advantages similar to those of the first embodiment can be obtained. In the second embodiment, the changeover switch unit 680 is switched in response to the rotation speed of the rotor 11, but is not limited to such a case. For example, the changeover switch unit 680
May be fixed and connected to the b side, and the voltage detection unit 30 may be omitted, and this is included in the present invention.

Third Embodiment Next, a motor according to a third embodiment of the present invention and a disk device including the motor will be described. FIGS. 30 to 32 show a motor according to a third embodiment of the present invention and a disk device including the motor. FIG. 30 is a block diagram showing the overall configuration of the third embodiment. In the third embodiment, the configuration of the phase detector in the first embodiment is changed. In the third embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and the description is omitted.

The phase detector 736 shown in FIG. 30 includes a gradient generator 747 and a phase pulse generator 748. The gradient creator 747 includes three-phase coils 12, 13, 1
A first sample voltage which intermittently responds to one of the power supply terminal voltages V1, V2 and V3 of FIG. 4 at a terminal of the first capacitor element, and a first output voltage which responds to the first sample voltage The signal SL1 is output. The slope creator 747 has 3
A second sample voltage intermittently responsive to the common terminal voltage Vc of the phase coils 12, 13, 14 is obtained at the terminal of the second capacitor element, and a required voltage gradient is added to the second sample voltage. 2 output voltage signal SL2. The phase pulse creator 748 compares the first output voltage signal SL1 and the second output voltage signal SL2 of the slope creator 747,
The phase pulse signal Pt corresponding to the comparison result is output. FIG. 31 shows a specific configuration of the slope creator 747,
FIG. 32 shows a specific configuration of the phase pulse generator 748.

The switch circuits 911, 912, and 913 of the signal selection circuit 910 of the gradient generator 747 shown in FIG. Supply terminal voltage V
One of V1, V2, and V3 is selectively input to the first amplification buffer circuit 920. The phase selection command circuit 950 is
The phase selection command signal Ps1 and the first polarity selection signal Ps2 corresponding to the holding state of the state holder 44 of the state transition unit 31 of the energization operation block are output. The switch circuit 919 is
The common terminal voltage Vc or the combined common voltage Vcr of the combined voltage circuit 915 (or the reference voltage of the reference voltage source 914) is selected, and one of them is selected as the second amplification buffer circuit 940.
Output to Here, a case where the switch circuit 919 selects the common terminal voltage Vc is described as a preferable example. The first amplification buffer circuit 920 outputs a voltage signal Vd1 corresponding to one of the power supply terminal voltages V1, V2, V3 of the three-phase coil, and the second amplification buffer circuit 940 outputs a common terminal of the three-phase coil. Voltage signal V corresponding to voltage Vc
Output d2.

The switch circuit 925 outputs the synchronization pulse signal W
s or the main PWM pulse signal Wm,
Output as the sampling pulse signal Wt. Here, a case where the switch circuit 925 selects the synchronization pulse signal Ws will be described. First sampling switch circuit 9
21 and the second sampling switch circuit 941 are turned on (closed) when the sampling pulse signal Wt is “H”, and turned off (open) when the sampling pulse signal Wt is “L”. The capacitor circuit 922 includes a first capacitor element 923 and a second capacitor element 924. When the first sampling switch circuit 921 is turned on, the capacitor circuit 922 samples the output voltage Vd1 of the first amplification buffer circuit 920 to the terminal of the first capacitor element 923 as a first sample voltage. When the second sampling switch circuit 941 is turned on, the capacitor circuit 922 changes the output voltage Vd2 of the second amplification buffer circuit 940 to the second capacitor element 9.
Sampling is performed as a second sample voltage at the 24 terminals.

The charging circuit 930 includes an upper current source circuit 931
, A lower current source circuit 932, an upper switch circuit 933, and a lower switch circuit 934. The phase selection command circuit 950 outputs a first polarity selection signal Ps2. The inverter circuit 951 outputs the first polarity selection signal P
s2 is inverted and output as the second polarity selection signal Ps3. When the first polarity selection signal Ps2 becomes “H”, the upper switch circuit 933 of the charging circuit 930 is turned on, and the upper current source circuit 931 supplies a required charging current to the second capacitor element 924 of the capacitor circuit 922. Charging (charging in a direction to increase the second output voltage signal SL2). When the second polarity selection signal Ps3 becomes “H”, the lower switch circuit 934 of the charging circuit 930 is turned on, and the lower current source circuit 932 supplies a required charging current to the second capacitor element 924 of the capacitor circuit 922. Supply and charge (charge in a direction to reduce the second output voltage signal SL2). Thus, the second output voltage signal SL2 has a required voltage gradient in a triangular waveform. Capacitor circuit 92
2 generates a first output voltage signal SL1 at a terminal of the first capacitor element 923,
A second output voltage signal SL2 is created at the terminal of. Upper current source circuit 931 and lower current source circuit 93 of charging circuit 930
2, the charging current to the second capacitor element 924 is
It changes in proportion or substantially in proportion to the target rotation speed of the disk 1 or the rotor 11 by the command unit 35. Thereby, the second
The voltage gradient of the output voltage signal SL2 changes in response to the (target) rotation speed of the disk 1 and the rotor 11.

The phase pulse generator 748 shown in FIG. 32 includes a comparator circuit 960 and a phase pulse circuit 970. The comparator circuit 960 compares the first output voltage signal SL1 of the slope creator 747 with the second output voltage signal SL2, and outputs a comparison signal S corresponding to the comparison result.
Output t. The phase pulse circuit 970 outputs a polarity selection comparison signal obtained by inverting or inverting the comparison signal St of the comparator circuit 960 in response to the first polarity selection signal Ps2. The phase pulse circuit 970 includes the timing adjuster 43
Resets the flip-flop circuit by the arrival of the third timing adjustment signal F3, sets the flip-flop circuit by the arrival of the polarity selection comparison signal, and sets the phase pulse signal P corresponding to the holding state of the flip-flop circuit.
Output t. Thus, the change timing of the phase pulse signal Pt corresponds to an accurate electrical phase corresponding to the back electromotive force of the coil to be detected. Therefore, the phase detector 7
The 36 phase pulse signal Pt generates a detection edge in response to the terminal voltage of the coil more accurately than the detection pulse signal Dt of the voltage detection unit 30.

The specific configurations and operations of the voltage detection unit 30, the state transition unit 31, the energization control unit 32, the power supply unit 20, the current detection unit 21, and the switching control unit 22 according to the third embodiment are as described in the above embodiment. Embodiment 1 is the same as Embodiment 1 and detailed description is omitted. In the third embodiment, the position detection element is not required by detecting the terminal voltage of the coil and switching the current path. In addition, the power transistor that supplies drive current in both directions to the coil is turned on and off by high-frequency switching to greatly reduce power loss. As a result, heat generation of the motor and the disk device is significantly reduced, and recording / reproducing on / from a high-density disk or a recordable disk can be stably performed.

In the third embodiment, the phase detector 736
The phase pulse signal Pt is created using the capacitor elements. The gradient creator 747 samples a second sample voltage intermittently responding to the common terminal voltage of the three-phase coil to a terminal of the second capacitor element 924, and charges the second capacitor element 924 with a predetermined current. By doing so, the second output voltage signal SL2 having a required triangular waveform voltage gradient is created. Regardless of the rotational position of the rotor 11, the common terminal voltage Vc is at an intermediate potential on average, so after sampling the second sample voltage corresponding to the common terminal voltage Vc, the triangular waveform is applied to the terminal of the second capacitor element. Can be easily created. The slope creator 747 selects one of the three-phase coil power supply terminal voltages according to the operation of the energizing operation block,
A first sample voltage that intermittently responds to the selected power supply terminal voltage is sampled at a terminal of the first capacitor element, and the first sample voltage is used as a first output voltage signal SL.
It is output as 1. Since the phase pulse creator 748 compares the first output voltage signal SL1 and the second output voltage signal SL2 of the gradient creator 747, the phase pulse creator 748 can create the phase pulse signal Pt at an accurate timing. As a result, even in the case where the power transistor performs the high-frequency switching operation, the rotation of the disk can be controlled with high accuracy using the phase pulse signal Pt in the third embodiment. This allows
High-density, low-jitter recording / reproducing operations on a disk become possible, and a high-performance disk device can be realized. Charging circuit 9
At 30, the charging current to the second capacitor element 924 by the upper current source circuit 931 and the lower current source circuit 932 is changed in proportion to or approximately in proportion to the target rotation speed of the disk 1 or the rotor 11 by the command unit 35. ing. Thereby, the voltage gradient of the second output voltage signal SL2 changes in response to the (target) rotation speed of the disk 1 or the rotor 11. Therefore, even when the (target) rotation speed of the disk 1 is changed according to the position of the head 2, the phase pulse signal Pt of the phase detection unit 736 is the second output voltage signal SL.
2 and changes at an accurate timing. As a result, highly accurate rotation speed control of the disk 1 can be realized.
Also in the third embodiment, many advantages similar to those of the first embodiment can be obtained.

Fourth Embodiment Next, a motor according to a fourth embodiment of the present invention and a disk device including the motor will be described. FIG. 33 is a block diagram showing the entire configuration of the fourth embodiment. In the fourth embodiment, the input signal to the state transition unit 31 in the third embodiment is a phase pulse signal Pt of the phase detection unit 736. In the fourth embodiment, the same components as those in the first, second, and third embodiments are denoted by the same reference numerals, and description thereof will be omitted.

The command section 735 includes a command signal Ac corresponding to the rotational speed of the disk 1 and the rotor 11 based on the phase pulse signal Pt of the phase detecting section 736 and a switch switching signal Ax.
Is output. The changeover switch unit 780 switches the connection in response to the switch changeover signal Ax. The command unit 735 is
When the command signal Ac is smaller than a predetermined value, the switch switching signal Ax is set to “L”, the switch unit 780 is connected to the a side, and the detection pulse signal Dt of the voltage detection unit 30 is input to the state transition unit 31. . The command unit 735 includes a command signal A
When c becomes larger than a predetermined value, the switch switching signal Ax
Is set to “H”, the changeover switch unit 780 is connected to the b side, and the phase pulse signal Pt of the phase detection unit 736 is input to the state transition unit 31. Therefore, the state where the rotation speeds of the disk 1 and the rotor 11 are smaller than the predetermined value (Ax = "
In L ″), the energizing operation of the three-phase coils 12, 13, and 14 is performed in response to the detection pulse signal Dt of the voltage detection unit 30. This configuration is the same as that of the third embodiment. Detailed description is omitted in the fourth embodiment.

When the speed of the disk 1 and the rotor 11 is controlled to a predetermined rotational speed (Ax = “H”), the three-phase coils 12, 13, 13 An energization operation and a speed control operation to the power supply 14 are performed. Therefore, in this state, the voltage detection unit 30 becomes unnecessary. Timing adjuster 43 of state transition unit 31
Corresponds to the first timing adjustment signal F1, the second timing adjustment signal F2, and the third timing adjustment signal F2 in response to the phase pulse signal Pt.
Is generated. That is, the first timing adjustment signal F1 is output after a delay of the first adjustment time T1 from the arrival of the phase pulse signal Pt, and the second timing adjustment signal F1 is output after the delay of the second adjustment time T2 from the arrival of the phase pulse signal Pt.
Of the phase pulse signal P
A third timing adjustment signal F3 is output after a delay of the third adjustment time T3 from the arrival of t. Here, the first adjustment time T1, the second adjustment time T2, and the third adjustment time T3 are:
It changes in proportion or substantially in proportion to the time interval T0 of the detection edge of the phase pulse signal Pt. Each adjustment time is T1
<T2 <T3 <T0.

The specific configuration and operation of the state holder 44, the energization control unit 32, the power supply unit 20, the current detection unit 21, and the switching control unit 22 of the state transition unit 31 in the fourth embodiment are as described in the above embodiment. Embodiment 1 is the same as Embodiment 1 and detailed description is omitted. Further, the specific configuration and operation of the phase detection unit 736 are the same as those of the above-described third embodiment, and a detailed description will be omitted. In the fourth embodiment, the switching operation of the current path to the coil is performed in response to the phase pulse signal of the phase detector 736. The phase detection unit 736 includes the rotor 1
An accurate phase pulse signal corresponding to one rotation phase is created. Thus, the operation of switching the energization of the three-phase coil can be accurately performed in response to the phase pulse signal. As a result, the pulsation of the generated driving force is reduced, and highly accurate disk rotation can be realized. Also, in the fourth embodiment, many advantages similar to those of the above-described first, second, and third embodiments can be obtained.

The specific configuration of each of the above embodiments can be variously modified. For example, each phase coil may be configured by connecting a plurality of partial coils in series or in parallel. The three-phase coils are not limited to the star connection, but may be a delta connection. The number of phases of the coil is not limited to three. In general, a configuration having coils of a plurality of phases can be realized. Further, the number of magnetic poles of the field portion of the rotor is not limited to two, and a field portion having two or more poles may be used. In each of the above embodiments, an N-channel MOS field effect power transistor is used as the power transistor of the power supply unit.
The high-frequency switching operation is easily performed. As a result, power loss and heat generation of the power transistor are reduced, and integration into an integrated circuit is facilitated. However, the present invention is not limited to such a configuration, and power transistors having various structures can be used. For example, a normal bipolar transistor or an IGBT transistor which is a kind of a field effect transistor can be used as the power transistor. In addition, the power transistor of the power supply unit may perform a high-frequency switching operation between an on state (full on or half on) and an off state.

In each of the above-described embodiments, only the lower power transistor is operated at a high frequency. However, the present invention is not limited to such a case. The high-frequency switching operation of the transistor and the upper power transistor may be alternately performed. In each of the above embodiments, three lower power transistors and three lower power transistors are connected.
One of the upper power transistors was operated at a high frequency simultaneously in response to a single switching pulse signal, and the switching operation was performed with a simple configuration. However, the present invention is not limited to such a configuration, and various modifications are possible.
For example, a plurality of power transistors may be caused to perform a three-phase switching operation by a three-phase switching pulse signal. Further, in each of the above-described embodiments, the current detection unit is simply configured by one current detection resistor. However, the present invention is not limited to such a configuration, and various current detection methods may be used. Can be used. For example, the present invention is not limited to the case where the current obtained by combining the negative current values of the three-phase driving currents is detected, and the current obtained by combining the positive current values may be detected. Further, in the present invention, the lower power transistor and the upper power transistor may be multi-output to detect the current output to one end thereof and eliminate the current detection resistor. Further, in each of the above-described embodiments, the configuration is simplified by changing the charging current of the slope creator in response to the target rotation speed of the command unit, but the present invention is limited to such a configuration. is not. For example, the charging current of the slope creator may be changed continuously or stepwise in response to or in conjunction with the rotation speed of the rotor, and such a configuration is also included in the present invention.
In addition, various modifications are possible without changing the gist of the present invention, and it goes without saying that the present invention is included in the present invention.

[0109]

As apparent from the detailed description of the embodiments, the present invention has the following effects. The motor and the disk device according to the present invention can accurately generate a phase pulse signal corresponding to a voltage difference between one of the power supply terminal voltages of the coil and the common terminal voltage, thereby using the disk or the rotor without using the position detecting means. Speed control can be performed with high accuracy. Also, the lower power transistor and upper power transistor, which are the power supply means, are turned on.
Since the off high-frequency switching operation is performed, power loss and heat generation of the power transistor can be significantly reduced. As a result, the present invention has an excellent effect that a high-performance motor and disk device with low power consumption can be realized at low cost.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an overall configuration according to Embodiment 1 of the present invention.

FIG. 2 is a circuit diagram of a power supply unit 20 and a current detection unit 21 according to the first embodiment.

FIG. 3 is a circuit diagram of a voltage comparator 41 of the voltage detection unit 30 according to the first embodiment.

FIG. 4 is a circuit diagram of another configuration of the voltage comparator 41 of the voltage detection unit 30 according to the first embodiment.

FIG. 5 is a circuit diagram of a detection pulse generator 42 of the voltage detector 30 according to the first embodiment.

FIG. 6 is a circuit diagram of a timing adjuster 43 of the state transition unit 31 according to the first embodiment.

FIG. 7 is a circuit diagram of a state holder 44 of the state transition unit 31 according to the first embodiment.

FIG. 8 is a circuit diagram of an energization control unit 32 according to the first embodiment.

FIG. 9 shows a switching control unit 22 according to the first embodiment.
FIG.

FIG. 10 shows a switching control unit 2 according to the first embodiment.
FIG. 6 is a circuit diagram of a second comparison pulser 501.

FIG. 11 is a switching control unit 2 according to the first embodiment.
FIG. 13 is a circuit diagram of another configuration of the second comparison pulser 501.

FIG. 12 shows a switching control unit 2 according to the first embodiment.
2 is a circuit diagram of a second PWM pulser 502. FIG.

FIG. 13 is a circuit diagram of a slope creator 47 of the phase detector 36 according to the first embodiment.

FIG. 14 is a circuit diagram of a phase pulse generator 48 of the phase detector 36 according to the first embodiment.

FIG. 15 is a waveform diagram for explaining an operation of the timing adjuster 43 of the state transition unit 31 according to the first embodiment.

FIG. 16 is a diagram illustrating the state selector 44 of the state transition unit 31 and the first selection circuit 401 of the conduction control unit 32 according to the first embodiment.
FIG. 7 is a waveform diagram for explaining the operation of the second selection circuit 402.

FIG. 17 is a waveform chart for explaining an operation of comparison pulse device 501 shown in FIG. 10 in the first embodiment.

FIG. 18 is a waveform chart for explaining an operation of comparison pulse generator 501 shown in FIG. 11 in the first embodiment.

FIG. 19 shows the PWM shown in FIG. 12 in the first embodiment.
FIG. 9 is a waveform diagram for explaining the operation of the pulse unit 502.

FIG. 20 is a waveform chart for explaining an operation of the phase detector 36 according to the first embodiment.

FIG. 21 is another waveform diagram for explaining the operation of the phase detector 36 according to the first embodiment.

FIG. 22 is a waveform chart when the charging current of the slope creator 47 of the phase detector 36 in the first embodiment is small.

FIG. 23 is a waveform diagram when the charging current of the slope creator 47 of the phase detector 36 in Embodiment 1 is large.

FIG. 24 is still another waveform diagram for explaining the operation of the phase detector 36 according to the first embodiment.

FIG. 25 is a switching control unit 2 according to the first embodiment.
FIG. 14 is a circuit diagram of another configuration of the second PWM pulser 502.

FIG. 26 shows the PWM shown in FIG. 25 in the first embodiment.
FIG. 9 is a waveform diagram for explaining the operation of the pulse unit 502.

FIG. 27 is a diagram illustrating a switching control unit 2 according to the first embodiment.
FIG. 13 is a circuit diagram of still another configuration of the second PWM pulser 502.

FIG. 28 is a diagram illustrating the PWM shown in FIG. 27 according to the first embodiment;
FIG. 9 is a waveform diagram for explaining the operation of the pulse unit 502.

FIG. 29 is a block diagram showing an overall configuration according to Embodiment 2 of the present invention.

FIG. 30 is a block diagram showing an overall configuration according to Embodiment 3 of the present invention.

FIG. 31 is a circuit diagram of a slope creator 747 of the phase detector 736 according to the third embodiment.

FIG. 32 is a circuit diagram of a phase pulse generator 748 of the phase detector 736 according to the third embodiment.

FIG. 33 is a block diagram showing an overall configuration according to Embodiment 4 of the present invention.

FIG. 34 is a block diagram related to an information signal of the disk device in the embodiment.

FIG. 35 is a diagram showing a configuration of a motor used in a conventional disk device.

[Explanation of symbols]

 Reference Signs List 1 disk 2 head 3 information processing unit 11 rotor 12, 13, 14 coil 20 power supply unit 21 current detection unit 22 switching control unit 25 voltage supply unit 30 voltage detection unit 31 state transition unit 32 conduction control unit 35, 635, 735 Command Unit 36,736 phase detector 41 voltage comparator 42 detection pulse generator 43 timing adjuster 44 state holder 47,747 inclination generator 48,748 phase pulse generator 680,780 switch unit

Claims (40)

[Claims] 1. A rotor provided with a field portion for generating a field magnetic flux, a Q-phase (here, Q is an integer of 3 or more) coil disposed on a stator, and a DC voltage supply 2 Voltage supply means having two output terminals; Q first power transistors for supplying power from the first output terminal side of the voltage supply means to one end of the Q-phase coil; Q second power sources for supplying power from the second output terminal to one end of the Q-phase coil
A power transistor comprising: a power transistor; a voltage detection unit that generates a detection pulse signal responsive to a terminal voltage of the Q-phase coil; and a phase responsive to a terminal voltage of the Q-phase coil. Phase detection means for generating a pulse signal; state transition means for changing a holding state in response to a detection pulse signal of the voltage detection means; and Q of the power supply means in response to the holding state of the state transition means. Energization control means for controlling energization sections of the first power transistors and the Q second power transistors; command means for generating a command signal corresponding to the rotation speed of the rotor by the phase pulse signal; At least one of the Q first power transistors and the Q second power transistors of the power supply means; And a switching operation means for performing a high-frequency switching operation in response to the command signal, wherein the energization control means is configured to switch between the Q first power transistors and the Q second power transistors. Each energizing section is made larger than the equivalent of 360 / Q degrees, and the switching operation means generates a high-frequency switching pulse signal in response to the command signal, and causes the at least one power transistor to respond to the switching pulse signal. High-frequency switching operation, and the phase detection means
Creating a ramp voltage signal intermittently responsive to the voltage difference between one of the power supply terminal voltages of the phase coils and the common terminal voltage, wherein the ramp voltage having a voltage ramp substantially in at least one period other than the sampling period. A slope generating means for generating a signal at a terminal of one capacitor element; and a phase pulse generating means for generating the phase pulse signal in response to a result of comparison between the gradient voltage signal and a reference voltage. motor. 2. The method according to claim 1, wherein the slope creating unit selects one of the power supply terminal voltages in response to an operation of the state transition unit, and intermittently selects a voltage difference between the selected power supply terminal voltage and the common terminal voltage. 2. The motor of claim 1, wherein the motor is configured to generate the ramp voltage signal that is responsive to motion. 3. The method according to claim 1, wherein the slope generating means intermittently supplies the capacitor element and a sample voltage corresponding to a voltage difference between one of the power supply terminal voltages and the common terminal voltage to a terminal of the capacitor element during the sampling period. 3. The motor according to claim 1, further comprising: a sampling unit for obtaining the voltage gradient; and a charging unit for charging the capacitor element to generate the voltage gradient. 4. The switching operation means includes: a current detection means for generating a current detection signal responsive to a combined supply current from the voltage supply means to the Q-phase coil; and responsive to the current detection signal and the command signal. The motor according to any one of claims 1 to 3, further comprising switching control means for generating the switching pulse signal. 5. The state transition means changes the holding state from the first state to the second state after a first adjustment time from the arrival of the detection pulse signal of the voltage detection means, and 2. The apparatus according to claim 1, further comprising means for further changing the holding state from the second state to the third state after a second adjustment time (second adjustment time> first adjustment time) from the arrival. The motor according to claim 4. 6. The apparatus according to claim 6, wherein said state transition means includes means for changing said first adjustment time and said second adjustment time in response to an arrival interval of a detection pulse signal of said voltage detection means. Item 6. The motor according to Item 5. 7. The motor according to claim 1, wherein said phase detection means is configured to obtain the common terminal voltage by synthesizing a power supply terminal voltage of the Q-phase coil. 8. A rotor provided with a field portion for generating a field magnetic flux, a Q-phase (here, Q is an integer of 3 or more) coil disposed on a stator, and a DC voltage supply 2 Voltage supply means having two output terminals; Q first power transistors for supplying power from the first output terminal side of the voltage supply means to one end of the Q-phase coil; Q second power sources for supplying power from the second output terminal to one end of the Q-phase coil
A power transistor comprising: a power transistor; a phase detection unit that generates a phase pulse signal responsive to a terminal voltage of the Q-phase coil; and a power supply unit responsive to the phase pulse signal of the phase detection unit. State transition means for transiting a holding state; and controlling an energizing section of the Q first power transistors and the Q second power transistors of the power supply means in response to the holding state of the state transition means. Energizing control means, a command means for generating a command signal corresponding to the rotation speed of the rotor based on the phase pulse signal, the Q first power transistors and the Q second power transistors of the power supply means. Switching operation means for causing at least one of the power transistors to perform a high-frequency switching operation in response to the command signal; The energization control means increases an energization section of the Q first power transistors and the Q second power transistors to be greater than 360 / Q degrees, and the switching operation Means for generating a high-frequency switching pulse signal in response to the command signal, causing the at least one power transistor to perform a high-frequency switching operation in response to the switching pulse signal;
Creating a ramp voltage signal intermittently responsive to the voltage difference between one of the power supply terminal voltages of the phase coils and the common terminal voltage, wherein the ramp voltage having a voltage ramp substantially in at least one period other than the sampling period. A slope generating means for generating a signal at a terminal of one capacitor element; and a phase pulse generating means for generating the phase pulse signal in response to a result of comparison between the gradient voltage signal and a reference voltage. motor. 9. The slope creating means selects one of the power supply terminal voltages in response to the operation of the state transition means, and intermittently selects the voltage difference between the selected power supply terminal voltage and the common terminal voltage. 9. The motor of claim 8, wherein the motor is configured to generate the ramp voltage signal that is responsive to motion. 10. The slope creating means intermittently applies a sample voltage corresponding to a voltage difference between one of the power supply terminal voltages and the common terminal voltage to the capacitor element and the terminal of the capacitor element during the sampling period. 10. The motor according to claim 8, comprising sampling means for obtaining, and charging means for charging the capacitor element to create the voltage gradient. 11. The switching operation means includes: a current detection means for generating a current detection signal in response to a combined supply current from the voltage supply means to the Q-phase coil; and a response to the current detection signal and the command signal. The motor according to any one of claims 8 to 10, further comprising: a switching control unit that generates the switching pulse signal. 12. The state transition means changes the holding state from the first state to the second state after a first adjustment time from the arrival of the detection pulse signal of the voltage detection means, and 9. The method according to claim 8, further comprising means for further changing the holding state from the second state to the third state after a second adjustment time (second adjustment time> first adjustment time) from the arrival. A motor according to claim 11. 13. The state transition means includes means for changing the first adjustment time and the second adjustment time in response to an arrival interval of a detection pulse signal of the voltage detection means. Item 13. The motor according to Item 12. 14. The motor according to claim 8, wherein the phase detection means is configured to combine the power supply terminal voltages of the Q-phase coils to obtain the common terminal voltage. 15. A voltage having a rotor provided with a field portion for generating a field magnetic flux, a coil of Q phase (where Q is an integer of 3 or more), and two output terminals for supplying a DC voltage. Supply means; power supply means for supplying a bidirectional drive current from the voltage supply means to the Q-phase coil by a plurality of power transistors; and generating a phase pulse signal in response to a terminal voltage of the Q-phase coil. Phase detection means, energization operation means for controlling energization intervals of the plurality of power transistors in response to the terminal voltage of the Q-phase coil, and a command signal in response to the rotation speed of the rotor by the phase pulse signal Command means for generating, and at least one of the plurality of power transistors of the power supply means having a high frequency in response to the command signal. A switching operation means for performing a switching operation, wherein the energization operation means makes each energization section of the plurality of power transistors larger than 360 / Q degrees, and the switching operation means includes: Generating a high-frequency switching pulse signal in response to the command signal; causing the at least one power transistor to perform a high-frequency switching operation in response to the switching pulse signal;
Creating a ramp voltage signal intermittently responsive to the voltage difference between one of the power supply terminal voltages of the phase coils and the common terminal voltage, wherein the ramp voltage having a voltage ramp substantially in at least one period other than the sampling period. A motor comprising: a slope generating means for generating a signal at a terminal of one capacitor element; and a phase pulse generating means for generating the phase pulse signal in response to the gradient voltage signal. 16. The slope creating means intermittently applies a sample voltage corresponding to a voltage difference between one of the power supply terminal voltages and the common terminal voltage to a terminal of the capacitor element in the sampling period. 16. The motor according to claim 15, comprising: sampling means for obtaining; and charging means for charging the capacitor element to create the voltage ramp. 17. The switching operation means, comprising: current detection means for generating a current detection signal responsive to a combined supply current from the voltage supply means to the Q-phase coil; and responsive to the current detection signal and the command signal. 17. The motor according to claim 15, further comprising: a switching control unit configured to generate the switching pulse signal. 18. 18. A voltage having a rotor provided with a field portion for generating a field magnetic flux, a coil of Q phase (where Q is an integer of 3 or more), and two output terminals for supplying a DC voltage. Supply means; power supply means for supplying a bidirectional drive current from the voltage supply means to the Q-phase coil by a plurality of power transistors; and generating a phase pulse signal in response to a terminal voltage of the Q-phase coil. Phase detection means, energization operation means for controlling energization intervals of the plurality of power transistors in response to the terminal voltage of the Q-phase coil, and a command signal in response to the rotation speed of the rotor by the phase pulse signal Command means for generating, and at least one of the plurality of power transistors of the power supply means having a high frequency in response to the command signal. A switching operation means for performing a switching operation, wherein the energization operation means makes each energization section of the plurality of power transistors larger than 360 / Q degrees, and the switching operation means includes: Generating a high-frequency switching pulse signal in response to the command signal, causing the at least one power transistor to perform a high-frequency switching operation in response to the switching pulse signal, wherein the phase detection means includes a power supply terminal of the Q-phase coil. A first voltage signal intermittently responsive to one of the voltages is generated at a terminal of the first capacitor element, and a second voltage signal intermittently responsive to a common terminal voltage of the Q-phase coil during a sampling period. And the second step having a substantially voltage gradient in a required period other than the sampling period. Slope generating means for generating a voltage signal at a terminal of a second capacitor element, and phase pulse generating means for generating the phase pulse signal in response to a result of comparison between the first voltage signal and the second voltage signal. And a motor configured to include: 19. The slope creating means includes a capacitor means having the first capacitor element and the second capacitor element, and a first sample voltage intermittently responsive to one of the power supply terminal voltages. First sampling means for generating the first voltage signal at a terminal of the first capacitor element; and a second capacitor for intermittently responding to the common terminal voltage during the sampling period. 19. A device comprising: a second sampling unit for generating a voltage at a terminal of an element; and a charging unit for charging the second capacitor element to generate the voltage gradient of the second voltage signal. A motor according to claim 1. 20. A current detecting means for generating a current detection signal responsive to a combined supply current from the voltage supply means to the Q-phase coil, and a switching means responsive to the current detection signal and the command signal. 20. The motor according to claim 18, comprising switching control means for generating the switching pulse signal. 21. At least a head unit for reproducing a signal from a disk or recording a signal on a disk, and at least processing an output signal of the head unit to output a reproduction information signal, or a recording information signal. Information processing means for signal processing and outputting the signal to the head means; a rotor having a field portion for directly rotating and driving the disk to generate a field magnetic flux; and a Q-phase disposed on the stator. (Here, Q is an integer of 3 or more); a voltage supply means having two output terminals for supplying a DC voltage; and one end of the Q-phase coil from a first output terminal side of the voltage supply means. And Q second power transistors for supplying power to one end of the Q-phase coil from the second output terminal side of the voltage supply means.
A power transistor comprising: a power transistor; a voltage detection unit that generates a detection pulse signal responsive to a terminal voltage of the Q-phase coil; and a phase responsive to a terminal voltage of the Q-phase coil. Phase detection means for generating a pulse signal; state transition means for changing a holding state in response to the detection pulse signal of the voltage detection means; and Q of the power supply means in response to the holding state of the state transition means. Energization control means for controlling energization sections of the first power transistors and the Q second power transistors; command means for generating a command signal corresponding to the rotation speed of the rotor by the phase pulse signal; At least one of the Q first power transistors and the Q second power transistors of the power supply means; A switching operation means for performing a switching operation in response to the command signal, wherein the energization control means includes a switch for the Q first power transistors and the Q second power transistors. Each energizing section is made larger than the equivalent of 360 / Q degrees, and the switching operation means generates a high-frequency switching pulse signal in response to the command signal, and causes the at least one power transistor to respond to the switching pulse signal. High-frequency switching operation, and the phase detection means
Creating a ramp voltage signal intermittently responding to the voltage difference between one of the power supply terminal voltages of the phase coils and the common terminal voltage, wherein the ramp voltage having a voltage ramp substantially in at least one period other than the sampling period A disk comprising: a gradient generating means for generating a signal at a terminal of one capacitor element; and a phase pulse generating means for generating the phase pulse signal in response to a comparison result between the gradient voltage signal and a reference voltage. apparatus. 22. The slope creating means selects one of the power supply terminal voltages in response to the operation of the state transition means,
22. The disk drive according to claim 21, wherein the gradient voltage signal is generated intermittently in response to a voltage difference between the selected power supply terminal voltage and the common terminal voltage. 23. The slope creating means intermittently applies a sample voltage corresponding to a voltage difference between one of the power supply terminal voltages and the common terminal voltage to a terminal of the capacitor element in the sampling period. 23. The disk device according to claim 21, comprising sampling means for obtaining, and charging means for charging the capacitor element to create the voltage gradient. 24. A current detecting means for generating a current detection signal in response to a combined supply current from the voltage supply means to the Q-phase coil, and a switching means responsive to the current detection signal and the command signal. The disk drive according to any one of claims 21 to 23, comprising: switching control means for generating the switching pulse signal. 25. The state transition unit changes the holding state from the first state to the second state after a first adjustment time from the arrival of the detection pulse signal of the voltage detection unit, and changes the state of the detection pulse signal. 22. The apparatus according to claim 21, further comprising means for further changing the holding state from the second state to the third state after a second adjustment time (second adjustment time> first adjustment time) from the arrival. The disk device according to claim 24. 26. The state transition means comprising means for changing the first adjustment time and the second adjustment time in response to an arrival interval of a detection pulse signal of the voltage detection means. Item 26. The disk device according to item 25. 27. The disk device according to claim 21, wherein said phase detecting means is configured to combine the power supply terminal voltages of the Q-phase coils to obtain the common terminal voltage. 28. At least a head unit for reproducing a signal from a disk or recording a signal on a disk, and at least processing an output signal of the head unit to output a reproduction information signal, or a recording information signal. Information processing means for signal processing and outputting the signal to the head means; a rotor having a field portion for directly rotating and driving the disk to generate a field magnetic flux; and a Q-phase disposed on the stator. (Here, Q is an integer of 3 or more); a voltage supply means having two output terminals for supplying a DC voltage; and one end of the Q-phase coil from a first output terminal side of the voltage supply means. And Q second power transistors for supplying power to one end of the Q-phase coil from the second output terminal side of the voltage supply means.
A power transistor comprising: a power transistor; a phase detection unit that generates a phase pulse signal responsive to a terminal voltage of the Q-phase coil; and a power supply unit responsive to the phase pulse signal of the phase detection unit. State transition means for transiting a holding state, and controlling an energizing section of the Q first power transistors and the Q second power transistors of the power supply means in response to the holding state of the state transition means. Energizing control means, a command means for generating a command signal corresponding to the rotation speed of the rotor based on the phase pulse signal, the Q first power transistors and the Q second power transistors of the power supply means. Switching operation means for causing at least one of the power transistors to perform a high-frequency switching operation in response to the command signal; The energization control means sets each energization section of the Q first power transistors and the Q second power transistors to be greater than 360 / Q degrees, and The operating means generates a high-frequency switching pulse signal in response to the command signal, and causes the at least one power transistor to perform a high-frequency switching operation in response to the switching pulse signal. Q
Creating a ramp voltage signal intermittently responsive to the voltage difference between one of the power supply terminal voltages of the phase coils and the common terminal voltage, wherein the ramp voltage having a voltage ramp substantially in at least one period other than the sampling period. A slope generating means for generating a signal at a terminal of one capacitor element; and a phase pulse generating means for generating the phase pulse signal in response to a result of comparison between the gradient voltage signal and a reference voltage. Disk device. 29. The slope creating means selects one of the power supply terminal voltages in response to the operation of the state transition means,
29. The disk device according to claim 28, wherein said gradient voltage signal is generated intermittently in response to a selected voltage difference between said power supply terminal voltage and said common terminal voltage. 30. The slope generating means intermittently applies a sample voltage corresponding to a voltage difference between one of the power supply terminal voltages and the common terminal voltage to the capacitor element terminal during the sampling period. 30. The disk device according to claim 28, further comprising sampling means for obtaining, and charging means for charging the capacitor element to create the voltage gradient. 31. A current detecting means for generating a current detection signal in response to a combined supply current from the voltage supply means to the Q-phase coil, and a switching operation means responsive to the current detection signal and the command signal. 31. The disk device according to claim 28, further comprising: switching control means for generating the switching pulse signal. 32. The state transition means changes the holding state from the first state to the second state after a first adjustment time from the arrival of the detection pulse signal of the voltage detection means, and changes the state of the detection pulse signal. 29. The apparatus according to claim 28, further comprising means for further changing the holding state from the second state to the third state after a second adjustment time (second adjustment time> first adjustment time) from the arrival. 32. The disk device according to claim 31. 33. The state transition means comprising means for changing the first adjustment time and the second adjustment time in response to an arrival interval of a detection pulse signal of the voltage detection means. Item 33. The disk device according to item 32. 34. The disk device according to claim 28, wherein said phase detecting means is configured to combine the power supply terminal voltages of said Q-phase coils to obtain said common terminal voltage. 35. At least head means for reproducing a signal from a disk or recording a signal on a disk, and at least processing an output signal of the head means to output a reproduction information signal, or a recording information signal Information processing means for signal processing and outputting the signal to the head means; a rotor having a field portion for directly rotating and driving the disk to generate a field magnetic flux; and a Q-phase disposed on the stator. (Here, Q is an integer of 3 or more), a voltage supply means having two output terminals for supplying a DC voltage, and a plurality of power transistors from the voltage supply means to the Q-phase coil in both directions. Power supply means for supplying a drive current; phase detection means for generating a phase pulse signal in response to a terminal voltage of the Q-phase coil; Energizing operation means for controlling an energizing section of the plurality of power transistors in response to a voltage; command means for creating a command signal in response to a rotation speed of the rotor by the phase pulse signal; Switching operation means for performing high-frequency switching operation of at least one power transistor among the plurality of power transistors in response to the command signal, wherein the energization operation means comprises: Each energizing section of the power transistor is set to be larger than 360 / Q degree, and the switching operation means generates a high-frequency switching pulse signal in response to the command signal, and sets the at least one power transistor to the switching pulse signal. High-frequency switching operation in response to The output means is provided during the sampling period.
Creating a ramp voltage signal intermittently responsive to the voltage difference between one of the power supply terminal voltages of the phase coils and the common terminal voltage, wherein the ramp voltage having a voltage ramp substantially in at least one period other than the sampling period. A disk device comprising: a slope creating means for creating a signal at a terminal of one capacitor element; and a phase pulse creating means for creating the phase pulse signal in response to the slope voltage signal. 36. The slope creating means intermittently intermittently supplies a sample voltage corresponding to a voltage difference between one of the power supply terminal voltages and the common terminal voltage to the capacitor element and the capacitor element during the sampling period. 36. The disk drive according to claim 35, further comprising sampling means for obtaining, and charging means for charging the capacitor element to create the voltage gradient. 37. A current detecting means for generating a current detection signal in response to a combined supply current from the voltage supply means to the Q-phase coil, and a switching operation means responsive to the current detection signal and the command signal. 37. The disk device according to claim 35, further comprising: switching control means for generating the switching pulse signal. 38. At least a head unit for reproducing a signal from a disk or recording a signal on a disk, and at least processing a signal output from the head unit to output a reproduction information signal, or a recording information signal. Information processing means for signal processing and outputting the signal to the head means; a rotor having a field portion for directly rotating and driving the disk to generate a field magnetic flux; and a Q-phase disposed on the stator. (Here, Q is an integer of 3 or more), a voltage supply means having two output terminals for supplying a DC voltage, and a plurality of power transistors from the voltage supply means to the Q-phase coil in both directions. Power supply means for supplying a drive current; phase detection means for generating a phase pulse signal in response to a terminal voltage of the Q-phase coil; Energizing operation means for controlling an energizing section of the plurality of power transistors in response to a voltage; command means for creating a command signal in response to a rotation speed of the rotor by the phase pulse signal; Switching operation means for performing high-frequency switching operation of at least one power transistor among the plurality of power transistors in response to the command signal, wherein the energization operation means comprises: Each energizing section of the power transistor is set to be larger than 360 / Q degree, and the switching operation means generates a high-frequency switching pulse signal in response to the command signal, and sets the at least one power transistor to the switching pulse signal. High-frequency switching operation in response to Output means for generating, at a terminal of the first capacitor element, a first voltage signal intermittently responding to one of the power supply terminal voltages of the Q-phase coil; A second voltage signal intermittently responding to the terminal voltage is generated, and the second voltage signal having a substantially voltage gradient is generated at a terminal of the second capacitor element in a required period other than the sampling period. A disk device comprising: a slope creating unit; and a phase pulse creating unit that creates the phase pulse signal in response to a comparison result between the first voltage signal and the second voltage signal. 39. The slope creating means includes a capacitor means having the first capacitor element and the second capacitor element, and a first sample voltage intermittently responsive to one of the power supply terminal voltages. First sampling means for generating the first voltage signal at a terminal of the first capacitor element; and a second capacitor for intermittently responding to the common terminal voltage during the sampling period. 39. The apparatus according to claim 38, further comprising: a second sampling unit for generating a voltage at the terminal of the element; and a charging unit for charging the second capacitor element to generate the voltage gradient of the second voltage signal. The disk device according to item 1. 40. The switching operation means, comprising: current detection means for generating a current detection signal responsive to a combined supply current from the voltage supply means to the Q-phase coil; and responsive to the current detection signal and the command signal. 40. The disk device according to claim 38, further comprising: switching control means for generating the switching pulse signal.