JP2002330353A - Imaging unit and method for correcting defective pixel - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce deterioration in the image quality in the case of occurrence of a plurality of adjacent defective pixels without the need for employing a status adaptive interpolation method (employing different processing according to circumstances). SOLUTION: First, defective data are read from an EEPROM and compensation processing with respect to defective pixels is carried out in the order of memory addresses registered in the EEPROM 118 (steps S11, S12). The defective data are read in the order of memory addresses and the 'defect compensation processing by four adjacent pixels' is applied to a defective pixel in the order of read defective pixel addresses. In this case, since the EEPROM stores defective data of the defective pixels sequentially in the order of addresses of defective pixels with a greater defective level, when defective pixels exist adjacently to each other, that is, when a plurality of defects, where defective pixel addressed of compensation objects are adjacent to each other, exist, the defect compensation processing is carried out for defective pixels having a greater defect level with priority.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an image pickup apparatus and a pixel defect correction method, and more particularly to an image pickup apparatus having a pixel defect compensation function and a pixel defect correction method applied to the image pickup apparatus.

[0002]

[0003]

2. Description of the Related Art Imaging devices such as video cameras have been widely used. In recent years, electronic still cameras that mainly capture and record still images have also come into widespread use especially as digital cameras, and video movies mainly for recording moving images also have a still image capturing and recording function. Long-time exposure, which is mainly used for shooting still images, increases the exposure time by increasing the charge accumulation time in the image sensor, thereby enabling shooting without using auxiliary lighting such as a strobe even under low illumination. It is known as a technology.

On the other hand, in an image pickup device such as a CCD, there is a dark output due to the presence of a so-called dark current, which is superimposed on an image signal, thereby deteriorating the image quality. If there is a pixel with a large dark output level, it is called a pixel defect,
It is widely practiced to supplement information using output information of neighboring pixels without using output information of the pixel. In the present specification, such a complementing process is referred to as pixel defect compensation.

Further, Japanese Patent Application Laid-Open No. 06-038113 discloses a technique for improving that the pixel defect is dependent on temperature and changes with time, so that it is not sufficient to evaluate the defective pixel before shipment from the factory. It is known. That is, in this publication, the light receiving surface is shielded by closing the iris immediately after the power is turned on, and the C
A technique for detecting a defective pixel by evaluating a CD dark output and performing defect compensation is described.

That is, if a defect newly generated due to the above-mentioned aging is called a late defect, this technique of detecting a defective pixel in a camera is an excellent measure that can be an extremely effective measure against the late defect. It is.

[0007] Here, as a supplementary explanation in order to deepen the understanding of the present invention, which will be described in detail below, a "flashing defect" newly found by recent studies by the present inventors will be mentioned. This is because, when image pickup (charge accumulation and readout) is repeated under exactly the same photographing conditions including temperature and exposure (accumulation) time, for example, the same pixel sometimes becomes white defect (excessive dark charge). In other words, the behavior is as if a white defect (excessive dark charge) is blinking, for example, or a normal signal is output once.

Although no clear theory has yet been found for the cause of the blinking defect, at least the following findings have been obtained phenomenologically.

That is, this blinking seems to include a certain stochastic element, has no fixed periodicity or dependency on the number of readouts, and blinks in repeated imaging in a relatively short period (short periodicity: As mentioned above, no periodicity has been found in this phenomenon, but it has been found that some metaphorically use the term "period"; . Up to this point, it is possible that extremely long-period flickering defects were also included in the late defects that were conventionally considered to be destructive (non-returning) phenomena due to the effects of natural radioactivity and incoming cosmic rays. On the other hand, it has been pointed out that many short-period flickering defects occur lately.

In any case, regardless of whether the defect is a flickering defect or not, since a late defect actually exists, not only the inspection before factory shipment but also the camera itself has a defect data detecting function. It is extremely important to detect a defective pixel by holding it.

[0011]

However, in view of an increase in defects due to a rise in temperature or exposure for a long time, or the occurrence of a new defect such as a late defect, the occurrence of adjacent defective pixels can be prevented. Absent. In other words, in the inspection before shipment from the factory, if defective pixels occur adjacent to each other,
Such a defect cannot occur at least immediately after shipment from the factory because it is treated as a defect itself.However, considering late defects, coupled with the increase in defects due to temperature rise and long-time exposure, defective pixels May occur adjacent to each other. In this case, a situation occurs in which the adjacent pixel to be complemented used for defect compensation is also a defective pixel.

In such a situation, if the defect compensation processing by the neighboring pixels is applied as it is, the defective pixel will be used again for the compensation of the defective pixel, so that not only the image quality cannot be maintained, but also the image quality cannot be maintained by the defect compensation processing. May also be reduced. For example, when the level of the white defect of two adjacent pixels A and B is such that A is slightly over the allowable limit and B is a complete defect reaching saturation,
If A is compensated for using the data of B, the image quality will be worse than in the case of no compensation.

One possible workaround is to:
Normally, the complementing process is performed only on a plurality of adjacent pixels excluding such a defective pixel. However, (1) For each defective pixel, a situation-adaptive (in some cases, Since it is essential to use a complementing method (different processing), the compensation algorithm is complicated, the processing means (for example, the code size of software) is enlarged, and the calculation time is increased. (2) If all adjacent pixels become defective pixels, they cannot be complemented after all. Therefore, a system failure due to incompensation has occurred, or defective pixels have occurred over a certain area. In such a case, there is a concern that a fill phenomenon may occur in which the entire area is filled with distant pixel values having low correlation. There was a problem.

In the case of the situation (2), the present applicant has already proposed a technique for judging such a situation as an "image quality failure state" and prohibiting, for example, imaging. However, when such a technique is simply adopted, the photographing conditions are limited, for example, such that it is completely impossible to realize a long exposure of a certain degree or more. There was a problem.

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above circumstances, and has as its object to provide an image pickup apparatus and a pixel defect correction method capable of reducing image quality deterioration when a plurality of defects occur adjacent to each other. The aim is to provide a method.

[0016]

In order to solve the above-mentioned problems, an image pickup apparatus according to the present invention comprises: an image pickup device; and, based on defective pixel address data of the image pickup device, an output of the image pickup device. And a defect compensating means for performing a compensating process by the defect compensating means, wherein the defect compensating means precedes a compensating process for a defect having a relatively large defect level at least for a plurality of defects whose defective pixel addresses are adjacent to each other. It is characterized in that it is configured to perform it.

Further, the image pickup apparatus of the present invention comprises an image pickup device,
An image pickup optical system that inputs a subject image to the image pickup element, a storage unit that stores a defective pixel address of the image pickup element as defect data corresponding to the degree of defect of the defective pixel, and an output of the image pickup element. Defect compensation means for performing compensation processing using neighboring pixel data based on the defect data stored in the storage means, wherein the defect compensation means executes compensation processing on the defective pixels in an order based on the degree of the defect. It is characterized in that it is configured to

As described above, by providing an order between defective pixels with respect to the order of processing for defect compensation, it is possible to apply the compensation processing first to the defect having a higher level (degree). In this case, for example, a simple compensation process of correcting a defective pixel by four pixels of the same color adjacent to a defective pixel to be compensated is applied preferentially in descending order of the defect level (degree). Compensation can be performed based on adjacent pixels having sequentially lower defect levels. Therefore, even when defective pixels occur adjacent to each other, the pixel used for compensation is changed in a situation-adaptive manner. Without using a compensation method, it is possible to eliminate a problem that a pixel having a lower defect level is compensated by a pixel having a higher defect level.

In this case, it is particularly preferable to execute the compensation process for the next defect to be processed while correcting the output of the image sensor with the data after the compensation process for each defect. This means that, for a defect having a relatively low defect level among a plurality of adjacent defects, the compensation process is performed using post-compensation data obtained in the preceding compensation process.

Further, by storing the defective pixel address of the image pickup device as defective data corresponding to the degree of defect of each defective pixel, the above-described compensation processing in the order of the defect level can be easily realized. In this case, the defect data is stored in the following manner. (1) The defect data is stored such that the defective pixel address having a relatively high defect level is located in the preceding storage area with respect to the reading order from the storage unit when the compensation processing is executed. (2) The defective pixel address of each defective pixel and the rank information related to the size of the defective level are stored together as defective data. (3) The defective pixel address of each defective pixel and the individual defective pixel are stored. It is preferable to use a mode of storing as defect data together with the defect value.

In the method (1), the defect compensation processing is performed only in the reading order of the defective pixel addresses, and the compensation processing in the order of the defect level can be easily performed without employing any special processing for the compensation processing. .

When (2) and (3) are used,
When storing the defect data newly detected by the defect data detecting means in the storage means, the new data can be added together with the order information or the individual defect value without rewriting the already stored addresses, and the defect levels can be ordered. Can be performed.

Further, in the case (3), when updating the defect data stored in the storage means based on the defect data newly detected by the defect data detection means, By using a configuration in which the largest one of an already stored individual defect value or a detected defect level value is applied as the individual defect value corresponding to the address, the defect level including the blinking defect described above is used. It is possible to perform the order compensation processing.

Further, light shielding means for blocking incident light from the image pickup optical system to the image pickup device is further provided. The light shield means blocks light incident on the image pickup device by the image pickup optical system, and the image pickup device obtained in this state is obtained. By detecting the defect data based on the output, it is possible to accurately detect the defect data relating to the white defect which is relatively more noticeable than the black defect in the imaging device.

[0025]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a configuration of an imaging device according to an embodiment of the present invention. Here, a case where the present invention is implemented as a digital camera will be described as an example.

In the drawing, reference numeral 101 denotes an imaging lens system, 102 denotes a lens driving mechanism for driving the lens system 101, 103 denotes an exposure control mechanism for controlling the aperture and shutter device of the lens system 101, and 104 denotes low-pass and infrared light. A cut filter 105 is a CC for photoelectrically converting a subject image.
D color image sensor, 106 a CCD driver for driving the image sensor 105, 107 a pre-processing circuit including an A / D converter, and 108 a color signal generation process, a matrix conversion process, and various other digital processes. A digital process circuit, 109 is a card interface, 110 is a memory card, and 111 is an LCD image display system.

In the figure, reference numeral 112 denotes a system controller (CPU) for comprehensively controlling each unit, 113 denotes an operation switch system composed of various SWs, and 114 denotes an operation display for displaying an operation state, a mode state, and the like. System, 115 is a lens driver for controlling the lens driving mechanism 102, 116 is a strobe as a light emitting means, 117 is an exposure control driver for controlling the exposure control mechanism 103 and the strobe 116, and 118 is various kinds of setting information and the like. 1 shows a non-volatile memory (EEPROM) for performing the operation.

In the camera of this embodiment, the system controller 112 performs overall control, and controls the exposure control mechanism 103 and the driving of the CCD image pickup device 105 by the CCD driver 106 to perform exposure (charge accumulation). And read out the signal, A / D convert the signal via the pre-processing circuit 107 and take it into the digital process circuit 108, and
After various signal processings are performed in the memory card 110, the signals are recorded on the memory card 110 via the card interface 109.

The system controller 112 includes:
As shown, a defect compensation control unit 112a for performing a pixel defect compensation process on an image pickup signal obtained from the CCD 105 based on defect data stored in the EEPROM 118, and a defect for detecting pixel defect data. EEPRO based on the data detection unit 112b and the defect data newly detected by the defect data detection unit 112b.
A defect data management unit 112c for updating and managing the defect data stored in M118 is provided.

The pixel defect compensation processing is performed by the defect compensation control unit 11.
Based on the command from 2a, the process is executed in the digital process circuit 108 based on the address data of the defective pixel regarding the existing (latest) defect (hereinafter referred to as a registered defect) stored in the EEPROM 118. In the initial stage (when the camera is shipped from the factory), defect data acquired in the manufacturing adjustment process is registered as a registered defect.

In this embodiment, in order to reduce the image quality degradation when a plurality of defects are adjacent to each other, an order is provided between the defective pixels in the processing order of the defect compensation. Compensation processing is applied to a plurality of adjacent defects in descending order of defect level.

The defect detection by the defect data detection unit 112b is performed by performing test imaging at a power-on rate, for example, once every 24 hours, and analyzing the captured image at that time.

Hereinafter, the camera control by the system controller 112 will be described focusing on the procedure of the pixel defect compensation processing of the present invention and the processing directly related to the registration of the defect data in the EEPROM 118. However, in this camera, the digital processing of the signal level obtained from the CCD 105 is performed with 8 bits (0 to 255).

In the following, description will be made only for white defects. As the "level" of a defect, a defect which is standardized to a level at a certain reference temperature and a reference exposure time is considered. In the present embodiment, for simplicity, the temperature is not taken into account (therefore, unless otherwise specified, only use at room temperature is assumed).
The reference exposure time is the exposure time of the test imaging as described below (= the longest exposure time Tmax of this camera: an example value of 5 s)
Shall be adopted.

Further, the management of the processing order of the defect compensation is essentially required to be performed only on adjacent defective pixels. However, in order to avoid the processing from being complicated, the level of all defects is large. Defect compensation is performed in order from the first one.

First, referring to FIG.
8 will be described.

In order to realize the defect compensation processing in the processing order according to the degree of the defect level, in this embodiment, the defective pixel address is stored in the EEPROM 118 in a state corresponding to the degree of the defect of each defective pixel. Is stored as This applies not only to newly detected defects but also to initial registration defects at the time of factory shipment. The specific storage mode of the defect data is as follows.

<Storage Mode 1: Case of Storing Defective Pixel Addresses in Memory Address Order> FIG. 2A shows only defective pixel addresses in order of memory address in descending order of the defect level S (defect pixel in defect compensation processing). This is an example in the case of storing in the order of reading addresses).

That is, the number N of defects is stored in the first data bit of the memory address of the predetermined defective storage area in the EEPROM 118, and the defective pixel address Ad is stored in the data bits of the next N memory addresses.
r (1), Adr (2), Adr (3),... Adr
Only (N) is stored in descending order of the defect level S. In this case, the defective level of the defective pixel address stored as Adr (1) in memory address 1 is the highest, and Adr (2),
The defect level becomes smaller in the order of defective pixel addresses stored as Adr (3),... Adr (N). Of course, the defect levels S of two or more defective pixel addresses stored successively may be equal. That is, defective pixel addresses Adr (1), Adr (2),... Adr
If the defect level of each defective pixel stored as (N) is S (1), S (2),... S (N), S (1)
≧ S (2) ≧, ≧ S (N).

By using the storage mode 1, the defect compensation processing by the defect compensation control unit 112a can be performed by the EEPROM.
Only by performing reading while reading the defective pixel address in the order of the memory address from 118, the compensation processing in the order of the defect level can be performed without employing any special processing for the compensation processing.

<Storage Mode 2: Case of Storing Defective Pixel Address and Order Number Together> FIG. 2B shows the order of the defective pixel address and the size of the defect level (1 from the highest level S). , 2... N) are stored together. That is, the number N of defects is stored in the first data bit of the memory address of the predetermined defective storage area in the EEPROM 118, and the defective pixel address Adr (1) is stored in the data bits of the N subsequent memory addresses. ), Adr (2), Adr (3), ...
Adr (N) and its corresponding ordinal numbers Odr (1), O
dr (2), Odr (3),... Odr (N) are also stored. In this case, for example, the defective pixel address stored as Adr (3) in the memory address 3 has the highest defect level, and the memory address 1 has Adr (3).
The defect level of the defective pixel address stored as (1) is the second highest, and Adr is added to the memory address N.
If the defect level of the defective pixel address stored as (N) is the third highest, O
The number of sequences stored as dr (3) is “1”, the number of sequences stored as Odr (1) at memory address 1 is “2”, and Odr is stored at memory address N.
The number of sequences stored as (N) is “3”.

<Storage Mode 3: When Defective Pixel Address and Individual Defect Value are Stored Together> FIG. 2C shows a case where a defective pixel address and its individual defect value (defect level S) are stored together. It is an example. That is, the EEPROM 11
8, the number N of defects is stored in the first data bit of the memory address of a predetermined defective storage area, and the data bits of the next N memory addresses are defective pixel addresses Adr (1) and Adr. (2), Adr (3),
.. Adr (N) and the corresponding defect level S (1),
S (2), S (3),... S (N) are also stored.

Next, the pixel defect compensation processing executed by the defect compensation control section 112a will be described.

First, prior to photographing, an exposure time required for photographing is set based on a manual setting or a photometric result. Next, the camera waits for a shooting trigger command for the main imaging, and upon receiving the command, performs exposure based on a predetermined exposure control value, reads out an imaging signal, performs predetermined signal processing, and records the signal on the memory card 110. At this time, pixel defect compensation is performed for registered defective pixels stored in the EEPROM 118. After the defect compensation, the video signal processing up to the recording is appropriately used according to its necessity. It is known per se, for example, color balance processing, conversion into a luminance-color difference signal by matrix operation or its inverse conversion processing, Examples include false color removal or reduction processing by band limitation, various nonlinear processing represented by γ conversion, various information compression processing, and the like.

In the camera of this embodiment, the defect compensation is as follows.
A well-known “complementation of a pixel in which a defective address is registered by a neighboring pixel” is employed. A specific complementing method is “the closest closest color pixel (4 pixels closest to the defective pixel among the same color pixels: RGB) For example, in the case of the Bayer arrangement, G is four G pixels adjacent to each other diagonally in four directions, and R (or B) is not directly adjacent in four directions of up, down, left, and right, but is located next to one G in between The average value of the four pixel information corresponding to each of four R (or B) pixels) is applied instead. Hereinafter, this interpolation processing method is referred to as “defect compensation processing using four neighboring pixels”. The “defect compensation process using the four neighboring pixels” is performed in order from the one having the highest defect level as described above. Each time the compensation process for each defective pixel is performed, the imaging signal is corrected with the compensated data. Compensation processing for a defect to be processed is performed. Hereinafter, the procedure of the defect compensation processing corresponding to each of the storage modes 1 to 3 will be described.

FIG. 3 shows a procedure of a defect compensation process when the above-mentioned storage mode 1 is employed.

First, defective data is read from the EEPROM 118, and compensation processing for defective pixels is executed in the order of memory addresses registered in the EEPROM 118 (steps S11 and S12). The reading of the defective data is performed in the order of the memory addresses, and the “defect compensation processing by four neighboring pixels” is performed sequentially from the read defective pixel address. In this case, in the storage mode 1, since the defective pixel pixel address is stored in order from the defective pixel having the highest defect level, when the defective pixels exist close to each other, that is, when the defective pixel addresses to be compensated Means that the defect compensation process for the defective pixel having a high defect level is preferentially executed.

Of a plurality of defects whose defective pixel addresses are adjacent to each other, a defective pixel to be processed first (a defective pixel having a relatively high defect level among a plurality of adjacent defects) is another adjacent pixel. Since the defect compensation process for the defective pixel has not been performed yet, the defect compensation process using the raw neighboring four pixels before the defect compensation is performed as it is. On the other hand, among a plurality of defects whose defective pixel addresses are adjacent to each other, a defective pixel to be processed after the second (a defective pixel having a defect level of the second or subsequent defect among the plurality of adjacent defects) is less than that. Also, since the defect compensation process for the pixel having a relatively high defect level has already been performed and the data after the defect compensation is reflected in the image pickup signal, the defect compensation process using the four pixels in the vicinity using the data after the defect compensation is performed. Will be executed. This is shown in FIG.

FIG. 4 assumes that two defective pixels A and B exist close to each other, and that the defective level of defective pixel A is higher than the defective level of defective pixel B. In this case, the defective pixel A is defect-compensated by the average of four neighboring pixels including the defective pixel B before the defect compensation as indicated by an arrow in FIG.
Is updated to the pixel value (A ′) after the defect compensation.
As for the defective pixel B, since the pixel value of the defective pixel A has already been updated to the pixel value (A ′) after the compensation in the defect compensation processing, as shown by the arrow in FIG. Defect compensation is performed by averaging four neighboring pixels including the pixel value (A ') after defect compensation.

Therefore, even in a camera which has already adopted a simple defect compensation algorithm for always compensating for each defective pixel with the four pixels of the same color closest to the defective pixel, the order of reading defect addresses from the EEPROM 118 (= compensation processing) (Order), eliminating the problem that pixels having a lower defect level are compensated for by pixels having a higher defect level without changing the defect compensation algorithm by merely storing the defect level in descending order. Can be done.

The process of step S12 of executing the defect compensation process in the order of the registered memory addresses is repeatedly executed until there is no unprocessed defective pixel (step S13). In step S11, the EEPROM 1
If the processing of step S12 is performed each time one defective pixel address is read from the memory cell 18, the processing of steps S11 and S12 is repeated until there is no unprocessed defective pixel as shown by the broken line in FIG. Will be.

FIG. 5 shows a procedure of the defect compensation processing when the above-mentioned storage mode 2 is adopted.

First, by reading the defective data from the EEPROM 118, all the sets of the defective pixel address and the order number registered in the EEPROM 118 are read (step S21), and the order relation of the order number for each defective pixel address is determined. By performing the recognition, the processing order of the defect compensation processing is determined (step S22). Thereafter, compensation processing is performed on each defective pixel in the determined processing order, that is, in the order of the number of ranks (step S).
23). In the storage mode 2, since the defective pixel addresses having the order of 1, 2, 3,... N are added in order from the defective pixel address having the highest defect level, when the defective pixels exist close to each other, that is, the defective pixel to be compensated for With respect to a plurality of defects whose addresses are adjacent to each other, the defect compensation processing for a defective pixel having a high defect level is preferentially executed.

Of a plurality of defects whose defective pixel addresses are adjacent to each other, a defective pixel to be processed first (a defective pixel having a relatively high defect level among a plurality of adjacent defects) is another adjacent pixel. Since the defect compensation process for the defective pixel has not been performed yet, the defect compensation process using the raw neighboring four pixels before the defect compensation is performed as it is. On the other hand, among a plurality of defects whose defective pixel addresses are adjacent to each other, a defective pixel to be processed after the second (a defective pixel having a defect level of the second or subsequent defect among the plurality of adjacent defects) is less than that. Since the defect compensation processing has already been performed on the pixel having a relatively high defect level, the defect compensation processing is performed on the four neighboring pixels using the data after the defect compensation.

The process of step S23 of executing the defect compensation process in the order of the number of steps is repeatedly executed until there is no unprocessed defective pixel (step S24).

FIG. 6 shows a procedure of a defect compensation process when the above-mentioned storage mode 3 is employed.

First, by reading defect data from the EEPROM 118, all sets of defective pixel addresses and defect levels registered in the EEPROM 118 are read (step S31). By comparing and recognizing the magnitude relation of the level, the processing order of the defect compensation processing is determined (step S32). Thereafter, compensation processing is performed on each defective pixel in the determined processing order, that is, in the order of the highest defect level (step S3).
3). Of a plurality of defects whose defective pixel addresses are adjacent to each other, a defective pixel to be processed first (a defective pixel having the highest defect level among a plurality of adjacent defects) relates to another defective pixel adjacent thereto. Since the defect compensation processing has not been performed yet, the defect compensation processing using the raw neighboring four pixels before the defect compensation is performed as it is. On the other hand, among a plurality of defects whose defective pixel addresses are adjacent to each other, a defective pixel to be processed after the second (a defective pixel having a defect level of the second or subsequent defect among the plurality of adjacent defects) is less than that. Since the defect compensation processing has already been performed on the pixel having a relatively high defect level, the defect compensation processing is performed on the four neighboring pixels using the data after the defect compensation.

The processing of step S33 of executing the defect compensation processing in the order of the defect levels is repeated until there is no unprocessed defective pixel (step S33).
34).

Next, the defect detection processing executed by the defect data detection unit 112b and the defect data management unit 112c
The registration defect adding / updating process executed by the above will be described.

In the camera of the present embodiment, a defect is detected when necessary, and the registered defect is additionally updated based on the result. The defect detection is performed as follows. That is, the mechanical shutter device included in the exposure control mechanism 103
After the light receiving surface of D105 is shielded from light, test imaging is performed in the shielded state. That is, the CCD driver 10 in the dark
6, the longest exposure time Tmax of this camera (setting is optional:
The test image pickup signal (dark output signal) is read out by performing the charge accumulation operation of the exemplary value 5s here, and stored in the digital process circuit 108. Each output level is checked for all the data of the stored effective output pixels, and a digital comparison with a reference level is performed to determine whether or not there is a defect.

The criteria are as follows. That is, if the output level of the target pixel is S, the defect is determined when S> 5, and the defect is determined to be non-defect when S> 5 (S ≦ 5). This means that the dark output level at the time of main imaging is allowed up to about 2% of the maximum full range 255. Here, the judgment reference level of about 2% is merely an example, and can be arbitrarily set according to the circumstances at the time of design. However, an appropriate value (about 5% or about 1 % Is also effective), the possibility that the effect of the dark output superimposed on the image becomes obvious becomes sufficiently low. If this is selected to be 0%, it is possible to completely eliminate the pixel on which the dark output is superimposed. In this respect, this can also be cited as one preferred embodiment. This means that the pixel information is completely discarded due to the superposition of, so that the overall image quality may be reduced. In reality, the reference level is set in consideration of these trade-off factors.

A pixel defect obtained by such a camera defect detection is called a detected defect. Next, a data update process for adding / updating a registered defect of the EEPROM 118 based on the detected defect obtained as described above will be described.

<Data Update Processing 1> The flowchart of FIG. 7 shows the procedure of the data update processing corresponding to the above-mentioned storage mode 1. First, all the data of the detected defect (regardless of the overlap with the registered defect) are compared in level, and the magnitude relation of each of the detected defective pixels is recognized (step S).
111). Next, defective pixel addresses are stored in the storage mode 1 in the descending order of the defect level. That is, the data is overwritten (S112).

If there is a defect that has not been detected despite being registered, for example, it may be discarded,
All the detected defect data may be stored in a higher order or a lower order than all the detected defect data. Alternatively, it may be interrupted to a rank substantially corresponding to the rank of the registered defect. At this time, it is preferable to use a relative ranking (rank ratio to the total number). That is, if the order in the registered total defect number N1 is M1, the corresponding order M2 in the detected + non-overlapping new total defect number in N2 is M2 = M1 × N2 / N1.
(However, when the calculated value is a non-integer, it is converted to an integer by rounding or the like). However, the present invention is not limited to this, and an absolute ranking (mere ranking) may be used from the viewpoint of avoiding complication. Regardless of which method is used, if the difference between the total numbers is small, there is no practical problem since the difference between them is small.

When the waste of the storage area is not a problem,
Instead of overwriting, a completely different area may be defined as an area to be used at the next compensation and stored in this area.

<Data Update Process 2> The flowchart of FIG. 8 shows the procedure of the data update process corresponding to the above-mentioned storage mode 2. Here, a newly detected defect (a defect obtained by removing a duplicate of a registered defect) is stored in the EEPROM 11.
A process of additionally registering the data bits of the subsequent eight memory addresses in the storage mode 2 is performed. At this time, the overall rank is determined by the same processing as the data update processing 1, and the rank number data is updated. Hereinafter, a specific example of the procedure will be described.

First, a pixel overlapping a registered defect is recognized from the detected defect data (step S121), and a pixel overlapping the registered defect is removed to be a new detected defect. Next, the level of all the data of the detected defects (new detected defects and all of the detected defects overlapping the registered defects) is compared, and the magnitude relation of the detected defective pixels is recognized (step S122). At this time, if there is a defect that has not been detected despite being already registered, it cannot be compared simply because it does not have level information. A process similar to that described above (for example, positioning at a corresponding relative rank) may be applied. And, based on the recognition result of the magnitude relationship,
Processing for additionally registering the defective pixel address of a newly detected defect and the number of ranks in the EEPROM 118 in association with each other (step S
123), and a process of updating the rank number of the detected defect overlapping the registered defect (step S124).

<Data Update Process 3> The flowchart of FIG. 9 shows the procedure of the data update process corresponding to the above-mentioned storage mode 3. Here, a newly detected defect (a defect obtained by removing a duplicate of a registered defect) is stored in the EEPROM 11.
A process of additionally registering the data bits of the subsequent eight memory addresses in the storage mode 3 is performed. At this time, in the storage mode 3, since the defect level itself is used as the information on the defect degree, the update of the defect level on the registered defect is basically unnecessary. Hereinafter, a specific example of the procedure will be described.

First, a pixel overlapping a registered defect is recognized from the data of the detected defect (step S131), and a pixel overlapping the registered defect is removed to be a new detected defect. Next, the pixel address of the newly detected defect and the defect level are additionally registered in the EEPROM 118 in association with each other (step S132). Further, in order to cope with a blinking defect, in the present example, a process of updating the registered value of the defect level related to the registered defect that has been duplicated as a detected defect is also performed (step S133). At this time, a process of applying the largest one of the registered levels and the detected levels as registration data is performed. That is, the level of the detected defect overlapping the registered defect is compared with the registered defect level, and if the detected defect is larger, the value of the defect level is updated with the detected data. In this case, 1
It is also very suitable for a blinking defect to perform defect detection a plurality of times for the data update and apply the largest one.

As described above, according to the present embodiment, at least for defects adjacent to each other, the pixels used for compensation are changed adaptively by applying the compensation processing first from the defect having the highest defect level. At least, it is possible to prevent image quality deterioration due to the proximity of a defect and a defect due to incompensibility.

Although only white defects are described in the above embodiment, for example, with respect to black defects, the defect level can be defined according to the sensitivity of the “insufficient sensitivity” type (a defect having a low sensitivity is a defect having a low sensitivity). Therefore, the same processing procedure and storage mode as in the case of the above-described white defect can be applied to the black defect. Also, for example, C
For a black defect pixel in which no output is generated due to an abnormality in the charge transfer gate in the CD 105, the degree of the defect is larger than that of the insensitive type black defect, and all the white defects are larger than the black defect. Then, the present invention can be applied to a mixture of various types of defects including a white defect and a black defect.

In the above description, an explicit example of the "storage means" for storing the defect data is an EEPROM, but the present invention is not limited to this. An arbitrary example including a volatile (temporary) storage means such as a DRAM is used. The storage means is also applicable.
The DRAM is generally used as an execution memory, but among the above storage modes, the effect of the storage mode 1 is mainly exhibited when the defect compensation is executed.
Such an address arrangement on the execution memory has a direct meaning (of course, even for a non-execution memory, the effect can be exerted without rearranging addresses when data is loaded into the execution memory from now on). It is self-evident in that respect).

Furthermore, the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent features. For example, even if some components are deleted from all the components shown in the embodiment, the problem described in the column of the problem to be solved by the invention can be solved, and the effects described in the column of the effect of the invention can be solved. Is obtained, a configuration from which this configuration requirement is deleted can be extracted as an invention.

[0074]

As described above, according to the present invention,
It is possible to reduce image quality degradation when a plurality of defects occur adjacent to each other.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a digital camera according to an embodiment of the present invention.

FIG. 2 is an exemplary view for explaining a storage mode of defect data used in the embodiment;

FIG. 3 is an exemplary flowchart showing a first procedure of a defect compensation process used in the embodiment.

FIG. 4 is an exemplary view for explaining the principle of defect compensation processing when defective pixels occur adjacent to each other in the embodiment.

FIG. 5 is a flowchart showing a second procedure of the defect compensation processing used in the embodiment.

FIG. 6 is an exemplary flowchart showing a third procedure of the defect compensation processing used in the embodiment.

FIG. 7 is an exemplary flowchart showing a first procedure of a defect data updating process used in the embodiment;

FIG. 8 is an exemplary flowchart showing a second procedure of a defect data updating process used in the embodiment.

FIG. 9 is an exemplary flowchart showing a second procedure of the defect data updating process used in the embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 ... Lens system 102 ... Lens drive mechanism 103 ... Exposure control mechanism 104 ... Filter system 105 ... CCD color image sensor 106 ... CCD driver 107 ... Preprocess circuit 108 ... Digital process circuit 109 ... Card interface 110 ... Memory card 111 ... LCD image Display system 112: System controller (CPU) 112a: Defect compensation control unit 112b: Defect data detection unit 112c: Defect data management unit 118: EEPROM

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[Procedure amendment]

[Submission date] October 3, 2001 (2001.10.
3)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0002

[Correction method] Deleted

Continued on front page F-term (reference) 4M118 AA07 AA09 AB01 BA10 FA06 GC08 GC11 GC14 5B047 AA05 AB02 BA03 BB04 CB25 DA06 5C024 CX23 GY01 HX57 5C077 LL04 MM03 MP01 PP06 PP10 PP46 PQ12 PQ18 PQ23 SS01

Claims (14)

[Claims] 1. An image pickup device, comprising: an image pickup device; and a defect compensation unit that performs compensation processing on output of the image pickup device with neighboring pixel data based on defective pixel address data of the image pickup device. An image pickup apparatus characterized in that at least a plurality of defects whose defect pixel addresses to be compensated are adjacent to each other are subjected to compensation processing for a defect having a relatively high defect level in advance. 2. The method according to claim 1, wherein said defect compensating means executes a compensation process for a defect to be processed next while correcting an output of said image sensor with data after a compensation process for each defect. Item 2. The imaging device according to Item 1. 3. The defect compensating means, for a defect having a relatively low defect level among the plurality of adjacent defects, uses the compensated data obtained by a preceding compensation process to perform the compensation process. The imaging apparatus according to claim 1, wherein the imaging is performed. 4. An image pickup device, an image pickup optical system for inputting a subject image to the image pickup device, and storage means for storing a defective pixel address of the image pickup device as defect data in accordance with the degree of defect of the defective pixel. And a defect compensating means for performing compensation processing based on defect data stored in the storage means with respect to an output of the image sensor, wherein the defect compensating means performs compensation processing on the defective pixel. An imaging apparatus characterized by being configured to execute in the order based on the degree of a defect. 5. A defect data detecting means for detecting the defect data, and a defect data management for updating the defect data stored in the storage means based on the defect data newly detected by the defect data detecting means. 5. The imaging apparatus according to claim 4, further comprising: means. 6. The defect data is stored in the storage means such that a defective pixel address having a relatively high defect level is located in a preceding storage area with respect to an order of reading from the storage means at the time of executing the compensation processing. The imaging device according to claim 4, wherein: 7. The image pickup apparatus according to claim 4, wherein said storage means stores, as said defect data, a defective pixel address of each defective pixel and rank information relating to the magnitude of said defect level. . 8. An imaging apparatus according to claim 4, wherein said storage means stores a defective pixel address of each defective pixel and an individual defect value of said defective pixel as said defect data. 9. The storage means stores a defective pixel address of each defective pixel and an individual defect value of the defective pixel as the defective data. When updating the defect data stored in the storage means based on the newly detected defect data, the individual defect value already stored and the detected defect level are used as the individual defect value corresponding to the defective pixel address. The imaging apparatus according to claim 5, wherein the apparatus is configured to apply a maximum value among the values. 10. An image pickup device according to claim 1, further comprising: a light blocking unit for blocking incident light from said image pickup optical system to said image pickup device, wherein said defect data detection unit receives said light incident on said image pickup device by said image pickup optical system by said light shield unit. The image pickup apparatus according to claim 4, wherein the image pickup device is a white defect data detection unit that detects the defect data based on an output of the image pickup element obtained in this state while shutting off. 11. A pixel defect correction method for correcting a pixel defect in an image pickup apparatus, wherein an output of the image pickup element is determined by neighboring pixel data based on defective pixel address data of the image pickup element of the image pickup apparatus. In performing the compensation process, at least with respect to a plurality of defects whose defect pixel addresses to be compensated are adjacent to each other, the compensation process for a defect having a relatively large defect level is performed first. Correction method. 12. The method according to claim 1, wherein the correction of the pixel defect is performed by executing a compensation process for a defect to be processed next while correcting an output of the image sensor with data after a compensation process for each defect. The pixel defect correction method according to claim 11, wherein 13. A method according to claim 1, wherein a defect having a relatively low defect level among the plurality of adjacent defects is compensated by using post-compensation data obtained by a preceding compensation process. The pixel defect correction method according to claim 11. 14. When storing said defective pixel address as defective data in storage means of said imaging device,
At least with respect to a plurality of defects whose defective pixel addresses to be compensated are adjacent to each other, the address of the defect having a relatively large defect level is stored in a storage area preceding in the order of reading from the storage means at the time of executing the compensation processing. 12. The pixel defect correction method according to claim 11, wherein the correction is performed.