JP2002328814A - パリティ演算を実行する方法 - Google Patents

パリティ演算を実行する方法

Info

Publication number
JP2002328814A
JP2002328814A JP2002032497A JP2002032497A JP2002328814A JP 2002328814 A JP2002328814 A JP 2002328814A JP 2002032497 A JP2002032497 A JP 2002032497A JP 2002032497 A JP2002032497 A JP 2002032497A JP 2002328814 A JP2002328814 A JP 2002328814A
Authority
JP
Japan
Prior art keywords
parity
coefficient
subset
data
segment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002032497A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002328814A5 (https=
Inventor
Michael B Jacobson
マイケル・ビー・ジェイコブソン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of JP2002328814A publication Critical patent/JP2002328814A/ja
Publication of JP2002328814A5 publication Critical patent/JP2002328814A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0626—Reducing size or complexity of storage systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/065—Replication mechanisms
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0683—Plurality of storage devices
    • G06F3/0689—Disk arrays, e.g. RAID, JBOD

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Quality & Reliability (AREA)
  • Error Detection And Correction (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)
JP2002032497A 2001-03-14 2002-02-08 パリティ演算を実行する方法 Pending JP2002328814A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/808,710 US7062702B2 (en) 2001-03-14 2001-03-14 Efficient parity operations
US09/808,710 2001-03-14

Publications (2)

Publication Number Publication Date
JP2002328814A true JP2002328814A (ja) 2002-11-15
JP2002328814A5 JP2002328814A5 (https=) 2005-07-14

Family

ID=25199493

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002032497A Pending JP2002328814A (ja) 2001-03-14 2002-02-08 パリティ演算を実行する方法

Country Status (3)

Country Link
US (1) US7062702B2 (https=)
EP (1) EP1241561A3 (https=)
JP (1) JP2002328814A (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6766480B2 (en) * 2001-03-14 2004-07-20 Hewlett-Packard Development Company, L.P. Using task description blocks to maintain information regarding operations
US7062702B2 (en) 2001-03-14 2006-06-13 Hewlett-Packard Development Company, L.P. Efficient parity operations
AU2002310344A1 (en) * 2001-06-08 2002-12-23 Broadcom Corporation Integrated upstream amplifier for cable modems and cable set-top boxes
US20050273651A1 (en) * 2004-05-18 2005-12-08 Aristos Logic Corporation Method of implementing XOR based raid algorithms
WO2007012920A1 (en) * 2005-07-27 2007-02-01 Adaptec, Inc. Method and system for improving the performance of reed-solomon parity operations in redundant array of inexpensive disks
US7934120B2 (en) * 2006-09-11 2011-04-26 International Business Machines Corporation Storing data redundantly
US8239745B2 (en) * 2009-06-02 2012-08-07 Freescale Semiconductor, Inc. Parity data encoder for serial communication
US10481979B2 (en) * 2017-09-28 2019-11-19 Intel Corporation Storage system, computing system, and methods thereof

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US4433388A (en) 1980-10-06 1984-02-21 Ncr Corporation Longitudinal parity
US4996690A (en) 1988-08-26 1991-02-26 Stac Electronics Write operation with gating capability
US5253352A (en) 1989-11-13 1993-10-12 Zenith Data Systems Corporation Method and apparatus for pipelining cache accesses using anticipatory initiation of cache read
US5134619A (en) 1990-04-06 1992-07-28 Sf2 Corporation Failure-tolerant mass storage system
JPH04184634A (ja) 1990-11-20 1992-07-01 Matsushita Electric Ind Co Ltd マイクロコンピュータ
US5278984A (en) 1990-12-19 1994-01-11 Bull Hn Information Systems Inc. Method for managing requests by specifying time intervals for transmitting a minimum number of messages for specific destinations and priority levels
JP3409859B2 (ja) 1991-01-31 2003-05-26 株式会社日立製作所 制御装置の制御方法
US5333143A (en) 1991-08-29 1994-07-26 International Business Machines Corporation Method and means for b-adjacent coding and rebuilding data from up to two unavailable DASDS in a DASD array
US5499337A (en) 1991-09-27 1996-03-12 Emc Corporation Storage device array architecture with solid-state redundancy unit
WO1993023803A1 (en) 1992-05-21 1993-11-25 Fujitsu Limited Disk array apparatus
US5588134A (en) 1992-09-25 1996-12-24 Amdahl Corporation System for establishing priority among selected tasks based on location of tasks and sequence that the tasks were stored whereas task is always stored in location with the lowest available address
US5384788A (en) 1992-10-26 1995-01-24 Dell Usa, L.P. Apparatus and method for optimal error correcting code to parity conversion
US5517514A (en) 1992-11-12 1996-05-14 Amdahl Corporation Parity checking system with reduced usage of I/O pins
US5819109A (en) * 1992-12-07 1998-10-06 Digital Equipment Corporation System for storing pending parity update log entries, calculating new parity, updating the parity block, and removing each entry from the log when update is complete
US5369652A (en) 1993-06-14 1994-11-29 International Business Machines Corporation Error detection and correction having one data format recordable on record media using a diverse number of concurrently recorded tracks
JP3188071B2 (ja) 1993-10-14 2001-07-16 富士通株式会社 ディスクキャッシュ装置
US5463643A (en) 1994-03-07 1995-10-31 Dell Usa, L.P. Redundant memory channel array configuration with data striping and error correction capabilities
US6523060B1 (en) 1995-04-07 2003-02-18 Cisco Technology, Inc. Method and apparatus for the management of queue pointers by multiple processors in a digital communications network
US5796735A (en) 1995-08-28 1998-08-18 Integrated Device Technology, Inc. System and method for transmission rate control in a segmentation and reassembly (SAR) circuit under ATM protocol
US5937205A (en) 1995-12-06 1999-08-10 International Business Machines Corporation Dynamic queue prioritization by modifying priority value based on queue's level and serving less than a maximum number of requests per queue
US5754776A (en) 1995-12-28 1998-05-19 Intel Corporation Re-prioritizing background data transfers in multipoint conferencing
US5748901A (en) 1996-05-21 1998-05-05 Ramot University Authority Ltd. Flow control algorithm for high speed networks
US5893162A (en) 1997-02-05 1999-04-06 Transwitch Corp. Method and apparatus for allocation and management of shared memory with data in memory stored as multiple linked lists
US6092158A (en) 1997-06-13 2000-07-18 Intel Corporation Method and apparatus for arbitrating between command streams
US6151641A (en) 1997-09-30 2000-11-21 Lsi Logic Corporation DMA controller of a RAID storage controller with integrated XOR parity computation capability adapted to compute parity in parallel with the transfer of data segments
US6341342B1 (en) 1997-11-04 2002-01-22 Compaq Information Technologies Group, L.P. Method and apparatus for zeroing a transfer buffer memory as a background task
US6279087B1 (en) 1997-12-22 2001-08-21 Compaq Computer Corporation System and method for maintaining coherency and improving performance in a bus bridge supporting write posting operations
US5948081A (en) 1997-12-22 1999-09-07 Compaq Computer Corporation System for flushing queued memory write request corresponding to a queued read request and all prior write requests with counter indicating requests to be flushed
US6175889B1 (en) 1998-10-21 2001-01-16 Compaq Computer Corporation Apparatus, method and system for a computer CPU and memory to high speed peripheral interconnect bridge having a plurality of physical buses with a single logical bus number
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US6594796B1 (en) * 2000-06-30 2003-07-15 Oak Technology, Inc. Simultaneous processing for error detection and P-parity and Q-parity ECC encoding
US6523087B2 (en) 2001-03-06 2003-02-18 Chaparral Network Storage, Inc. Utilizing parity caching and parity logging while closing the RAID5 write hole
US6687872B2 (en) 2001-03-14 2004-02-03 Hewlett-Packard Development Company, L.P. Methods and systems of using result buffers in parity operations
US6567891B2 (en) 2001-03-14 2003-05-20 Hewlett-Packard Development Company, L.P. Methods and arrangements for improved stripe-based processing
US7062702B2 (en) 2001-03-14 2006-06-13 Hewlett-Packard Development Company, L.P. Efficient parity operations

Also Published As

Publication number Publication date
EP1241561A3 (en) 2004-12-01
EP1241561A2 (en) 2002-09-18
US20020166077A1 (en) 2002-11-07
US7062702B2 (en) 2006-06-13

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