JP2002311923A - Current amplifying circuit and liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a current amplifying circuit in which no destruction caused by heat runaway of an SEPP circuit is made and a stable current amplifying operation is conducted. SOLUTION: The final output stage of a current amplifying circuit 1 is constituted of an SEPP circuit 12. In the operations of the circuit 12, a direct current positive voltage VDD and a direct current negative voltage VEE whose absolute values are mutually made different are used as driving sources and an output voltage Vb at a non-signal time is beforehand set to a prescribed voltage other than a middle point voltage of the voltages VDD and VEE.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a current amplifying circuit applicable to amplification of a common electrode driving signal applied to a common electrode for inversion driving, and a liquid crystal display device configured using the current amplifying circuit.

[0002]

2. Description of the Related Art A common voltage output circuit 41 used in a TFT (Thin Film Transistor) type liquid crystal display device S11 shown in FIG. 4 is conventionally known as this kind of current amplifying circuit. The liquid crystal display device S11 includes an H inversion signal generation circuit 2, a common voltage amplification circuit 3, the above-described common voltage output circuit 41, and a TFT type liquid crystal display panel 4. In this case, the H inversion signal generation circuit 2 inverts the polarity of the input RGB video signal every 1H (one horizontal cycle) to prevent the deterioration of the liquid crystal element in the liquid crystal display panel 4, and R'G'B '. The signal is converted to a signal, and the converted R′G′B ′ signal is supplied to the liquid crystal display panel 4. Further, in synchronization with the 1H inversion operation, the H inversion signal generation circuit 2 generates a common signal VCOM1 which is a rectangular wave signal having a polarity opposite to that of the R′G′B ′ signal and a duty ratio of 1: 1. It is generated and output to the common voltage amplifier circuit 3.
The common voltage amplifying circuit 3 amplifies the voltage of the input common signal VCOM1 to an amplitude at which an optimum display on the liquid crystal display panel 4 can be obtained, and outputs the amplified signal to the common voltage output circuit 41 as a common signal VCOM2. Although a specific configuration will be described later, the common voltage output circuit 41 current-amplifies the common signal VCOM2 so as to drive a common electrode in the liquid crystal display panel 4 via a common terminal (com terminal), and the common signal VCOM3 is amplified. Output as Further, the common voltage output circuit 41 also has a DC voltage adjustment function for adjusting the center voltage of the common signal VCOM3 so that flicker of the liquid crystal display panel 4 is minimized. Each of the circuits 2, 3, and 41 operates using a power supply VDD for a positive voltage and a power supply VEE for a negative voltage necessary for driving the liquid crystal display panel 4 as driving sources. in this case,
As the voltage of the power supply VDD, for example, +7 V is used, and as the voltage of the power supply VEE, for example, -15 V is used.

Further, the above-mentioned common voltage output circuit 41
Is generally a SEPP (Single
Ended Push-Pull) circuit is used. Specifically, as shown in FIG. 5, a complementary buffer circuit 51 and a complementary output circuit (S
(EPP circuit) 12. In this case, the amplification circuit 51 includes a pnp-type transistor 21, n
It comprises a pn transistor 22, a coupling capacitor 23, resistors 24, 25, 52, 53 and a variable resistor 28. The output circuit 12 includes an npn-type transistor 31 and a pnp-type transistor 32.

In the common voltage output circuit 41, the common signal VCOM2 output from the common voltage amplifier 3 is input to the buffer circuit 51 via the capacitor 23. At this time, the transistors 21 and 22 current-amplify the common signal VCOM2 input to the base, and the transistors 21 and 22
Are supplied to the bases of the transistors 31 and 32. Next, the transistors 31,
32 further amplifies the current and outputs the common signal VCOM3 from the commonly connected emitter. As a result, the common signal V that can drive the common electrode in the liquid crystal display panel 4
COM3 is generated. In this case, the transistor 21 and the transistor 22 are different junction transistors, and the transistor 31 and the transistor 32 are different junction transistors. For this reason, the DC voltage Va at the base of the transistors 21 and 22 which is a common input of the buffer circuit 51,
Transistors 31, 32 which are common outputs of output voltage 12
And the signal amplitude of the common signal VCOM2 is amplified with a gain of 0 dB to generate a common signal VCOM3 having the same amplitude as the common signal VCOM2.

In a normal state, the duty ratio of the common signal VCOM2 input to the common voltage output circuit 41 is 1: 1. Therefore, the DC voltage Va at the bases of the transistors 21 and 22, ie, the transistors 31 and 32,
Of the common signal VCOM3 is maintained equal to the center of the signal amplitude of the common signal VCOM3. On the other hand, if the DC voltage Vb at the emitters of the transistors 31 and 32 is slightly different from the common center voltage required for the liquid crystal display panel 4, flicker occurs on the display of the liquid crystal display panel 4. In such a case, the DC voltage Va at the bases of the transistors 21 and 22 is adjusted by adjusting the variable resistor 28 so as to match the common center voltage required by the liquid crystal display panel 4. Thus, transistor 3
DC voltage Vb at emitters 1, 32 (that is, DC voltage Va at bases of transistors 21 and 22)
Becomes equal to the common center voltage required for the liquid crystal display panel 4, so that flicker of display is set to the minimum.

[0006]

However, the conventional common voltage output circuit 41 (current amplifier circuit) has the following problems. That is, the conventional common voltage output circuit 4
At 1, the resistances of the resistors 52 and 53 constituting a part of the buffer circuit 51 are generally set to the same value. This is because, for example, in a general SEPP circuit such as an audio output circuit, the output DC voltage is desirably set to 0 V, and the positive and negative power supply voltages are set so that their absolute values are equal. Therefore, when the common voltage output circuit 41 does not include the DC voltage adjusting circuit (the resistors 24 and 25 and the variable resistor 28), the resistor 5 serving as an element for determining the DC bias voltage in the buffer circuit 51 is used.
This is because it is considered desirable to make the resistance values of 2, 53 necessarily equal. However, the positive and negative power supplies VDD and VEE required for the TFT type liquid crystal display panel 4 have unequal absolute values, for example, a positive voltage power supply VDD.
Are 7V and the negative voltage power supply VEE is -15V. As shown in FIG. 6, the liquid crystal display panel 4 has such a characteristic that flicker is minimized when the common center voltage (that is, the DC voltage Va) is a voltage slightly higher than 0V. Therefore, the positive and negative power supplies VDD and VEE used in the liquid crystal display panel 4 are used as the positive and negative power supplies of the common voltage output circuit 41, and the resistors 52 and 53 in the buffer circuit 51 are used.
When the resistance values of the SEPP circuit including the buffer circuit 51 and the output circuit 12 are essentially equal to each other in the SEPP circuit without the DC voltage adjustment circuit as shown in FIG. Voltage Va, V at the site
It is stable when b is equal to the voltage of (VDD + VEE) / 2.

However, when the center voltage of the common signal VCOM3 is adjusted to a voltage equal to the common center voltage Vc required for the liquid crystal display panel 4 by the variable resistor 28 of the DC voltage adjusting circuit, the voltage of the DC voltage Va is adjusted. Rises, more current flows through the resistor 53 than the resistor 52, and the transistor 2
2, more current flows, and the DC voltage Vb rises. Therefore, more current flows through the transistor 32 than through the transistor 31. Therefore, depending on the setting of the resistance values (Ra) of the resistors 52 and 53, the expected C-class operation of the output circuit 12 is not performed, and the operation shifts from the B-class operation to the A-class operation and the thermal runaway occurs. Therefore, the conventional common voltage output circuit 41 has a problem that the transistor 32 that consumes more power may be destroyed.

On the other hand, as an operating condition of the output circuit 12, since the common signal VCOM3 is a rectangular wave signal, it is necessary to consider the influence of crossover distortion which is likely to occur in the SEPP circuit used in the audio output circuit. not exist. Therefore, the amplification effect sufficiently expected by the class C operation can be obtained, and it is possible to avoid thermal runaway by increasing the resistance value Ra of the resistors 52 and 53. However, the driving current conditions of the transistors 21 and 22 and the transistors 31 and 32 are unbalanced, so that the transistor 31 is harder to turn on than the transistor 32. Therefore, as shown in FIG. 7, the output waveform of the common signal VCOM3 output from the transistors 31 and 32 is a vertically asymmetric waveform in which the rise time tr1 is longer than the fall time tf1. Therefore, the display brightness at the left end of the screen of the liquid crystal display panel 4 may be reduced for each line due to the rise time tr1 of the common signal VCOM3 becoming longer.
There is a problem that the display quality of the liquid crystal display panel 4 is reduced. By increasing the resistance value Ra of the resistors 52 and 53, the thermal runaway of the output circuit 12 can be avoided, but the power consumption of the upper and lower transistors 31 and 32 constituting the SEPP circuit is unbalanced. It is still a state. For this reason, there is an inconvenience that the center voltage (DC voltage Vb) of the common signal VCOM3 tends to drift under the influence of the ambient environment temperature. In this case, FIG.
As shown in a common voltage output circuit 61 shown in FIG.
Although it is possible to perform temperature compensation by connecting a diode D in series to the circuit 8, there is a problem that the configuration becomes complicated and the cost increases.

The present invention has been made in view of such a problem, and has as its main object to provide a current amplifying circuit capable of performing a stable current amplifying operation without causing destruction due to thermal runaway of a SEPP circuit. . Another object is to provide a liquid crystal display panel having high display quality.

[0010]

According to a first aspect of the present invention, there is provided a current amplifying circuit in which a final output stage is constituted by a SEPP circuit, wherein the SEPP circuit has an absolute value. Operate using different DC positive voltage and DC negative voltage as driving sources, and output voltage at the time of no signal is preset to a predetermined voltage other than the midpoint voltage of the DC positive voltage and the DC negative voltage. It is characterized by.

According to a second aspect of the present invention, there is provided a current amplifying circuit.
The current amplifier circuit as described above, wherein the SEPP circuit operates under a class C operating condition.

According to a third aspect of the present invention, there is provided a current amplifying circuit.
Or the current amplifier circuit according to 2, wherein the output voltage at the time of no signal is set to a predetermined positive voltage value.

According to a fourth aspect of the present invention, there is provided a current amplifying circuit.
3. The current amplification circuit according to any one of items 1 to 3, further comprising a complementary drive circuit that current-amplifies an input signal and outputs the amplified signal to the SEPP circuit, wherein the SEPP circuit is configured as a complementary type. And

According to a fifth aspect of the present invention, there is provided a current amplifying circuit.
5. The current amplifying circuit according to any one of items 1 to 4, wherein the drive circuit has a current input terminal of a high voltage side amplifying element connected to the DC positive voltage via a first resistor, and a low voltage side amplifying element. A current output terminal is connected to the DC negative voltage via a second resistor, and the SEPP circuit includes:
By defining the first and second resistance values to be different predetermined resistance values, the output voltage at the time of no signal is preset to the predetermined voltage.

According to a sixth aspect of the present invention, there is provided a liquid crystal display device which generates a video signal obtained by inverting the polarity of an input video signal every horizontal period and a common electrode driving signal having a polarity opposite to that of the video signal. An inversion signal generation circuit, a liquid crystal display panel that displays an image based on the image signal generated by the H inversion signal generation circuit, and the current amplification circuit according to any one of claims 1 to 5, The current amplifier circuit amplifies the common electrode drive signal and supplies the amplified signal to a common electrode in the liquid crystal display panel.

According to a seventh aspect of the present invention, there is provided a liquid crystal display device.
In the liquid crystal display device described above, the output voltage at the time of no signal is set to a center voltage of the common electrode drive signal.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which a current amplifier circuit and a liquid crystal display device according to the present invention are applied to a liquid crystal display device S1 will be described below with reference to the accompanying drawings. In addition,
Components having the same functions as those of the configuration of the conventional liquid crystal display device S11 are denoted by the same reference numerals, and redundant description will be omitted.

As shown in FIG. 4, the liquid crystal display device S1 comprises:
A common voltage output circuit 1, an H-inverted signal generation circuit 2, and a common voltage amplification circuit 3 which constitute a current amplification circuit according to the present invention.
And a liquid crystal display panel 4.

The common voltage output circuit 1 operates using a power supply VDD as a positive DC voltage and a power supply VEE as a negative DC voltage, whose absolute values are different from each other, as a drive source, and a common signal VCOM2 corresponding to a common electrode drive signal in the present invention. Is a circuit that amplifies the signal and supplies it to a common electrode in the liquid crystal display panel 4. As shown in FIG. 1, a buffer circuit 11 corresponding to a drive circuit according to the present invention and an output circuit corresponding to a SEPP circuit according to the present invention 12 are provided. In this case, the buffer circuit 11 includes transistors 21 and 22, a capacitor 23, and resistors 24-27. The output circuit 12 is configured in an SEPP output form by an npn transistor 31 and a pnp transistor 32 so that a class C switching operation can be performed. The output circuit 12 is a common voltage output circuit 1
Resistors 26 and 2 that determine the DC bias voltage of
Since the resistance value of the resistor 7 is specified as described later, it operates under extremely high efficiency class C operating conditions and generates the common signal VCOM3 with less waveform distortion. In the buffer circuit 11 of the common voltage output circuit 1, the resistance values of the resistors 52 and 53 of the buffer circuit 51 in the conventional common voltage output circuit 41 are defined to be equal to each other, whereas the first resistor Resistance 2 equivalent to
6, and a resistor 2 corresponding to the second resistor in the present invention
7 is the power supply VD used in the liquid crystal display panel 4.
Different resistance values are defined according to the voltage values of D and VEE and the voltage value of the common center voltage of the liquid crystal display panel 4.

Specifically, as shown in FIG. 2, when the voltage value of the common center voltage at which the flicker of the liquid crystal display panel 4 is minimized is Vc, the resistance value Ra of the resistor 26 and the resistance value Rb of the resistor 27 are obtained. Is the output voltage (DC voltage V) of the transistors 31 and 32 of the output circuit 12 when there is no signal.
b) is defined to satisfy the following equation. That is, in the output circuit 12, the DC voltage Vb when there is no signal is set in advance to a voltage value Vc (predetermined voltage) of the common center voltage that is a positive voltage other than the midpoint voltage between the positive power supply VDD and the negative power supply VEE.

Vb = Vc More specifically, the resistance values Ra and Rb are determined by the transistor 2
When the base-emitter voltage of transistor 1 is VBE1 and the base-emitter voltage of transistor 22 is VBE2,
It is defined so that the following equation is satisfied.

Vc = {VDD-VEE- (VBE1 + VBE2)} ×
Rb / (Ra + Rb) + VBE2 + VEE If VBE1 = VBE2 = VBE, the above equation is represented by the following equation.

Vc = (VDD-VEE-2.times.VBE) .times.Rb /
(Ra + Rb) + VBE + VEE In this case, the resistance values Ra and Rb are set in advance so that the above expression is satisfied and the output circuit 12 operates under the class C operating condition. As a result, since the absolute values of the voltage value of the positive power supply VDD and the voltage value of the negative power supply VEE are different from each other, the resistance values Ra and Rb have different values.
Although it is possible to make the DC voltage Vb equal to the voltage value Vc of the common center voltage only by the buffer circuit 11 composed of the resistors 26 and 27 and the transistors 21 and 22, it is possible to make the resistors 24 and 25 bias circuits are provided. Here, the resistance 24,
The resistance value of V.sub.25 is obtained from each of the positive power supply VDD, the negative power supply VEE, and the required common center voltage Vc by Va.
= Vc, and is set in consideration of the output impedance of the common voltage amplifier circuit 3.

In the common voltage output circuit 1, the common signal VCOM2 output from the common voltage amplifier circuit 3 is input to the buffer circuit 11 via the capacitor 23. At this time, the transistors 21 and 22 current-amplify the common signal VCOM2 input to the base and supply the amplified signal to the bases of the transistors 31 and 32 from the emitters. Next, the transistors 31 and 32 further amplify the current with the voltage gain of 0 dB and output the common signal VCOM3 from the emitter. As a result, a common signal VCOM3 that can drive the common electrode in the liquid crystal display panel 4 is generated. In this case, in the common voltage output circuit 1, the DC voltage Va at the bases of the transistors 21 and 22 and the DC voltage Vb at the emitters of the transistors 31 and 32, which are common outputs of the output circuit 12.
Is maintained at a voltage equal to the voltage value Vc of the common center voltage of the liquid crystal display panel 4. As a result, the liquid crystal display panel 4 maintains a high display quality with its flicker kept at a minimum.

As described above, according to the common voltage output circuit 1, the buffer circuit 1 can be provided without providing a DC voltage adjusting circuit for adjusting the center voltage of the common signal VCOM3.
1 transistor 21 and 22 when there is no signal (DC voltage Va) and the output circuit 12 and transistors 31 and 32 when there is no signal (DC voltage V
b) can be defined to be equal to the common center voltage inherent to the liquid crystal display panel 4, the transistors 21 and 22 operate under the same current condition (operating condition), and the transistors 31 and 32 also operate under the same current condition (operating condition). ). Therefore, the current-amplified common signal VCOM3
As shown in FIG. 3, the rising time tr2 is the rising time t2 of the conventional common voltage output circuit 41.
The time is shorter than r1 and equal to the fall time tf2. That is, the common voltage output circuit 1
The input common signal VCOM2 is current-amplified with minimum distortion to generate a common signal VCOM3 having a voltage waveform that is almost symmetrical in the vertical direction and has a well-balanced voltage waveform. As a result, the common voltage output circuit 1 can stably supply the common signal VCOM3 that meets the specifications of the liquid crystal display panel 4 without causing thermal runaway or destruction of the transistors 31 and 32. Also,
Since the common signal VCOM3 rises in a short time, the display luminance of each line can be made uniform at the left end of the display screen of the liquid crystal display panel 4, so that the display quality of the liquid crystal display panel 4 can be improved.

The present invention is not limited to the above embodiments of the present invention. For example, in reality, the common center voltage at which the flicker of the liquid crystal display panel is minimized is slightly different for each liquid crystal display panel 4. Therefore, similarly to the conventional common voltage output circuit 41, a DC voltage adjusting circuit 29 including the resistors 24, 25 and the variable resistor 28 can be provided instead of the fixed bias using the resistors 24, 25. In this case, as shown by the broken line in FIG. 1, a series circuit of the resistor 24, the variable resistor 28 and the resistor 25 is connected between the positive power supply VDD and the negative power supply VEE, and the movable contact of the variable resistor 28 is connected to the transistors 21 and 22. Connect to base. According to this configuration, flicker of each liquid crystal display panel 4 can be minimized by adjusting the variable resistor 28. Further, unlike the conventional common voltage output circuit 41, the DC voltage Vb of the output circuit 12 itself can be finely adjusted to Vb = Vc without being forcibly raised to the desired voltage by the DC voltage adjustment circuit 29. Further, since the buffer circuit 11 and the output circuit 12 themselves operate under a DC bias condition of a voltage substantially equal to the voltage value Vc of the common center voltage, the design of the DC voltage adjusting circuit 29 becomes easy, and The output circuit 1 can operate stably as a whole.

Further, in the embodiment of the present invention, the buffer circuit 11 is constituted by using the pnp transistor 21 and the npn transistor 22 and the npn transistor 31 and the pnp transistor 32 are used. Although the example in which the output circuit 12 is configured has been described, the buffer circuit 11 can be configured with two npn-type transistors (that is, transistors having the same junction type), and two npn-type transistors (that is, two npn-type transistors). Each configuration of the buffer circuit 11 and the output circuit 12 can be changed as appropriate, for example, the output circuit 12 can be composed of transistors having the same junction type. However, as compared with the case where the buffer circuit 11 and the output circuit 12 are formed by using two npn-type transistors, by configuring in a complementary manner, a phase inverting circuit for inverting the phase of the common signal VCOM2 can be eliminated. Therefore, the circuits of the buffer circuit 11 and the output circuit 12 can be simply configured, and the cost can be reduced. Furthermore, in the common voltage output circuit 1, an example in which 7V and -15V are used as the positive power supply VDD and the negative power supply VEE, respectively, is not limited thereto. Of course you can. In addition, the current amplifier circuit according to the present invention includes:
The present invention can be applied not only to the liquid crystal display device S1 but also to various electronic devices.

[0028]

As described above, according to the current amplifying circuit and the liquid crystal display device of the present invention, the SEPP when there is no signal is provided.
By setting the output voltage of the circuit to a predetermined voltage other than the center voltage of the DC positive voltage and the DC negative voltage in advance, the SEPP circuit can be operated stably, and further,
By operating the SEPP circuit under the class C operating condition, a DC amplifier circuit with extremely high efficiency and less waveform distortion can be realized. In addition, SEPP corresponds to a common center voltage of a liquid crystal display panel which is generally a positive voltage.
Since the operating conditions of the circuit can be optimally set, a liquid crystal display device having extremely high display quality can be realized by using the current amplifier circuit.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a common voltage output circuit 1 according to an embodiment of the present invention.

FIG. 2 is a voltage waveform diagram of a common signal VCOM3 for explaining an operation of the common voltage output circuit 1.

FIG. 3 is a voltage waveform diagram showing details of a voltage waveform of a common signal VCOM3.

FIG. 4 is a configuration diagram illustrating an overall configuration of the liquid crystal display devices S1 and S11.

FIG. 5 is a circuit diagram showing a configuration of a conventional common voltage output circuit 41.

FIG. 6 is a voltage waveform diagram of a common signal VCOM3 for describing an operation of the conventional common voltage output circuit 41.

FIG. 7 is a voltage waveform diagram showing details of a voltage waveform of a common signal VCOM3 generated by a conventional common voltage output circuit 41.

FIG. 8 is a circuit diagram showing a configuration of another conventional common voltage output circuit 61.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Common voltage output circuit 2 H inversion signal generation circuit 3 Common voltage amplifier circuit 4 Liquid crystal display panel 11 Buffer circuit 12 Output circuit 26, 27 Resistance S1 Liquid crystal display device VCOM2, VCOM3 Common signal

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09G 3/20 670 G09G 3/20 670L H03F 1/52 H03F 1/52 3/30 3/30 F term ( Reference) 2H093 NA16 NA32 NA61 NC04 NC18 NC34 ND60 NE10 5C006 AC25 AC27 AF51 BB16 BF25 BF31 BF50 5C080 AA10 BB05 DD19 DD20 FF11 JJ02 JJ03 JJ04 5J091 AA01 AA18 AA65 CA33 CA57 CA78 CA81 FA03 HA08 HA09 HA08

Claims (7)

[Claims] 1. A current amplifier circuit in which a final output stage is constituted by a SEPP circuit, wherein the SEPP circuit operates using a DC positive voltage and a DC negative voltage having absolute values different from each other as a drive source, and outputs no signal. A current amplifier circuit, wherein an output voltage at the time is preset to a predetermined voltage other than a midpoint voltage between the DC positive voltage and the DC negative voltage. 2. The current amplifying circuit according to claim 1, wherein said SEPP circuit operates under a class C operating condition. 3. An output voltage at the time of no signal is set to a predetermined positive voltage value.
The current amplification circuit according to any one of the preceding claims. 4. The semiconductor device according to claim 1, further comprising a complementary drive circuit for current-amplifying an input signal and outputting the amplified signal to the SEPP circuit, wherein the SEPP circuit is configured as a complementary type. The current amplifier circuit according to any one of the above. 5. The drive circuit according to claim 1, wherein a current input terminal of a high-voltage amplifier is connected to the DC positive voltage via a first resistor, and a current output terminal of the low-voltage amplifier is connected to a second resistor. The SEPP circuit is configured such that the resistance value of the first and second resistors is defined to be different from each other by a predetermined resistance value, so that the output at the time of no signal is output. 5. The current amplification circuit according to claim 1, wherein a voltage is preset to the predetermined voltage. 6. An H-reversed signal generation circuit for generating a video signal whose polarity is inverted for each horizontal cycle with respect to an input video signal and a common electrode drive signal having a polarity opposite to that of the video signal; A liquid crystal panel that displays an image based on the image signal generated by the inversion signal generation circuit, and the current amplification circuit according to any one of claims 1 to 5,
The current amplifier circuit amplifies the common electrode drive signal and supplies the amplified signal to a common electrode of the liquid crystal display panel. 7. The liquid crystal display device according to claim 6, wherein the output voltage when there is no signal is set to a center voltage of the common electrode drive signal.