JP2002311920A - Liquid crystal display device, picture display application equipment and portable information terminal equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce power consumption of a D-A converter of a source line driving circuit in a liquid crystal display device comprised of a TFT liquid crystal panel. SOLUTION: The liquid crystal display device is composed of a liquid crystal panel P, a gate line driving circuit 7 and a source line driving circuit 20B. The source line driving circuit 20B has a shift register 12, a data latching circuit 11, a line-latching circuit 10, a D-A converter 9B, and multiplexer 8B, and generates pixel signals to a plurality of source electrodes 4. Then, during the period for switching the source electrodes, 4 the power source for the D-A converter 9B is cut off, and the power consumption of the source line driving circuit 20B is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device in which the power consumption of a source line driving circuit is reduced, and to an image display application device and a portable information terminal device equipped with the liquid crystal display device.

[0002]

2. Description of the Related Art FIG. 4 shows a configuration diagram of a conventional liquid crystal display device using thin film transistors. The liquid crystal panel P includes a thin film transistor (TFT) 1 for driving liquid crystal of each pixel, a storage capacitor 2 for the pixel, a liquid crystal cell 3 serving as a capacitive load, and a TFT.
1, a source electrode 4 connected to the source of the TFT 1, a gate electrode 5 connected to the gate of the TFT 1, a storage capacitor 2, and a liquid crystal cell 3.
And a common electrode 6 connected to the common electrode.

Each of the liquid crystal cells 3 is composed of a liquid crystal panel P of (N ×
M) are formed at the matrix positions, and control the transmittance or reflectance of light at each pixel position. As circuits for driving the liquid crystal panel P, a gate line driving circuit 7 and a source line driving circuit 20A
Are provided. The gate line driving circuit 7 is a circuit that supplies a scanning signal to the gate, which is the first control input terminal of the TFT 1, via the gate electrode 5. Source line drive circuit 20A
Is a circuit for supplying a pixel signal to the gate, which is the second control input terminal of the TFT 1, via the source electrode 4. The source line driving circuit 20A includes a multiplexer 8A, a D / A converter 9A, a line latch circuit 10, a data latch circuit 11,
The shift register 12 is included.

Assuming that the total number of source electrodes is M, m source electrodes 4 obtained by dividing the M source electrodes into k groups are referred to as a source electrode group.

Hereinafter, the operation of the source line driving circuit 20A of the conventional liquid crystal display device will be described. Here, M = k ×
It is assumed that m pixel data are simultaneously processed with respect to m pixel data, and such processing is repeated k times. The shift register 12 is a shift register having the number of stages (m) corresponding to the D / A converter 9A. The output of each stage is connected to the clock input terminal of the data latch circuit 11. The shift register 12 shifts the shift data 16 in order by the shift clock 17 and controls the timing at which the data latch circuit 11 takes in the image data.

The data latch circuit 11 has the number of stages corresponding to the D / A converter 9A, and the bit width of the data at each stage is 6 bits or 8 bits, and the m digital values represented by the bit widths are shaded. This is a circuit that latches the image data 15. The image data serially transferred at the output timing of the shift register 12 is sequentially taken into the data latch circuit 11.

The line latch circuit 10 also has the number of stages corresponding to the D / A converter 9A, and the bit width of the data at each stage is 6 bits or 8 bits as in the data latch circuit 11. When each output of the data latch circuit 11 is applied to each input terminal of the line latch circuit 10, the line latch circuit 1
0 reads the output data of the data latch circuit 11 at the timing of the latch signal 14 (horizontal synchronization signal). Each output of the line latch circuit 10 is provided to each input terminal of the D / A converter 9A.

The D / A converter 9A inputs m digital image data of 6 bits or 8 bits of the latch circuit 10 and generates an analog pixel signal for driving the source electrode 4.

The multiplexer 8 is a switching circuit composed of a semiconductor switch. The multiplexer 8 receives m pixel signals output from the D / A converter 8, switches the switches according to a control signal 13, and switches the output destination to a specific one of k outputs. This is a circuit that outputs to the source electrode group. As described above, the k source electrode groups are sequentially switched by the control signal 13.

Each element of the source line drive circuit 20A is manufactured by the same manufacturing process as that of the TFT1. That is, the source line driving circuit 20A forms a CMOS integrated circuit including a thin film transistor on the same glass substrate,
This is realized by mounting an integrated circuit made of single-crystal silicon on a glass substrate including the TFT 1 by COG.

A D / A converter 9 of a conventional liquid crystal display device
In A, the D / A conversion circuits 30 as shown in FIG. 5 are arranged in m stages. 5, when a digital image data input 31 is provided, a D / A conversion circuit 30 converts the digital image data input 31 into an analog image output 32. As the D / A conversion circuit 30,
A ladder-type D / A converter using a resistor or a capacitor and a buffer amplifier for output connected thereto are generally used. The buffer amplifier is constituted by an analog operational amplifier circuit, and is operated by constantly flowing a bias current for its operation. For this reason, the power consumption of the D / A conversion circuit 30 is large.

FIG. 6 is a timing chart showing the operation of the conventional liquid crystal display device. The operation of the conventional liquid crystal display device will be described with reference to this timing chart. Signals 51 to 55 in FIG. 6 show the operation during one horizontal synchronization period in an enlarged manner.
6 to 58 show the operation during one vertical synchronization period.
In FIG. 6, signals 51 and 56 are a horizontal synchronizing signal, signal 5
2, 53 and 54 are control signals for controlling the multiplexer 8A, and the signal 55 is an output signal of the D / A converter 9A.

In a conventional method of driving a liquid crystal display device, D / D
The output of the A converter 9A is switched by the multiplexer 8A with respect to the m source electrodes 4, that is, the source electrode group. In the operation of the conventional liquid crystal display device during one horizontal synchronization period, the D / A converter 9A sequentially inputs image data corresponding to the source electrode group to be switched, and generates an analog voltage corresponding to the grayscale image data. The output signal 55 shown in FIG. One horizontal synchronization period is divided according to the number k of the source electrode groups, and an output signal 55 is output to a predetermined source electrode group every divided horizontal synchronization period as an analog driving voltage.

Signals 52 to 54 in FIG.
A control signal for controlling the multiplexer 8A so as to switch the source electrode group in one horizontal synchronization period. Then, the output signal of the D / A converter 9A is output to the source electrode group during the ON period. In FIG. 6, signals 52-54
The switches for the respective source electrodes 4 of the multiplexer 8A are turned on when the signal is at the H level, and turned off when the signal is at the L level. When the control signals 52 to 54 of the multiplexer 8A switch from on to off, the output of the D / A converter 9A is held while the multiplexer 8A is off. Then, a pixel signal is applied to the liquid crystal cell 3 through the TFT 1 in the row where the gate electrode 5 is turned on.

As shown in FIG. 6, the timing of the control signals 52, 53, 54 of the multiplexer 8A is controlled so that no period occurs in which two or more of them are turned on. It is common to set a dead time period of the order for any switch turned off.

Signals 56 to 58 in FIG. 6 show the operation during one vertical synchronization period. The gate line drive circuit 7 scans each gate electrode 5 in order to perform the operation during the above-described horizontal synchronization period. Thus, matrix display is performed on the liquid crystal panel P.

Generally, in the horizontal synchronizing period, about 20% of the horizontal retrace period is set to the horizontal synchronizing period including the horizontal display period effective for display. In the vertical synchronization period, about 10% of a vertical blanking period is set for a vertical synchronization period including a vertical display period effective for display. In the conventional liquid crystal display device, as shown in FIG. 6, the D / A converter 9A operates even during the dead time period when the control signal of the multiplexer 8A is turned off, and outputs its output signal.

In FIG. 6, the D / A converter 9A
Among the output signals 55 in one horizontal synchronization period, the third signal, for example, is continuously output during the horizontal retrace period even when the control signal 54 of the multiplexer 8A is turned off (L level). The D / A converter 9A operates as shown by a signal 58 during the vertical retrace period after the effective vertical display period (valid data) of the D / A converter 9A, and the output signal (invalid data) is output. ).

[0019]

As described above, in the conventional liquid crystal display device, even when the multiplexer 8A is in the off state and the output of the D / A converter 9A is not being output to the source electrode 4, the D / A converter 9A is not driven. Since the A-converter 9A operates, the power consumption of the D / A converter 9A increases, which is one of the causes of the increase in the power consumption of the liquid crystal display device.

SUMMARY OF THE INVENTION The present invention has been made in view of such conventional problems, and realizes a low power consumption liquid crystal display device by reducing the power consumption of a D / A converter. It is an object of the present invention to provide an image display application device and an information portable terminal device equipped with the liquid crystal display device.

[0021]

According to a first aspect of the present invention, there is provided a liquid crystal panel having each liquid crystal cell at a pixel position formed in an (N × M) matrix position, and a switching element for driving the liquid crystal cell. A gate line driving circuit that supplies a scanning signal to a first control input terminal of the switching element via a gate electrode of the liquid crystal panel;
A source line driving circuit that supplies a pixel signal to a second control input terminal of the switching element via the source electrodes. When m source electrodes obtained by dividing the electrodes into k groups are used as a source electrode group, a line latch circuit for temporarily storing m pixel data, and respective pixel data output simultaneously from the line latch circuit. A D / A converter having m D / A converter circuits for converting the pixel signal into an analog pixel voltage, and inputting m pixel signals output from the D / A converter to the k source electrode groups And a multiplexer for sequentially switching and outputting the signals. The power supply of the D / A converter is cut off during a period for switching the source electrode group.

According to a second aspect of the present invention, there is provided a liquid crystal panel having each liquid crystal cell at a pixel position formed in an (N × M) matrix position, and a switching element for driving the liquid crystal cell; A gate line driving circuit for applying a scanning signal to a first control input terminal of the switching element via a gate electrode, and a pixel connected to a second control input terminal of the switching element via M source electrodes of the liquid crystal panel A source line driving circuit for providing a signal, wherein the source line driving circuit is configured such that m source electrodes obtained by dividing the M source electrodes into k groups are referred to as a source electrode group. A line latch circuit for temporarily storing m pieces of pixel data, and a D / A for converting each pixel data output from the line latch circuit all at once to an analog pixel voltage. A D / A converter having m conversion circuits, and a multiplexer that receives the m pixel signals output from the D / A converter and sequentially switches to and outputs any of the k source electrode groups. The power supply of the D / A converter is cut off during a horizontal retrace period after a pixel signal is supplied to M = k × m source electrodes.

According to a third aspect of the present invention, there is provided a liquid crystal panel having each liquid crystal cell at a pixel position formed in an (N × M) matrix position, and a switching element for driving the liquid crystal cell; A gate line driving circuit for applying a scanning signal to a first control input terminal of the switching element via a gate electrode, and a pixel connected to a second control input terminal of the switching element via M source electrodes of the liquid crystal panel A source line driving circuit for supplying a signal, wherein the source line driving circuit is configured such that m source electrodes obtained by dividing the M source electrodes into k groups are referred to as a source electrode group. In this case, a line latch circuit for temporarily storing m pixel data, and a D / A for converting each pixel data output from the line latch circuit all at once to an analog pixel voltage A D / A converter having m conversion circuits, and a multiplexer that receives the m pixel signals output from the D / A converter and sequentially switches to and outputs any of the k source electrode groups. The power supply of the D / A converter is shut off during a vertical blanking period after a scanning signal is applied to the N gate electrodes.

According to a fourth aspect of the present invention, there is provided an image display application device including the liquid crystal display device according to any one of the first to third aspects.

According to a fifth aspect of the present invention, there is provided an information portable terminal device comprising the liquid crystal display device according to any one of the first to third aspects.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, liquid crystal display devices according to embodiments of the present invention will be described with reference to the drawings. FIG. 1 is an overall configuration diagram of a liquid crystal display device according to each embodiment. The same portions as those in the conventional example are denoted by the same reference numerals, and detailed description thereof will be omitted. This liquid crystal display device has a liquid crystal panel P, a gate line drive circuit 7, and a source line drive circuit 20B. The gate line driving circuit 7 is a circuit for sequentially driving the N gate electrodes 5. The source line drive circuit 20B is a circuit that divides and drives the M source electrodes 4 into k source electrode groups, and includes a multiplexer 8B, a D / A converter 9B, a line latch circuit 10, and a data latch circuit 1.
1. The shift register 12 is included.

FIG. 2 is a circuit diagram showing a main configuration of a D / A converter 9B used in the source line driving circuit 20B in each embodiment. In the D / A converter 9B, a switch 43 is provided between the power supply terminal of the output buffer and the power supply line, and a switch 44 is provided between the output buffer and the output terminal. .

FIG. 3 is a timing chart showing the operation of the liquid crystal display device in each embodiment. The same signal names as in FIG. 6 are assigned the same numbers. Signals 51 to 55 indicate operation during one horizontal synchronization period, and signals 56 to 58 indicate operation during one vertical synchronization period.

(Embodiment 1) The operation of Embodiment 1 of the present invention in the liquid crystal display device configured as described above will be described. In the present embodiment, the operation of the D / A converter 9B is stopped while the multiplexer 8B does not supply the output signal of the D / A converter 9B to the source electrode 4. For this purpose, as shown in FIG.
The control signal 18 for stopping the operation is input to the converter 9B.

In FIG. 3, a control signal 18 indicates a control signal for stopping the operation of the D / A converter 9B. When the H level is high, the power supply of the D / A converter 9B is cut off, and the output is set to high impedance (Hi-Z). ing. When the control signal 18 is at the L level, the D / A converter 9B performs a normal operation.

In this embodiment, as shown in FIG. 3, in one horizontal period, the control signal 18 is set to the H level while the multiplexer 8 is off, and the operation of the D / A converter 9 is stopped. In accordance with this, the multiplexer 8B
In the ON period, the control signal 18 is set to the H level at the beginning of the ON period of the multiplexer 8B and the remaining period is set to the L level in consideration of the charging time of the source electrode 4,
The source electrode 4 was charged.

In a VGA (640 × 480 dot) liquid crystal panel Pi, for example, consider a case where k = 3 source electrode groups are multiplex driven. In this case, the frequency of the vertical synchronization signal is 60 Hz, and the frequency of the horizontal synchronization signal is 31.5 KHz. Under this condition, the effective display period was set to 25.4 μs, and the ON period of the multiplexer was set to 7.5 μs and the OFF period was set to 1 μs so that the multiplexer 8B was switched during this effective display period. When driven in this manner, the display of the liquid crystal display device was normal. At this time, assuming that there are three switching periods of each multiplexer 8B for 31.7 μs in one horizontal period as compared with the conventional one, the D / A converter 9B is stopped during these 3 μs periods. A 10% reduction in power consumption has been achieved.

In the present embodiment, in addition to this,
The ON time of the multiplexer 8B is 7.5 μs, and the D / A converter 9B
Was driven with the operation period of 6.5 μs, but the display of the liquid crystal display device was normal. The power consumption at this time was reduced by about 38% as compared with the conventional one.

(Embodiment 2) Next, the operation of the liquid crystal display device according to Embodiment 2 of the present invention will be described. FIG.
As shown in FIG.
The operation of the / A converter 9B was stopped. In this case, after the generation of the control signal 54 is completed, the control signal 18 is set to the H level, and the operation of the D / A converter 9B during this period is stopped.

In a VGA (640 × 480 dot) liquid crystal panel P, for example, consider a case where three source electrode groups are multiplex driven. In this case, the frequency of the vertical synchronization signal is 60 Hz, and the frequency of the horizontal synchronization signal is 3 Hz.
1.5 kHz. Under this condition, the operation of the D / A converter 9B was stopped and driven for 6.3 μs of the horizontal retrace period, but the display of the liquid crystal display device was normal. The power consumption at this time is 31.7 μs for one horizontal period.
When the horizontal retrace period is set to 6.3 μs, a reduction of about 20% is realized as compared with the conventional case.

(Embodiment 3) Next, the operation of the liquid crystal display device according to Embodiment 3 of the present invention will be described. In the third embodiment, the operation of the D / A converter 9B is stopped by applying the control signal 18 as shown in FIG. 3 to the D / A converter 9B during the vertical blanking period within one vertical period.

In a VGA (640 × 480 dot) liquid crystal panel P, for example, consider a case where three source electrode groups are multiplex driven. In this case, the frequency of the vertical synchronization signal is 60 Hz, and the frequency of the horizontal synchronization signal is 3 Hz.
1.5 kHz. Under these conditions, the operation of the D / A converter 9B was stopped for 1.5 ms during the vertical flyback period, but the display on the liquid crystal display device was normal. The power consumption at this time was reduced by about 10% as compared with the conventional device, when the horizontal retrace period was 1.5 ms for one vertical period of 16.6 ms.

When the control methods of the first, second, and third embodiments are used together, the power reduction effect of the liquid crystal display device is further enhanced.

The liquid crystal display device as described above can be used for an image display application device and a portable information terminal device. In an image display application device such as a notebook personal computer driven by a battery, or an information portable terminal device such as a PDA or a mobile phone, 1
The battery life for each charge is an evaluation target of the portable device. In such a case, the present invention is an effective means for extending the life of the battery.

[0040]

As described above, according to the liquid crystal display device of the present invention, the power of the D / A converter is reduced in a period not necessary for its operation, thereby realizing a liquid crystal display device with low power consumption. Becomes possible. In addition, if such a liquid crystal display device is mounted on a battery-driven image display application device or an information portable terminal device, the operating time of the device for one charge of the battery becomes longer.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of a D / A converter used in the embodiment of the present invention.

FIG. 3 is a timing chart showing an operation of the liquid crystal display device according to the embodiment of the present invention.

FIG. 4 is a configuration diagram of a conventional liquid crystal display device.

FIG. 5 is a configuration diagram of a D / A converter used in a conventional liquid crystal display device.

FIG. 6 is a timing chart showing the operation of a conventional liquid crystal display device.

[Explanation of symbols]

 Reference Signs List 1 thin film transistor (TFT) 2 storage capacitor 3 liquid crystal cell 4 source electrode 5 gate electrode 6 common electrode 7 gate line drive circuit 8 multiplexer 9A, 9B D / A converter 10 line latch circuit 11 data latch circuit 12 shift register 13 control signal of multiplexer 14 Latch signal 15 Digital image data 16 Shift data 17 Shift clock 18 D / A converter control signal 30 D / A conversion circuit

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09G 3/20 623 G09G 3/20 623F 623G 623R 680 680T F-term (Reference) 2H093 NA16 NA41 NC22 NC26 NC34 ND39 NE01 5C006 AF68 AF69 AF73 AF82 BB16 BC12 BF03 BF04 BF24 FA47 5C080 AA10 BB05 DD26 FF11 JJ02 JJ03 JJ04

Claims (5)

[Claims] 1. A liquid crystal panel having a liquid crystal cell at a pixel position formed in an (N × M) matrix position and a switching element for driving the liquid crystal cell; and the switching through a gate electrode of the liquid crystal panel. A gate line driving circuit that supplies a scanning signal to a first control input terminal of the element; and a source line driving circuit that supplies a pixel signal to a second control input terminal of the switching element via M source electrodes of the liquid crystal panel. And wherein the source line drive circuit comprises: m pixels when the M source electrodes are divided into k groups to form a source electrode group; It has a line latch circuit for temporarily storing data, and m D / A conversion circuits for converting each pixel data output from the line latch circuit all at once to an analog pixel voltage / A converter; and a multiplexer that receives the m pixel signals output from the D / A converter, and sequentially switches to and outputs one of the k source electrode groups. A liquid crystal display device, wherein the power supply of the D / A converter is shut off during a period when the group is switched. 2. A liquid crystal panel having a liquid crystal cell at a pixel position formed in an (N × M) matrix position, and a liquid crystal panel having a switching element for driving the liquid crystal cell; and the switching through a gate electrode of the liquid crystal panel. A gate line driving circuit that supplies a scanning signal to a first control input terminal of the element; and a source line driving circuit that supplies a pixel signal to a second control input terminal of the switching element via M source electrodes of the liquid crystal panel. And wherein the source line drive circuit comprises: m pixels when the M source electrodes are divided into k groups to form a source electrode group; It has a line latch circuit for temporarily storing data, and m D / A conversion circuits for converting each pixel data output from the line latch circuit all at once to an analog pixel voltage / A converter, and a multiplexer that receives the m pixel signals output from the D / A converter, and sequentially switches and outputs the pixel signals to any one of the k source electrode groups. A liquid crystal display device characterized in that the power supply of the D / A converter is shut off during a horizontal retrace period after a pixel signal is applied to k × m source electrodes. 3. A liquid crystal panel having a liquid crystal cell at a pixel position formed in an (N × M) matrix position, a liquid crystal panel having a switching element for driving the liquid crystal cell, and the switching through a gate electrode of the liquid crystal panel. A gate line driving circuit that supplies a scanning signal to a first control input terminal of the element; and a source line driving circuit that supplies a pixel signal to a second control input terminal of the switching element via M source electrodes of the liquid crystal panel. And wherein the source line drive circuit comprises: m pixels when the M source electrodes are divided into k groups to form a source electrode group; It has a line latch circuit for temporarily storing data, and m D / A conversion circuits for converting each pixel data output from the line latch circuit all at once to an analog pixel voltage / A converter; and a multiplexer that receives the m pixel signals output from the D / A converter and sequentially switches to and outputs any of the k source electrode groups. A power supply of the D / A converter is turned off during a vertical blanking period after a scanning signal is applied to the gate electrode. 4. An image display application device comprising the liquid crystal display device according to claim 1. 5. An information portable terminal device equipped with the liquid crystal display device according to claim 1.