JP2002305378A - Multilayer wiring board, manufacturing method thereof, and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer wiring board of high reliability, together with its manufacturing method and a semiconductor device, for sure interlayer connection. SOLUTION: The multilayer interconnection board comprises a conductor post 104 for interlayer connection, a wiring pattern 107 comprising a pad 106 for connection to the conductor post 104, a jointing metal material layer 105 for jointing the conductor post 104 to the pad 106, and an insulating layer 101 present between layers. The insulating layer 101 has a two-layer structure; a metal joint adhesive (I) layer 108 and an interlayer insulating material (II) layer 101. The interlayer connection means metal jointing with the jointing metal material layer 105.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board on which a semiconductor chip is mounted, and more particularly to a multilayer wiring board for simultaneously performing electrical connection and adhesion between layers, a method for manufacturing the same, and a semiconductor device.

[0002]

2. Description of the Related Art In recent years, with the demand for higher functionality and lighter, thinner and smaller electronic devices, high-density integration and high-density mounting of electronic components have been progressing. Semiconductor packages have been increasingly miniaturized and have more pins than ever before.

[0003] A conventional circuit board is called a printed wiring board, which is formed by laminating a glass fiber woven fabric with an epoxy resin. The mainstream is to use a wiring board in which a through hole is formed by drilling, a through hole is drilled, and a wall of the hole is plated with copper to form a via, and an electrical connection is made between layers. However, the mounting components have been reduced in size and density, and the wiring density of the above-mentioned wiring board has become insufficient, and problems have arisen in mounting components.

[0004] Against this background, recently, build-up multilayer wiring boards have been adopted. The build-up multilayer wiring board is formed while stacking an insulating layer made of only a resin and a conductor. As the via forming method, a variety of methods such as a laser method, a plasma method, and a photo method are used instead of the conventional drilling, and a high-density is achieved by freely arranging small-diameter via holes. Examples of the interlayer connection portion include a blind via (Blind Via) and a buried via (Buried Via: a structure in which a via is filled with a conductor). A buried via hole, in which a stacked via in which a via is formed on a via, is possible, is particularly noted. Have been. The buried via hole is classified into a method of filling the via hole with plating and a method of filling the via hole with a conductive paste or the like. On the other hand, as a method of forming a wiring pattern, there are a method of etching a copper foil (subtractive method), a method of electrolytic copper plating (additive method), and the like. It is starting to attract attention.

Japanese Patent Application Laid-Open No. 10-84186 discloses that "a hole formed at a position corresponding to the pattern of a wiring layer is formed on the surface of an adhesive insulator in which a conductor is embedded, and on the surface of a releasable support plate. By transferring the conductive wiring pattern thus formed, a wiring layer is formed on the surface of the adhesive insulator, and via connection is performed at the same time. Can be formed. " According to this manufacturing method, since the inside of the via is filled with a conductor (conductive paste) (buried via), a stacked via in which a via is formed on the via is possible, and a wiring pattern is formed by electrolytic plating or the like (additive method). Therefore, a fine wiring pattern can be formed, and not only the density can be increased, but also the wiring design can be greatly simplified. However, in this method, the electrical connection between the layers is performed using a conductive paste, and thus the reliability is not sufficient. In addition, advanced technology for embedding conductive paste in fine vias, wiring patterns formed on the surface of the release support plate, vias formed on the adhesive insulator, and the other wiring pattern at the same time Advanced technology for alignment and lamination is also required, and it is difficult to cope with further miniaturization.

In Japanese Patent Application Laid-Open No. 11-251703,
"An insulator layer having a via filled with a conductive composition, a conductive buffer layer formed on one or both surfaces of the conductive composition, and a wiring formed on the conductive buffer layer A circuit board having an alloy or an intermetallic compound with one or both of the conductive composition and the wiring pattern. This method aims at improving the connection reliability between the conductive paste and the wiring pattern. However, even in this method, the conductive buffer layer that forms the intermetallic compound, the conductive composition, and the surface of the wiring pattern are not sufficiently cleaned, and the conductive buffer layer cannot wet and spread, Metal bonding becomes insufficient, and reliable electrical connection cannot be obtained.

In Japanese Patent Laid-Open No. 11-204939,
`` Having a wiring pattern on at least one side of the insulating sheet,
A conductive via hole penetrates the front and back surfaces of the insulating sheet, and a circuit board provided with connection electrodes is provided at an arbitrary position on the front and back surfaces electrically connected to the via hole via an insulating layer. A multilayer circuit board having a structure in which a plurality of stacked circuit boards are stacked, wherein when an insulating layer that couples the plurality of adjacent circuit boards is heated to a temperature of 100 to 300 ° C., the viscosity decreases to 1000 poise or less, A multilayer circuit board composed of a cured layer of a thermosetting adhesive which cures at least 70 to 80% when left for 10 minutes. According to this multi-layer circuit board, the via is filled with a conductor (electroplated copper) (buried via), so that a stacked via in which the via is formed on the via is possible, and the density of the interlayer connection can be increased. . However,
Also in this method, a conductive adhesive is used as the connection electrode, or Au, Sn, or the like is formed on the connection electrode surface.
Attempts have been made to connect with a u-Sn alloy, etc., but as described above, the reliability of the conductive adhesive is low, and the connection with the Au-Sn alloy does not clean the Sn surface. Poor wettability and insufficient bonding.

[0008] Actually, as shown in the literature of "Development of multilayer wiring board by batch lamination method of tape-like film", Journal of Japan Institute of Electronics Packaging, Vol. 1, No. 2 (1998), Au-Sn Since the alloy does not spread over the entire surface, the bonding becomes partial with the thermosetting adhesive sandwiched between Au and Sn, and the reliability is not sufficient. Here, a cured layer of a thermosetting adhesive is provided with an epoxy-based adhesive. Specifically, bisphenol A is used as an epoxy resin.
Type or cresol novolak type, and there is a phenol novolak resin as a curing agent, but its function is only interlayer adhesion, and there is no description about a metal surface cleaning function such as removal of an oxide film on a metal surface or reduction.

Japanese Patent Application Laid-Open No. 11-204939 discloses a method of performing electrical connection at a temperature of 300 ° C. or less by using an alloy containing Sn as a main component such as Sn—Pb solder as a connection electrode. However, it is impossible to perform solder joining unless the joining surface is cleaned. On the other hand, since the wiring pattern is a subtractive method of forming a copper foil by etching, it is difficult to cope with further miniaturization of the wiring pattern.

Japanese Patent Application Laid-Open No. Hei 8-195560 discloses that “a laminate obtained by stacking a predetermined number of insulator layers having conductor circuit layers on both sides or one side and insulator layers not having conductor circuit layers is pressurized. In a method of manufacturing a printed circuit board in which at least two predetermined upper and lower conductor circuit layers are electrically connected at the same time by molding, the insulator layer is formed of a sheet-like insulator resin layer containing no glass fiber. A protrusion (metal block) made of a conductor for electrical connection between the conductor circuit layers is provided on a predetermined location of the conductor circuit layer, and the laminate is pressed using a pressing jig plate. And a manufacturing method in which a protrusion breaks through the insulating resin layer by pressing pressure and abuts and presses against the opposing conductive circuit layer. In addition, a solder layer having a melting temperature higher than the resin curing temperature of the insulating resin layer is provided at the tip of the protrusion, and the insulating resin layer is broken by the protrusion by heat and pressure, and the solder layer is formed by the conductor circuit layer. After that, in this state, the temperature is raised to the melting temperature of the solder, the solder layer is melted, the projections are connected to the conductor circuit layer, and then the solder layer is cooled and solidified to produce a manufacturing method. Have been. According to this manufacturing method, since the interlayer connection is performed by the projection (metal block) made of a conductor, a stacked via in which a via (projection) is formed on the via (projection) can be formed, and the density of the interlayer connection portion can be increased. be able to. Further, since it is not necessary to form a via in the insulating resin layer, there is an advantage that productivity is improved. However, in the former method, the electrical connection is only physical contact, and it is expected that reliability is low. In the latter method, since the surfaces of the solder layer and the conductor circuit layer at the tip of the protrusion are sufficiently cleaned, that is, if the surface oxide film is not removed or reduced, the solder cannot be spread because it cannot be spread. It is impossible.

In Japanese Patent Application Laid-Open No. 9-23064, "Prior art" is described as "a printed circuit board having a structure in which electrical connection between a lower conductor circuit and an upper conductor circuit is performed by a post (metal column). In general, the following procedure is performed: First, a copper thin film as a metal film for forming a lower conductive circuit is patterned into a shape of a lower conductive circuit, where the copper thin film is formed on an insulating substrate. Or a printed circuit board with three or more layers.
If the number of layers is equal to or greater than the first layer, the layer is formed on the interlayer insulating film. Next, on this copper thin film, a power supply film to be used at the time of electrolytic plating performed later for forming a post is formed by electroless plating. Next, a mask is formed on the power supply film to cover a portion of the power supply film other than the portion where the post is to be formed. Next, electrolytic plating for forming a post is performed to form a target post. Next, the mask is removed, and thereafter, a portion of the power supply film that is not covered with the posts is removed. Next, a resin for forming an interlayer insulating film is applied to the entire surface of the sample and further cured. The cured resin is polished until the post surface is exposed to form an interlayer insulating film. On the interlayer insulating film, a metal film for forming an upper-layer conductor circuit (which corresponds to a metal film for forming a lower-layer conductor circuit when further multi-layered) is formed, and then the metal film is formed as desired. It is patterned into a shape to obtain an upper conductor circuit. It is described. According to this manufacturing method, since the interlayer connection is performed by the post, a stacked via in which the via (post) is formed on the via (post) can be formed, and the density of the interlayer connection can be increased. In addition, since a conductive paste or the like is not required for the interlayer connection portion, high connection reliability is expected. However, since the wiring pattern (conductor circuit) is a subtractive method formed by etching a metal film, it is difficult to cope with further miniaturization of the wiring pattern. In addition, since the cured resin is polished to expose the post surface, the thickness of the interlayer insulating film tends to vary from layer to layer, and it is difficult to accurately cope with impedance matching that has recently attracted attention.

In Japanese Patent Application Laid-Open No. 9-23064, a "means for solving the problem" is to manufacture a printed circuit board having a structure in which electrical connection between a lower conductor circuit and an upper conductor circuit is made by a post. Forming a post on the metal film for forming the lower conductor circuit before patterning the metal film into the shape of the lower conductor circuit, and forming the metal on the metal film on which the post has been formed. Forming a mask made of a material resistant to a means for etching the metal film, the mask being a mask for covering a partial surface to be left as a lower conductor circuit of the film and the post; The portion not covered by the mask is etched to form a lower conductive circuit. "
This is a means for solving the problem that the "feeding film used at the time of electrolytic plating is formed by electroless plating". Therefore, since this is a subtractive method in which a wiring pattern (conductor circuit) is formed by etching a metal film, it is not possible to cope with further miniaturization of the wiring pattern, or the post surface is exposed by polishing a cured resin. This is not for solving the problem that the thickness of the interlayer insulating film is likely to vary depending on each layer.

In Japanese Patent Application Laid-Open No. 62-222696,
In a method for manufacturing a multilayer wiring board in which conductor layers and insulating layers are alternately laminated on a substrate to form a conductor wiring of the multilayer wiring board, the surface on which the conductor wiring is formed has substantially the same shape as a desired wiring pattern shape. Forming an underlying metal layer patterned on the substrate, forming an insulating layer at least other than the underlying metal layer, performing electroless plating on the underlying metal layer using the insulating layer as a plating resist, and forming the conductive wiring And the step of forming The greatest feature of the present invention is that a wiring pattern is formed by electroless plating. This not only enables the conductor wiring to be formed with a uniform thickness, but also forms a fine conductor wiring because of the additive method. can do. However, in the formation of the conductor wiring by electroless plating, it takes time to form the conductor wiring to a desired thickness, and thus there is a serious problem that productivity cannot be improved.
Further, the underlying metal layer is patterned into a substantially same shape as the desired wiring pattern shape. To prevent a gap from being formed between the insulating layer and the conductor wiring, the dimension (width) of the underlying metal layer is set to Therefore, there is also a serious problem that the space between the adjacent conductor wirings cannot be reduced, and there is a problem in improving the circuit density.

In general, for solder bonding, the electrodes facing the solder surface are cleaned of dirt such as oxides on the metal surface, and the reoxidation of the metal surface at the time of solder bonding is prevented.
A soldering flux is used, which lowers the surface tension of the solder and makes the molten solder more likely to wet the metal surface. As the flux, a flux obtained by adding an activator or the like for removing and reducing an oxide film to a thermoplastic resin flux such as rosin is used. However, if this flux remains, the thermoplastic resin melts at high temperature and high humidity, and the active ions in the activator are also released, which causes problems such as a decrease in electrical insulation and corrosion of printed wiring. Therefore, at present, it is necessary to wash and remove the residual flux after soldering. Therefore, the above-mentioned Japanese Patent Application Laid-Open No. 8-195
Such a soldering flux is used for metal bonding of a multilayer printed circuit board, a circuit board, and a multilayer circuit board described in Japanese Patent Application Laid-Open No. 560, JP-A-11-251703, and JP-A-11-204939. Even though metal bonding can be performed reliably, insulation reliability cannot be obtained.

[0015]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned current problems of interlayer connection, wiring pattern formation and reliability in a multilayer wiring board on which a semiconductor chip is mounted. It is an object of the present invention to provide a highly reliable multilayer wiring board capable of forming a fine wiring pattern.

[0016]

That is, the present invention relates to a wiring pattern having a conductor post for interlayer connection, a pad for connecting to the conductor post, and a connection pattern for joining the conductor post and the pad. A multilayer wiring board comprising a bonding metal material layer and an insulating layer existing between the layers, wherein the insulating layer comprises a metal bonding adhesive (I) layer and an interlayer insulating material (II) layer A multilayer wiring board having a structure, and wherein the interlayer connection is metal bonding by a bonding metal material layer.

Further, the multilayer wiring board is characterized in that the insulating layer has a two-layer structure in which a metal bonding adhesive (I) layer and a semi-cured interlayer insulating material (II) layer are integrally cured. is there.

In the multilayer wiring board of the present invention, a preferable joining metal material layer is made of solder or solder formed by electrolytic plating, and the conductor posts are preferably made of copper. Further, it is preferable that the conductor post is made of the same material as the joining metal material layer.

In the multilayer wiring board of the present invention, the preferred metal bonding adhesive (I) is a resin (A) having at least one or more phenolic hydroxyl groups and a resin (B) acting as a curing agent thereof. The resin (A) having an essential component and further having a phenolic hydroxyl group is at least one selected from the group consisting of a phenol novolak resin, an alkylphenol novolak resin, a resole resin, a cresol novolak resin, and a polyvinyl phenol resin. Preferably, the resin (A) having a phenolic hydroxyl group is contained in the metal bonding adhesive (I) in an amount of 20%.
It is preferable that the content is not less than wt% and not more than 80 wt%.

In the multilayer wiring board of the present invention, another preferred metal bonding adhesive (I) is an epoxy resin (C) and a compound (D) having an imidazole ring acting as a curing agent for the epoxy resin (C). ) Is an essential component, and the compound (D) having an imidazole ring acting as a curing agent is preferably contained in the metal bonding adhesive (I) at 1 wt% or more and 10 wt% or less.

In the multilayer wiring board of the present invention, a preferred interlayer insulating material (II) contains a cyanate resin and a thermoplastic resin as essential components, and the cyanate resin has a trimerization ratio of 60% or less. Preferably, furthermore, it is preferable that the metal alkylacetonate is an essential component, furthermore, it is preferable that the alkylphenol is an essential component, and the thermoplastic resin is at least one kind of a polyimide resin and a polyether sulfone resin. Is preferred.

The interlayer insulating material (II) layer of the multilayer wiring board of the present invention preferably contains a cyanate resin having a trimerization ratio of 5 to 80% in a semi-cured state.

The present invention also provides a step of forming a conductor post, a step of forming a wiring pattern having a pad for connecting to the conductor post, and a step of forming a bonding metal material on at least one of the conductor post and the pad. A step of forming a layer; a step of forming a metal bonding adhesive (I) layer; a step of forming an interlayer insulating material (II) layer; A step of bonding the pad with the bonding metal material layer and a step of curing the metal bonding adhesive (I) layer by heating. .

In the method for manufacturing a multilayer wiring board according to the present invention, in the step of forming an interlayer insulating material (II) layer, a semi-cured interlayer insulating material (II) layer is formed, and the metal bonding adhesive (I) is heated. ) In the step of curing the layer, the metal bonding adhesive (I)
It is preferable that the layer and the semi-cured interlayer insulating material (II) layer are integrally cured.

Further, the present invention provides a step of forming a wiring pattern by electrolytic plating using a metal plate as a lead for electrolytic plating, and a step of forming a semi-cured interlayer insulating material (II) layer on the wiring pattern. Forming a via in the interlayer insulating material (II) layer in a semi-cured state so that a part of the wiring pattern is exposed, and forming a conductor post by electrolytic plating using a metal plate as a lead for electrolytic plating; Forming a joining metal material layer on at least one of the surface of the conductor post or the surface of the portion to be joined facing the conductor post, and the surface of the semi-cured interlayer insulating material (II) layer or the connection layer Metal bonding adhesive (I) on at least one of the surfaces
A step of forming a layer, and joining a conductor post and a portion to be joined, which are opposed to each other via the metal joining adhesive (I) layer, with a joining metal material layer, and a semi-cured interlayer insulating material. Bonding the (II) layer and the layer to be connected with the metal bonding adhesive (I) layer, the step of integrally curing the interlayer insulating material (II) layer and the metal bonding adhesive (I) layer, And a step of etching to remove at least one of the surface of the interlayer insulating material (II) layer and the surface of the layer to be connected. In the step of forming the (I) layer, it is preferable to partially form the metal bonding adhesive (I) layer.

The present invention also provides a process for forming a wiring pattern on a metal plate by electrolytic plating using a metal plate as a lead for electrolytic plating, and a step of forming a semi-cured interlayer insulating material (II) layer on the wiring pattern. Forming a via, so that a part of a wiring pattern is exposed in the interlayer insulating material (II) layer, and forming a conductor post by electrolytic plating using the metal plate as a lead for electrolytic plating. Forming a bonding metal material layer on the surface of the conductor post; and forming a metal bonding adhesive (I) layer on the surface of the interlayer insulating material (II) layer so as to cover the bonding metal material layer. Forming a connection layer by etching and removing the metal plate; and laminating a plurality of the connection layers on the layer to be connected, and then heating and pressurizing all together to form the metal layer. Bonding adhesive (I)
The conductor post and the portion to be joined facing each other with the layer interposed therebetween are joined by a joining metal material layer, and the semi-cured interlayer insulating material (II) layer and the joined layer are joined with a metal joining adhesive ( I) a method of manufacturing a multilayer wiring board, comprising: a step of bonding with a layer; and a step of integrally curing an interlayer insulating material (II) layer and a metal bonding adhesive (I) layer. In the step of forming the metal bonding adhesive (I) layer on the surface of the interlayer insulating material (II) layer, it is preferable to partially form the metal bonding adhesive (I) layer on the surface.

Preferably, the method further comprises a step of forming a resist metal layer by electrolytic plating between the metal plate and the wiring pattern using the metal plate as a lead for electrolytic plating.

In the method for manufacturing a multilayer wiring board of the present invention,
It is preferable that the joining metal material layer be made of solder or solder formed by electrolytic plating, and that the conductor post be made of copper. Further, it is preferable that the conductor post is made of the same material as the joining metal material layer.

In the method for manufacturing a multilayer wiring board of the present invention,
Preferred metal bonding adhesives (I) include at least one
The resin (A) having two or more phenolic hydroxyl groups and the resin (B) acting as a curing agent thereof are essential components. Further, the resin (A) having a phenolic hydroxyl group is a phenol novolak resin, an alkylphenol. Novolak resin, resol resin, cresol novolak resin, and at least one selected from the group consisting of polyvinylphenol resins, the resin (A) having a phenolic hydroxyl group is contained in the metal bonding adhesive (I). Preferably, it is contained in an amount of 20 wt% or more and 80 wt% or less.

In the method for producing a multilayer wiring board of the present invention,
As another preferable metal bonding adhesive (I), an epoxy resin (C) and a compound (D) having an imidazole ring acting as a curing agent for the epoxy resin (C) are used.
It is preferable that the compound (D) having an imidazole ring serving as an essential component and acting as a curing agent is contained in the metal bonding adhesive (I) at 1 wt% to 10 wt%.

In the method for manufacturing a multilayer wiring board of the present invention,
As a preferable interlayer insulating material (II), a cyanate resin and a thermoplastic resin are essential components. Further, the cyanate resin preferably has a trimerization ratio of 60% or less. It is preferable that an essential component be an acrylate, and it is further preferable that an alkyl phenol is an essential component. It is preferable that the thermoplastic resin be made of at least one of a polyimide resin and a polyethersulfone resin.

In the method for manufacturing a multilayer wiring board of the present invention,
The interlayer insulating material (II) is 5 to 80% in a semi-cured state.
It is preferable to include a cyanate resin having a trimerization ratio of

Further, the present invention is a multilayer wiring board obtained by any one of the above manufacturing methods.

Further, the present invention is a semiconductor device using any one of the above-mentioned multilayer wiring boards.

[0035]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited thereto.

FIG. 1 is a view for explaining an example of a method for manufacturing a multilayer wiring board according to the first embodiment of the present invention.
(G) is a sectional view showing the structure of the obtained multilayer wiring board. The multilayer wiring board 112 is provided with the conductor posts 10 for interlayer connection.
4 is metal-bonded to the pad 106a of the layer 111 to be connected by the bonding metal material layer 105 provided at the tip of the conductor post 104 via the metal bonding adhesive (I) layer 108;
On the non-joining surface side (upper side in the figure) of the connection layer 110, a wiring pattern 107 and a pad 106 are formed. The insulating layer 109 includes a metal bonding adhesive (I) 108,
A two-layer structure in which the interlayer insulating material (II) layer 101 in a semi-cured state is integrally cured may be used.

The first method for manufacturing a multilayer wiring board of the present invention comprises:
First, a resin varnish for an interlayer insulating material (II) is directly applied to the conductive foil 102 by a method such as printing, curtain coating, bar coating, or the like, or an interlayer insulating material (II) layer of a dry film with a supporting film is formed. A semi-cured interlayer insulating material (II) by laminating the conductor foil 102 by applying heat and pressure.
A conductive foil 102 with a layer 101 is prepared. The dry film with a support film may further have a protective film layer formed thereon. The support film is peeled off after lamination. In particular, the method using a dry film with a support film has an advantage that the thickness can be reliably controlled because an interlayer insulating material (II) layer having a known thickness is used in advance. The semi-cured state of the interlayer insulating material (II) layer 101 can be controlled by pre-curing the raw material to be used or by pre-curing the interlayer insulating material (II) layer formed on the conductor foil 102 by heat treatment. is there.

Since the interlayer insulating material (II) layer is in a semi-cured state, the metal bonding adhesive (I) layer 108 shown in FIG.
And can be integrally cured, and the interlayer insulating material (II) layer 10
1 and the metal bonding adhesive (I) layer 108 have significantly improved adhesion and heat resistance at the interface.

Next, the semi-cured interlayer insulating material (II) layer 1
First, a via 103 is formed in FIG. 1 (FIG. 1A). Via 10
The formation method of No. 3 may be any method as long as it is a method suitable for this manufacturing method, and is more preferably a laser method.

Next, conductive posts 104 for interlayer connection are formed in the vias 103 (FIG. 1B). Examples of the method for forming the conductor posts include a method such as electroless plating and / or electrolytic plating. Alternatively, the conductor foil may be formed by etching. As an example of forming the conductive foil by etching, a method of half-etching one side of the conductive foil in advance to form a conductive post, and then forming an interlayer insulating material (II) layer so as to cover the formed conductive post, etc. is there. The material of the conductor post 104 may be any material as long as it is suitable for this manufacturing method, and examples thereof include copper, nickel, gold, tin, silver, and palladium. Furthermore, by using copper, a conductor post 1 that is stable with low resistance can be obtained.
04 is obtained. Further, the conductor post 104 may be made of the same material as the bonding metal material layer 105 (FIG. 1C). By using the same material as the joining metal material layer 105 for the conductor post 104, the conductor post 104 and the joining metal material layer 105 can be formed simultaneously, and there is an advantage that the processing steps can be shortened. The material of the joining metal material will be described later.

Next, a bonding metal material layer 105 is applied on the conductor posts 104 (FIG. 1C). Metallic material layer 1 for joining
Examples of the method of forming 05 include electrolytic plating, electroless plating, and a method of printing a bonding metal material paste. As a material of the joining metal material, any metal can be used as long as it can be joined to the connected layer 111 shown in FIG. Among solders, Sn and In, or Sn, Ag, Cu, Z
It is preferable to use solder composed of at least two kinds of n, Bi, Pd, Sb, Pb, In, and Au. More preferably, it is an environment-friendly Pb-free solder. FIG.
In (c), the example in which the bonding metal material layer 105 is formed on the surface of the conductor post 104 has been described.
The purpose of forming the conductive layer 105 is to form the conductor post 104 and the layer 1 to be connected.
11 to be bonded to the pad 106a,
The bonding metal material layer 105 may be formed on the pad 106a. Of course, the conductor post 104 and the pad 106
a may be formed on both surfaces.

Next, the semi-cured interlayer insulating material (II) layer 1
A wiring pattern 107 having a pad 106 for interlayer connection is formed on the conductor foil 102 on the substrate 01 (FIG. 1D).
The wiring pattern 107 may be formed by etching the conductive foil 102 or by an additive method such as electroless copper plating and / or electrolytic copper plating. Examples of the material of the wiring pattern 107 include copper, nickel, gold, tin, silver, and palladium. Furthermore, by using copper, a low-resistance and stable wiring pattern 107 can be obtained.

Further, a metal bonding adhesive (I) layer 108 is formed on the surface on which the bonding metal material layer 105 is formed to obtain a connection layer 110 (FIG. 1E). Metal bonding adhesive (I)
The layer 108 may be formed by a method suitable for the resin to be used. A metal bonding adhesive (I) varnish may be directly applied by printing, curtain coating, bar coating, or the like, or a dry film with a supporting film may be formed. There is a method of forming the metal bonding adhesive (I) layer by vacuum laminating, vacuum pressing or the like. Although the function of the metal bonding adhesive (I) layer 108 will be described later in detail, it has two functions of a metal surface cleaning function and a bonding function. The former is a function necessary for realizing solder bonding, and the latter is a function necessary for bonding the interlayer insulating material (II) layer 101 and the connected layer 111, and both are indispensable. Although FIG. 1E shows an example in which the metal bonding adhesive (I) layer 108 is formed on the surface of the interlayer insulating material (II) layer 101, the metal bonding adhesive ( I) The layer 108 may be formed. Of course, the interlayer insulating material (II) layer 101 and the connected layer 1
11 may be formed on both surfaces.

Next, the connection layer 110 and the connected layer 111 obtained above are aligned (FIG. 1F). The alignment can be performed by a method of reading a positioning mark formed in advance on the connection layer 110 and the connected layer 111 with an image recognition device, a method of positioning with a positioning pin or the like, or the like. . FIG. 1 (f)
In the above, the connection layer 111 is shown as an example obtained by the same method as the connection layer 110 obtained above, but a circuit formed on a hard plate may be used.

Next, the connecting layer 110 and the connected layer 111
Are laminated. As a laminating method, for example, using a vacuum press, the conductor post 104 is made of a metal bonding adhesive (I).
The conductor post 104 and the pad 106a are metal-bonded via the 108 layer until the bonding metal material layer 105 is bonded to the pad 106a of the connected layer 111 by the bonding metal material layer 105. Subsequently, the interlayer insulating material (II) layer 101 is further heated.
And the metal bonding adhesive (I) layer 108 are integrally cured to bond the connection layer 110 and the layer to be connected 111 (FIG. 1).
(G)). It is essential that the final heating temperature is equal to or higher than the melting point of the joining metal material.

Through the above steps, the wiring pattern of each layer and the conductor post are metal-bonded with the metal material for bonding, and the metal bonding adhesive (I) 108 and the interlayer insulating material (II) layer 10
1 and a multilayer wiring board insulated reliably by the interlayer insulating material (II) layer 101 can be manufactured.

Next, a second embodiment of the present invention will be described with reference to the drawings, but the present invention is not limited thereto. 2 to 4 are views for explaining an example of a method for manufacturing a multilayer wiring board according to a second embodiment of the present invention, and FIG. 4 (n) is a cross-sectional view showing the structure of the obtained multilayer wiring board. It is.

As a second method for manufacturing a multilayer wiring board of the present invention, first, a patterned plating resist 202 is formed on a metal plate 201 (FIG. 2A). The plating resist 202 can be formed by, for example, laminating an ultraviolet-sensitive dry film resist on the metal plate 201, selectively exposing the film using a negative film or the like, and then developing it. The material of the metal plate 201 may be any material as long as it is suitable for this manufacturing method. In particular, the material has resistance to a used chemical solution and can be finally removed by etching. It is necessary. Examples of the material of such a metal plate 201 include copper, copper alloy, 42 alloy, and nickel.

Next, a resist metal 203 is formed by electrolytic plating using the metal plate 201 as a lead (electrode for power supply) for electrolytic plating (FIG. 2B). By this electrolytic plating, a resist metal 203 is formed on a portion of the metal plate 201 where the plating resist 202 is not formed. The material of the resist metal 203 may be any material as long as it is suitable for this manufacturing method. In particular, the material is resistant to a chemical used when the metal plate 201 is finally removed by etching. is necessary. As a material of the resist metal 203, for example, nickel, gold, tin,
Silver, solder, palladium and the like. The purpose of forming the resist metal 203 is to prevent the wiring pattern 204 shown in FIG. 2C from being eroded or corroded by a chemical used when etching the metal plate 201. Therefore, a chemical solution used when etching the metal plate 201 is applied to the wiring pattern 2 shown in FIG.
04 is resistant, the resist metal 20
3 is unnecessary. Further, the resist metal 203 does not need to be the same pattern as the wiring pattern 204, and the resist metal 203 may be formed on the entire surface of the metal plate 201 before forming the plating resist 202 on the metal plate 201.

Next, a wiring pattern 204 is formed by electrolytic plating using the metal plate 201 as a lead (electrode for power supply) for electrolytic plating (FIG. 2C). By this electrolytic plating, a wiring pattern 204 is formed on a portion of the metal plate 201 where the plating resist 202 is not formed. As the material of the wiring pattern 204, any material may be used as long as it is suitable for this manufacturing method. is necessary. Actually, since the wiring pattern 204 is finally present inside the multilayer wiring board 213, the resist metal 2 that can be etched with a chemical solution that does not corrode or corrode the wiring pattern 204 is used.
It is a good idea to select 03. Examples of the material of the wiring pattern 203 include copper, nickel, gold, tin, silver, and palladium. Furthermore, by using copper, a low-resistance and stable wiring pattern 204 can be obtained.

Next, the plating resist 202 is removed (FIG. 2D), and then a semi-cured interlayer insulating material (II) layer 205 is formed on the formed wiring pattern 204 (FIG. 2E). )). The semi-cured interlayer insulating material (II) layer 205 is formed by directly applying a resin varnish by printing, curtain coating, bar coating, or the like, or by vacuum coating the interlayer insulating material (II) layer of a dry film with a support film. A method of laminating by a method such as lamination or vacuum pressing may be used. The dry film with a support film may further have a protective film layer formed thereon. In particular, in the vacuum laminating method using a dry film with a support film, the interlayer insulating material (II) layer is temporarily pressed on the wiring pattern 204 in a vacuum,
By performing a heat treatment in the air, the unevenness of the wiring pattern 204 can be embedded and planarized. Finally, if the support film is peeled off, an extremely smooth surface of the interlayer insulating material (II) layer 205 can be obtained without being affected by the unevenness of the wiring pattern 204. Further, by using a dry film having a known thickness in advance, the thickness of the interlayer insulating material (II) layer can be reliably controlled. The semi-cured state of the interlayer insulating material (II) layer 205 can be controlled by pre-curing the raw material to be used or by pre-curing the interlayer insulating material (II) layer formed on the wiring pattern 204 by heat treatment. is there. Since the interlayer insulating material (II) layer 205 is in a semi-cured state,
The adhesive strength and heat resistance at the interface between the interlayer insulating material (II) layer 205 and the metal bonding adhesive (I) layer 209 can be integrally cured with the metal bonding adhesive (I) layer 209 shown in (i). Significantly improved.

Next, a via 206 is formed in the formed semi-cured interlayer insulating material (II) layer 205 (FIG. 2).
(F)). The method of forming the via 206 may be any method as long as it is a method suitable for this manufacturing method, and is more preferably a laser method.

Next, the conductor post 207 is formed by electrolytic plating using the metal plate 201 as a lead (electrode for power supply) for electrolytic plating (FIG. 3 (g)). By this electrolytic plating, a conductor post 207 is formed in a portion of the interlayer insulating material (II) layer 205 where the via 206 is formed. If the conductor post 207 is formed by electrolytic plating, the shape of the tip of the conductor post 207 can be freely controlled. The material of the conductor post 207 may be any material as long as it is suitable for this manufacturing method, and examples thereof include copper, nickel, gold, tin, silver, and palladium. Further, by using copper, the conductor posts 2 having a low resistance and stability can be obtained.
07 is obtained. Further, the conductor post 207 may be made of the same material as the bonding metal material layer 208. By making the conductor post 207 the same material as the joining metal material layer 208, the conductor post 207 and the joining metal material layer 208 can be simultaneously formed, and there is an advantage that the processing steps can be shortened. The material of the joining metal material will be described later.

Next, the surface (tip) of the conductor post 207
Then, a bonding metal material layer 208 is formed (FIG. 3).
(H)). As a method for forming the bonding metal material layer 208, a method for forming the metal plate 201 by electroless plating, a method for forming the metal plate 201 as an electrolytic plating lead (electrode for power supply) by electrolytic plating, and a method for forming a paste containing the bonding metal material are used. There is a printing method. In the method by printing, it is necessary to accurately align the printing mask with the conductor post 207. In the method by electroless plating or electrolytic plating, the bonding metal material layer 208 is formed on the surface other than the surface of the conductor post 207. Conductor post 2
It is easy to cope with miniaturization and high density of 07. In particular, the method using electroplating is very suitable because the metal that can be plated is more diverse and the management of the chemical solution is easier than the method using electroless plating. As the material of the joining metal material, any metal can be used as long as it is a metal that can be joined to the joined portion 212 shown in FIG.
An example is solder. Among solders, Sn and I
n or Sn, Ag, Cu, Zn, Bi, Pd, S
It is preferable to use at least two kinds of solders of b, Pb, In, and Au. More preferably, it is an environment-friendly Pb-free solder. Although FIG. 3H shows an example in which the joining metal material layer 208 is formed on the surface of the conductor post 207, the purpose of forming the joining metal material layer 208 is to form Therefore, the bonding metal material layer 208 may be formed on the portion 212 to be bonded. Of course, conductor post 2
07 and both surfaces of the part 212 to be joined may be formed.

Next, a metal bonding adhesive (I) layer 209 is formed on the surface (tip) of the interlayer insulating material (II) layer 205 (FIG. 3 (i)). The method of forming the metal bonding adhesive (I) layer 209 may be any method suitable for the resin used, and the metal bonding adhesive (I) varnish may be directly applied by printing, curtain coating, bar coating, or the like, A method of laminating the metal bonding adhesive (I) layer 209 of the dry film with the support film by a method such as vacuum lamination or vacuum press is used. Although the function of the metal bonding adhesive (I) layer 209 will be described later in detail, it has two functions of a metal surface cleaning function and an adhesion function. The former is a function necessary for realizing solder bonding, and the latter is a function necessary for bonding the interlayer insulating material (II) layer 205 and the connected layer 211, and both are indispensable. Although FIG. 3 (i) shows an example in which the metal bonding adhesive (I) layer 209 is formed on the surface of the interlayer insulating material (II) layer 205, the metal bonding adhesive ( I) The layer 209 may be formed. Of course, the interlayer insulating material (II) layer 205
1 may be formed on both surfaces.

Next, the connection layer 2 obtained by the above steps
10 and the connection target layer 211 are aligned (FIG.
(J)). For the alignment, a method of reading and positioning a positioning mark formed in advance on the connection layer 210 and the connected layer 211 with an image recognition device, a method of positioning with a positioning pin or the like, or the like can be used. . In FIG. 3 (j), as the connected layer 211,
Although an example is shown in which a core substrate such as FR-4 used to impart rigidity to the multilayer wiring board 213 shown in FIG. 4N is used, the wiring pattern 204 is formed on the metal plate 201 shown in FIG. Can be used. Further, a multilayer wiring board 213 shown in FIG. 4 (m) which is being manufactured may be used.

Next, the connection layer 210 and the connected layer 211
Are laminated (FIG. 3 (k)). As a lamination method, for example, using a vacuum press, the conductor post 207 is heated and heated until it is joined to the portion 212 to be joined by the joining metal material layer 208 excluding the metal joining adhesive (I) layer 209. Then, the conductor post 207 and the portion to be joined 212 are metal-joined. Then, further heat the interlayer insulating material (II) layer 2
05 and the metal bonding adhesive (I) layer 209 are integrally cured to bond the bonding layer 210 and the layer 211 to be bonded. It is essential that the final heating temperature is equal to or higher than the melting point of the joining metal material.

Next, the metal plate 201 is removed by etching (FIG. 4 (l)). Metal plate 201 and wiring pattern 2
Since the resist metal 203 is formed between the resist metal 203 and the resist metal 203, the resist metal 203 is resistant to a chemical used when the metal plate 201 is removed by etching. However, the resist metal 203 is not eroded or corroded, and as a result, the wiring pattern 204 is not eroded or corroded. Metal plate 2
When the material of No. 01 is copper and the material of the resist metal is nickel, tin or solder, a commercially available ammonia-based etchant can be used. When the material of the metal plate 201 is copper and the material of the resist metal is gold, almost any etching solution can be used, including a ferric chloride solution and a cupric chloride solution.

Next, the resist metal 203 is removed by etching (FIG. 4 (m)). The wiring pattern 204
Since the resist metal 203 has resistance to a chemical solution used for removing by etching, the wiring pattern 2
04 is not eroded or corroded. Therefore, by removing the resist metal 203, the wiring pattern 2 is removed.
04 is exposed. The resist metal 203 may be left without being removed if necessary. When the material of the wiring pattern 204 is copper and the material of the resist metal is nickel, tin, or solder, a commercially available solder / nickel stripping agent (for example, Pegasx, manufactured by Mitsubishi Gas Chemical Co., Ltd.) can be used. The material of the wiring pattern 204 is copper, resist metal 2
When the material of 03 is gold, it is difficult to etch the resist metal 203 without eroding or corroding the wiring pattern 204. In this case, the resist metal 20
The step of etching 3 may be omitted.

Finally, the above-mentioned process, that is, FIG.
4 (m) is repeated to obtain a multilayer wiring board 213 (FIG. 4 (n)). That is, by using the one in the process of manufacturing the multilayer wiring board 213 shown in FIG. 4 (m) as a connected layer and performing the laminating step shown in FIG. 2 (j), connection layers are formed on both sides of the core substrate. The obtained layer is used as a connected layer to perform the laminating step shown in FIG. 2 (j), and by repeating these steps, a multilayer wiring board 213 can be obtained. FIG. 4 (n) shows a multilayer wiring board 213 in which two connection layers are laminated on both sides of the core substrate 216. Solder resists 215 are formed on both surfaces of the multilayer wiring board 213. The solder resist 215 has openings at the inner pad 214a and the outer pad 214b.

By the above steps, the wiring pattern 2 of each layer
04 and the conductor post 207 are metal-bonded with a metal material layer 208 for bonding, and a semi-cured interlayer insulating material (II) layer 205 is formed.
And the metal bonding adhesive (I) layer 209 are integrally cured to produce a multilayer wiring board in which the respective layers are bonded.

Next, a method for manufacturing a multilayer wiring board according to a third embodiment of the present invention will be described. FIGS. 2A to 3H show a method for manufacturing a multilayer wiring board according to the third embodiment.
The steps up to this step are the same as the method for manufacturing a multilayer wiring board according to the second embodiment. Next, a metal bonding adhesive (I) layer 2 is formed on the surface (tip) of the bonding metal material layer 208 in FIG.
09 ′ is partially formed so as to cover the bonding metal material layer 208 (FIG. 5 (i ′)). The region where the metal bonding adhesive (I) layer 209 ′ is formed is at least the bonding metal material layer 2.
08 may be covered, and the formation area is not particularly limited. In FIG. 5 (i ′), the bonding metal material layer 2
Although the example in which the metal bonding adhesive (I) layer 209 ′ is partially formed on the surface of the substrate 08 is shown, the metal bonding adhesive (I) layer 209 ′ is partially formed on the surface of the portion 212 to be bonded. No problem. Of course, it may be formed partially on both surfaces of the joining metal material layer 208 and the joined layer 212. The metal bonding adhesive (I) layer 209 ′ may be formed by a method suitable for the resin used, such as printing a metal bonding adhesive (I) varnish or applying a photosensitive metal bonding adhesive (I). It may be used and formed by imaging. Metal bonding adhesive (I)
The function of the layer 209 'will be described later in detail, but it has two functions of a metal surface cleaning function and a bonding function. In the subsequent steps, the connection layer 21 is formed by the interlayer insulating material (II) layer 205.
This is the same as the method for manufacturing a multilayer wiring board according to the second embodiment, except that the connection layer 211 is bonded to the connection layer 211. The method for manufacturing a multilayer wiring board according to the third embodiment is different from the method for manufacturing a multilayer wiring board according to the second embodiment in that an interlayer insulating material (II) layer having high adhesive strength and excellent physical properties is provided. In addition, since the connection layer 210 and the connection target layer 211 are bonded, a more reliable multilayer wiring board can be obtained.

The semiconductor chip 3 is placed on the inner pad 214a side of the multilayer wiring board 213 obtained by the above-described steps.
The semiconductor device 301 can be obtained by mounting No. 02 and mounting a solder ball on the outer pad 214b side (FIG. 6).

Next, a method for manufacturing the fourth multilayer wiring board of the present invention will be described. The method for manufacturing the fourth multilayer wiring board is as follows.
The steps from FIG. 2A to FIG. 3I are the same as the method for manufacturing the second multilayer wiring board. Next, the metal plate 201 of the connection layer 210 obtained in FIG. 3I is removed by etching (FIG. 7J), and the resist metal layer 203 is further removed by etching (FIG. 7K )). Wiring pattern 20
When the material of No. 4 is copper and the material of the resist metal layer 203 is gold, the wiring pattern 204 is not eroded or corroded,
It is difficult to etch the resist metal layer 203. In this case, the step of etching the resist metal layer 203 may be omitted.

In the above-described manufacturing method, the connection layer 210a is obtained by forming the metal bonding adhesive (I) layer 209 and then removing the metal plate 201 and the resist metal layer 203 by etching. However, after the metal plate 201 and the resist metal layer 203 are removed by etching, the metal bonding adhesive (I) layer 209 may be formed. Also,
FIG. 3 (i) shows an example in which the metal bonding adhesive (I) layer 209 is formed on the surface of the interlayer insulating material (II) layer 205.
After the metal plate 201 and the resist metal layer 203 are removed by etching, a metal bonding adhesive (I) layer 209 may be formed on the exposed wiring pattern 204 side.

Subsequently, the connection layer 210a obtained by the above-described steps and the connection layer 210 obtained by the same steps
Positions b to 210d and the connected layer 211a are aligned (FIG. 7 (l)). The alignment is performed by using the connection layers 210a to 21a.
A method of reading and positioning the positioning marks formed in advance on the 0d and the connected layer 211a with an image recognition device, a method of positioning with a positioning pin or the like, or the like can be used. In FIG. 7L, the multilayer wiring board 21 shown in FIG.
Although an example is shown in which a core substrate such as FR-4 used for giving rigidity to 2a is used, a metal substrate 201 having only a wiring pattern 204 formed thereon as shown in FIG. Alternatively, a connection layer may be laminated only on one side.

Finally, the connection layers 210a to 210d and the connected layer 211a are collectively heated and pressurized to melt all the bonding metal material layers 208 at a time to perform interlayer connection. 212a is obtained (FIG. 7 (m)). As a method of heating and pressurizing, for example, using a vacuum press,
The conductor post 207 is heated and pressurized until the metal bonding adhesive (I) layer 209 is removed by joining the opposing wiring pattern and the bonding metal material, and then further heated.
Interlayer insulating material (II) layer 205 and metal bonding adhesive (I) layer 2
09 is integrally cured, and the connection layers 210a to 210d are bonded to the connection target layer 211a. It is essential that the final heating temperature is equal to or higher than the melting point of the joining metal material.

In FIG. 7 (l), the metal plate of the connection layers 210c and 210d superimposed on the outermost layer may be left without being etched, and the metal plate may be etched and removed after heating and pressing. Absent. By leaving the metal plate of the outermost layer, it is possible to avoid that the wiring pattern of the outermost layer is not exposed and the wiring pattern is damaged in the heating / pressing process. In FIG. 3 (i),
The metal bonding adhesive (I) layer may be partially formed so as to cover the bonding metal material layer.

According to the above steps, the wiring pattern of each layer and the conductor post are metal-bonded with the bonding metal material, and the interlayer insulating material (II) layer and the metal bonding adhesive (I) layer are integrally cured between the respective layers. Thus, a multilayer wiring board bonded by bonding can be manufactured.

The most significant features of the method for manufacturing a multilayer wiring board according to the first to fourth embodiments of the present invention are the following five points. (1) By integrally curing the semi-cured interlayer insulating material (II) layer 205 and the metal bonding adhesive (I) layer 209,
Interlayer insulating material (II) layer 205 and metal bonding adhesive (I) layer 2
The adhesion and heat resistance at the interface of No. 09 are remarkably improved. (2) There is no need to polish the insulating layer, and the insulating layer can be formed to a stable thickness. (3) In the method for manufacturing a multilayer wiring board according to the third and fourth embodiments, the wiring pattern 204 and the conductor posts can be formed by electrolytic plating. (4) In the method for manufacturing a multilayer wiring board according to the third and fourth embodiments, since the metal plate 201 to be finally removed is used as a lead for electrolytic plating, the wiring pattern 204
It is not necessary to provide a special lead for electrolytic plating or to form a lead for electrolytic plating by electroless plating or sputtering after forming the wiring pattern 204. (5) In the method for manufacturing a multilayer wiring board according to the fourth embodiment, since heating and pressing are performed only once, the manufacturing time is significantly longer as compared with the method of performing heating and pressing for each layer. Shortening can be achieved.

The metal bonding adhesive (I) used in the present invention is:
It is preferable that the adhesive has a surface cleaning function and high insulation reliability. The surface cleaning function includes, for example, a function of removing an oxide film present on the surface of the bonding metal material layer and the surface of the metal to be connected, and a function of reducing the oxide film. By the surface cleaning function of the metal bonding adhesive (I), the wettability with the surface for connection with the bonding metal material layer is sufficiently increased. Therefore, in order to clean the metal surface, the metal bonding adhesive (I) must always be in contact with the surface to be connected to the bonding metal material layer. By cleaning both surfaces, the force of the joining metal material layer to wet and spread on the surface to be joined works, and the force of the wetting and spreading of the joining metal material layer causes the metal joining at the metal joining portion. Adhesive (I) is eliminated. As a result, in metal bonding using the metal bonding adhesive (I), resin residue hardly occurs, and the electrical connection reliability is high.

The first preferred metal bonding adhesive (I) used in the present invention comprises a resin (A) having at least one or more phenolic hydroxyl groups and a resin (B) acting as a curing agent for the resin (A). The phenolic hydroxyl group of the resin (A) having a phenolic hydroxyl group removes dirt such as oxide on the bonding metal material layer and the metal surface or reduces the oxide by its surface cleaning function,
Acts as a flux for metal bonding. Further, since a good cured product can be obtained by the resin (B) acting as a curing agent, cleaning and removal after metal bonding is not required, and electrical insulation is maintained even in a high-temperature and high-humidity atmosphere. Enables highly reliable metal bonding.

The resin (A) having at least one phenolic hydroxyl group used in the first preferred metal bonding adhesive (I) in the present invention includes a phenol novolak resin, an alkylphenol novolak resin, a resole resin, and a cresol novolak. It is preferably selected from a resin and a polyvinylphenol resin, and one or more of these can be used.

The resin (A) having a phenolic hydroxyl group used for the first preferred metal adhesive in the present invention comprises:
As the resin (B) acting as a curing agent, an epoxy resin, an isocyanate resin, or the like is used. Specifically, all of them are based on phenols such as bisphenols, phenol novolaks, alkylphenol novolaks, biphenols, naphthols and resorcinols, and skeletons such as aliphatic, cycloaliphatic and unsaturated aliphatic. Examples thereof include modified epoxy compounds and isocyanate compounds.

The resin (A) having a phenolic hydroxyl group used in the first preferred metal bonding adhesive (I) in the present invention has a preferable lower limit of 2% in the adhesive (I).
At 0 wt%, a preferred upper limit is included at 80 wt%, and a more preferred upper limit is 60 wt%. If it is less than the lower limit, the effect of cleaning the metal surface may be reduced. On the other hand, if it is more than the upper limit, a sufficient cured product may not be obtained, in which case the bonding strength and reliability are reduced. On the other hand, the resin (B) acting as a curing agent contains 20 wt% or more and 80 wt% in the adhesive (I).
% Is preferable. Further, a colorant, a curing catalyst, an inorganic filler, various coupling agents, a solvent, and the like may be added to the resin used for the metal bonding adhesive (I).

The second preferred metal bonding adhesive (I) used in the present invention comprises an epoxy resin (C) and a compound (D) having an imidazole ring and acting as a curing agent for the epoxy resin (C). , As an essential component, compound (D)
The imidazole ring has a surface cleaning function caused by the unpaired electrons of the tertiary amine, which removes dirt such as oxide on the bonding metal material layer and the metal surface, or reduces the oxide film to form a metal bonding flux. Works. Furthermore, since the imidazole ring also acts as a curing agent when anionically polymerizing the epoxy resin (C), it is possible to obtain a good cured product, and it is not necessary to wash and remove the solder after soldering.
It maintains electrical insulation even in a humid atmosphere, and enables metal bonding with high bonding strength and high reliability.

In the present invention, the addition amount of the compound (D) used for the second preferable metal bonding adhesive (I) is such that the lower limit is preferably 1 wt% and the upper limit is preferably 10 w%.
t%, and a more preferable upper limit is 5 wt%. If the amount of the compound (D) is less than the lower limit, the surface cleaning function may be reduced, or the epoxy resin (C) may not be sufficiently cured. If the amount of the compound (D) is larger than the above upper limit, the curing reaction proceeds rapidly, the fluidity of the metal bonding adhesive (I) layer at the time of metal bonding is reduced, and metal bonding is inhibited. There is fear. Furthermore, the obtained cured product may become brittle, and a metal joint having sufficient strength may not be obtained.

In the present invention, the epoxy resin (C) used in combination with the compound (D) in the second preferred metal bonding adhesive (I) includes bisphenol, phenol novolak, alkylphenol novolak, biphenol, and the like. Such as naphthol and resorcinol,
Examples include phenol-based epoxy resins and epoxy compounds modified based on a skeleton of an aliphatic, cycloaliphatic or unsaturated aliphatic.

The compound (D) having an imidazole ring and acting as a curing agent for the epoxy resin (C) used in the second preferred metal bonding adhesive (I) in the present invention includes imidazole, 2-methylimidazole, 2-ethyl-4-methylimidazole, 2-phenylimidazole, 1-benzyl-2-methylimidazole, 2-undecylimidazole, 2-phenyl-4-methylimidazole, bis (2-ethyl-4-methyl-imidazole) 2-phenyl-4-methyl-5-hydroxymethylimidazole, 2-phenyl-4,5-dihydroxymethylimidazole, 1-cyanoethyl-2-ethyl-
Examples thereof include 4-methylimidazole, 1-cyanoethyl-2-methylimidazole, 1-cyanoethyl-2-phenylimidazole, and triazine-added imidazole. In addition, epoxy adducts or microencapsulated ones of these can also be used. These may be used alone or in combination of two or more.

In the present invention, the blending amount of the epoxy resin (C) used for the second preferable metal bonding adhesive (I) is such that a preferable lower limit is 30 wt% with respect to the whole metal bonding adhesive (I). A preferable upper limit is 99 wt%, and if it is less than the lower limit, a sufficient cured product may not be obtained. Components other than the epoxy resin (C) and the compound (D) acting as a curing agent thereof include, for example, resins used for the metal bonding adhesive (I), such as a cyanate resin, an acrylic resin, a methacrylic resin, and a maleimide resin. A curable resin or a thermoplastic resin may be blended. Further, a colorant, a curing catalyst, an inorganic filler, various coupling agents, a solvent, and the like may be added to the resin used for the metal bonding adhesive (I).

The method of preparing the metal bonding adhesive (I) is, for example, a method of dissolving a resin (A) having a solid phenolic hydroxyl group and a resin (B) acting as a solid curing agent in a solvent, A method in which a resin (A) having a solid phenolic hydroxyl group is dissolved and prepared in a resin (B) acting as a liquid curing agent, and the resin (B) acting as a solid curing agent has a liquid phenolic hydroxyl group. Resin (A)
And a method of dispersing or dissolving a compound (D) having an imidazole ring and acting as a curing agent for the epoxy resin (C) in a solution of the solid epoxy resin (C) dissolved in a solvent. , Liquid epoxy resin (C)
A method of dispersing or dissolving a compound (D) having an imidazole ring and acting as a curing agent for the epoxy resin (C). As a solvent to be used, acetone, methyl ethyl ketone, methyl isobutyl ketone, cyclohexanone, toluene, mesitylene, xylene, hexane, isobutanol, n-butanol, 1-methoxy, 2-propanol acetate, butyl cellosolve,
Ethyl cellosolve, methyl cellosolve, cellosolve acetate, ethyl lactate, ethyl acetate, dimethyl phthalate,
Examples thereof include diethyl phthalate, dibutyl phthalate, diethylene glycol, n-butyl benzoate, N-methylpyrrolidone, N, N-dimethylformamide, tetrahydrofuran, γ-butyl lactone, and anisole.
Preferably, the solvent has a boiling point of 200 ° C. or lower.

As the interlayer insulating material (II) used in the present invention, any of a thermoplastic resin and a thermosetting resin can be used.
As the thermoplastic resin, polyamide, polyimide, polyamide imide, polyether imide, polyester imide, polyether ether ketone, polyphenylene sulfide, polyquinoline, polynorbornene, polybenzoxazole, polybenzimidazole and the like can be used. Epoxy, phenol, bismaleimide, bismaleimide triazine, triazole, cyanate, isocyanate, benzocyclobutene, and the like can be used as the thermosetting resin. These resins may be used alone or in combination of two or more. Further, an inorganic filler such as a silica filler, a leveling agent, a coupling agent, an antifoaming agent, a curing catalyst, and the like may be added.

In the case where a thermosetting resin is used for the interlayer insulating material (II), when the metal bonding adhesive (I) layer is hardened, the interlayer insulating material (II) layer is hardened at the same time. The adhesion at the interface between the bonding adhesive (I) layer and the interlayer insulating material (II) layer is high, and the reliability is significantly improved.

Preferred interlayer insulating material (II) used in the present invention
As, among the thermosetting resins, a cyanate resin,
An insulating material containing a thermoplastic resin as an essential component is exemplified. Cyanate resin has adhesiveness, moldability (low-temperature processability), heat resistance, reliability under high temperature, and electrical characteristics. Thermoplastic resin has excellent toughness, flexibility, and adhesiveness. By using both components as essential components, a balanced material is obtained. As the blending amount of the cyanate resin and the thermoplastic resin, with respect to 100 parts by weight of the cyanate resin, the thermoplastic resin has a preferred lower limit of 10 parts by weight and a preferred upper limit of 300 parts by weight, more preferably, The lower limit of the blending amount of the thermoplastic resin is 15 parts by weight, and the upper limit is 200 parts by weight. More preferably, the lower limit is 20 parts by weight and the upper limit is 100 parts by weight. When the amount of the thermoplastic resin is less than the lower limit, the toughness and flexibility of the interlayer insulating material (II) may be lost.
Moldability (low-temperature processability) may be reduced.

The cyanate resin used for the interlayer insulating material (II) has a trimerization ratio of a cyanate group of 60% or less, and is a compound represented by the general formula (1) or a compound represented by the general formula (2) Or at least one selected from the group of these compounds. A cyanate resin having more than 60% of a cyanate group and trimerization may have poor solubility in a solvent. Specifically, bisphenol-A dicyanate, ethylidenebis-4,1-phenylenediocyanate, tetraorthomethylbisphenol-F dicyanate, phenol novolak polycyanate, cresol novolac polycyanate, dicyclopentadienyl bisphenol dicyanate, hexafluoro Bisphenol A dicyanate and the like, and resins obtained by trimerizing these cyanate groups within the above range.

[0086]

Embedded image (In the formula (1), R _{1 to} R ₆ are each independently a hydrogen atom,
Represents any of a methyl group, a fluoroalkyl group, and a halogen atom. )

[0087]

Embedded image (In the formula (2), R _{1 to} R ₃ are each independently a hydrogen atom,
A methyl group, a fluoroalkyl group, a halogen atom,
n represents an integer of 1 to 6. )

Further, the interlayer insulating material (II) used in the present invention
It is more preferable that metal alkylacetonate is an essential component, and it is more preferable that alkylphenol is an essential component. Metal acetylacetonates and alkylphenols act as curing catalysts for cyanate resins. Therefore, the trimerization ratio of the interlayer insulating material (II) can be reduced to 5 to 80 by heat treatment at a lower temperature and for a shorter time.
% Can be controlled. Also, by adding the metal acetylacetonate and the alkylphenol, the cyanate group of the cyanate resin surely reacts to form a triazine ring,
Good cured products can be obtained.

The metal acetylacetonate used for the interlayer insulating material (II) is a metal chelate in which two or more acetylacetonate ligands are bonded to a central metal atom. Examples of preferred coordinating metals are copper, manganese,
Nickel, cobalt, lead, zinc and tin, aluminum, iron, cobalt and manganese in the trivalent state, and titanium in the tetravalent state. This metal can be in the range of about 10 to 10,000p based on the total weight of the cyanate resin to be cured.
It is preferred to add in the pm range, and a more preferred metal range is about 30-600 ppm.

The alkylphenol used for the interlayer insulating material (II) dissolves metal acetylacetonate powder to form a stable solution. Such alkylphenols are
Generally, it contains one or two alkyl substituents located at the para or ortho position with respect to the phenol group, and the total number of carbon atoms of the alkyl substituent is in the range of 1 to 22. Such alkylphenols are hydrophobic and low volatile, and have relatively low toxicity. Preferred alkylphenols are nonylphenol, dodecylphenol, o
-Cresol, 2-sec-butylphenol and 2,6-dinonylphenol. The most preferred alkyl phenol is nonyl phenol. The compounding amount of the alkylphenol is preferably such that the amount of active hydrogen is 2 to 100 milliequivalents, more preferably 5 to 60 milliequivalents, per equivalent of the cyanate group of the cyanate resin.

The thermoplastic resin used for the interlayer insulating material (II) is preferably made of at least one of polyimide resin and polyether sulfone resin. The polyimide resin is more preferably a solvent-soluble polyimide resin. It is preferable that the polyimide resin is further modified with silicon. The silicon-modified polyimide resin is a resin obtained by modifying a highly heat-resistant and rigid polyimide resin with a siloxane skeleton, and has excellent toughness, flexibility, and adhesiveness. In addition, the compatibility with the cyanate resin is extremely good due to the provision of the silicon skeleton, and the obtained interlayer insulating material (II)
Has excellent toughness and flexibility. Further, polyethersulfone resins are preferable because they can impart flame retardancy in addition to toughness, flexibility, and adhesiveness. In addition, interlayer insulation material (II)
In addition, a resin such as an epoxy resin, an acrylic resin, a maleimide resin, a fluorine resin, a bromo resin, and a silicone resin may be used alone or in combination. Further, an inorganic filler such as a silica filler, a leveling agent, a coupling agent, an antifoaming agent, a curing catalyst, and the like may be added.

In the present invention, when a cyanate resin is used, the interlayer insulating material (II) layer is not cured in a semi-cured state.
Preferably, 80 to 80% contains a trimerized cyanate resin, and more preferably, the upper limit of the trimerization rate of the cyanate resin is 15% or more and 70% or less. 3 in semi-cured state
When the quantification ratio is lower than 5%, when a laser is used at the time of forming the via, the interlayer insulating material around the via due to the heat (II)
There is a possibility that the surface of the layer melts and the via shape becomes poor. On the other hand, when the trimerization ratio is higher than 80%, there is no problem in forming vias by laser and forming conductor posts by electrolytic plating. is there.

The solvent for the interlayer insulating material (II) used in the present invention is not particularly limited as long as it can dissolve the polyimide resin. Specifically, N, N-dimethylformamide,
N, N-dimethylacetamide, N, -methyl-2-pyrrolidone, anisole, 1,4-dioxane, gamma-
Butyl lactone, diglyme, cyclohexanone and the like. Also, these solvents may be used alone,
Two or more types may be used as a mixture.

[0094]

EXAMPLES The present invention will be described in more detail with reference to the following Examples, but it should not be construed that the invention is limited thereto.

In order to confirm the effectiveness of the multilayer wiring board of the present invention and the method of manufacturing the multilayer wiring board, Example 1 shown below was used.
~ 13 multilayer wiring boards are manufactured, and the cross section of the metal joint is observed.
A temperature cycle test and an insulation reliability test were performed, and the evaluation results are summarized in Table 1.

[Example 1] m, p-cresol novolak resin (PAS-1 manufactured by Nippon Kayaku Co., Ltd., OH group equivalent: 120)
100 g and bisphenol F type epoxy resin (RE-404S, Nippon Kayaku Co., Ltd., epoxy equivalent: 165) 140
g was dissolved in 60 g of cyclohexanone, and triphenylphosphine (manufactured by Hokko Chemical Industry Co., Ltd.) was used as a curing catalyst.
0.2 g was added to prepare a metal bonding adhesive (I) varnish.

Next, bisphenol-A dicyanate (AroCyB30 manufactured by Asahi Ciba Co., Ltd., trimerization ratio 30%)
100 g, 250 g of a silicon-modified polyimide varnish having a glass transition temperature Tg of 250 ° C. dissolved in N-methylpyrrolidone (NMP) (250% by weight of resin), and cobalt (III) acetylacetonate (Wako Pure Chemical Industries) in advance.
A solution obtained by mixing and dissolving 06 g and 2 g of 4-nonylphenol (manufactured by Kishida Chemical) was mixed and stirred to produce an interlayer insulating material (II) varnish.

Rolled copper plate (metal plate 201) of 150 μm thickness with a roughened surface (EFTEC-6, manufactured by Furukawa Electric Co., Ltd.)
4T: trade name), roll-laminated with dry film resist (AQ-2058: trade name, manufactured by Asahi Kasei Corporation)
Exposure and development were performed using a predetermined negative film to form a plating resist (plating resist 202) necessary for forming the wiring pattern 204. Next, using a rolled copper plate as a lead for electrolytic plating, nickel (resist metal 203) was formed by electrolytic plating, and further, electrolytic copper plating was performed to form a wiring pattern (wiring pattern 204). Wiring pattern: line width / line space / thickness = 20 μm / 20 μm
/ 10 μm. The interlayer insulating material (II) varnish obtained above was applied to a polyester (PET) film and dried at 80 ° C. for 10 minutes and at 130 ° C. for 10 minutes to form a 25 μm thick interlayer insulating material (II) layer. The interlayer insulating material (II) layer with PET film is formed by vacuum lamination while embedding the unevenness of the wiring pattern, and the PET film is peeled off.
An interlayer insulating material (II) layer (interlayer insulating material (II) layer 205) having a thickness of 25 μm was formed. After forming the interlayer insulating material (II) layer, heat treatment was performed to control the trimerization ratio of the cyanate resin to 50%.

Next, a via having a diameter of 50 μm (via 206)
Was formed with a UV-YAG laser. Subsequently, the via was filled with copper by performing electrolytic copper plating using the rolled copper plate as a lead for electrolytic plating, and the copper post (conductor post 2) was used.
07) was formed. Next, Sn-Pb eutectic solder (joining metal material layer 208) was formed on the copper post by electrolytic plating using the rolled copper plate as a lead for electrolytic plating. next,
By the bar coating, the metal bonding adhesive (I) varnish obtained above was coated on the surface of the interlayer insulating material (II) layer, that is, Sn-P.
(b) After coating on the surface on which the eutectic solder was formed, the coating was dried at 80 ° C. for 20 minutes to form a metal bonding adhesive (I) layer (metal bonding adhesive (I) layer 209) having a thickness of 10 μm. Through the steps so far, a connection layer (connection layer 210) was obtained.

On the other hand, an FR-5 equivalent glass epoxy resin copper-clad laminate (manufactured by Sumitomo Bakelite) on which a 12 μm thick copper foil was formed was used as a core substrate, and the copper foil was etched to form a wiring pattern and a pad (coated). The joining portion 212) was formed, and the connected layer (the connected layer 211) was obtained. Next, the connection layer obtained by the above-described steps and the positioning mark formed in advance on the connection target layer were read by an image recognition device, and the two were aligned and pre-pressed at a temperature of 100 ° C. Further, the above-described alignment and temporary compression were performed again, and a product in which the connection layers were temporarily compressed on both surfaces of the connected layer could be obtained. This was heated and pressurized at a temperature of 220 ° C. by a press, and the copper post penetrated the metal bonding adhesive (I) layer, and was solder-bonded to the pad, and the connection layer was bonded to both surfaces of the layer to be connected. Next, post-curing was performed at 220 ° C. for 2 hours to integrally cure the metal bonding adhesive (I) layer and the interlayer insulating material (II) layer. Next, the rolled copper plate is etched and removed using an ammonia-based etchant, and a solder / nickel release agent (Petax: trade name, manufactured by Mitsubishi Gas Chemical)
Was used to etch away nickel. Finally, a solder resist (solder resist 215) was formed to obtain a multilayer wiring board (multilayer wiring board 213).

The obtained multilayer wiring board is designed to have a circuit in which 60 metal joints are connected in series on both sides for a temperature cycle test. Further, a comb-shaped wiring pattern having a line width / line interval of 20 μm / 20 μm is simultaneously formed on the multilayer wiring board for an insulation resistance test.

The cross section of the metal bonding portion of the obtained multilayer wiring board was observed with an electron microscope (SEM), and the metal bonding state was evaluated.

After confirming the continuity of the obtained multilayer wiring board,
A temperature cycle test was performed in which one cycle was 10 minutes at -55 ° C and 10 minutes at 125 ° C. The number of samples was 10. Table 1 summarizes the results of the number of disconnection failures after 1000 cycles of the temperature cycle test.

After the initial insulation resistance of the obtained multilayer wiring board was measured, a DC voltage of 5.5 V was applied in an atmosphere of 85 ° C./85% RH, and the insulation resistance was measured after 1000 hours. The applied voltage at the time of measurement was 100 V for 1 minute, and the initial insulation resistance and the insulation resistance after treatment are summarized in Table 1.

[Example 2] In the same manner as in Example 1, except that the interlayer insulating material (II) layer was formed and then heat-treated to reduce the trimerization ratio of the cyanate resin to 70%. To obtain and evaluate a multilayer wiring board.

[Example 3] In Example 1, 100 g of bisphenol-A dicyanate (AroCyB30 manufactured by Asahi Ciba Co., trimerization ratio 30%) used in the production of the interlayer insulating material (II) varnish was used. Phenol novolac polycyanate (PrimasePT1 manufactured by Lonza Co., Ltd.)
(5, trimerization rate: 0%) 80 g, and after forming the interlayer insulating material (II) layer, heat-treat the cyanate resin to reduce the trimerization rate to 10
%, And a multilayer wiring board was obtained and evaluated in the same manner as in Example 1 of the multilayer wiring board.

Example 4 In Example 1, a bisphenol A type novolak resin (Dainippon Ink Chemical Industry) was used in place of 100 g of the m, p-cresol novolak resin used in the production of the metal bonding adhesive (I) varnish. LF47 manufactured by
A multilayer wiring board was obtained and evaluated in the same manner as in Example 1 of the multilayer wiring board except that 100 g of OH equivalent 120) was used.

Example 5 In Example 1, a polyvinyl phenol resin (manufactured by Maruzen Petrochemical Co., Ltd.) was used instead of 100 g of m, p-cresol novolak resin used for preparing the metal bonding adhesive (I) varnish. A multilayer wiring board was obtained and evaluated in the same manner as in Example 1 of the multilayer wiring board except that 100 g of Markalin-M, OH equivalent 120) was used.

Example 6 Bisphenol A type novolak resin (LF4871 manufactured by Sumitomo Durez Co., Ltd., OH equivalent: 12)
0) 120 g, diallyl bisphenol A type epoxy resin (RE-810NM, Nippon Kayaku Co., Ltd., epoxy equivalent 220), and dicyclopentadiene type novolak epoxy resin (XD-1000L, Nippon Kayaku Co., Ltd., epoxy (Equivalent 250) 210 g of methyl ethyl ketone 10
The multilayer wiring board was obtained and evaluated in the same manner as in Example 1 of the multilayer wiring board except that the varnish was dissolved in 0 g to prepare a metal bonding adhesive (I) varnish.

Example 7 m, p-cresol novolak resin (PAS-1, Nippon Kayaku Co., Ltd., OH equivalent: 120) 1
00g and bisphenol F epoxy resin (Nippon Kayaku
RE-404S, epoxy equivalent: 165) 140 g
Was dissolved in 60 g of cyclohexanone to prepare a metal bonding adhesive (I) varnish.
A multilayer wiring board was obtained and evaluated in the same manner as described above.

[Example 8] Phenol novolak resin (PR-HF-3, OH equivalent 106, manufactured by Sumitomo Durez Co., Ltd.) 1
06 g, diallyl bisphenol A type epoxy resin (RE-810NM manufactured by Nippon Kayaku Co., Ltd., epoxy equivalent 22
0) 35 g and 210 g of dicyclopentadiene-type novolak epoxy resin (XD-1000L, Nippon Kayaku Co., Ltd., epoxy equivalent 250) were added to 100 g of methyl ethyl ketone.
And a multilayer wiring board was obtained and evaluated in the same manner as in Example 1 of the multilayer wiring board except that the varnish was prepared.

[Example 9] Phenol novolak resin (PR-53647, manufactured by Sumitomo Durez Co., Ltd., OH equivalent: 106)
106 g and diallyl bisphenol A type epoxy resin (RE-810NM manufactured by Nippon Kayaku Co., Ltd., epoxy equivalent 22
0) 35 g and 210 g of dicyclopentadiene-type novolak epoxy resin (XD-1000L, Nippon Kayaku Co., Ltd., epoxy equivalent 250) were added to 100 g of methyl ethyl ketone.
And a multilayer wiring board was obtained and evaluated in the same manner as in Example 1 of the multilayer wiring board except that the varnish was prepared.

Example 10 Phenol novolak resin (PR-51470, manufactured by Sumitomo Durez Co., Ltd., OH equivalent: 10)
5) Dissolve 100 g and 210 g of diallyl bisphenol A type epoxy resin (RE-810NM, Nippon Kayaku Co., Ltd., epoxy equivalent 220) in 80 g of cyclohexanone, and use 2-phenyl-4,5-dihydroxymethylimidazole as a curing catalyst. (2PHZ manufactured by Shikoku Chemical Industry Co., Ltd.)
-PW) was obtained in the same manner as in Example 1 of the multilayer wiring board, except that 0.3 g of PW) was added and a metal bonding adhesive varnish was prepared, and evaluated.

Example 11 Bisphenol F type epoxy resin (RE-404S, manufactured by Nippon Kayaku Co., Ltd., epoxy equivalent: 1)
65) 30 g of cresol novolak epoxy resin (EOCN-1020-65, manufactured by Nippon Kayaku Co., Ltd., epoxy equivalent 200) is dissolved in 60 g of cyclohexanone, and 2-phenyl-4-methyl-5- is used as a curing agent. Hydroxymethyl imidazole (Shikoku Chemical Industry Co., Ltd. 2
P4MHZ-PW, melting point 192 ° C to 197 ° C) 1.5 g
A multilayer wiring board was obtained and evaluated in the same manner as in Example 1 of the multilayer wiring board except that the varnish was added and a metal bonding adhesive (I) varnish was prepared.

Example 12 In place of 1.5 g of 2-phenyl-4-methyl-5-hydroxymethylimidazole used in Example 11, 2-phenyl-4-methyl-5-
A multilayer wiring board was obtained and evaluated in the same manner as in Example 11 of the multilayer wiring board, except that 3 g of hydroxymethylimidazole was used.

Example 13 In place of 1.5 g of 2-phenyl-4-methyl-5-hydroxymethylimidazole used in Example 11, 2-phenyl-4-methyl-5-
A multilayer wiring board was obtained and evaluated in the same manner as in Example 11 of the multilayer wiring board except that 5 g of hydroxymethylimidazole was used.

[0117]

[Table 1]

As can be seen from the evaluation results shown in Table 1,
The multilayer wiring board of the present invention, and the multilayer wiring board manufactured by the method of manufacturing a multilayer wiring board of the present invention can be reliably metal-joined, no disconnection failure occurs in the temperature cycle test, and the insulation resistance does not change even in the insulation resistance test. Did not decrease. Therefore, the effects of the multilayer wiring board of the present invention and the manufacturing method thereof are apparent.

[0119]

According to the present invention, the interlayer insulating layer is provided with a metal adhesive (I) layer having a function of cleaning a metal surface and having high insulation reliability, and an interlayer insulation layer having excellent resin properties and high reliability. By having a two-layer structure of the material (II) layer, the interlayer connection can be reliably performed, and the interlayer insulation reliability other than at the junction is high.
In addition, it is possible to provide a multilayer wiring board having a high interlayer adhesion strength, a method of manufacturing the same, and a semiconductor device.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a method for manufacturing a multilayer wiring board according to a first embodiment of the present invention.

FIG. 2 is a sectional view illustrating a method for manufacturing a multilayer wiring board according to a second embodiment of the present invention.

FIG. 3 is a cross-sectional view illustrating a method for manufacturing a multilayer wiring board according to a second embodiment of the present invention (continuation of FIG. 2).

FIG. 4 is a cross-sectional view illustrating the method for manufacturing the multilayer wiring board according to the second embodiment of the present invention (continuation of FIG. 3).

FIG. 5 is a cross-sectional view illustrating a method for manufacturing a multilayer wiring board according to a third embodiment of the present invention.

FIG. 6 is a cross-sectional view showing a semiconductor device manufactured using the multilayer wiring board according to the embodiment of the present invention.

FIG. 7 is a sectional view illustrating a method for manufacturing a multilayer wiring board according to a fourth embodiment of the present invention.

[Explanation of symbols]

101, 205 Interlayer insulating material (II) layer 102 Conductor foil 103, 206 Via 104, 207 Conductor post 105, 208 Metallic material layer 106, 106a Pad 107, 204 Wiring pattern 108, 209, 209 'Metal bonding adhesive ( I) Layer 109 Insulating layer 110, 210, 210a, 210b, 210c, 21
0d connection layer 111, 211, 211a connected layer 112, 213, 212a multilayer wiring board 201 metal plate 202 plating resist 203 resist metal 212 bonded part 214a inner pad 214b outer pad 215 solder resist 216 core substrate 301 semiconductor device 302 semiconductor chip 303 Bump 304 Underfill 305 Solder ball

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 23/14 H01L 23/14 R (72) Inventor Takeshi August Satoshi 2-5 Higashishinagawa, Shinagawa-ku, Tokyo No. 8 Sumitomo Bakelite Co., Ltd. F-term (reference) 5E346 AA12 AA15 AA16 AA22 AA32 AA43 AA51 BB11 BB16 CC02 CC08 CC32 CC52 CC54 DD02 DD22 DD32 DD33 DD44 DD46 DD47 EE06 EE12 EE18 EE31 EE33 FF18 FF18 FF18 FF18 FF04 GG19 GG22 GG25 GG28 HH11 HH26 HH31

Claims (39)

[Claims] 1. A conductor post for interlayer connection, a wiring pattern having a pad for connecting to the conductor post, a joining metal material layer for joining the conductor post and the pad, A multi-layer wiring board having an insulating layer having a two-layer structure comprising a metal bonding adhesive (I) layer and an interlayer insulating material (II) layer, and wherein the interlayer connection is bonded. A multilayer wiring board characterized by metal bonding by a metal material layer for use. 2. The insulating layer according to claim 1, wherein the insulating layer has a two-layer structure obtained by integrally curing a metal bonding adhesive (I) layer and a semi-cured interlayer insulating material (II) layer. Multilayer wiring board. 3. The multilayer wiring board according to claim 1, wherein the joining metal material layer is made of solder or solder formed by electrolytic plating. 4. The multilayer wiring board according to claim 1, wherein the conductor posts are made of copper. 5. The multilayer wiring board according to claim 1, wherein the conductor posts are made of the same material as the bonding metal material layer. 6. The method according to claim 1, wherein the metal bonding adhesive (I) has at least one adhesive.
The multilayer wiring according to any one of claims 1 to 5, wherein a resin (A) having two or more phenolic hydroxyl groups and a resin (B) acting as a curing agent thereof are essential components. Board. 7. A resin having a phenolic hydroxyl group (A)
Is at least one member selected from the group consisting of a phenol novolak resin, an alkylphenol novolak resin, a resole resin, a cresol novolak resin, and a polyvinyl phenol resin.
The multilayer wiring board as described. 8. A resin (A) having a phenolic hydroxyl group
Is 20wt% or more and 80w in the metal bonding adhesive (I).
The multilayer wiring board according to claim 6 or 7, wherein the content is less than t%. 9. The metal bonding adhesive (I) comprises, as essential components, an epoxy resin (C) and a compound (D) having an imidazole ring acting as a curing agent for the epoxy resin (C). The multilayer wiring board according to any one of claims 1 to 5. 10. The compound (D) having an imidazole ring acting as a curing agent is contained in the metal bonding adhesive (I),
Characterized in that it is contained at 1 wt% or more and 10 wt% or less,
The multilayer wiring board according to claim 9. 11. The multilayer wiring board according to claim 1, wherein the interlayer insulating material (II) contains a cyanate resin and a thermoplastic resin as essential components. 12. The multilayer wiring board according to claim 11, wherein the cyanate resin has a trimerization ratio of 60% or less. 13. The interlayer insulating material (II) further comprising a metal alkylacetonate as an essential component.
The multilayer wiring board according to claim 11. 14. The multilayer wiring board according to claim 13, wherein the interlayer insulating material (II) further contains an alkylphenol as an essential component. 15. The multilayer wiring board according to claim 11, wherein the thermoplastic resin comprises at least one of a polyimide resin and a polyether sulfone resin. 16. The multilayer wiring according to claim 11, wherein the interlayer insulating material (II) layer contains a cyanate resin having a trimerization ratio of 5 to 80% in a semi-cured state. Board. 17. A step of forming a conductor post, a step of forming a wiring pattern having a pad for connecting to the conductor post, and forming a bonding metal material layer on at least one of the conductor post and the pad. A step of forming a metal bonding adhesive (I) layer, a step of forming an interlayer insulating material (II) layer, and the step of forming the conductive post through the metal bonding adhesive (I) layer. A method for manufacturing a multilayer wiring board, comprising: a step of bonding to a pad with a metal material layer for use; and a step of curing a metal bonding adhesive (I) layer by heating. 18. A step of forming an interlayer insulating material (II) layer in a semi-cured state in the step of forming an interlayer insulating material (II) layer, and curing the metal bonding adhesive (I) layer by heating. 18. The method for manufacturing a multilayer wiring board according to claim 17, wherein the bonding adhesive (I) layer and the semi-cured interlayer insulating material (II) layer are integrally cured. 19. A metal plate as a lead for electrolytic plating,
A step of forming a wiring pattern by electrolytic plating, a step of forming a semi-cured interlayer insulating material (II) layer on the wiring pattern, and a semi-cured interlayer insulating material so that a part of the wiring pattern is exposed. (II) forming a via in the layer;
Forming a conductor post by electrolytic plating using the metal plate as a lead for electrolytic plating, and forming a joining metal material layer on at least one of the surface of the conductor post or the surface of a portion to be joined facing the conductor post. Forming a metal bonding adhesive (I) layer on at least one of the surface of the semi-cured interlayer insulating material (II) layer or the surface of the connected layer; and forming the metal bonding adhesive (I) layer The conductor post and the portion to be joined facing each other are joined by a joining metal material layer, and the semi-cured interlayer insulating material (II) layer and the connected layer are joined by a metal joining adhesive (I) Bonding with a layer;
A method for manufacturing a multilayer wiring board, comprising: a step of integrally curing an interlayer insulating material (II) layer and a metal bonding adhesive (I) layer; and a step of removing the metal plate by etching. 20. A metal bonding adhesive (I) on at least one of the surface of the interlayer insulating material (II) layer and the surface of the connected layer.
20. The method for manufacturing a multilayer wiring board according to claim 19, wherein in the step of forming the layer, the metal bonding adhesive (I) layer is partially formed. 21. A metal plate as a lead for electrolytic plating,
Forming a wiring pattern on the metal plate by electrolytic plating, forming a semi-cured interlayer insulating material (II) layer on the wiring pattern, and forming a wiring pattern on the interlayer insulating material (II) layer. A step of forming a via so that a part thereof is exposed, a step of forming a conductor post by electrolytic plating using the metal plate as a lead for electrolytic plating, and a step of forming a bonding metal material layer on the surface of the conductor post Forming a metal bonding adhesive (I) layer on the surface of the interlayer insulating material (II) layer so as to cover the bonding metal material layer; and etching and removing the metal plate to form a connection layer. Forming a plurality of the connection layers on the connection target layer, and then applying heat and pressure at a time to form the connection layer with the conductor posts facing each other via the metal bonding adhesive (I) layer. Joined to the joint with the joining metal material layer, and semi-cured Bonding the interlayer insulating material (II) layer and the layer to be connected to each other with a metal bonding adhesive (I) layer, and integrally curing the interlayer insulating material (II) layer and the metal bonding adhesive (I) layer. And a method for manufacturing a multilayer wiring board. 22. A step of forming a metal bonding adhesive (I) layer on the surface of the interlayer insulating material (I) layer, wherein the metal bonding adhesive (I) layer is partially formed on the surface. The method for manufacturing a multilayer wiring board according to claim 21. 23. A metal plate as a lead for electrolytic plating,
23. The method according to claim 19, further comprising a step of forming a resist metal layer between the metal plate and the wiring pattern by electrolytic plating. . 24. The method for manufacturing a multilayer wiring board according to claim 17, wherein the bonding metal material layer is made of solder or solder formed by electrolytic plating. 25. The method according to claim 17, wherein the conductor posts are made of copper. 26. The conductive post is made of the same material as the joining metal material layer.
5. The multilayer wiring board according to any one of 4. 27. A resin (A) wherein the metal bonding adhesive (I) has at least one or more phenolic hydroxyl groups,
The method for producing a multilayer wiring board according to any one of claims 17 to 26, wherein the resin (B) acting as a curing agent is used as an essential component. 28. The resin (A) having a phenolic hydroxyl group is at least one selected from the group consisting of a phenol novolak resin, an alkylphenol novolak resin, a resole resin, a cresol novolak resin, and a polyvinyl phenol resin. The method for manufacturing a multilayer wiring board according to claim 27, wherein 29. The multilayer according to claim 27, wherein the resin (A) having a phenolic hydroxyl group is contained in the metal bonding adhesive (I) in an amount of 20 wt% or more and 80 wt% or less. Manufacturing method of wiring board. 30. A metal bonding adhesive (I) comprising an epoxy resin (C) and a compound (D) having an imidazole ring acting as a curing agent for the epoxy resin (C) as essential components. The method for manufacturing a multilayer wiring board according to any one of claims 17 to 26. 31. A compound (D) having an imidazole ring acting as a curing agent is contained in a metal bonding adhesive (I).
Characterized in that it is contained at 1 wt% or more and 10 wt% or less,
A method for manufacturing a multilayer wiring board according to claim 30. 32. An interlayer insulating material (II) layer comprising a cyanate resin and a thermoplastic resin as essential components,
A method for manufacturing a multilayer wiring board according to any one of claims 17 to 31. 33. The multilayer wiring board according to claim 32, wherein the cyanate resin has a trimerization ratio of 60% or less. 34. The interlayer insulating material (II) further comprising a metal alkylacetonate as an essential component,
The method for manufacturing a multilayer wiring board according to claim 32 or 33. 35. The method for producing a multilayer wiring board according to claim 34, wherein the interlayer insulating material (II) further comprises an alkylphenol as an essential component. 36. The method for producing a multilayer wiring board according to claim 32, wherein the thermoplastic resin comprises at least one of a polyimide resin and a polyether sulfone resin. 37. The multilayer wiring board according to claim 32, wherein the interlayer insulating material (II) contains a cyanate resin having a trimerization ratio of 5 to 80% in a semi-cured state. . 38. A multilayer wiring board obtained by the method according to any one of claims 17 to 37. 39. A semiconductor device using the multilayer wiring board according to claim 38 or any one of claims 1 to 16.