JP2002297059A - Driver incorporated type active matrix display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an active matrix type display device that has a high numerical aperture and high display quality. SOLUTION: In a pixel section of the active matrix type display device, each pixel is provided with a top-gate type TFT, an auxiliary capacitor Csc and a liquid crystal capacitor Clc. A first electrode 30 of the capacitor Csc is also used as a p-Si active layer 14 of the TFT; a second electrode 32 is formed at the bottom layer of the layer 14 so that an insulation layer 12 is sandwiched between the electrode 32, and the layer 14 and at least a portion of the layer 14 is overlapped. A driver section TFT is a top-gate type TFT similar to the pixel section TFT; an active layer 140 is made by the same material as the material of the layer 14; and electrically conductive layer 32D, which is made by the same material as the material of the electrode 32, is provided at the bottom layer of the layer 140 sandwiching the layer 12. Thus, an auxiliary capacitor is formed in the pixel section, while preventing the occurrence of the reduction in the numerical aperture. Moreover, TFTs, having the same conditions during a poly crystalline annealing process of the active layer and similar characteristics, are obtained for the pixel section TFTs and the driver section TFTs.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a driver-incorporated active matrix display device including a pixel portion having a plurality of pixels and a driver portion on the same substrate.

[0002]

2. Description of the Related Art Flat panel displays such as liquid crystal display devices (hereinafter referred to as LCDs) can be made thinner, smaller, lighter and consume less power. LCDs have already been used as display units for various devices. It is used in many devices, including portable information devices. In an LCD or the like, each pixel is provided with a thin film transistor or the like as a switch element.
This panel is called an active matrix type, and since this panel reliably maintains display contents for each pixel, it is used as a display device for realizing high-definition display and high display quality.

FIG. 8 shows an equivalent circuit for a pixel of an active matrix type LCD. Each pixel includes a thin film transistor 1 (TFT) connected to a gate line and a data line. When the TFT is turned on by a selection signal output to the gate line, data corresponding to display contents is transmitted from the data line via the TFT. Liquid crystal capacity 2
(Clc). Here, it is necessary to reliably hold the written display data from the time when the TFT is selected and the data is written until the next time the TFT is selected again. And an auxiliary capacitor 3 (Csc) is connected in parallel.

FIG. 9 shows a planar configuration of a pixel portion on a TFT forming substrate (first substrate 100) of a conventional LCD, and FIG. 10 shows an LC at a position along line XX in FIG.
D shows a cross-sectional configuration. The LCD has a configuration in which liquid crystal is sealed between a first substrate and a second substrate. In an active matrix type LCD, TFTs 1, pixel electrodes 74, and the like are arranged in a matrix on a first substrate 100, and are opposed to the first substrate. A common electrode 56 to which a common voltage Vcom is applied, a color filter 54, and the like are formed on the second substrate disposed. Then, the liquid crystal capacitance Clc is driven for each pixel by a voltage applied between each pixel electrode 74 and the common electrode 56 opposed across the liquid crystal 200.

As shown in FIG. 10, a TFT provided on a first substrate 100 side for each pixel is a so-called top gate type TF in which a gate electrode 60 is located above an active layer 64.
T. The active layer 64 of the TFT is patterned on the substrate 5 as shown in FIG. 9, and a gate insulating film 66 is formed so as to cover the active layer 64. On the gate insulating film 66, a gate line serving also as the gate electrode 60 is formed. Are formed. In the active layer 64, a position facing the gate electrode 60 is a channel region 64c, and a drain region 64d into which impurities are implanted and a source region 64s are formed on both sides of the channel region 64c.

The drain region 64d of the active layer 64 is connected to a drain electrode 70 also serving as a data line via a contact hole formed in an interlayer insulating film 68 formed to cover the gate electrode 60.

A planarization insulating film 72 is formed so as to cover the drain electrode and the data line 70. The source region 64s of the active layer 64 has an ITO (Indium Tin Oxide) layer on the planarization insulating film 72. And the like through a contact hole.

The source region 64s of the active layer 64 also serves as a first electrode 80 of a storage capacitor Csc provided in each pixel, and extends from a contact region with the pixel electrode 74 as shown in FIG. I have. The second electrode 84 of the auxiliary capacitance Csc is formed simultaneously with the gate electrode 60 in the same layer as shown in FIG. 10, and is formed in a different region from the gate electrode 60 at a predetermined interval. The first electrode 80 and the second
The gate insulating film 66 also serves as a dielectric between the electrode 84 and the interlayer. Further, the second electrode 84 of the auxiliary capacitance Csc is not independent for each pixel as shown in FIG.
Similarly to 0, a predetermined auxiliary capacitance voltage Vsc is applied to the pixel region extending in the row direction.

By providing the auxiliary capacitance Csc in each pixel as described above, the charge corresponding to the display content to be applied to the liquid crystal capacitance Clc is held in the auxiliary capacitance Csc during the non-selection period of the TFT. Therefore, it is possible to suppress the fluctuation of the potential of the pixel electrode 74 and maintain the display content.

[0010]

In applications in which the miniaturization and high definition of the display device are strongly required, the area per pixel must be reduced, and the liquid crystal capacitance Clc per pixel is also reduced. . Therefore, in order to reliably hold the display data in each pixel during the unit display period, the above-described auxiliary capacitance Csc is required.

However, on the other hand, since the auxiliary capacitance Csc itself does not function as a display area, in the case of a transmissive LCD,
If the storage capacitor Csc is formed in each pixel, the reduction of the displayable area per pixel, that is, the reduction of the aperture ratio cannot be avoided. In particular, as shown in FIGS. 9 and 10, the second electrode 84 of the auxiliary capacitance Csc is formed in the same layer as the gate line 60, so an insulating space is required so that the gate line 60 and the second electrode 84 do not short-circuit. Becomes Further, the second electrode region is opaque because of the same material as the gate,
As a result, the aperture ratio decreases, and a problem arises in that high-luminance display becomes difficult.

An object of the present invention is to provide an active matrix display device having a high aperture ratio while securing a sufficient auxiliary capacitance.

[0013]

According to the present invention, there is provided an active matrix display device with a built-in driver, comprising: a pixel portion and a driver portion on the same substrate; Each pixel is provided with a pixel unit thin film transistor, a display element, and an auxiliary capacitor, and the pixel unit thin film transistor is formed as a top gate transistor on the substrate for each pixel, The first electrode of the capacitor is electrically connected to the active layer of the pixel unit thin film transistor, and the second electrode of the auxiliary capacitor is connected to the active layer of the pixel unit thin film transistor so that the active layer at least partially overlaps the active layer. The driver unit is formed with an insulating layer interposed between the substrate and the substrate.
A plurality of driver thin film transistors that output signals for driving each pixel of the pixel portion, the driver thin film transistors are configured as top-gate transistors on the substrate, and the active layer of the driver thin film transistors includes: A conductive layer made of the same material as the active layer of the pixel unit thin film transistor, and made of the same material as the second electrode with the insulating layer interposed between the active layer of the driver unit thin film transistor and the substrate. It is characterized in that a layer is provided.

Another feature of the present invention is that in a driver built-in type active matrix display device which performs display by driving liquid crystal sealed in a gap between the first and second substrates, a pixel portion and a driver portion are provided on the same substrate. And the pixel unit comprises:
A plurality of pixels are arranged, each pixel includes a pixel unit thin film transistor, a liquid crystal capacitor, and an auxiliary capacitor. On the side of the first substrate facing the liquid crystal, the pixel unit thin film transistor is a top gate type transistor for each pixel. Wherein the storage capacitor is provided with a first electrode that is also used as an active layer of the pixel unit thin film transistor, and an active layer of the pixel unit thin film transistor that is disposed with an insulating layer interposed between the first electrode and the first electrode. A second electrode disposed between the substrate and the second electrode, the driver unit including a plurality of driver unit thin film transistors that output a signal for driving each pixel of the pixel unit; The driver unit thin film transistor is configured as a top gate type transistor on the substrate, and the active layer of the driver unit thin film transistor includes the pixel unit thin film transistor. The same material as the second electrode is formed of the same material layer as the active layer of the transistor and between the substrate and the active layer of the driver section thin film transistor with the insulating layer interposed therebetween. Is provided.

As described above, the first electrode of the storage capacitor is connected to the active layer of the thin film transistor (also serves as a common electrode).
By providing the second electrode not in the same layer as the gate line but in the lower layer (substrate side) of the first electrode, it is possible to form a sufficiently large auxiliary capacitance Csc in each pixel without lowering the aperture ratio. Becomes In addition, a driver unit thin film transistor having an active layer made of the same material as the active layer of the pixel unit TFT on the same substrate is placed under the active layer (substrate side).
Also, a conductive layer formed of the same material as the second electrode of the auxiliary capacitance is provided. Accordingly, the same material layers forming the active layer of the pixel unit thin film transistor and the active layer of the driver unit thin film transistor are formed under the same conditions, so that transistors having uniform characteristics can be obtained.

Another feature of the present invention is that in any of the above-described active matrix display devices with a built-in driver, a laser is applied to the amorphous silicon layer formed on the active layer of the thin film transistor in the pixel portion and the driver portion. And that a polycrystalline polysilicon layer is used.

When the amorphous silicon layer is polycrystallized by laser annealing, the grain size of the finally obtained polysilicon layer varies depending on the conditions such as thermal conductivity in the region where the silicon layer is formed. By similarly providing a conductive layer below (substrate side) the active layer of both the pixel portion and the driver portion thin film transistor as in the present invention, the grain size of the polysilicon layer formed by laser annealing can be reduced. Different layers can be prevented from being formed, and a transistor with uniform characteristics can be formed.

Another feature of the present invention is that, in the active matrix display device with a built-in driver, the plurality of thin film transistors in the driver section include an n-type channel transistor and a p-type channel transistor having different conductivity types. And the conductive layer formed between the active layer and the substrate of the p-type channel transistor and the conductive layer formed between the substrate and the substrate.

The influence of the potential of the conductive layer below the active layer on the transistor in the driver thin film transistor configured as a top gate type transistor is different depending on whether the transistor is p-type or n-type. Therefore, the potential of the conductive layer provided below the active layer (substrate side) of the driver thin film transistor is controlled for the p-type and n-type transistors to an appropriate potential as in the present invention, so that the back channel of the back channel is formed. It is possible to prevent the occurrence of a leak current due to the occurrence.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention (hereinafter, referred to as embodiments) will be described below with reference to the drawings. In addition, as a display device, a liquid crystal display device (L
CD) will be described as an example. The LCD is configured such that a first substrate and a second substrate using a transparent insulating material such as glass are bonded with a liquid crystal therebetween. The active matrix type LCD according to the present embodiment has a pixel portion provided with a TFT on the first substrate, and a driver portion for driving this pixel portion is formed around the pixel portion on the same substrate. Have been.

First, the pixel section will be described. FIG.
FIG. 4 shows a planar structure in a pixel portion of the LCD according to the present embodiment,
FIG. 2 is a schematic cross-sectional configuration of the LCD at a position along the line AA in FIG. 1, and FIG. 3 is a cross-sectional configuration on the first substrate at a position along the line BB in FIG.

The equivalent circuit of each pixel is the same as that of FIG. 8 described above, and pixel electrodes 24 are arranged in a matrix on the first substrate 100 as shown in FIG. Top gate type TFT1 and storage capacitor 3 (Csc)
Is provided. In each pixel, the active layer 14 of the TFT 1 intersects with the gate line 20 which is bent and extends in the row direction.
Is formed, and the gate line 20 becomes a gate here.
The drain (or source) 14d is connected to the data line 22 extending in the column direction, and the source (or drain) 14s
, A liquid crystal capacitor 2 (Clc) and an auxiliary capacitor Csc are connected in parallel. The equivalent circuit of each pixel is almost the same as that of FIG. 8 described above. However, in this embodiment, the TFT of each pixel employs a multi-gate TFT, and has a common gate.
Multiple TFTs electrically between data line and pixel electrode
It has a configuration in which active layers are connected in series. of course,
As in FIG. 8, a configuration in which a single TFT is provided for each pixel may be used.

A liquid crystal capacitance (display capacitance) Clc connected to the source of the TFT 1 of each pixel is disposed with the liquid crystal 200 interposed therebetween, and a pixel electrode 24 to which a voltage corresponding to the display content is applied.
And a common electrode to which a common potential Vcom is applied (common electrode)
54.

The auxiliary capacitance Csc is formed in a region where the first electrode 30 and the second electrode 32 overlap with the insulating layer 12 interposed therebetween. The first electrode 30 is also used by the active layer 14 of the TFT 1,
The second electrode 32 is formed on the first substrate 100,
The active layer 14 extends below the active layer 14 with an insulating film (buffer layer) 12 interposed therebetween. As described above, since the second electrode extends over the entire lower layer of the active layer 14, the active layer of the TFT itself can function as the first electrode 30,
No extra large area is required for the auxiliary capacitance Csc.
The data line 22 is connected to the first electrode 30 via the TFT 1.
Is applied in accordance with the display content supplied from the
The electrode 32 has, for example, a common auxiliary capacitance voltage V in the display area.
sc is applied.

Since the material of the second electrode 32 of the auxiliary capacitance Csc does not need to be in the same layer as the gate line unlike the conventional auxiliary capacitance second electrode, the material used is not limited to the gate material. For this reason, as long as the conductive material is not limited to a good conductor and a light-shielding metal material, a transparent conductive material such as ITO can be adopted. In the present embodiment, the second light-shielding metal material is used. An electrode 32 is formed. By making the top gate type TFT 1 light-blocking, it is possible to prevent the incident light from the first substrate side from reaching the active layer 14 of the TFT 1, reduce the light leak current of the TFT, and further improve the display contrast. It is possible.

In this embodiment, the auxiliary capacitance Csc is
As described above, a sufficient capacitance can be formed without being formed in a region different from the TFT when viewed in a plan view. However, when the capacitance value of the auxiliary capacitance Csc is insufficient, the area of the first electrode 30, that is, the area of the source region 14s of the active layer 14 may be enlarged, for example, to the area between the adjacent pixel electrodes 24. desirable.

In the present embodiment, the second electrode 32
Not only overlaps with the layer (first electrode 30) electrically connected to the TFT active layer 14, but also at least the active layer 1
The second electrode 32 is also suitable as a light shielding layer. In the layout of FIG. 1, the gate line 20 extends in the row direction and the TFT
The first active layer 14 has a pattern of passing under the gate line 20 from near the lower layer of the data line 22 (twice in FIG. 1), and the channel region 14 c is formed in the intersection region with the gate line 20. Therefore, the second electrode 32 of the auxiliary capacitance Csc which also serves as a light shield for the active layer 14 of such a TFT,
It is preferably formed in a channel region, that is, a region overlapping with a gate (gate line) formation region. Considering the alignment margin, a width slightly larger than the gate line width (for example,
It is more preferable to form each layer on the both sides of the gate line at +2 μm). With such a pattern, the second electrode 32 is suitable as a light-shielding layer, and furthermore, the active layer 14 of the TFT 1 that also serves as the first electrode 30,
Since they overlap at most positions, the first position as shown in FIG.
Even when the electrode 30 is not extended from the source region 14s of the TFT, a large auxiliary capacitance Csc can be formed, and the auxiliary capacitance Csc can be efficiently formed within a small area.

Here, as the active layer 14 of the TFT 1,
As described later, a polysilicon (p-Si) layer polycrystallized by laser annealing or the like can be used. Also in this case, in the present embodiment, since the second electrode 32 of the auxiliary capacitance Csc is present below the p-Si layer, it is possible to form a TFT with uniform polycrystal grain size and small characteristic variations. It is possible.

The reason is as follows. That is, in the case where amorphous silicon is polycrystallized by laser annealing, if there is a difference in the thermal conductivity of the lower layer of the amorphous silicon film, the annealing condition changes, and the particle size varies in the active layer 14. In particular, variation in the particle size in the channel region has a great effect on the TFT characteristics. Active layer 14
The second electrode 32 of the auxiliary capacitor Csc formed in the lower layer can be made of a high melting point metal such as Cr.
r and the like have higher thermal conductivity than glass or the like forming the first substrate. Therefore, when the p-Si active layer 14 is formed by laser annealing, the presence or absence of the second electrode 32 having high thermal conductivity under the active layer 14 is not preferable because the annealing condition changes. . Therefore, in the present embodiment, as shown in FIGS.
2 are uniformly provided at least below the channel region of the active layer 14, the annealing conditions for the amorphous silicon layer are made equal, and the variation in characteristics of each TFT is suppressed.

For the above purpose, the second electrode 32 may be arranged only in the lower layer region of the active layer.
As shown in FIG. 1, the second electrode 32 has a pattern in which only the pixel electrode corresponding area is opened in the display area and the other area is covered. When a light-shielding material is used for the second electrode 32 and a matrix pattern as shown in FIG. 1 is used, the overlapping area with the active layer 14 can be increased (an increase in the auxiliary capacitance), and the light-shielding of the active layer 14 is more reliably performed And can be. Further, with such a pattern, the second electrode 32 can be used also as a black matrix of a panel. That is, the outside of the first substrate (the lower side in FIG. 2) can be used as an observation surface of the display device, or the first substrate can be arranged on the light source side in a light valve application of a projector. 14 can be prevented from irradiating light to further improve the contrast.

In this embodiment, the auxiliary capacitance Csc is
When viewed in a plan view, a sufficient capacitance can be formed without being formed in a region different from the TFT. However, auxiliary capacity C
When the capacitance value of sc is insufficient, the region of the first electrode 30;
That is, the area of the source region 14s of the active layer 14 is increased,
For example, it is desirable to extend the region between the adjacent pixel electrodes 24.

Next, a first example of a built-in driver section formed around the pixel section for driving the above-described pixel section will be described. FIG. 4 shows a partial planar structure of the built-in driver section, and FIG. 5 shows a schematic sectional configuration taken along a line CC of FIG. The same components as those described above are denoted by the same reference numerals, and description thereof is omitted. In FIG. 4, a total of four TFTs, an n-ch TFT and a p-ch TFT, are arranged. As shown in FIG. 5, each of the TFTs is constituted by a top-gate type transistor similarly to the pixel portion TFT. Further, in the present embodiment,
Each active layer 140n, 140p of the driver unit TFT
Uses the same material as the pixel portion TFT. Specifically, amorphous silicon is crystallized by a low-temperature process such as laser annealing to form polysilicon, and this polysilicon is used as the TFT 11 (11n, 1n, 1n) in the driver section.
1p) for the active layer 140 (140n, 140p).

In the present embodiment, the conductive layer 140 is formed at least below the channel region 140c (140nc, 140pc) of the active layer 140 made of the same material as the active layer of the pixel portion TFT with the insulating film 12 interposed therebetween. A layer 32D is formed. This conductive layer 32D is formed on the second electrode 3 of the auxiliary capacitor Csc provided below the active layer 14 of the pixel portion TFT.
2 and the same material, for example, a high melting point metal such as chromium. Since the driver section is not normally irradiated with light, it is not always necessary to provide a light-blocking layer below the active layer as in the pixel section TFT (of course, by blocking light, the occurrence of light leakage in the driver section is reliably prevented. can do). In addition, each TFT in the driver section often requires a shorter data retention time than the TFT in the pixel section, and the active layer and the conductive layer 32D of the driver TFT are similar to those in the pixel section.
There is no particular need to form a storage capacitor between the storage capacitor and the storage capacitor (of course, a storage capacitor may be formed). In the present embodiment, the role of the conductive layer 32D is that of the active layer 140 of the driver unit TFT 11 made of the same material as the pixel unit TFT.
In the polycrystallization step of forming the active layer 140 by polycrystallizing amorphous silicon by providing at least the lower layer of the channel, the polycrystallizing condition of the active layer 14 of the pixel portion TFT and the multiplicity of the active layer 140 of the driver portion TFT are increased. This is to make the crystallization conditions equal. Then, the conductive layer 32D
Thus, the polycrystalline TFT in the pixel portion and the polycrystalline T in the driver portion
The grain size of the polycrystalline active layer is made uniform between the FT and the FT to make the TFT characteristics uniform and facilitate control.

In the first example, the conductive layer 32D
Is applied with the same voltage as the gate voltage of the TFT of the active layer 140 on which the conductive layer 32D overlaps. In the case of FIG.
For example, an n-ch type and a p-
The gate electrodes 121 and 123 of the ch-type TFT are connected,
In addition, a conductive layer 32D formed under these TFTs
Are connected to the same gate line 122 via the contact hole 33. That is, in each of the n-ch type and p-ch type TFT, its own gate signal is input to the conductive layer 32D, and each TFT has the same structure as that having a gate above and below the active layer 140. A type TFT is configured. n-ch TFT and p-ch TFT
Since the operation threshold voltages have opposite polarities to each other, when an arbitrary common voltage is applied to all the conductive layers 32D as in the pixel portion, in the driver portion, the n-type or p-type TFT is used.
May become unstable. However, in this example, the voltage of the conductive layer 32D is used as the gate voltage of the corresponding TFT, and no special configuration is provided.
D can be prevented from adversely affecting the TFT operation. Rather, since a dual-gate TFT is configured, the operating characteristics such as the operating speed can be improved.

Next, the conductive layer 3 in the driver TFT
A second example of 2D will be described with reference to FIGS. FIG. 6 shows a partial planar structure of the driver section, and FIG.
Shows a cross-sectional structure at a position along the line DD in FIG. In the second example, similarly to the first example,
N-ch TFT and p-ch TFT in the driver section
FT is used. Also, any active layer 140
Similarly to the first example, (140n, 140p) is formed of the same material layer (polysilicon layer) as the active layer 14 of the pixel portion TFT, and the insulating film 1 is provided below each active layer 140.
2 at least in each of the channel regions 140nc and 14nc.
A conductive layer 32D made of the same material as the auxiliary capacitance second electrode 32 of the pixel portion is formed at a position overlapping with 0pc.

The difference from the first example is that the n-ch type TF
This means that the voltage applied to the conductive layer 32D below the active layer 140 is separately controlled by the T and the p-ch type TFT. That is, in the example shown in FIG. 6, the active layer 14 of the n-ch type TFT is used.
0n, the conductive layer 32D (32 vss) formed below
A low voltage Vss is applied by connecting to the low voltage power line 150 via the contact 33vss. Conversely, pc
The conductive layer 32D formed below the active layer 140p of the h-type TFT is connected to the high voltage power supply line 160 via the contact 33hvdd, and the high voltage HVdd is applied.
Therefore, in the n-ch type TFT, the conductive layer 32 vss prevents the n-ch type TFT from being turned on due to the generation of the back channel, and also in the p-ch type TFT, the conductive layer 32 hvdd generates the p-type channel due to the generation of the back channel.
The -ch type TFT is prevented from turning on.

6 and FIG.
And 128 indicate a gate electrode of each TFT, and reference numeral 152 indicates an n-ch type TFT having a CMOS structure and a p-type TFT.
This is the output line of the ch-type TFT.

As described above, also in the second example shown in FIGS. 6 and 7, the same conductive layer 32D as the auxiliary electrode Csc second electrode of the pixel portion TFT is provided below the active layer 140 of the driver portion TFT. In the polycrystallizing step of forming the active layer 140 by polycrystallizing amorphous silicon, the polycrystallizing conditions of the active layer 14 of the pixel portion TFT and the driver portion TFT
Of the active layer 140 is equal to the polycrystallization condition. Further, the lower conductive layer 32D of the n-ch TFT has a low voltage Vss, and the conductive layer 32D of the p-ch TFT has a higher voltage HV.
By applying dd, any of the n-ch type and p-ch type TFTs is prevented from operating when a desired gate signal is not applied to the gate electrodes 122 and 124.

Next, a method of manufacturing each element on the first substrate side of the LCD according to this embodiment will be outlined.

As the first substrate 100, a transparent insulating substrate such as a glass substrate, a quartz substrate, and a sapphire substrate can be used. First, a high-melting-point metal layer such as Cr is formed on the first substrate 100, and in the pixel portion, an auxiliary capacitor second electrode 32 is formed by opening a region where a pixel electrode is to be formed, as shown in FIG. In the driver section, as shown in FIG. 4 or FIG. 6, patterning is performed so that the conductive layer 32D remains at a position overlapping the active layer of the TFT to be formed later.

After forming the second electrode 32 of the auxiliary capacitance Csc and the conductive layer 32D of the driver section, SiO ₂ or SiNx is formed on the entire surface of the substrate covering the second electrode 32 and the conductive layer 32D.
An insulating layer 12 is formed.

An amorphous silicon layer is formed on the insulating layer 12, and in FIG. 2, an excimer laser is irradiated from a position corresponding to above the first substrate 100, and the amorphous silicon layer is annealed to be polycrystalline. As mentioned above,
At the time of excimer laser annealing, the second electrode 32 in the pixel portion and the conductive layer 32D in the driver portion are uniformly formed at least below the channel formation region of the amorphous silicon layer. Therefore, each channel forming region is laser-annealed under the same conditions, and a polysilicon layer having a uniform grain size is formed in this region. After the completion of the polycrystallization annealing, the obtained polysilicon layer is patterned into the active layer shape of the pixel portion TFT and the driver portion TFT and the shape of the first electrode of the auxiliary capacitance. Further, a gate insulating film 16 made of SiO ₂ is formed to cover the polysilicon layer.

After the gate insulating film 16 is formed, a metal layer is formed and patterned using, for example, Cr to form a driver TFT.
Of the gate electrodes 121 and 123 (or 126 and 128). At the same time, a gate line 20 integral with the gate electrode can be formed in the pixel portion. However, the gate of the pixel portion TFT may be formed in a separate process using Al.

Next, the active layers 14 and 140 are doped with impurities from the gate side using the gate as a mask. Here, in the pixel portion TFT, the active layer 14 is lightly doped with an impurity (for example, phosphorus) using the gate as a mask.
The gate line 20 is covered with a mask having a certain width wider than the line width, and the active layer 14 is heavily doped with an impurity (for example, phosphorus). As a result, in the region corresponding to the gate line 20 in the active layer 14, an intrinsic channel region 14c in which no impurity is doped is formed, and on both sides of the channel region 14c, a lightly doped L
A D region 14ld is formed, and a drain region 14d and a source region 14s in which impurities are implanted at a high concentration are formed outside the LD region.

In the driver unit TFT, the pixel unit T
The same conductivity type as that of the FT, for example, an n-ch type TFT can be doped simultaneously with the above-described doping step for the active layer of the pixel portion TFT. In this case, a p-ch type TFT
Is covered with a doping mask. And
After doping the active layer of the n-ch type TFT, p-
The doping mask covering the ch-type TFT formation region is removed, and conversely, the active layer 140p is doped with impurities such as boron so as to cover the driver portion n-ch type TFT and the pixel portion TFT region.

After completion of the doping step, annealing is performed to activate the doped impurities. Next, an interlayer insulating film 17 is formed on the entire surface, a region (drain in the present embodiment) corresponding to the drain region 14d (or source region 14s) of the TFT 1 in the pixel portion, and each TFT in the driver portion.
A contact hole penetrating through the interlayer insulating film 17 and the gate insulating film 16 is formed in a region corresponding to the drain region and the source region. Further, a data line 22 also serving as a drain electrode is formed in the pixel portion using Al or the like, and the data line 22 is connected to the drain region 14d of the active layer 14 through the contact hole. In the driver section, drain and source electrodes are simultaneously formed using Al or the like,
The drain region and the source region of the TFT are connected via a contact hole.

After forming the necessary wiring, the entire substrate is
A flattening insulating film 18 made of resin or the like is formed, and the TFT 1
Of the planarizing insulating film 1 at a position corresponding to the source region 14s of FIG.
8. A contact hole penetrating the interlayer insulating film 17 and the gate insulating film 16 is formed. Further, a transparent conductive material layer such as ITO is formed, and this is patterned into a pixel electrode shape, and the source region 14 is formed through the contact hole.
The pixel electrode 24 connected to s is formed.

After the formation of the pixel electrode 24, an alignment film 26 for controlling the liquid crystal alignment is formed on the entire surface as needed, and the necessary elements are formed on the first substrate side as described above.

On the second substrate 500 side of the LCD, a color filter 54 such as R, G, B in the case of a color display device is formed on the second substrate 500 using a transparent substrate such as glass or plastic. On this color filter 54, a counter electrode (common electrode) 56 made of ITO or the like for applying a voltage to the liquid crystal 200 with each pixel electrode 24 of the first substrate 100 is formed. An alignment film 58 is further formed on the counter electrode 54 in the same manner as on the first substrate 100 side.

The first substrate 100 obtained as described above
The second substrate 500 and the second substrate 500 are bonded together with a certain gap at the outer edge thereof, and the liquid crystal 200 is sealed in the gap between the substrates to complete the LCD. Note that a polarizing film, a retardation film, and the like are disposed outside the second substrate 500 (the upper surface side in FIG. 2A).

In the above description, an LCD is taken as an example of an active matrix type display device. However, the present invention relates to another active matrix type display device requiring an auxiliary capacitance for each pixel, for example, an EL element as a display element. The present invention can be applied to an active matrix type electroluminescent display device using the same, and the same effect can be obtained.

In the pixel portion, the first capacitor Csc
The patterns of the electrode 30 and the second electrode 32 are not limited to those shown in FIGS. 1 and 2 as long as the condition that the second electrode overlaps at least the channel region of the active layer 14 is satisfied.

[0053]

As described above, according to the present invention, in the pixel portion of the active matrix type display device, the first electrode of the auxiliary capacitance provided for each pixel is a top gate type T-type electrode.
The second electrode of the storage capacitor is formed below the TFT active layer with the insulating film interposed therebetween, also serving as the active layer of the FT. By providing the second electrode below the active layer of the top gate TFT (substrate side), an auxiliary capacitor can be formed so as to overlap with a TFT forming region that does not normally contribute to display in a transmissive display device. This can contribute to an improvement in aperture ratio. Further, in the present invention, the TFT in the driver section is the same top gate type as the TFT in the pixel section, and the active layer of the TFT in the driver section is
Since the same material as the active layer of the pixel portion TFT is used, and a conductive layer made of the same material as the second electrode is formed at least under a part of the active layer (substrate side) similarly to the pixel portion TFT. When forming the active layer of the driver section TFT,
Both can be formed under the same conditions. Therefore, TFTs having uniform characteristics can be formed on the same substrate.

[Brief description of the drawings]

FIG. 1 is a diagram showing a schematic plan configuration in a pixel portion of an active matrix liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a schematic cross-sectional configuration of the liquid crystal display device at a position along the line AA in FIG.

FIG. 3 is a diagram showing a schematic cross-sectional configuration on a first substrate side of the liquid crystal display device at a position along line BB in FIG. 1;

FIG. 4 is a diagram illustrating a first example of a partial planar configuration of a built-in driver section of an active matrix liquid crystal display device according to an embodiment of the present invention.

FIG. 5 is a diagram showing a cross-sectional configuration at a position along line CC in FIG. 4;

FIG. 6 is a diagram illustrating a second example of a partial planar configuration of a built-in driver unit of the active matrix liquid crystal display device according to the embodiment of the present invention.

FIG. 7 is a diagram showing a cross-sectional configuration at a position along the line DD in FIG. 6;

FIG. 8 is a diagram showing an equivalent circuit per pixel of an active matrix liquid crystal display device.

FIG. 9 is a diagram showing a schematic plan structure of a pixel region in a conventional active matrix type liquid crystal display device.

10 is a diagram showing a schematic cross-sectional structure of the conventional liquid crystal display device at a position along line XX in FIG.

[Explanation of symbols]

1,11n, 11p thin film transistor (TFT), 2
Liquid crystal capacitance (Clc), 3 auxiliary capacitance (Csc), 12 insulating film (buffer layer), 14, 140 active layer (drain region, channel region, source region), 16 gate insulating film, 17 interlayer insulating film, 18 planarization Insulating film, 20, 1
22, 126, 128 gate line (also used as gate)
22 data line (also used as drain), 24 pixel electrode, 26, 58 alignment film, 30 first electrode of auxiliary capacitance,
32 second electrode of auxiliary capacitance, 32D, 32vss, 32hvd
d conductive layer, 54 color filter, 56 common electrode,
100 first substrate, 121, 123, 126, 128
Gate electrode, 150 low voltage power line, 152 output line, 160 high voltage power line, 200 liquid crystal, 5
00 Second substrate.

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (reference) H01L 27/08 331 H01L 27/08 331E 5G435 29/786 29/78 612B 612C 613A 617N (72) Inventor Tsutomu Yamada Osaka 2-5-5 Keihanhondori, Moriguchi City Sanyo Electric Co., Ltd. F-term (reference) 2H092 GA59 JA25 JA37 JA41 JB22 JB31 JB57 JB58 JB69 KA04 KA05 KA10 KA18 KB13 KB24 KB25 MA12 MA27 MA30 NA07 NA22 PA08 5C094 AA10 BA03 CA19 DA09 DA14 DA15 DB04 EA04 EA07 EB02 5F048 AB10 AC04 BA16 BB05 BC16 BF11 BG05 5F052 AA02 BB07 DA02 JA01 5F110 AA30 BB02 BB04 DD02 DD03 DD04 DD13 DD14 EE03 EE04 EE28 EE30 FF02 GG02 NN03 NN03 GG03 GG02 CC09 HH12 HH13 HH14

Claims (4)

[Claims] An active matrix display device includes a pixel portion and a driver portion over the same substrate, wherein the pixel portion includes a plurality of pixels, each of which includes a pixel portion thin film transistor and a display element. And a storage capacitor, wherein the pixel unit thin film transistor is formed as a top gate transistor on the substrate for each pixel, and a first electrode of the storage capacitor is electrically connected to an active layer of the pixel unit thin film transistor. A second electrode of the storage capacitor is formed with an insulating layer interposed between the active layer and the substrate so as to at least partially overlap an active layer of the pixel unit thin film transistor; A plurality of driver thin film transistors for outputting a signal for driving each pixel of the pixel portion, wherein the driver thin film transistor is An active layer of the driver unit thin film transistor is formed of the same material layer as the active layer of the pixel unit thin film transistor, and is disposed between the active layer of the driver unit thin film transistor and the substrate. And a conductive layer made of the same material as that of the second electrode with the insulating layer interposed therebetween. 2. An active matrix display device with a built-in driver for driving and displaying a liquid crystal sealed in a gap between a first substrate and a second substrate, comprising: a pixel portion and a driver portion on the same substrate; The pixel unit includes a plurality of pixels, each pixel including a pixel unit thin film transistor, a liquid crystal capacitor, and an auxiliary capacitor. The pixel unit thin film transistor is provided for each pixel on the liquid crystal facing surface side of the first substrate. The storage capacitor is formed as a top gate type transistor, and the storage capacitor is disposed with an insulating layer interposed between the first electrode also serving as an active layer of the pixel unit thin film transistor and the first electrode, and the pixel unit thin film transistor And a second electrode disposed between the active layer and the substrate. The driver unit outputs a signal for driving each pixel of the pixel unit. A plurality of driver thin film transistors, wherein the driver thin film transistors are formed as top-gate transistors on the substrate, and the active layer of the driver thin film transistors is formed of the same material layer as the active layer of the pixel thin film transistors. And the second portion of the driver section thin film transistor between the active layer and the substrate and the insulating layer interposed therebetween.
An active matrix display device with a built-in driver, wherein a conductive layer made of the same material as the electrodes is provided. 3. The active matrix display device with a built-in driver according to claim 1, wherein a laser is applied to the amorphous silicon layer formed on the active layers of the pixel unit and the driver unit thin film transistor. The active matrix display device with a built-in driver, wherein a polycrystalline polysilicon layer is used. 4. The active matrix display device with a built-in driver according to claim 1, wherein said plurality of driver unit thin film transistors include n-channel transistors and p-channel transistors having different conductivity types. Controlling the potential of the conductive layer formed between the active layer of the n-channel transistor and the substrate and the conductive layer formed between the active layer of the p-channel transistor and the substrate Active matrix display device with built-in driver