JP2002291234A - Dc-dc converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance the efficiency of a step-up and step-down converter to input a DC voltage from a battery, etc., and supply a load with a controlled DC voltage. SOLUTION: In the noninverting step-up and step-down converter comprising the first, second, third and fourth switching means 2, 3, 4, 5 and a choke coil 6 and an output capacitor 7, a doubled output DC voltage as a drive voltage source is generated by the first and second rectifier and filter circuit 12, 15. Since the seventh switching means 16 connected to the first switching means 2 in parallel is synchronized with the first switching means 2 and turned on/off, the input DC voltage is reduced. Even if on-resistance of the first switching means 2 increases, a decreased on-voltage of the seventh switching means 16 compensates and the converter can be highly efficient.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DC-DC converter for use in various electronic devices, which receives a DC voltage from a battery or the like and supplies a controlled DC voltage to a load.
In particular, the present invention relates to a DC-DC converter capable of stepping up and down with input / output non-inversion.

[0002]

2. Description of the Related Art As a DC-DC converter which receives a DC voltage from a battery or the like and supplies a DC voltage which is input / output non-inverted and step-up / step-down controlled to a load, Japanese Patent Publication No. 58-409 discloses a DC-DC converter.
There is one disclosed in Japanese Patent Application Laid-Open No. 13-131. FIG. 4A is a circuit diagram of a DC-DC converter disclosed in Japanese Patent Publication No. 58-40913, and FIG. 4B is a signal waveform diagram of the DC-DC converter.

As shown in FIG. 4A, this DC-DC
An input DC power supply 31 having a voltage Ei is connected to the converter, and a first switch means 32, a second switch means 33, a first diode 34, a second diode 3
5, a choke coil 36, and an output capacitor 37 are provided. The voltage Eo of the output capacitor 37 is supplied to the load 38 as an output DC voltage. FIG. 4 (b)
As shown in (1), the first switch means 32 and the second switch means 33 have the same switching cycle T to perform on / off operation. Further, the ratio of the ON time in one switching cycle of the first switch means 32 and the second switch means 33, that is, the duty ratio, is δ1, δ2, respectively, and as shown in the figure, δ1> δ2.

The voltage Ei of the input DC power supply 31 is applied to the choke coil 36 when both the first switch means 32 and the second switch means 33 are on. This application time is δ2T. At this time, a current flows from the input DC power supply 31 to the choke coil 36, and magnetic energy is accumulated. Next, when the second switch means 33 is turned off, the first diode 34 is turned on, and the choke coil 3 is turned on.
6 has a difference Ei− between the input DC voltage Ei and the output DC voltage Eo.
Eo is applied. The application time is δ1T−δ2T, and a current flows from the input DC power supply 31 to the output capacitor 37 via the choke coil 36. Finally, when the first switch means 32 is turned off, the second diode 35 conducts, and the output DC voltage Eo is applied to the choke coil 36 in the reverse direction. This application time is T-δ1T,
A current flows from the choke coil 36 to the output capacitor 37, and the stored magnetic energy is released.

Power is supplied from the output capacitor 37 to the load 38 by repeating the operation of storing and releasing magnetic energy as described above. In a stable operation state in which the storage and release of the magnetic energy of the choke coil 36 are balanced, the sum of the voltage-time products is zero, so that Ei × δ2T + (Ei−Eo) × (δ1T−δ2T) −Eo
× (T−δ1T) = 0 holds, and this equation is rearranged and Eo / Ei = δ1 /
The conversion characteristic of (1-δ2) is obtained. When δ2 = 0, Eo / Ei = δ1, and the device operates as a step-down converter. When δ1 = 1, Eo / Ei = 1 / (1−δ
2) and operates as a boost converter. By controlling the duty ratio of each switch, δ1 /
(1-δ2) can be set from 0 to infinity. That is, in theory, the DC-DC converter operates as a step-up / step-down converter that can form an arbitrary output DC voltage Eo from an arbitrary input DC voltage Ei.

[0006]

In the conventional DC-DC converter configured as described above, the P-channel MO is connected to the high-side switch such as the first switch means.
SFETs and PNP transistors are usually used. This is because, when the first switch is turned on, its gate terminal and base terminal may be pulled down to the zero potential side via a resistor or the like, and driving is easy. However,
When the input DC voltage is low, there has been a problem that the gate voltage and the base current of the first switch means decrease, and the on-voltage of the first switch means increases to increase conduction loss. When the output DC voltage to be controlled such as constant current control or overload droop is low, a P-channel MOSFET or PNP as a synchronous rectifier is provided in the first diode.
The same problem occurs even when a transistor is used.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems by providing a high-efficiency buck-boost circuit capable of reducing conduction loss even when the input DC voltage is low or the output DC voltage to be controlled is low. Provide a converter.

[0008]

In order to achieve the above object, a DC-DC converter according to the present invention comprises a first switch, a choke coil, and a second switch, which are connected in series, comprising an input DC power supply. And a third switch means, a choke coil, and a fourth switch means, which are connected in parallel with each other and are connected in parallel with the output capacitor, and the on / off time of the first to fourth switch means Control circuit, a first rectifying / smoothing circuit including a fifth switch means and a first capacitor connected in parallel with the third switch means, and a parallel connection with the fifth switch means A second rectifying / smoothing circuit including sixth switching means and a second capacitor, seventh switching means connected in parallel to the first switching means, a second capacitor and an output capacitor. A driving voltage source added voltage between capacitors, and a second control circuit turning on and off by the seventh switching means in synchronism with the first switch means. The DC-DC converter configured as described above can supply a sufficient drive voltage even when the input DC voltage is low.
The reduction of the ON voltage of the switch means can compensate for the characteristic deterioration of the first switch means and reduce the conduction loss.

In a DC-DC converter according to another aspect of the present invention, a first switch means, a choke coil, and a second switch means connected in series are connected in parallel with an input DC power supply, and are connected in series. A first control circuit for controlling the on / off time of the first to fourth switch means, wherein the third switch means, the choke coil, and the fourth switch means are connected in parallel with the output capacitor; And a third rectifying / smoothing circuit comprising ninth switch means and a third capacitor connected across the third switch means, and a tenth rectifier / smoothing circuit connected across the first switch means and the third capacitor. A fourth rectifying / smoothing circuit including switch means and a fourth capacitor; eleventh switch means connected in parallel with the third switch means; a fourth capacitor and an input DC power supply; The added voltage between the driving voltage source,
A third control circuit for turning on and off the eleventh switch in synchronization with the third switch. The DC-DC converter configured in this manner can supply a sufficient drive voltage even when the output DC voltage is low.
The reduction of the on-voltage of the switch means compensates for the characteristic deterioration of the third switch means and can reduce the conduction loss.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of a DC-DC converter according to the present invention will be described with reference to the accompanying drawings.

(Embodiment 1) FIG. 1 is a circuit diagram showing a configuration of a DC-DC converter according to Embodiment 1 of the present invention. As shown in FIG. 1, an input DC power supply 1 of a voltage Ei is connected to the DC-DC converter of the first embodiment, and a first switch unit 2, a second switch unit 3,
Third switch means 4, fourth switch means 5, choke coil 6, and output capacitor 7 are provided. The voltage Eo of the output capacitor 7 is supplied to the load 9 as an output DC voltage.

The first switch means 2 and the third switch means 4 are a P-channel M having a source terminal connected to the high potential side.
OSFET. Also, the second switch means 3 and the fourth switch means
The switch means 5 is an N-channel MOSFET provided with a source terminal. The first switch means 2, the choke coil 6, and the second switch means 3 are connected in series, and when both the first switch means 2 and the second switch means 3 are turned on, the input DC voltage Ei is applied to the choke coil 6. Is done. The third switch means 4, the choke coil 6, and the fourth switch means 5 are connected in series, and when both the third switch means 4 and the fourth switch means 5 are turned on, the voltage of the choke coil 6 is changed to the output capacitor. 7 is applied.

The first control circuit 8 includes a control circuit 80, a diode 81, a resistor 82, a diode 83, a resistor 84, a diode 85, a resistor 86, a diode 87, and a resistor 88. The control circuit 80 outputs the first drive signal Vd1 and the second drive signal Vd2 so as to detect and stabilize the output DC voltage Eo. The first drive signal Vd1 and the second drive signal Vd2 are pulse signals having the same switching cycle T. The first drive signal Vd1 is input to the gate terminal of the first switch means 2 through a parallel circuit of a diode 81 and a resistor 82, and a diode 87 and a resistor 8
The signal is input to the gate terminal of the fourth switch means 5 via the parallel circuit of No. 8 and further input to the second control circuit 17 described later. When the first drive signal Vd1 is "H", the first switch means 2 is turned off, and the fourth switch means 5 is turned on.

Therefore, the first switch means 2 and the fourth switch means 5 are alternately turned on and off in synchronization with the first drive signal Vd1. The second drive signal Vd2 is input to the gate terminal of the third switch means 4 via a parallel circuit of a diode 85 and a resistor 86, and is input to the gate terminal of the second switch means 3 via a parallel circuit of a diode 83 and a resistor 84. Input to the gate terminal. When the second drive signal Vd2 is "H", the third switch means 4 is turned off, and the second switch means 3 is turned on. Therefore, the second switch means 3 and the third switch means 4 output the second drive signal V
On / off control is performed alternately in synchronization with d2. The ratio of the ON time in one switching cycle of the first switch means 2 and the second switch means 3, that is, the time ratio, is δ
1, δ2, and 1 ≧ δ1> δ2 ≧ 0.

Diode 10 serving as fifth switch means
And the first capacitor 11 constitute a first rectifying / smoothing circuit 12, and a voltage obtained by rectifying and smoothing the voltage of the third switch means 4 is generated at both ends of the first capacitor 11. Diode 13 and second capacitor 14 as sixth switch means
Constitutes a second rectifying / smoothing circuit 15, and a voltage obtained by rectifying and smoothing the voltage of the diode 10 as the fifth switch means is generated across the second capacitor 14. The second capacitor 14 is connected in series with the output capacitor 7. The seventh switch means 16 is an N-channel MOSFET, and is connected in parallel with the first switch means 2.

The second control circuit 17 comprises a resistor 170, a transistor 171, a resistor 172, and a diode 173. The resistor 170 connects the gate terminal of the seventh switch means 16 and the second capacitor 14. The first drive signal Vd1 output from the first control circuit 8 is input to the gate terminal of the transistor 171 via a parallel circuit of the resistor 172 and the diode 173. When the first drive signal Vd1 is "H", the transistor 171 is turned on, the voltage at the gate terminal of the seventh switch means 16 is set to zero voltage, and the seventh switch means 16 is turned off. Therefore, the seventh switch 16 turns on and off in synchronization with the first switch 2.

Next, the operation of the DC-DC converter according to the first embodiment will be described. The voltage Ei of the input DC power supply 1 is applied to the choke coil 6 when both the first switch means 2 and the second switch means 3 are on. This application time is δ2T. At this time, a current flows from the input DC power supply 1 to the choke coil 6, and magnetic energy is accumulated. Next, when the second switch means 3 is turned off and the third switch means 4 is turned on, the difference Ei-Eo between the input DC voltage Ei and the output DC voltage Eo is applied to the choke coil 6.
Is applied. This application time is δ1T−δ2T,
A current flows from the input DC power supply 1 to the output capacitor 7 via the choke coil 6. Finally, when the first switch means 2 is turned off and the fourth switch means 5 is turned on, the output DC voltage Eo is applied to the choke coil 6 in the reverse direction. This application time is T-δ1T, a current flows from the choke coil 6 to the output capacitor 7, and the stored magnetic energy is released.

The power is supplied from the output capacitor 7 to the load 9 by repeating the operation of storing and releasing the magnetic energy as described above. In a stable operation state in which the storage and release of the magnetic energy of the choke coil 6 are balanced, the sum of the voltage-time products is zero, so that Ei × δ2
T + (Ei−Eo) × (δ1T−δ2T) −Eo × (T−δ
1T) = 0 holds, and this equation is rearranged and Eo / Ei
= Δ1 / (1−δ2). As can be seen from these conversion characteristics, by controlling δ1 and δ2, the DC-DC converter operates as a step-up / step-down converter that can theoretically form any output DC voltage Eo from any input DC voltage Ei. I do.

The control circuit 80 of the first control circuit 8 detects the output DC voltage Eo and stabilizes it (1
−δ1) First drive signal Vd1 having pulse width of T
To generate a second drive signal Vd2 having a pulse width of (1−δ2) T. The control circuit 80 decreases δ1 and δ2 when the output DC voltage Eo tries to become higher than the set value to be controlled while maintaining the relationship of δ1> δ2. Conversely, if the output DC voltage Eo is going to be lower than the set value to be controlled, δ1 and δ2 are increased. The drive signal is input to the gate terminal of each switch means via a parallel circuit of a resistor and a diode in order to turn on slowly and turn off quickly. In this way, for example, the first switch means 2 and the fourth switch means 5 are prevented from being simultaneously turned on instantaneously.

With respect to the output DC voltage Eo, the input DC voltage E
When i becomes high to some extent, δ2 = 0 (second drive signal V
d2 is always "H"). In this case, the conversion characteristic of the DC-DC converter is Eo / Ei = δ1, and the DC-DC converter operates as a step-down converter. In such a step-down mode, the third switch means 4 is fixed to the ON state. Therefore, both ends of the third switch means 4 are at zero voltage, and the first capacitor 11 is also at zero voltage. Similarly, no voltage is generated in the second capacitor 14. Therefore, the drive power supply voltage of the seventh switch means 16 becomes the output DC voltage Eo. Attempting to turn on the seventh switch means 16 while the first switch means 2 is in the on state, E
Since o is lower than the input DC voltage Ei, the gate-source voltage of the seventh switch means 16, which is the drive voltage, becomes a negative voltage. That is, in the step-down mode, the seventh switch means 16 is fixed to the off state.

Next, the input DC voltage Ei is changed to the output DC voltage Eo.
When the voltage value is close to the above, 1>δ1>δ2> 0.
In this case, the conversion characteristic of the DC-DC converter is Eo / Ei = δ1 / (1−δ2) as described above, and the DC-DC converter operates as a step-up / step-down converter. In such a step-up / step-down mode, the voltage in the OFF state of the third switch means 4 is the output DC voltage Eo, and the voltage of the first capacitor 11 obtained by rectifying and smoothing this is also Eo. Similarly, the voltage in the off state of the fifth switch means 10 is the voltage of the first capacitor 11, and the second capacitor 1 rectifies and smoothes this voltage.
The voltage of No. 4 also becomes Eo. For this reason, the drive power supply voltage of the seventh switch means 16 becomes 2Eo obtained by adding the voltage Eo of the second capacitor 14 to the output DC voltage Eo.

As described above, the second control circuit 17
Turns on and off the seventh switch means 16 in synchronization with on and off of the first switch means 2 by receiving the first drive signal Vd1. Seventh switch means 16
Is in the ON state, a voltage of 2Eo is applied to the gate terminal of the seventh switch means 16 via the resistor 170. At this time, the drain-source of the seventh switch 16 whose drain terminal is connected to the input DC power supply 1 is almost short-circuited, and the gate-source of the seventh switch 16 is 2Eo- The voltage of Ei is applied.

Further, when the input DC voltage Ei becomes lower than the output DC voltage Eo to some extent, δ1 = 1 (the first drive signal Vd1 is always “L”). In this case, DC-DC
The conversion characteristic of the converter is Eo / Ei = 1 / (1−δ
2) and operates as a boost converter. Also in such a step-up mode, the voltage of the second capacitor 14 becomes Eo as in the step-up / step-down mode. That is, the drive power supply voltage of the seventh switch means 16 becomes 2Eo.
The difference from the step-up / step-down mode is that since the first switch means 2 is always on, the voltage of 2Eo is always applied to the gate terminal of the seventh switch means 16 to be on. A voltage of 2Eo-Ei is applied between the gate and the source of the seventh switch means 16.

As described above, the DC-DC of the first embodiment
The converter operates in buck-boost mode and boost mode.
The seventh switch 16 connected in parallel with the first switch 2 turns on and off in synchronization with the first switch 2. For this reason, even if a sufficiently large gate-source voltage cannot be applied to the P-channel MOSFET used for the first switch means 2, the N-channel MO
The seventh switch means 16, which is an SFET, is turned on to reduce conduction loss. In addition, since the gate-source voltage is 2Eo-Ei, a larger driving voltage is applied as the input DC voltage Ei decreases, and the on-resistance of the first switch means 2 increases, and the on-resistance of the seventh switch means 16 increases. Can be compensated for by the reduction of

In the DC-DC converter according to the first embodiment, the fifth switch means 10 and the sixth switch means 13 have been described using diodes. However, rectifying switch means other than diodes, for example, It may be a synchronous rectifier.

(Embodiment 2) FIG. 2 is a circuit diagram showing a configuration of a DC-DC converter according to Embodiment 2 of the present invention. As shown in FIG. 2, the DC-DC converter according to the second embodiment has substantially the same configuration as the DC-DC converter according to the first embodiment. DC-DC of Embodiment 1
The difference from the converter is that the input DC power supply 1
The point is that the diode 18 as the eighth switch means is connected to the capacitor 11 of FIG. In FIG. 2, the first
The details of the control circuit 8 and the second control circuit 17 of FIG.

Next, the operation of the DC-DC converter of the second embodiment is substantially the same as that of the DC-DC converter of the first embodiment. That is, the operation of accumulating and releasing the magnetic energy of the choke coil 6 is repeated by each switch means that is turned on and off by the first control circuit 8 and the second control circuit 17, and power is output from the output capacitor 7 to the load 9. Supplied. The relationship between the input and output DC voltages and the step-down / step-up / step-down / step-up modes are also the same as those of the first embodiment.
The description is omitted because it is the same as that of the converter.

The operation of the diode 18 which is the eighth switch having a different configuration from the DC-DC converter of the first embodiment will be described below. The current flows through the diode 18 serving as the eighth switch means when the second switch means 3 is in the ON state, and when the input DC voltage Ei is higher than the output DC voltage Eo. At this time, the first capacitor 11 is charged to the input DC voltage Ei via the diode 18 as the eighth switch. When the second switch means 3 is turned off, the sixth
The second capacitor 14 is charged to the voltage of the first capacitor 11, that is, the input DC voltage Ei, via the diode 13 which is a switch means of the second embodiment. The drive power supply voltage of the seventh switch means 16 is Ei + Eo because it is the sum of the second capacitor 14 and the output DC voltage Eo. Seventh
Is applied, a voltage of Ei + Eo-Ei = Eo is applied between the gate and the source when the switch means 16 is in the ON state.

As described above, the voltage of Eo is applied between the gate and the source when the seventh switch means 16 is in the ON state because the input DC voltage Ei is higher than the output DC voltage Eo in the buck-boost mode. Is the case. In this case, in the case of the DC-DC converter of the first embodiment, the voltage applied between the gate and the source of the seventh switch means 16 is 2Eo-
Ei. When Ei> Eo, Eo> 2Eo
−Ei, the driving voltage higher than that of the DC-DC converter of the first embodiment is applied to the seventh switch 16.
Can be supplied to

As described above, according to the second embodiment of the present invention,
According to the C-DC converter, even when the input DC voltage Ei is higher than the output DC voltage Eo in the buck-boost mode,
Gate when the seventh switch means 16 is in the ON state.
The voltage of Eo is applied between the sources, and the DC of the first embodiment is applied.
-It is possible to supply a higher drive voltage than in the case of the DC converter.

In the DC-DC converter according to the second embodiment, the fifth switch means 10, the sixth switch means 13 and the eighth switch means 18 have been described using diodes. Rectifier switch means, for example, a synchronous rectifier. However, when both the fifth switch means 10 and the eighth switch means 18 are configured as a synchronous rectifier, any one of the switch means is used so that the input DC power supply 1 and the output capacitor 7 are not short-circuited. It is necessary to devise such that only one is turned on. DC of the present embodiment
-If a diode is used for the fifth switch means 10 and the eighth switch means 18 like a DC converter, the fifth switch means is used when the voltage of the input DC power supply 1 is higher than the voltage of the output capacitor 7. The diode 10 which is the eighth switch means conducts when the diode 10 is low.

(Embodiment 3) FIG. 3 is a circuit diagram showing a configuration of a DC-DC converter according to Embodiment 3 of the present invention. As shown in FIG. 3, an input DC power supply 1 of a voltage Ei is connected to the DC-DC converter of the third embodiment, and a first switch unit 2, a second switch unit 3,
Third switch means 4, fourth switch means 5, choke coil 6, and output capacitor 7 are provided. The voltage Eo of the output capacitor 7 is supplied to the load 9 as an output DC voltage.

The first switch means 2 and the third switch means 4 are a P-channel M having a source terminal connected to the high potential side.
OSFET. Also, the second switch means 3 and the fourth switch means
The switch means 5 is an N-channel MOSFET provided with a source terminal. The first switch means 2, the choke coil 6, and the second switch means 3 are connected in series, and when both the first switch means 2 and the second switch means 3 are turned on, the input DC voltage Ei is applied to the choke coil 6. Is done. The third switch means 4, the choke coil 6, and the fourth switch means 5 are connected in series, and when both the third switch means 4 and the fourth switch means 5 are turned on, the voltage of the choke coil 6 is changed to the output capacitor. 7 is applied.

The first control circuit 8 alternately turns on and off the first switch means 2 and the fourth switch means 5 so as to detect and stabilize the output DC voltage Eo, and the third switch means 4 and the second switch means 3 are alternately turned on and off. Each switch means has the same switching cycle T, and the ratio of the ON time in one switching cycle of the first switch means 2 and the second switch means 3, that is, the duty ratio, is δ1, δ2, respectively, and 1 ≧ δ1> δ2
≧ 0. Further, it outputs a drive signal synchronized with the on / off operation of the second switch means 3 and inputs the drive signal to a third control circuit 26 described later. The relationship between the input / output DC voltage and the basic operation in the step-down / step-up / step-down / step-up modes in the above configuration is the same as that of the DC-DC converter of the first embodiment, and thus the description is omitted.

Diode 19 serving as ninth switch means
And the third capacitor 20 constitute a third rectifying / smoothing circuit 21. The diode 22 which is the tenth switch and the fourth switch
Constitutes a fourth rectifying / smoothing circuit 24. The fourth capacitor 23 is connected to the input DC power supply 1 in series. The eleventh switch means 25 is an N-channel MO
The SFET is connected in parallel with the third switch means 4. The third control circuit 26 receives the drive signal output from the first control circuit 8 and receives the drive signal from the first control circuit 8.
5 is turned on and off in synchronization with the third switch means 4. The drive voltage of the eleventh switch means 25 is supplied from the fourth capacitor 23.

The third rectifying / smoothing circuit 21 and the fourth rectifying / smoothing circuit 21 which are different from the DC-DC converter of the first embodiment
The operation of the rectifying / smoothing circuit 24, the eleventh switch means 25, and the third control circuit 26 will be described.

First, when the first switch means 2 is turned off and the fourth switch means 5 is turned on, the third capacitor 20 is connected to the voltage of the output capacitor 7 via the diode 19 which is a ninth switch. That is, it is charged to the output DC voltage Eo. Next, when the first switch means 2 is turned on, the fourth capacitor 23 is charged to the voltage of the third capacitor 20, that is, the output DC voltage Eo via the diode 22, which is the tenth switch. That is, the same voltage as the output DC voltage Eo is generated in the fourth capacitor 23 by the on / off operation of the first switch means 2 and the fourth switch means 5.

Since the fourth capacitor 23 is connected in series with the input DC power supply 1, the drive voltage of the eleventh switch means 25 input to the third control circuit 26 is Ei +
It becomes Eo. The third control circuit 26 turns on and off the eleventh switch means 25 in synchronization with the third switch means 4. When the eleventh switch means 25 is on,
The third switch means 4 is also on. Therefore, between the gate and the source of the eleventh switch means 25, Ei
+ Eo−Eo = Ei is applied.

The output DC voltage Eo is generated in the fourth capacitor 23 by the on / off operation of the first switch means 2 and the fourth switch means 5 as described above. Therefore, the third control circuit 26 applies Ei between the gate and the source when the eleventh switch means 25 is in the ON state in the case of the step-down mode or the step-up / step-down mode.

As described above, the DC-DC of the third embodiment
In the converter, in the step-down mode and the step-up / step-down mode in which the output DC voltage Eo is low, the eleventh switch means 25 connected in parallel with the third switch means 4 turns on and off in synchronization with the third switch means 4. For this reason, even if a sufficiently large gate-source voltage cannot be applied to the P-channel MOSFET used for the third switch means 4, the eleventh switch means 25, which is an N-channel MOSFET connected in parallel, is turned on. To reduce conduction loss.
Moreover, since the gate-source voltage is Ei, it does not depend on the output DC voltage Eo.

In the DC-DC converter according to the third embodiment, the ninth switch means 19 and the tenth
Although the description has been made using a diode as the switch means 22, the switch means for rectification other than the diode, for example, a synchronous rectifier may be used.

[0042]

As apparent from the detailed description of the embodiments, the present invention has the following effects.

According to the DC-DC converter of the present invention,
A first switch, a choke coil, and a second switch connected in series are connected in parallel to an input DC power supply, and the third switch, the choke coil, and the fourth switch are connected in series. Has a configuration connected in parallel with the output capacitor, a first rectifying / smoothing circuit including a fifth switch and a first capacitor connected in parallel with the third switch, and a fifth switch. A second rectifying / smoothing circuit comprising sixth switch means and a second capacitor connected in parallel with the first switch means, a seventh switch means connected in parallel with the first switch means, a second capacitor and an output. The added voltage with the capacitor is used as the drive voltage source,
By providing a second control circuit for turning on and off the seventh switch means in synchronization with the first switch means, a sufficient drive voltage can be supplied to the first switch means in a step-up mode or a step-up / step-down mode in which the input DC voltage is low. , The seventh switch means connected in parallel is turned on to reduce conduction loss. In addition, the driving voltage is about twice the difference between the output DC voltage and the input DC voltage. Therefore, the lower the input DC voltage is, the larger the driving voltage is obtained. The reduction in the on-voltage of the means can compensate. That is, even when the input DC voltage is low, it is possible to have a highly efficient power transfer characteristic.

Further, in the above configuration, by providing a diode which is an eighth switch means for connecting the input DC power supply and the first capacitor, even when the input DC voltage is higher than the output DC voltage in the buck-boost mode. When the seventh switch is in the ON state, the same voltage as the output DC voltage is applied between the gate and the source, so that a higher drive voltage can be supplied. In particular, if the fifth switch means and the eighth switch means are both constituted by diodes, the input and output will not be short-circuited.

Also, the DC-DC of the present invention according to another aspect
According to the converter, the first switch means, the choke coil, and the second switch means connected in series are connected in parallel to the input DC power supply, and the third switch means, the choke coil, and the second switch connected in series are connected in series. 4 is connected in parallel with the output capacitor, and the ninth switch is connected across the choke coil and the third switch.
A third rectifying / smoothing circuit including the first switching means and the third capacitor, and a fourth rectifying / smoothing circuit including the tenth switching means and the fourth capacitor connected across the first switching means and the third capacitor. A circuit, an eleventh switch connected in parallel with the third switch, a driving voltage source using an added voltage of the fourth capacitor and the input DC power supply, and the eleventh switch is a third switch. And a third control circuit that turns on and off in synchronism with the third switch means in a step-down mode or a step-up / step-down mode in which the output DC voltage to be controlled is low, such as during constant current control or overload droop. Even if a sufficient drive voltage cannot be applied, the eleventh switch means connected in parallel is turned on to reduce conduction loss. Moreover, the drive voltage is the same as the input DC voltage, and does not depend on the output DC voltage. That is, even with a low output DC voltage, it is possible to have a highly efficient power transfer characteristic.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a DC-DC converter according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration of a DC-DC converter according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram showing a configuration of a DC-DC converter according to a third embodiment of the present invention.

FIG. 4 is a circuit diagram showing a configuration of a conventional buck-boost converter

[Explanation of symbols]

 Reference Signs List 1 input AC power supply 2 first switch means 3 second switch means 4 third switch means 5 fourth switch means 6 choke coil 7 output capacitor 8 first control circuit 9 load 10 fifth switch means 11 1 capacitor 12 1st rectifying / smoothing circuit 13 6th switching means 14 2nd capacitor 15 2nd rectifying / smoothing circuit 16 7th switching means 17 2nd control circuit

Claims (4)

[Claims] 1. A first switch means, a choke coil and a second switch means connected in series are connected in parallel to an input DC power supply, and a third switch means, the choke coil and a second switch connected in series are connected in series. A DC-DC converter having a configuration in which the first switch means and the fourth switch means are alternately turned on and off, and the second switch means And the third switch means are turned on and off alternately, and the first switch means, the second switch means, and the third switch means are controlled so as to output a controlled DC voltage from the output capacitor. A first control circuit for controlling an on / off time of the fourth switch means, a fifth switch means and a first capacitor, wherein the third switch means A first rectifying / smoothing circuit connected in parallel with a stage and configured to charge the output capacitor from the output capacitor to the first capacitor when the second switch is in an on state; A second capacitor connected in parallel with the fifth switch means, and configured to charge the second capacitor from the first capacitor when the second switch means is in an off state. Second
A rectifying / smoothing circuit, a seventh switching means connected in parallel with the first switching means, a driving voltage source using an added voltage of the second capacitor and the output capacitor, and the seventh switching means And a second control circuit for turning on and off in synchronization with the first switch means. 2. The apparatus according to claim 1, further comprising: an eighth switch for connecting the input DC power supply and the first capacitor so that the first capacitor is charged with the voltage of the input DC power supply. DC-DC converter. 3. The DC-DC converter according to claim 2, wherein at least said fifth switch means and said eighth switch means are diodes. 4. A first switch means, a choke coil, and a second switch means connected in series are connected in parallel to an input DC power supply, and a third switch means, the choke coil, and a second switch connected in series are connected in series. A DC-DC converter having a configuration in which the first switch means and the fourth switch means are alternately turned on and off, and the second switch means And the third switch means are turned on and off alternately, and the first switch means, the second switch means, and the third switch means are controlled so as to output a controlled DC voltage from the output capacitor. A first control circuit for controlling an on / off time of the fourth switch means, a ninth switch means and a third capacitor, wherein the choke coil A third rectifying / smoothing circuit connected across the third switch means and configured to charge the output capacitor to the third capacitor when the first switch means is in an off state; The first switch means and the third capacitor are connected across the first switch means and the third capacitor. When the first switch means is in the ON state, the fourth capacitor is connected to the fourth capacitor by the fourth capacitor. A fourth rectifying / smoothing circuit configured to be charged to the capacitor of the first and second switches, an eleventh switch unit connected in parallel with the third switch unit, and the fourth capacitor and the input DC power supply. A third control circuit for turning on and off the eleventh switch means in synchronization with the third switch means using the added voltage as a drive voltage source.