JP2002280573A - Silicon carbide semiconductor element and manufacturing method therefor - Google Patents
Silicon carbide semiconductor element and manufacturing method thereforInfo
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- JP2002280573A JP2002280573A JP2001079780A JP2001079780A JP2002280573A JP 2002280573 A JP2002280573 A JP 2002280573A JP 2001079780 A JP2001079780 A JP 2001079780A JP 2001079780 A JP2001079780 A JP 2001079780A JP 2002280573 A JP2002280573 A JP 2002280573A
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- silicon carbide
- nitrogen
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Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は炭化珪素を素材とす
る半導体素子、すなわち炭化珪素半導体素子に関するも
のである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device made of silicon carbide, that is, a silicon carbide semiconductor device.
【0002】[0002]
【従来の技術】炭化珪素は、半導体素子の素材としてシ
リコンより優れた点が多く、電力用半導体や高周波半導
体への利用を目指して実用化のための研究が精力的にお
こなわれている。炭化珪素の結晶構造には6H型や4H型、
3C型があり、その単結晶は昇華法によって作製される。
炭化珪素半導体素子は、単結晶基板にCVD(化学的気相
成長法)により所定のキャリア濃度のエビタキシヤル成
長層を形成したり、局所的に伝導性の制御を行うために
イオン注入を実施して作製される。また、炭化珪素を、
たとえば1100〜1200℃の高温の酸化雰囲気中に
曝すと、炭化珪素中の炭素は酸化されて二酸化炭素(C
O2 )となり、一方炭化珪素中の珪素は酸化されて、表
面に二酸化珪素(SiO2 )膜が形成される。その熱酸
化膜を半導体素子の絶縁膜として利用することができ
る。2. Description of the Related Art Silicon carbide has many advantages over silicon as a material for semiconductor devices, and studies for its practical use are being vigorously conducted with the aim of using it for power semiconductors and high-frequency semiconductors. The crystal structure of silicon carbide is 6H type or 4H type,
There is a 3C type, and the single crystal is produced by a sublimation method.
The silicon carbide semiconductor element is formed by forming an epitaxial growth layer having a predetermined carrier concentration on a single crystal substrate by CVD (Chemical Vapor Deposition) or performing ion implantation to locally control conductivity. It is made. Also, silicon carbide is
For example, when exposed to a high temperature oxidizing atmosphere of 1100 to 1200 ° C., carbon in silicon carbide is oxidized and carbon dioxide (C
O 2 ), while the silicon in the silicon carbide is oxidized to form a silicon dioxide (SiO 2 ) film on the surface. The thermal oxide film can be used as an insulating film of a semiconductor device.
【0003】[0003]
【発明が解決しようとする課題】昇華法による基板やエ
ビタキシヤル成長層は、製造装置内に残留もしくは混入
した大気中の窒素ガスを取り込んで、n型の伝導性を示
す傾向にある。特にエビタキシヤル成長工程は、150
0℃以上の高温で、しかも長時間におよぶ工程である。
また、ドーパントのイオン注入も活性化率向上のため、
1000℃以上の高温でおこなわれることが多い。The substrate and the epitaxial growth layer formed by the sublimation method tend to exhibit n-type conductivity by taking in the nitrogen gas in the atmosphere remaining or mixed in the manufacturing apparatus. In particular, the shrimp growth step is 150
This is a process at a high temperature of 0 ° C. or more and for a long time.
Also, ion implantation of dopants to improve the activation rate,
Often performed at a high temperature of 1000 ° C. or higher.
【0004】熱酸化の際に、炭化珪素中の炭素はCO2
ガスになって、系外に排出される。その際、取り込まれ
た窒素もガスとして外部に排出されるが,その一部は炭
化珪素中の珪素原子と結合して熟酸化膜との界面近傍の
炭化珪素中に極微細な窒化珪素粒子が形成される。例え
ば整流素子の−種であるショットキダイオードを作製す
る場合に、熱酸化膜を除去してその表面にショットキー
電極を形成しても,その金属/半導体界面に窒化珪素の
微粒子が分散した層が存在するため,良好な整流特性が
得られないという問題があった。During thermal oxidation, carbon in silicon carbide is CO 2
It becomes gas and is discharged out of the system. At this time, the trapped nitrogen is also exhausted to the outside as a gas, but part of the nitrogen bonds with silicon atoms in the silicon carbide to form ultrafine silicon nitride particles in the silicon carbide near the interface with the mature oxide film. It is formed. For example, when manufacturing a Schottky diode which is a type of rectifier element, even if the thermal oxide film is removed and a Schottky electrode is formed on the surface, a layer in which fine particles of silicon nitride are dispersed at the metal / semiconductor interface is formed. There was a problem that good rectification characteristics could not be obtained because of the presence.
【0005】また,熱酸化膜を利用してMOS型の電界
効果型トランジスタ(以下MOSFETと記す)を作製
する場合には、酸化膜/半導体の境界に近い半導体層に
形成されるチヤネル層に窒化珪素の微粒子が存在するた
め、チヤネル層を移動するキャリアがこの窒化珪素微粒
子により散乱を受け、移動度が低くなってしまうという
問題があった。When a MOS field effect transistor (hereinafter referred to as a MOSFET) is manufactured by using a thermal oxide film, a nitride layer is formed on a channel layer formed on a semiconductor layer near an oxide film / semiconductor boundary. Since silicon fine particles are present, there is a problem that carriers moving in the channel layer are scattered by the silicon nitride fine particles, resulting in a low mobility.
【0006】これらの問題に鑑み本発明の目的は、窒化
珪素微粒子の発生を抑え,特性の良好なショットキーダ
イオードやMOSFET等の炭化珪素半導体素子を提供
することにある.In view of these problems, an object of the present invention is to provide a silicon carbide semiconductor device such as a Schottky diode or a MOSFET having excellent characteristics by suppressing the generation of silicon nitride fine particles.
【0007】[0007]
【課題を解決するための手段】上記課題解決のため本発
明は、炭化珪素半導体基板上に炭化珪素エピタキシャル
層を成長した炭化珪素半導体素子において、炭化珪素エ
ピタキシャル層に含まれる窒素濃度が1×1015/cm3以
下であるものとする。炭化珪素エピタキシャル層中の窒
素濃度を抑制することにより窒化珪素微粒子の生成を抑
えることができる。According to the present invention, there is provided a silicon carbide semiconductor device having a silicon carbide epitaxial layer grown on a silicon carbide semiconductor substrate, wherein the concentration of nitrogen contained in the silicon carbide epitaxial layer is 1 × 10 It is assumed to be 15 / cm 3 or less. By suppressing the nitrogen concentration in the silicon carbide epitaxial layer, generation of silicon nitride fine particles can be suppressed.
【0008】特に、炭化珪素エピタキシャル層がn型の
場合には、燐、批素もしくはアンチモン等の窒素以外の
Vb 属元素、またはVI族元素をドーパントとし、窒素
の取り込みを避けることが重要である。炭化珪素エピタ
キシャル層が、アルミニウムもしくはほう素等のIII
元素、またはII族元素を含んでいても、また、それら
窒素以外のVb 属元素、またはVI族元素、III元
素、II族元素の濃度が、1×1015/cm3以上であって
も良いことは勿論である。In particular, when the silicon carbide epitaxial layer is n-type, it is important to use a Vb group element other than nitrogen, such as phosphorus, chromium, or antimony, or a VI group element as a dopant to avoid the incorporation of nitrogen. . The silicon carbide epitaxial layer is made of III such as aluminum or boron.
Element or a group II element, and the concentration of a Vb group element other than nitrogen, or a group VI element, a III element, or a group II element may be 1 × 10 15 / cm 3 or more. Of course.
【0009】炭化珪素半導体素子が不純物イオンを注入
した領域を有する場合にも、窒素の取り込みを避け、イ
オン注入領域に含まれる窒素濃度が1×1015/cm3以下
であるものとする。イオン注入領域についても、n型の
場合には燐、批素もしくはアンチモン等の窒素以外のV
b 属元素、またはVI族元素をドーパントとし、窒素の
取り込みを避けることとする。[0009] Even when the silicon carbide semiconductor device has a region into which impurity ions are implanted, it is assumed that nitrogen is not taken in and the concentration of nitrogen contained in the ion-implanted region is 1 × 10 15 / cm 3 or less. Also for the ion implantation region, in the case of n-type, V other than nitrogen such as phosphorus,
A group b element or a group VI element is used as a dopant to avoid incorporation of nitrogen.
【0010】不純物イオンがアルミニウムもしくはほう
素等のIII元素、またはII族元素である場合は問題
無い。半導体素子が金属/半導体界面が形成するショッ
トキー障壁により整流特性を有するショットキーダイオ
ードの場合には、窒化珪素微粒子の生成を抑えることに
より後述のように良好な界面特性を有するショットキー
ダイオードが得られる。There is no problem when the impurity ions are elements III or II such as aluminum or boron. In the case where the semiconductor element is a Schottky diode having rectification characteristics due to a Schottky barrier formed by a metal / semiconductor interface, a Schottky diode having good interface characteristics can be obtained as described later by suppressing the generation of silicon nitride fine particles. Can be
【0011】半導体素子が熱酸化膜を有する場合には、
特に熱酸化工程で窒化珪素微粒子を発生しやすいので、
熱酸化される部分の窒素濃度を低く抑えて置くとことが
重要である。半導体素子がMOSFETの場合には、後
述のようにチヤネル層を走行するキャリアが窒化珪素微
粒子による散乱を受けないので高移動度を有する炭化珪
素MOSFETが得られる。When the semiconductor element has a thermal oxide film,
In particular, since silicon nitride particles are easily generated in the thermal oxidation process,
It is important to keep the nitrogen concentration in the part to be thermally oxidized low. When the semiconductor element is a MOSFET, a silicon carbide MOSFET having high mobility can be obtained because carriers traveling in the channel layer are not scattered by silicon nitride fine particles as described later.
【0012】[0012]
【発明の実施の形態】[実施例1]図1は本発明実施例
1の炭化珪素ショットキーダイオード(以下SBDと記
す)の断面図である。4H型の炭化珪素基板(以下SiC 基
板と記す)11上に、n- エビタキシャル層12を成長した
エビタキシャルウェハを使用して製作した、3mm角、電
極面積が3.14mm2 のSBDである。13はn- エビタキ
シャル層12とショットキ接合を形成するチタン(Ti)の
ショットキー電極、14はSiC 基板11の裏面に設けられた
チタン、ニッケル、金(Ti/Ni/Au)のカソード電極、15
は酸化膜、16はほう素イオンの注入と熱処理で形成され
たガードリングである。Embodiment 1 FIG. 1 is a sectional view of a silicon carbide Schottky diode (hereinafter referred to as SBD) according to Embodiment 1 of the present invention. An SBD having a size of 3 mm square and an electrode area of 3.14 mm 2 manufactured by using an shrimp epitaxial wafer on which an n − shrimp epitaxial layer 12 is grown on a 4H silicon carbide substrate (hereinafter referred to as a SiC substrate) 11. . 13 the n - Ebitakisharu layer 12 and the Schottky electrode of titanium to form a Schottky junction (Ti), titanium 14 provided on the back surface of the SiC substrate 11, a nickel, a cathode electrode of gold (Ti / Ni / Au), Fifteen
Denotes an oxide film, and 16 denotes a guard ring formed by boron ion implantation and heat treatment.
【0013】以下に製造方法を詳しく説明する。4H型で
シリコン面(以下Si面と記す)を(11-20 )方向に8度
傾けた(この角度をオフアングルという)直径2インチ
のSiC 基板11を使用した。SiC 基板11はn型でキャリア
濃度が1×1018/cm3である。ただし、6H型や3C型でも
よいし,またC 面や(11-20 )面でも良い。あるいはオ
フアングルの方向や角度が異なっても本発明の適用には
何の影響も及ばさない。Hereinafter, the manufacturing method will be described in detail. A 4H-type SiC substrate 11 having a silicon surface (hereinafter referred to as Si surface) inclined by 8 degrees in the (11-20) direction (this angle is referred to as off-angle) and having a diameter of 2 inches was used. The SiC substrate 11 is n-type and has a carrier concentration of 1 × 10 18 / cm 3 . However, 6H type or 3C type may be used, and C-plane or (11-20) plane may be used. Or, even if the off-angle direction and angle are different, there is no effect on the application of the present invention.
【0014】最初にSiC 基板11の裏面側に燐イオンのイ
オン注入により、n+ カソード層17を形成する。加速電
圧は50kV、ドーズ量は5×1014/cm2である。つい
で、製造装置内に残留もしくは混入した大気中の窒素ガ
スを避けるため、ロードロック式のエピタキシャル成膜
装置を用いて、アルゴンガスによるパージと、800℃
ベークとを3回繰り返した後、燐ドープのn- エビタキ
シャル層12を成膜する。n- エビタキシャル層12は、厚
さ10μmでn型、キャリア濃度が1×1016/cm3であ
る。原料ガスは、モノシラン(SiH4 )、プロパン
(C3H8 )とフォスフィン(PH3 )であり、SiC
コートのグラファイトサセプタを用いたRF加熱によ
り、成膜温度は1500℃、時間は5時間である。この
エピタキシャル成長中に裏面のn+ カソード層17に注入
された燐イオンが熱処理され活性化する。なお、ロード
ロック式でないエピタキシャル成膜装置の場合は、意図
しない窒素のドープがおき、その濃度は1×1016/cm3
以上にも達する。First, an n + cathode layer 17 is formed on the rear surface side of the SiC substrate 11 by ion implantation of phosphorus ions. The acceleration voltage is 50 kV and the dose is 5 × 10 14 / cm 2 . Next, in order to avoid nitrogen gas in the atmosphere remaining or mixed in the manufacturing apparatus, using a load-lock type epitaxial film forming apparatus, purging with argon gas and 800 ° C.
After repeating the baking three times, n phosphorus doped - forming the Ebitakisharu layer 12. n - Ebitakisharu layer 12, n-type with a thickness of 10 [mu] m, the carrier concentration of 1 × 10 16 / cm 3. The source gases are monosilane (SiH 4 ), propane (C 3 H 8 ) and phosphine (PH 3 ).
By the RF heating of the coat using a graphite susceptor, the film formation temperature is 1500 ° C. and the time is 5 hours. During this epitaxial growth, the phosphorus ions implanted into the n + cathode layer 17 on the back surface are heat-treated and activated. In the case of an epitaxial film forming apparatus which is not a load-lock type, unintended nitrogen doping occurs and its concentration is 1 × 10 16 / cm 3
Reaches even more.
【0015】ポジタイプのフォトレジストを使ってガー
ドリング16のバターニングをする。続いて、ほう素を3
0〜180keV の加速電圧でボックス状にイオン注入し
た後、1600℃で30分間のアニールをおこない、深
さ約0.5μm のガードリング16を形成する。1100
℃、5時間のパイロジェニック酸化により、厚さ30nm
の酸化膜15を形成してパターニングした後、ショットキ
ー電極13としてTiをスパッタ蒸着し、200℃、5分間
の熱処理をし、次いでカソード電極14としてTi/Ni/Auを
スパッタ蒸着し、チップ化した。The guard ring 16 is patterned using a positive type photoresist. Then, add boron
After ion implantation in a box shape at an acceleration voltage of 0 to 180 keV, annealing is performed at 1600 ° C. for 30 minutes to form a guard ring 16 having a depth of about 0.5 μm. 1100
30nm thickness by pyrogenic oxidation for 5 hours
After the oxide film 15 is formed and patterned, Ti is sputter-deposited as the Schottky electrode 13, heat treated at 200 ° C. for 5 minutes, and then Ti / Ni / Au is sputter-deposited as the cathode electrode 14 to form a chip. did.
【0016】図1(実線−リンドープ)は、このように
して作製したSBD の逆方向電流電圧特性図である。同図
に比較例として、従来の製造方法による窒素ドープのエ
ピタキシャル層をもつSBD (破線−チッ素ドープ)の逆
方向電流電圧特性も示した。従来の製造方法による窒素
ドープのSBD では、例えば逆電圧400V でのもれ電流
が約30mA/cm2であるのに対し、本実施例1のSBD のも
れ電流は1.5mA/cm2であり、1/20になっているこ
とがわかる。FIG. 1 (solid line-phosphorus doping) is a reverse current-voltage characteristic diagram of the SBD thus manufactured. The figure also shows, as a comparative example, the reverse current-voltage characteristics of an SBD (broken line-nitrogen-doped) having a nitrogen-doped epitaxial layer according to a conventional manufacturing method. In the nitrogen-doped SBD according to the conventional manufacturing method, for example, the leakage current at a reverse voltage of 400 V is about 30 mA / cm 2 , whereas the leakage current of the SBD of the first embodiment is 1.5 mA / cm 2 . It can be seen that it is 1/20.
【0017】すなわち、上のエピタキシャル層12の成膜
工程で、ロードロック式のエピタキシャル成膜装置を用
いて、十分に製造装置内の窒素ガスを避ける操作をおこ
ない、燐ドープのn- エビタキシャル層12を成膜したこ
とにより、表面近傍の窒化珪素微粒子が殆ど発生しなか
ったためと考えられる。SiMS分析法によりエピタキ
シャル層12の窒素濃度を測定したところ、2×1014/c
m3であった。[0017] That is, in the step of forming the epitaxial layer 12 above, using an epitaxial deposition apparatus of the load lock, do to avoid nitrogen gas in the well production apparatus, the phosphorous doped n - Ebitakisharu layer 12 This is probably because silicon nitride particles were hardly generated in the vicinity of the surface due to the film formation. When the nitrogen concentration of the epitaxial layer 12 was measured by the SiMS analysis method, it was 2 × 10 14 / c
It was m 3.
【0018】確認のため、エピタキシャル層12の成膜工
程で、ロードロック式のエピタキシャル成膜装置でのパ
ージ条件やベーク条件を変えて、窒素濃度の異なるSBD
を作製し、その逆方向特性を測定した。窒素濃度と燐濃
度との和は、1×1016/cm3とした。図3は、逆電圧4
00V でのもれ電流の窒素濃度依存性を示す特性図であ
る。For confirmation, in the step of forming the epitaxial layer 12, the purge conditions and bake conditions in the load-lock type epitaxial film forming apparatus were changed to change the SBD having different nitrogen concentrations.
Was fabricated, and its reverse characteristics were measured. The sum of the nitrogen concentration and the phosphorus concentration was 1 × 10 16 / cm 3 . FIG.
FIG. 9 is a characteristic diagram showing the nitrogen concentration dependency of the leakage current at 00V.
【0019】窒素濃度が1×1015/cm3以下であれば、
漏れ電流は3mA/cm2以下に抑えられるが、1×1015/c
m3を越すともれ電流が急増している。従って、窒素濃度
を1×1015cm-3以下に抑えることが重要である。尚、
イオン注入種は窒素以外のVb属元素であればどれでもよ
い。また、p型のエピタキシャルウェハの場合には、ア
ルミニウムを用いても同様の結果が得られる。If the nitrogen concentration is 1 × 10 15 / cm 3 or less,
Although the leakage current can be suppressed to 3mA / cm 2 or less, 1 × 10 15 / c
current leakage and Kosu the m 3 is rapidly increasing. Therefore, it is important to keep the nitrogen concentration at 1 × 10 15 cm −3 or less. still,
The ion-implanted species may be any Vb element other than nitrogen. In the case of a p-type epitaxial wafer, similar results can be obtained even when aluminum is used.
【0020】[実施例2]図4は本発明実施例2のSiC
MOSFETの断面図である。実施例1と同種の4H型の
SiC 基板21を使用した。SiC 基板21上にトリメチルアル
ミニウムを使ってアルミニウムをドープしたp- エビタ
キシャル層22を成長した。このとき、実施例1と同様
に、ロードロツク式のエピタキシャル成膜装置を用い
て、アルゴンガスによるパージと、800℃ベークとを
3回繰り返した後、p- エビタキシャル層22を成膜し
た。[Embodiment 2] FIG. 4 shows a SiC according to Embodiment 2 of the present invention.
It is sectional drawing of MOSFET. The same type of 4H type as in Example 1
The SiC substrate 21 was used. P-doped aluminum using trimethylaluminum on the SiC substrate 21 - was grown Ebitakisharu layer 22. At this time, in the same manner as in Example 1, using an epitaxial deposition apparatus Rodorotsuku type, and purge with argon gas, it was repeated three times and 800 ° C. bake, p - was formed Ebitakisharu layer 22.
【0021】ポジタイプのフォトレジストを使ってバタ
ーニングをした後、燐を30〜180keV の加速電圧で
ボックス状にイオン注入し、1600℃で30分間のア
ニールをおこない、深さ約0.5μm のn+ ソース領域
27およびn+ ドレイン領域28を形成する。1100℃、
5時間のパイロジェニック酸化により、厚さ30nmのゲ
ート酸化膜25を形成してパターニングした後、Ti/Ni/Au
をスパッタ蒸着しパターニングしてソース電極24、ドレ
イン電極23、ケート電極26、基板電極29を形成して、チ
ップ化した。After patterning using a positive type photoresist, phosphorus is ion-implanted in the form of a box at an accelerating voltage of 30 to 180 keV, annealing is performed at 1600 ° C. for 30 minutes, and n is about 0.5 μm deep. + Source area
27 and an n + drain region 28 are formed. 1100 ° C,
After forming and patterning a gate oxide film 25 having a thickness of 30 nm by pyrogenic oxidation for 5 hours, Ti / Ni / Au
Was formed by sputtering and patterned to form a source electrode 24, a drain electrode 23, a gate electrode 26, and a substrate electrode 29, and formed into chips.
【0022】このようにして作製したMOSFETのチ
ャネルでのキャリア移動度を測定したところ、115cm
2/Vsと従来の窒素汚染を避けない方法によりp- エビタ
キシャル層を形成したものの移動度5cm2/Vsの約20倍
以上の値を示した。これは、上のp- エビタキシャル層
22の形成工程で、製造装置内に残留もしくは混入した大
気中の窒素汚染を避ける方法を取ったことにより、表面
近傍の窒化珪素微粒子が殆ど発生しなかったためと考え
られる。SIMS分析法によりp-エピタキシャル層22
の窒素濃度を測定したところ、2×1014/cm3であっ
た。The carrier mobility in the channel of the MOSFET fabricated as described above was measured to be 115 cm.
It showed about 20-fold or more the value of the mobility 5 cm 2 / Vs but was formed Ebitakisharu layer - p by a method which does not avoid the 2 / Vs and conventional nitrogen pollution. This is, above p - Ebitakisharu layer
It is probable that silicon nitride fine particles near the surface were hardly generated due to the method of avoiding the nitrogen contamination in the atmosphere remaining or mixed in the manufacturing apparatus in the forming step 22. P - epitaxial layer 22 by SIMS analysis
Was 2 × 10 14 / cm 3 .
【0023】確認のため、p- エピタキシャル層22の形
成工程で、ドープガスの比率を変えて、窒素濃度の異な
るMOSFETを作製し、その移動度特性を測定した。
窒素濃度と燐濃度との和は、1×1016/cm3とした。図
5は、キャリア移動度の窒素濃度依存性を示す特性図で
ある。窒素濃度が1×1015/cm3以下であれば、キャリ
ア移動度は100cm2/Vs以上であるが、1×1015/cm3
を越すと急速に低下している。従って、窒素濃度を1×
1015cm-3以下に抑えることが重要である。For confirmation, in the step of forming the p - epitaxial layer 22, MOSFETs having different nitrogen concentrations were manufactured by changing the ratio of the doping gas, and their mobility characteristics were measured.
The sum of the nitrogen concentration and the phosphorus concentration was 1 × 10 16 / cm 3 . FIG. 5 is a characteristic diagram showing the nitrogen concentration dependency of the carrier mobility. If the nitrogen concentration is 1 × 10 15 / cm 3 or less, the carrier mobility is 100 cm 2 / Vs or more, but 1 × 10 15 / cm 3
After that, it drops rapidly. Therefore, the nitrogen concentration is 1 ×
It is important to keep it below 10 15 cm -3 .
【0024】更にMOS 界面のクーロン散乱によるチャネ
ル移動度を改善する目的で、n+ ソース領域27およびn
+ ドレイン領域28との間に、燐イオンの注入によるカウ
ンタドープ領域30を形成した。加速電圧は、30kV、ド
ーズ量は2×1011/cm2とした。比較のため、窒素イオ
ンの注入によりカウンタードープ領域を形成したものも
作製した。両者を比較した結果,窒素のカウンタドープ
ではチャネル移動度が100cm2/Vsであったが燐ドープ
では150cm2/Vsと大幅に向上させることができた。For the purpose of improving channel mobility due to Coulomb scattering at the MOS interface, n + source regions 27 and n +
A counter-doped region 30 was formed between the + drain region 28 and the implantation of phosphorus ions. Accelerating voltage, 30 kV, the dose was 2 × 10 11 / cm 2. For comparison, a counter-doped region was formed by implanting nitrogen ions. As a result of comparison between the two, the channel mobility was 100 cm 2 / Vs in nitrogen counter doping, but was significantly improved to 150 cm 2 / Vs in phosphorus doping.
【0025】[0025]
【発明の効果】以上説明したように本発明によれば、エ
ピタキシャル層成長工程における窒素混入を避け、炭化
珪素エピタキシャル層に含まれる窒素濃度を1×1015
/cm3以下に抑制することにより、窒化珪素微粒子発生の
影響を免れ、ショットキーダイオートやMOSFETの
特性を改善することができた。As described above, according to the present invention, nitrogen is prevented from being mixed in the epitaxial layer growth step and the concentration of nitrogen contained in the silicon carbide epitaxial layer is reduced to 1 × 10 15
By suppressing the density to / cm 3 or less, the effect of the generation of silicon nitride fine particles was avoided, and the characteristics of the Schottky diode and the MOSFET could be improved.
【0026】更に、不純物領域形成の際にも、n型ドー
パントとして窒素以外の元素を用いることが有効である
ことを示した。本発明により、ショットキーダイオート
やMOSFET以外にも特性の優れた炭化珪素半導体素
子を、再現性良く作製することが可能になる。Furthermore, it has been shown that it is effective to use an element other than nitrogen as an n-type dopant in forming an impurity region. According to the present invention, a silicon carbide semiconductor device having excellent characteristics other than the Schottky diode and the MOSFET can be manufactured with high reproducibility.
【図1】本発明実施例1のSiCSBDおよび比較例の電流−
電圧特性図FIG. 1 is a diagram showing currents of a SiCSBD of Example 1 of the present invention and a comparative example.
Voltage characteristic diagram
【図2】本発明実施例1のSiCSBDの断面図FIG. 2 is a cross-sectional view of the SiCSBD according to the first embodiment of the present invention.
【図3】SiCSBDの漏れ電流の窒素濃度依存性を示す特性
図FIG. 3 is a characteristic diagram showing a nitrogen concentration dependency of a leakage current of SiCSBD.
【図4】本発明実施例2のSiCMOSFET の断面図FIG. 4 is a cross-sectional view of a SiCMOSFET according to a second embodiment of the present invention.
【図5】SiCMOSFET のキャリア移動度の窒素濃度依存性
を示す特性図FIG. 5 is a characteristic diagram showing the nitrogen concentration dependence of the carrier mobility of a SiCMOSFET.
11、21 SiC 基板 12 n- エビタキシャル層 13 ショットキー電極 14 カソード電極 15 二酸化珪素膜 16 ガードリング 22 p- エビタキシャル層 23 ソース電極 24 ドレイン電極 25 ゲート酸化膜 26 ゲート電極 27 n+ ソース領域 28 n+ ドレイン領域 29 基板電極 30 カウンタードープ領域11 and 21 SiC substrate 12 n - Ebitakisharu layer 13 Schottky electrode 14 cathode electrode 15 the silicon dioxide film 16 guard rings 22 p - Ebitakisharu layer 23 source electrode 24 drain electrode 25 a gate oxide film 26 gate electrode 27 n + source region 28 n + drain region 29 substrate electrode 30 counter-doped region
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H01L 29/861 H01L 29/91 D Fターム(参考) 4K030 AA05 AA06 AA09 BA37 BB02 CA04 FA10 LA14 4M104 AA03 BB14 CC01 CC03 CC05 DD23 DD37 DD63 DD78 DD83 DD90 FF02 FF13 FF17 GG03 GG09 GG10 GG14 5F045 AA03 AB06 AC01 AC07 AC19 AD18 CA05 DA60 5F140 AA01 BA02 BA17 BB15 BE07 BF07 BF15 BF21 BF25 BG30 BJ07 BJ11 BJ15 BK13 BK21 BK29 CF00 ────────────────────────────────────────────────── ─── of the front page continued (51) Int.Cl. 7 identification mark FI theme Court Bu (reference) H01L 29/861 H01L 29/91 D F term (reference) 4K030 AA05 AA06 AA09 BA37 BB02 CA04 FA10 LA14 4M104 AA03 BB14 CC01 CC03 CC05 DD23 DD37 DD63 DD78 DD83 DD90 FF02 FF13 FF17 GG03 GG09 GG10 GG14 5F045 AA03 AB06 AC01 AC07 AC19 AD18 CA05 DA60 5F140 AA01 BA02 BA17 BB15 BE07 BF07 BF15 BF21 BF25 BG30 BJ07 BF21 BF21 BF21
Claims (10)
シャル層を成長した炭化珪素半導体素子において、炭化
珪素エピタキシャル層に含まれる窒素濃度が1×1015
/cm3以下であることを特徴とする炭化珪素半導体素子。In a silicon carbide semiconductor device having a silicon carbide epitaxial layer grown on a silicon carbide semiconductor substrate, the concentration of nitrogen contained in the silicon carbide epitaxial layer is 1 × 10 15
/ cm 3 or less.
しくはアンチモン等の窒素以外のVb 属元素、またはV
I族元素を含むことを特徴とする請求項1に記載の炭化
珪素半導体素子。2. The method according to claim 1, wherein the silicon carbide epitaxial layer is made of a Vb element other than nitrogen, such as phosphorus, arsenic or antimony, or V
The silicon carbide semiconductor device according to claim 1, comprising a Group I element.
ムもしくはほう素等のIII元素、またはII族元素を
含むことを特徴とする請求項1に記載の炭化珪素半導体
素子。3. The silicon carbide semiconductor device according to claim 1, wherein the silicon carbide epitaxial layer contains a III element such as aluminum or boron, or a group II element.
のVb 属元素、またはVI族元素、III元素、II族
元素の濃度が、1×1015/cm3以上であることを特徴と
する請求項2または3に記載の炭化珪素半導体素子。4. The silicon carbide epitaxial layer has a concentration of a Vb group element other than nitrogen, or a group VI, III, or II element, of 1 × 10 15 / cm 3 or more. 4. The silicon carbide semiconductor device according to 2 or 3.
イオン注入領域に含まれる窒素濃度が1×1015/cm3以
下であることをことを特徴とする請求項4に記載の炭化
珪素半導体素子。5. The silicon carbide according to claim 4, further comprising a region into which impurity ions are implanted, wherein the concentration of nitrogen contained in the ion-implanted region is 1 × 10 15 / cm 3 or less. Semiconductor element.
ン等の窒素以外のVb 属元素、またはVI族元素である
ことを特徴とする請求項5に記載の炭化珪素半導体素
子。6. The silicon carbide semiconductor device according to claim 5, wherein the impurity ions are Vb group elements other than nitrogen, such as phosphorus, arsenic or antimony, or group VI elements.
素等のIII元素、またはII族元素であることを特徴
とする請求項5に記載の炭化珪素半導体素子。7. The silicon carbide semiconductor device according to claim 5, wherein the impurity ions are an element such as aluminum or boron, or a group II element.
ショットキー障壁により整流特性を有するショットキー
バリアダイオードであることを特徴とする請求項1ない
し7のいずれかに記載の炭化珪素半導体素子。8. The silicon carbide semiconductor device according to claim 1, wherein the semiconductor device is a Schottky barrier diode having rectification characteristics due to a Schottky barrier formed by a metal / semiconductor interface.
S型ゲートを有し、その酸化膜が熱酸化膜からなること
を特徴とする請求項1ないし7のいずれかに記載の炭化
珪素半導体素子。9. An MO having a metal-thermal oxide film-semiconductor structure.
The silicon carbide semiconductor device according to any one of claims 1 to 7, further comprising an S-type gate, wherein the oxide film is formed of a thermal oxide film.
あることを特徴とする請求項9に記載の炭化珪素半導体
素子。10. The silicon carbide semiconductor device according to claim 9, wherein the semiconductor device is a field effect transistor.
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Cited By (6)
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---|---|---|---|---|
JP2004253751A (en) * | 2002-12-25 | 2004-09-09 | Sumitomo Electric Ind Ltd | Method of cvd epitaxial growth |
JP2008027969A (en) * | 2006-07-18 | 2008-02-07 | Fuji Electric Holdings Co Ltd | Method of manufacturing single crystal wafer |
JP2010067937A (en) * | 2008-08-12 | 2010-03-25 | Shindengen Electric Mfg Co Ltd | Manufacturing method of schottky barrier diode, and schottky barrier diode |
CN102456748A (en) * | 2010-10-22 | 2012-05-16 | 上海芯石微电子有限公司 | Schottky diode and manufacturing method thereof |
WO2014122854A1 (en) | 2013-02-07 | 2014-08-14 | 住友電気工業株式会社 | Method for manufacturing silicon carbide semiconductor substrate and method for manufacturing silicon carbide semiconductor device |
JP2014185048A (en) * | 2013-03-22 | 2014-10-02 | Toshiba Corp | Sic epitaxial wafer and semiconductor device |
-
2001
- 2001-03-21 JP JP2001079780A patent/JP4042336B2/en not_active Expired - Fee Related
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004253751A (en) * | 2002-12-25 | 2004-09-09 | Sumitomo Electric Ind Ltd | Method of cvd epitaxial growth |
JP2008027969A (en) * | 2006-07-18 | 2008-02-07 | Fuji Electric Holdings Co Ltd | Method of manufacturing single crystal wafer |
JP2010067937A (en) * | 2008-08-12 | 2010-03-25 | Shindengen Electric Mfg Co Ltd | Manufacturing method of schottky barrier diode, and schottky barrier diode |
CN102456748A (en) * | 2010-10-22 | 2012-05-16 | 上海芯石微电子有限公司 | Schottky diode and manufacturing method thereof |
WO2014122854A1 (en) | 2013-02-07 | 2014-08-14 | 住友電気工業株式会社 | Method for manufacturing silicon carbide semiconductor substrate and method for manufacturing silicon carbide semiconductor device |
US9368345B2 (en) | 2013-02-07 | 2016-06-14 | Sumitomo Electric Industries, Ltd. | Method of manufacturing silicon carbide semiconductor substrate and method of manufacturing silicon carbide semiconductor device |
US9633840B2 (en) | 2013-02-07 | 2017-04-25 | Sumitomo Electric Industries, Ltd. | Method of manufacturing silicon carbide semiconductor substrate and method of manufacturing silicon carbide semiconductor device |
JP2014185048A (en) * | 2013-03-22 | 2014-10-02 | Toshiba Corp | Sic epitaxial wafer and semiconductor device |
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