JP2002279892A - Manufacturing method of electron emission element, electron emission element, charging device and image forming device - Google Patents

Manufacturing method of electron emission element, electron emission element, charging device and image forming device

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Publication number
JP2002279892A
JP2002279892A JP2001080179A JP2001080179A JP2002279892A JP 2002279892 A JP2002279892 A JP 2002279892A JP 2001080179 A JP2001080179 A JP 2001080179A JP 2001080179 A JP2001080179 A JP 2001080179A JP 2002279892 A JP2002279892 A JP 2002279892A
Authority
JP
Japan
Prior art keywords
electron
substrate
emitting device
semiconductor layer
electron emission
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001080179A
Other languages
Japanese (ja)
Inventor
Hiroshi Kondo
浩 近藤
Tomoaki Sugawara
智明 菅原
Hiroyoshi Shoji
浩義 庄子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP2001080179A priority Critical patent/JP2002279892A/en
Publication of JP2002279892A publication Critical patent/JP2002279892A/en
Pending legal-status Critical Current

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  • Cold Cathode And The Manufacture (AREA)

Abstract

PROBLEM TO BE SOLVED: To reduce manufacturing cost of an electron emission element. SOLUTION: A semiconductor layer 13, an insulating layer 11 and a thin film electrode 12 are laminated sequentially, and an electron emission element A emitting electron is manufactured by applying voltage. Manufacture of the semiconductor layer 13 and the insulating layer 11 is done by forming fine-grain silicon on a substrate with fine-grain spray method. With this, the semiconductor layer 13 is formed as a silicon film, and the insulating layer 11 is formed as an oxidized or nitrided film of silicon.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、電子放出素子の
製造方法、電子放出素子、帯電装置及び画像形成装置に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an electron-emitting device, an electron-emitting device, a charging device, and an image forming device.

【0002】[0002]

【従来の技術】従来、最も一般的な帯電装置の一つとし
て、コロナ放電を用いた帯電装置が挙げられるが、これ
は非常に多くのオゾン、NOxを発生するという欠点を有
している。このオゾン、NOxの発生は、コロナ帯電装置
から放出される電子の運動エネルギーが非常に大きく、
大気中のO、Nを電離させることが原因である。
2. Description of the Related Art Heretofore, one of the most common charging devices is a charging device using corona discharge, which has a drawback that it generates a great deal of ozone and NOx. Ozone and NOx are generated because the kinetic energy of the electrons emitted from the corona charger is very large,
This is caused by ionizing O 2 and N 2 in the atmosphere.

【0003】また、電子写真装置における帯電装置は、
一般に60μm程度のワイヤに高圧を印加して、放電を発
生させるコロナ放電器であるが、上記のとおり、多くの
放電生成物を発生させる。
A charging device in an electrophotographic apparatus is
Generally, a corona discharger generates a discharge by applying a high voltage to a wire of about 60 μm, but generates a large number of discharge products as described above.

【0004】そこで、特開平9-114192号公報に開示の技
術では、オゾンの発生量を低減する手段が提案されてい
る。これは、非常に細い、40〜50μmのワイヤを用
いて放電を行うことによりオゾンの発生量を50%以下
に低減している。0
Therefore, in the technology disclosed in Japanese Patent Application Laid-Open No. 9-114192, means for reducing the amount of generated ozone has been proposed. This is to reduce the amount of generated ozone to 50% or less by performing discharge using a very thin wire of 40 to 50 μm. 0

【0005】また、特開平6-324556号公報には、ワイヤ
の3方を囲むように配置された金属筐体と解放部近傍に
金属メッシュ電極を配置し、ワイヤから発生したオゾン
を閉じこめ、オゾン分子の衝突確率を高めることにより
放出されるオゾン量の低減を図る技術が開示されてい
る。
[0005] Japanese Patent Application Laid-Open No. 6-324556 discloses a metal housing arranged so as to surround three sides of a wire and a metal mesh electrode arranged near an open portion to confine ozone generated from the wire, A technique for reducing the amount of released ozone by increasing the probability of collision of molecules is disclosed.

【0006】[0006]

【発明が解決しようとする課題】しかし、特開平9-1141
92号公報、特開平6-324556号公報に開示の技術では、せ
いぜい50%程度のオゾン量の低減しか出来ず、オゾン
吸着剤等の併用が必要であった。そして、この吸着剤は
経時劣化が生じるためにオゾンフィルタの交換、メンテ
ナンスが必要であった。
However, Japanese Patent Application Laid-Open No. 9-1141 discloses
In the technology disclosed in Japanese Patent Application Laid-Open No. 92-324556 and Japanese Patent Application Laid-Open No. Hei 6-324556, the amount of ozone can be reduced by only about 50% at most, and it is necessary to use an ozone adsorbent or the like in combination. Then, the adsorbent is exchanged ozone filter to deterioration over time occurs, maintenance was required.

【0007】また、近年の社会動向においては、UL規
格、TUV規格、BAM規格など、複数の国、地域で、
複数の団体により電子写真方式の画像形成装置に対して
発生するオゾン量を規制するための規格が設定されてい
る。
[0007] In addition, in recent years of social trends, UL standard, TUV standards, such as BAM standards, a number of countries, in the region,
A plurality of organizations have set standards for regulating the amount of ozone generated in an electrophotographic image forming apparatus.

【0008】これらに対応するため、半導体からなる電
子放出素子Aを用いた帯電装置及びこれを用いた電子写
真装置を使用することが考えられる(特願2000-76511明
細書を参照)。このような帯電装置によれば、放電生成
物を全く発生しない帯電が可能となる。
In order to cope with these problems, it is conceivable to use a charging device using an electron-emitting device A made of a semiconductor and an electrophotographic device using the same (see Japanese Patent Application No. 2000-76511). According to such a charging device, it is possible to perform charging without generating any discharge product.

【0009】かかる技術では、電子放出面の形状は、各
々の装置目的に合わせた形状とすることが必要となって
くる。例えば、電子写真装置用の帯電装置の場合、画像
を形成する被記録体幅以上の長さを有する帯電装置を製
作する必要が生じる。
In this technique, the shape of the electron emission surface needs to be adjusted to the purpose of each device. For example, in the case of a charging device for an electrophotographic device, it is necessary to manufacture a charging device having a length equal to or greater than the width of a recording medium on which an image is formed.

【0010】ところで、最も一般的な半導体材料として
シリコンが挙げられるが、単結晶材料の場合、その大き
さについては制約があり、ポリシリコンのようにCVD法
によってシリコン材料を長尺基板に成膜する際は、基板
を高温に加熱する必要が生じるため、基板の耐熱性を所
定値以上及び冷却後の基板の収縮率を所定値以下とする
必要が生じ、この場合基板材料の制約が大きくなる。
By the way, silicon is mentioned as the most common semiconductor material. However, in the case of a single crystal material, the size is limited, and a silicon material is formed on a long substrate by a CVD method like polysilicon. In this case, it is necessary to heat the substrate to a high temperature, so that the heat resistance of the substrate needs to be equal to or higher than a predetermined value and the shrinkage ratio of the substrate after cooling needs to be equal to or lower than a predetermined value. .

【0011】一般的な金属基板上にポリシリコンを成膜
した場合、冷却後の収縮によりシリコン薄膜に割れ等の
劣化が生じ易い。また、タングステン、チタンなどを基
板として用いた場合、高温下においてシリコンと反応し
てシリサイドとなり易く、所望のポリシリコン薄膜を得
ることが困難であるという不具合がある。
When a polysilicon film is formed on a general metal substrate, the silicon thin film is liable to be deteriorated such as a crack due to shrinkage after cooling. In addition, when tungsten, titanium, or the like is used as a substrate, it reacts with silicon at a high temperature to easily form silicide, and it is difficult to obtain a desired polysilicon thin film.

【0012】上記の耐熱性、収縮率等の条件を満たす材
料として石英ガラスが挙げられるが、この場合は材料コ
ストの増加といった問題が生じる。
As a material satisfying the above conditions such as heat resistance and shrinkage, quartz glass can be cited, but in this case, there is a problem that the material cost increases.

【0013】また、一般にCVD法、スパッタ法による成
膜は、その成膜スピードが遅く、数μmレベルの膜厚を
短時間で得るのが困難であり、さらに、装置自体が高価
であるため、この場合製造コストの増加といった不具合
が生じる。
Further, in general, film formation by the CVD method or the sputtering method is slow, and it is difficult to obtain a film thickness of several μm level in a short time, and the apparatus itself is expensive. In this case, a problem such as an increase in manufacturing cost occurs.

【0014】この発明の目的は、電子放出素子の製造コ
ストを低減することである。
An object of the present invention is to reduce the manufacturing cost of an electron-emitting device.

【0015】この発明の目的は、高効率での電子放出が
可能となる電子放出素子を提供することである。
An object of the present invention is to provide an electron-emitting device capable of emitting electrons with high efficiency.

【0016】この発明の目的は、半導体層と絶縁層から
なる微細構造を複数形成することを可能とすることであ
る。
An object of the present invention is to make it possible to form a plurality of fine structures including a semiconductor layer and an insulating layer.

【0017】この発明の目的は、電子放出面内の電子放
出特性が均一である電子放出素子を提供することであ
る。
An object of the present invention is to provide an electron-emitting device having uniform electron-emitting characteristics in an electron-emitting surface.

【0018】この発明の目的は、基板の製造を非常に簡
単な装置で行うことが可能とすることである。
An object of the present invention is to make it possible to manufacture a substrate with a very simple apparatus.

【0019】[0019]

【課題を解決するための手段】請求項1に記載の発明
は、基板上に半導体層、絶縁体層及び電極が順次積層さ
れてなり、電圧を印加することにより電子を放出する電
子放出素子を製造する電子放出素子製造方法において、
粒状の半導体材料を微粒子吹き付け法により前記基板上
に形成することで当該基板上に前記半導体材料からなる
前記半導体層と前記半導体材料が酸化又は窒化した前記
絶縁体層とを順次形成する第1の工程と、この第1の工
程後、前記絶縁体層上に電極を形成する第2の工程と、
を含んでなることを特徴とする電子放出素子の製造方法
である。
According to a first aspect of the present invention, there is provided an electron-emitting device comprising a semiconductor layer, an insulator layer, and an electrode sequentially laminated on a substrate, and emitting electrons by applying a voltage. In the method for manufacturing an electron-emitting device,
First of the said semiconductor layer comprising a particulate semiconductor material from the semiconductor material on the substrate by forming on the substrate by fine spraying method the semiconductor material is sequentially formed and the insulating layer oxidized or nitrided a step, after the first step, a second step of forming an electrode on the insulator layer,
And a method for manufacturing an electron-emitting device.

【0020】したがって、CVD法、スパッタ法等のプロ
セスで半導体層、絶縁体層を形成した場合と比較して、
成膜速度が早く、かつ、様々な材料の基板を用いること
が可能となるため、電子放出素子の製造コストの低減が
可能となる。
Therefore, compared with the case where the semiconductor layer and the insulator layer are formed by processes such as the CVD method and the sputtering method,
Since the film formation speed is high and substrates of various materials can be used, the manufacturing cost of the electron-emitting device can be reduced.

【0021】請求項2に記載の発明は、請求項1に記載
の電子放出素子の製造方法において、前記第1の工程
は、前記微粒子吹き付け法により前記半導体層と前記絶
縁体層が積層された微細構造を複数形成することを特徴
とする。
According to a second aspect of the present invention, in the method of manufacturing an electron-emitting device according to the first aspect, in the first step, the semiconductor layer and the insulator layer are laminated by the fine particle spraying method. It is characterized by forming a plurality of fine structures.

【0022】したがって、高効率での電子放出が可能と
なる電子放出素子を提供することができる。
Therefore, it is possible to provide an electron-emitting device capable of emitting electrons with high efficiency.

【0023】請求項3に記載の発明は、請求項2に記載
の電子放出素子の製造方法において、前記第1の工程
は、前記微細構造を陽極化成により形成することを特徴
とする。
According to a third aspect of the present invention, in the method of manufacturing an electron-emitting device according to the second aspect, the first step includes forming the fine structure by anodization.

【0024】したがって、簡便な装置を用いて、半導体
層の微細構造がナノスケールで形成され、その後これを
酸化することにより半導体層と絶縁層からなる微細構造
を複数形成することが可能となる。
Therefore, the fine structure of the semiconductor layer is formed on a nano scale by using a simple device, and then, by oxidizing the fine structure, a plurality of fine structures including the semiconductor layer and the insulating layer can be formed.

【0025】請求項4に記載の発明は、請求項1〜3の
何れかの一に記載の電子放出素子の製造方法において、
前記第1の工程は、前記基板として表面に微細な凹凸が
形成され、この凹凸が絶縁性でかつ前記電子放出を行う
ときの電子放出方向に対して略平行方向に配向している
ものを用いることを特徴とする。
[0025] The invention described in claim 4 is the method of manufacturing an electron-emitting device according to any one of claims 1 to 3,
In the first step, a substrate having fine irregularities formed on the surface thereof, the irregularities being insulating and oriented in a direction substantially parallel to an electron emission direction when performing the electron emission is used in the first step. It is characterized by the following.

【0026】したがって、半導体層の半導体材料は基板
の凹凸の中に入り込む形で電子放出方向に整列している
ため、電子放出面(基板と反対側)内の電子放出特性を
均一にすることができる。
Therefore, since the semiconductor material of the semiconductor layer is aligned in the electron emission direction so as to enter the unevenness of the substrate, it is possible to make the electron emission characteristics in the electron emission surface (the side opposite to the substrate) uniform. it can.

【0027】請求項5に記載の発明は、請求項4に記載
の電子放出素子の製造方法において、前記第1の工程
は、前記基板としてアルミニウム製で陽極酸化したもの
を用いることを特徴とする。
According to a fifth aspect of the present invention, in the method of manufacturing an electron-emitting device according to the fourth aspect, the first step uses an anodized aluminum substrate as the substrate. .

【0028】したがって、基板の製造を非常に簡単な装
置で行うことが可能となる。
Therefore, it is possible to manufacture the substrate with a very simple apparatus.

【0029】請求項6に記載の発明は、基板上に半導体
層、絶縁体層及び電極が順次積層されてなり、電圧を印
加することにより電子を放出する電子放出素子におい
て、前記絶縁体層は前記半導体層を形成する半導体材料
と同じ半導体材料の酸化物、窒化物又は窒化酸化物で形
成されていることを特徴とする電子放出素子である。
According to a sixth aspect of the present invention, in the electron-emitting device in which a semiconductor layer, an insulator layer, and an electrode are sequentially laminated on a substrate and emit electrons when a voltage is applied, the insulator layer is An electron-emitting device comprising an oxide, nitride, or nitrided oxide of the same semiconductor material as the semiconductor material forming the semiconductor layer.

【0030】したがって、半導体層、絶縁体層を微粒子
吹き付け法で形成することが可能となるため、CVD法、
スパッタ法等のプロセスで形成した場合と比較して、成
膜速度が早く、かつ、様々な材料の基板を用いることが
でき、電子放出素子の製造コストの低減が可能となる。
Therefore, the semiconductor layer and the insulator layer can be formed by the fine particle spraying method.
Compared to the case where the film is formed by a process such as a sputtering method, a substrate can be formed with a higher film forming speed and with various materials, so that the manufacturing cost of the electron-emitting device can be reduced.

【0031】請求項7に記載の発明は、請求項6に記載
の電子放出素子において、前記半導体層はシリコンで形
成され、前記絶縁体層はシリコン酸化物、シリコン窒化
物又はシリコン窒化酸化物で形成されていることを特徴
とする。
According to a seventh aspect of the present invention, in the electron-emitting device according to the sixth aspect, the semiconductor layer is formed of silicon, and the insulator layer is formed of silicon oxide, silicon nitride, or silicon nitride oxide. It is characterized by being formed.

【0032】したがって、シリコンを材料として、半導
体層、絶縁体層を微粒子吹き付け法で形成することが可
能となるため、CVD法、スパッタ法等のプロセスで形成
した場合と比較して、成膜速度が早く、かつ、様々な材
料の基板を用いることができ、電子放出素子の製造コス
トの低減が可能となる。
Therefore, since the semiconductor layer and the insulator layer can be formed by a fine particle spraying method using silicon as a material, the film forming speed can be reduced as compared with the case where the semiconductor layer and the insulating layer are formed by a process such as a CVD method or a sputtering method. quickly, and it is possible to use a substrate of various materials, it is possible to reduce the cost of manufacturing the electron-emitting device.

【0033】請求項8に記載の発明は、請求項6又は7
に記載の電子放出素子において、前記基板は、前記半導
体層側の表面に微細な凹凸が形成され、この凹凸が絶縁
性でかつ前記電子放出を行うときの電子放出方向に対し
て略平行方向に配向していることを特徴とする。
The invention according to claim 8 is the invention according to claim 6 or 7
In the electron-emitting device according to the above, the substrate has fine irregularities formed on the surface on the semiconductor layer side, and the irregularities are insulative and substantially parallel to an electron emission direction when performing the electron emission. It is characterized by being oriented.

【0034】したがって、半導体層の半導体材料は基板
の凹凸の中に入り込む形で電子放出方向に整列している
ため、電子放出面(基板と反対側)内の電子放出特性を
均一にすることができる。
Therefore, since the semiconductor material of the semiconductor layer is aligned in the electron emission direction so as to enter the unevenness of the substrate, it is possible to make the electron emission characteristics in the electron emission surface (the side opposite to the substrate) uniform. it can.

【0035】請求項9に記載の発明は、請求項8に記載
の電子放出素子において、前記基板は、アルミニウム製
で前記半導体層側の表面が酸化していることを特徴とす
る。
According to a ninth aspect of the present invention, in the electron-emitting device according to the eighth aspect, the substrate is made of aluminum and the surface on the semiconductor layer side is oxidized.

【0036】したがって、基板の製造を非常に簡単な装
置で行うことが可能となる。
Therefore, it is possible to manufacture a substrate with a very simple apparatus.

【0037】請求項10に記載の発明は、請求項6〜9
の何れかの一に記載の電子放出素子を備えていることを
特徴とする帯電装置である。
[0037] The invention according to claim 10, claim 6-9
A charging device comprising the electron-emitting device according to any one of the above.

【0038】したがって、請求項6〜9の何れかの一に
記載の発明と同様の作用、効果を奏することができる。
Therefore, the same operation and effect as the invention according to any one of claims 6 to 9 can be obtained.

【0039】請求項11に記載の発明は、請求項10に
記載の帯電装置を感光体の帯電用に備えていることを特
徴とする電子写真方式の画像形成装置である。
An eleventh aspect of the present invention is an electrophotographic image forming apparatus comprising the charging device of the tenth aspect for charging a photosensitive member.

【0040】したがって、請求項10に記載の発明と同
様の作用、効果を奏する。
[0040] Accordingly, it brings the same operation and effect as those of the invention described in claim 10, the effect.

【0041】[0041]

【発明の実施の形態】この発明の一実施の形態について
説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described.

【0042】まず、この発明の一実施の形態である電子
放出素子Aの製造方法について説明する。
First, a method for manufacturing an electron-emitting device A according to an embodiment of the present invention will be described.

【0043】図1は、かかる製造方法に用いる製造装置
の説明図である。
FIG. 1 is an explanatory view of a manufacturing apparatus used in such a manufacturing method.

【0044】(1)まず、原材料粉末を、例えば直径が
1mm程度のセラミクス製のボールなどと共にボールミ
ル等により粉砕して、平均粒径が数十nm〜数百nmの
均一な大きさの超微粒子粉状の微粒子1にする。
(1) First, the raw material powder is pulverized with a ball mill or the like together with a ceramic ball having a diameter of about 1 mm, for example, to obtain ultrafine particles having an average particle size of several tens nm to several hundreds nm. Powder 1 is obtained.

【0045】(2)ここで得られた微粒子1を、ガス/
微粒子混合用器2に投入する。ガス/微粒子混合用器2
は搬送管3を介して膜形成室4と連通している。そし
て、ガス/微粒子混合用器2にはガス流入弁5を介して
ガス(空気)が導入され、膜形成室4内は真空ポンプ6
により吸引される。膜形成室4内には予め基板7を用意
しておく。微粒子1は、ガス/微粒子混合用器2と膜形
成室4との圧力差により加速され、数百m/secの速
度でノズル8から噴射されることにより、基板7上に微
粒子堆積膜9が形成される。この場合に、基板7は加熱
する(微粒子吹き付け法)(第1の工程)。
(2) The fine particles 1 obtained here were mixed with gas /
It is charged into the fine particle mixing device 2. Gas / Particle Mixer 2
Is in communication with the film formation chamber 4 via the transfer pipe 3. Gas (air) is introduced into the gas / particle mixing device 2 through a gas inflow valve 5, and a vacuum pump 6
Is sucked. A substrate 7 is prepared in the film forming chamber 4 in advance. The fine particles 1 are accelerated by the pressure difference between the gas / fine particle mixing device 2 and the film forming chamber 4 and are ejected from the nozzle 8 at a speed of several hundred m / sec, whereby the fine particle deposition film 9 is formed on the substrate 7. It is formed. In this case, the substrate 7 is heated (fine particle spraying method) (first step).

【0046】(3)このように基板7上に形成された微
粒子堆積膜9の上に薄膜電極12(図1において図示せ
ず)を形成して、電子放出素子Aとする(第2の工
程)。
[0046] (3) thus forming a thin film electrode 12 on the particle-deposited film 9 formed on the substrate 7 (not shown in FIG. 1), the electron-emitting devices A (second step ).

【0047】ところで、一般に半導体素子から放出され
る電子の運動エネルギーは、コロナ放電によるものと比
較すると小さく、大気中の気体分子の電離をほとんど起
こさず、CO 、O イオンなどの負イオンを生成す
ることが可能である。さらに帯電を行う場合は、これら
が被帯電物に到達する、あるいは、電子が直接被帯電物
に到達する現象を利用することにより帯電を行うため、
帯電によるオゾン等、放電生成物が発生しない。
In general, the kinetic energy of electrons emitted from a semiconductor element is smaller than that of corona discharge, hardly causes ionization of gas molecules in the atmosphere, and negative ions such as CO 3 and O 2 ions. It is possible to generate ions. In the case of further charging, the charge reaches the object to be charged, or the charge is performed by utilizing a phenomenon in which electrons directly reach the object to be charged.
No discharge products such as ozone due to charging are generated.

【0048】図2は、図1を参照して説明した微粒子吹
き付け法により基板7上に微粒子堆積膜9を形成して製
造された電子放出素子Aに電圧を印加する場合の概念図
である。この電子放出素子Aは、半導体層13の上に絶
縁体層11、薄膜電極12が順次形成されてなるもので
ある。すなわち、前記の製造方法により吹き付けられる
微粒子1で形成された微粒子堆積膜9は半導体層13と
なる、そして、微粒子1の外周が絶縁性材料で覆われて
いて、その絶縁性材料が絶縁体層11となる。このた
め、微粒子堆積膜の断面構造が図2のようになり、前記
のような微粒子1の吹き付け工程のみで、半導体層13
と絶縁体層11が積層された微細構造が複数形成され、
この上に薄膜電極12を形成して電子放出素子Aとす
る。
FIG. 2 is a conceptual diagram in the case where a voltage is applied to the electron-emitting device A manufactured by forming the fine particle deposition film 9 on the substrate 7 by the fine particle spraying method described with reference to FIG. The electron-emitting device A is obtained by sequentially forming an insulator layer 11 and a thin-film electrode 12 on a semiconductor layer 13. That is, the fine particle deposition film 9 formed by the fine particles 1 sprayed by the above-described manufacturing method becomes the semiconductor layer 13, and the outer periphery of the fine particles 1 is covered with an insulating material. It becomes 11. For this reason, the sectional structure of the fine particle deposition film is as shown in FIG. 2, and the semiconductor layer 13 is formed only by the step of spraying the fine particles 1 as described above.
And a plurality of microstructures in which the insulator layer 11 is laminated,
The thin-film electrode 12 is formed thereon to obtain an electron-emitting device A.

【0049】一般に、図2に示すような構成では、半導
体層13中のフェルミ準位近傍の電子がトンネル現象に
よりポテンシャル障壁を透過して絶縁体層11の伝導帯
へ注入される。これは高抵抗であり大きな電位勾配が生
じているため、そこで加速されて薄膜電極12の伝導帯
へ注入されホットエレクトロンとなる。この電位勾配が
電子放出のエネルギーに寄与するため、絶縁体層11の
膜厚は所定値以下、印加電圧は所定値以上とする必要が
ある。
In general, in the configuration shown in FIG. 2, electrons near the Fermi level in the semiconductor layer 13 penetrate the potential barrier by the tunnel phenomenon and are injected into the conduction band of the insulator layer 11. This is high in resistance and has a large potential gradient, and is accelerated there and injected into the conduction band of the thin film electrode 12 to become hot electrons. Since this potential gradient contributes to the energy of electron emission, it is necessary that the thickness of the insulator layer 11 be equal to or less than a predetermined value and the applied voltage be equal to or more than a predetermined value.

【0050】一般には絶縁体層11の膜厚は数μm程度
からそれ以下、印加電圧は10V程度からそれ以上が必
要である。これら素子内部で生成したホットエレクトロ
ンのうち、薄膜電極12の仕こと関数φ以上のエネルギ
ーを有するものは、この電極12をトンネルし、電子放
出素子A外部に所定の運動エネルギーを有して放出され
る。この薄膜電極12は電子がトンネルすることを妨げ
ることのない範囲の膜厚で形成することが必要であり、
一般には数十nm以下である。
In general, the thickness of the insulator layer 11 needs to be about several μm or less, and the applied voltage needs to be about 10 V or more. Among the hot electrons generated inside these elements, those having energy equal to or greater than the work function φ of the thin-film electrode 12 tunnel through this electrode 12 and are emitted outside the electron-emitting device A with a predetermined kinetic energy. that. The thin-film electrode 12 needs to be formed in a thickness that does not prevent electrons from tunneling.
Generally, it is several tens nm or less.

【0051】図3、図4に示すように、半導体層13を
シリコン半導体材料とした場合、半導体層13と絶縁体
層(シリコン酸化物)11からなる微細構造が複数形成
されている場合、この中を電子が多数回トンネルするた
めに、電子のドリフト長が伸び、容易にホットエレクト
ロン化して外部に放出されると考えられている。このた
め、良好な電子放出特性が得られる。
As shown in FIGS. 3 and 4, when the semiconductor layer 13 is made of a silicon semiconductor material, and when a plurality of fine structures including the semiconductor layer 13 and the insulator layer (silicon oxide) 11 are formed, It is considered that the electron drifts long because electrons tunnel through it many times, and is easily converted into hot electrons and emitted to the outside. Therefore, good electron emission characteristics can be obtained.

【0052】このように、この電子放出素子Aは、電圧
の印加により電子放出機能を発現する素子であり、その
電子を放出する部位が半導体層13と絶縁体層11が積
層された微細構造が複数形成されている。このため、高
効率での電子放出が可能となる。これは以下のメカニズ
ムによるものである。以下の説明においては半導体層1
3としてシリコン、絶縁体層11としてSiOを例示し
てある。
As described above, the electron-emitting device A is a device that exhibits an electron-emitting function when a voltage is applied. The electron-emitting portion has a fine structure in which the semiconductor layer 13 and the insulator layer 11 are laminated. A plurality is formed. Thus, highly efficient electron emission is possible. This is due to the following mechanism. In the following description, the semiconductor layer 1
3 is exemplified by silicon, and the insulator layer 11 is exemplified by SiO 2 .

【0053】すなわち、前記微細構造は、陽極化成によ
って形成されている。陽極化成によれば、図1に例示す
るような簡便な製造装置によって、図4に示すような半
導体層13の微細構造がナノスケールで形成され、その
後、これを酸化することにより半導体層13と絶縁体層
11からなる微細構造を複数形成することが可能とな
る。
[0053] That is, the microstructure is formed by anodization. According to anodization, by simple manufacturing apparatus as illustrated in FIG. 1, the microstructure of semiconductor layer 13 as shown in FIG. 4 is formed at the nanoscale, then the semiconductor layer 13 by oxidizing this It becomes possible to form a plurality of fine structures composed of the insulator layer 11.

【0054】このように微粒子1はシリコン材料であ
り、このシリコン材料が膜形成室4内で加熱されること
で、絶縁体層11が形成される。すなわち、シリコンは
酸素中での加熱により酸化膜が、NOx中での加熱により
窒化酸化膜などとして絶縁体層11が容易に形成され
る。よって、シリコン酸化膜、シリコン窒化膜、シリコ
ン窒化酸化膜の少なくとも一つから成り、これで覆われ
ている。このため膜形成室4内では、図5に示すよう
な、絶縁体層11となる絶縁材料21に覆われた半導体
層13となる半導体粒子22(微粒子1)が容易に得ら
れる。
[0054] particles 1 thus is a silicon material, that this silicon material is heated by the film forming chamber 4, the insulating layer 11 is formed. That is, the insulator layer 11 is easily formed as an oxide film by heating in oxygen and as a nitrided oxide film by heating in NOx. Therefore, it is composed of at least one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film, and is covered with the same. Therefore, in the film forming chamber 4, semiconductor particles 22 (fine particles 1) serving as the semiconductor layer 13 covered with the insulating material 21 serving as the insulator layer 11 can be easily obtained as shown in FIG.

【0055】ここで、酸化膜においてはダングリングボ
ンド等の欠陥がSi−SiO界面近傍に存在し、これらが
熱酸化膜の界面不安定性を生じさせる原因と考えられて
おり、これは電子放出素子Aの信頼性において障害とな
り得る。窒化酸化膜においては、その窒素原子濃度を1
0at%以下とすることで、信頼性と素子性能維持を両立
可能である。
Here, defects such as dangling bonds exist in the oxide film near the Si—SiO 2 interface, and these are considered to be the causes of the interface instability of the thermal oxide film. This can be an obstacle in the reliability of the device A. In the nitrided oxide film, the nitrogen atom concentration is set to 1
By setting the content to 0 at% or less, both reliability and element performance maintenance can be achieved.

【0056】前記の場合に、基板7の表面に微細な凹凸
を形成しておき、この凹凸面に前記の方法で微粒子1を
吹き付けることにより、図6の断面図に示すような電子
放出素子Aが形成される。基板7の表面の凹凸は絶縁性
であり、電子放出方向に対して略平行方向に配向してい
る。図6に示すように、微細な凹凸が電子放出方向に略
平行方向に配向しているため、吹き付けられた半導体の
微粒子1は、凹凸の凹部の中に入り込む形で電子放出方
向に整列している。この素子の電子放出面(基板7と反
対側)に電子がトンネル可能な厚さで薄膜電極12を形
成し、ここに電圧を印加すると、面内の電子放出特性が
均一な電子放出素子Aを得ることが可能となる。
In the above case, fine irregularities are formed on the surface of the substrate 7 and the fine particles 1 are sprayed on the irregular surface by the above-mentioned method, so that the electron-emitting device A shown in the sectional view of FIG. There is formed. The irregularities on the surface of the substrate 7 are insulative and oriented in a direction substantially parallel to the electron emission direction. As shown in FIG. 6, since the fine irregularities are oriented in a direction substantially parallel to the electron emission direction, the sprayed semiconductor fine particles 1 are aligned in the electron emission direction so as to enter the concave portions of the irregularities. I have. A thin-film electrode 12 is formed on the electron-emitting surface (the side opposite to the substrate 7) of this device with a thickness allowing electrons to tunnel, and when a voltage is applied thereto, an electron-emitting device A having uniform in-plane electron emission characteristics is formed. It is possible to obtain.

【0057】この場合に、基板7をアルミニウム製とし
て、このアルミニウム製の基板7の表面を陽極酸化する
ことで表面に絶縁材料である酸化アルミニウムからなる
凹凸状の絶縁層23を形成したものを用いれば(図7参
照)、図6に示すような基板7の製造を非常に簡単な図
1のような装置で行うことが可能となる。なお、一般に
アルミニウムの陽極酸化は、水を主成分とする溶媒を用
い、硫酸溶液中で電解を行うが、これに限定する必要は
ない。
In this case, the substrate 7 is made of aluminum, and the surface of the aluminum substrate 7 is anodized to form an uneven insulating layer 23 made of aluminum oxide as an insulating material on the surface. In this case (see FIG. 7), it becomes possible to manufacture the substrate 7 as shown in FIG. 6 using a very simple apparatus as shown in FIG. In general, the anodic oxidation of aluminum is performed in a sulfuric acid solution using a solvent containing water as a main component, but it is not limited to this.

【0058】ところで、アルミニウムを陽極酸化したも
のは、基板7と半導体の微粒子1との間に絶縁材料であ
る酸化アルミニウム23を介した構造を有するため、駆
動電圧として直流を印加した場合これが抵抗となる。よ
って、抵抗が無い場合と比較して所定の電流を素子に流
すため、電圧を高くする必要が生じる場合がある。
By the way, those of aluminum was anodized has a structure in which through the aluminum oxide 23 which is an insulating material between the substrate 7 and the particles 1 of the semiconductor, which is the resistance when applying a direct current as the drive voltage Become. Therefore, in order to pass a predetermined current through the element as compared with the case where there is no resistance, it may be necessary to increase the voltage.

【0059】図7に示す電子放出素子Aの場合、駆動電
圧として交流、若しくはパルス電圧を印加してもよい。
この場合、さらに薄膜電極12と半導体の微粒子1との
間に絶縁体層24を形成してもよい(図8、図9参
照)。図8、図9では、かかる構成における駆動時の模
式図を示してある。
In the case of the electron-emitting device A shown in FIG. 7, an alternating current or a pulse voltage may be applied as the driving voltage.
In this case, an insulator layer 24 may be further formed between the thin film electrode 12 and the semiconductor fine particles 1 (see FIGS. 8 and 9). 8 and 9 are schematic diagrams at the time of driving in such a configuration.

【0060】図8では薄膜電極12側から半導体粒子層
(微粒子1)へ電子が流入しているが、酸化アルミニウ
ム層(絶縁層23)により基板電極(基板7)に電子が
流れるのを抑制している。この状態から図9に示すの方
向に電圧が印加されると、半導体粒子層(微粒子1)に
蓄積された電子が電子放出素子Aの外部に放出される。
In FIG. 8, electrons flow into the semiconductor particle layer (fine particles 1) from the thin film electrode 12 side, but the aluminum oxide layer (insulating layer 23) suppresses the flow of electrons to the substrate electrode (substrate 7). ing. When a voltage is applied in the direction shown in FIG. 9 from this state, the electrons accumulated in the semiconductor particle layer (fine particles 1) are emitted to the outside of the electron-emitting device A.

【0061】以上のようにして製造した電子放出素子A
は、電子写真の画像形成プロセスで用いる帯電装置(図
示せず)に使用することができる。そして、この帯電装
置を感光体の帯電用として、電子写真方式の画像形成装
置(図示せず)に使用することができる。これらの帯電
装置、画像形成装置によれば、オゾンや、NOxがほとん
ど発生しない。
The electron-emitting device A manufactured as described above
Can be used in a charging device (not shown) used in an electrophotographic image forming process. This charging device can be used in an electrophotographic image forming apparatus (not shown) for charging a photosensitive member. According to these charging devices and image forming devices, ozone and NOx are hardly generated.

【0062】[0062]

【実施例】[実施例1]図10に示す装置を用いて、Ti
製の基板7上にSi製の微粒子1を陽極化成し、多孔質化
した基板とした。これを図11に示す装置で酸化し、半
導体層13と絶縁体層11(図12参照)が積層された
微細構造が複数形成された構造を作製した。これに金製
の薄膜電極12(図12参照)を約10nmの厚さで蒸着
し、図12に断面図で示すような電子放出素子Aを作製
し、図13に示す装置にて、負イオン生成の代用特性と
して、被帯電物(25μm厚のPETにAlを蒸着したもの)の
帯電を行い、そのときのオゾン、NOxの測定を行った。
各々の条件は以下の通りである。結果を図16に示す。 ・Si基板作製方法:チタン基板上に微粒子吹き付け法に
よりSi微粒子を吹き付け、Si薄膜を1.5μm形成(基板温
度220℃)。 ・Si基板陽極化成条件: 化成液;HF/エタノール=1/1(vol%)→Ti腐食防
止のため、テフロン(登録商標)テープで基板を覆った 化成槽温度;0℃ 500Wタングステンランプ照射 ・酸化条件: 酸化液;1mol/L硫酸水溶液→Ti腐食防止のため、テ
フロンテープで基板を覆った。 酸化槽温度;22℃ 遮光 ・評価条件 大気中、室温
EXAMPLES Example 1 using the apparatus shown in FIG. 10, Ti
The microparticles 1 made of Si were anodized on a substrate 7 made of silicon to form a porous substrate. This was oxidized by the apparatus shown in FIG. 11 to produce a structure in which a plurality of microstructures in which the semiconductor layer 13 and the insulator layer 11 (see FIG. 12) were stacked were formed. A thin film electrode 12 (see FIG. 12) made of gold is deposited thereon to a thickness of about 10 nm to produce an electron-emitting device A as shown in a sectional view in FIG. As a substitute characteristic of generation, an object to be charged (25 μm thick PET with Al deposited thereon) was charged, and ozone and NOx at that time were measured.
Each condition is as follows. FIG. 16 shows the results.・ Si substrate fabrication method: Si fine particles are sprayed on a titanium substrate by a fine particle spray method to form a 1.5 μm Si thin film (substrate temperature 220 ° C.).・ Si substrate anodizing conditions: Chemical conversion solution; HF / ethanol = 1/1 (vol%) → To prevent Ti corrosion, the substrate was covered with Teflon (registered trademark) tape. Oxidation conditions: Oxidizing solution; 1 mol / L sulfuric acid aqueous solution → The substrate was covered with Teflon tape to prevent Ti corrosion. Oxidation bath temperature: 22 ° C Shading ・ Evaluation conditions Atmosphere, room temperature

【0063】[実施例2]実施例1のSi基板作製方法に
おいて、前記のSi製の微粒子1の代わりに、表面がSiO
でコートされたSi製の微粒子1を用い、この微粒子1
の堆積膜を得た。これに対し、陽極化成、酸化を行わな
かった以外は、実施例1と同様の実験を行った。結果を
図16に示す。さらに、この実施例2においては、図1
4に示す装置で電子放出素子A面内の放出電子のばらつ
きについての評価を、発光の面内のばらつきを目視評価
することで行った。
[0063] In the Si substrate manufacturing method of Example 2 Example 1, in place of said Si-made fine particles 1, surface SiO
2 using Si fine particles 1 coated with
Was obtained. On the other hand, the same experiment as in Example 1 was performed, except that anodization and oxidation were not performed. FIG. 16 shows the results. Further, in the second embodiment, FIG.
4 was used to evaluate the variation of the emitted electrons in the plane of the electron-emitting device A by visually evaluating the variation in the plane of emission.

【0064】[実施例3]実施例2のTi製の基板7をAl
製の基板7に代え、この基板7に対し以下の条件で陽極
化成を行った以外は、実施例2と同様に実験を行った。
結果を図16に示す。 ・Al基板陽極化成条件 化成液:10wt%硫酸水溶液 化成槽温度:22℃ [比較例1]実施例1の電子放出素子Aを図15に示す
コロナワイヤ41にかえ、−4.2KVの直流を印加した
以外は、実施例1と同様の実験を行った。結果を図16
に示す。
Example 3 The substrate 7 made of Ti of Example 2 was
An experiment was performed in the same manner as in Example 2 except that the substrate 7 was anodized under the following conditions, instead of the substrate 7 made of
FIG. 16 shows the results. -Al substrate anodizing conditions Chemical solution: 10 wt% sulfuric acid aqueous solution Chemical bath temperature: 22 ° C [Comparative Example 1] The electron-emitting device A of Example 1 was replaced with a corona wire 41 shown in FIG. The same experiment as in Example 1 was performed except that the voltage was applied. FIG. 16 shows the results.
Shown in

【0065】[0065]

【発明の効果】請求項1に記載の発明は、CVD法、スパ
ッタ法等のプロセスで半導体層、絶縁体層を形成した場
合と比較して、成膜速度が早く、かつ、様々な材料の基
板を用いることが可能となるため、電子放出素子の製造
コストの低減が可能となる。
According to the first aspect of the present invention, as compared with a case where a semiconductor layer and an insulator layer are formed by a process such as a CVD method or a sputtering method, a film forming speed is higher and various materials can be formed. Since a substrate can be used, the manufacturing cost of the electron-emitting device can be reduced.

【0066】請求項2に記載の発明は、請求項1に記載
の電子放出素子の製造方法において、高効率での電子放
出が可能となる電子放出素子を提供することができる。
According to a second aspect of the present invention, in the method for manufacturing an electron-emitting device according to the first aspect, it is possible to provide an electron-emitting device capable of emitting electrons with high efficiency.

【0067】請求項3に記載の発明は、請求項2に記載
の電子放出素子の製造方法において、簡便な装置を用い
て、半導体層の微細構造がナノスケールで形成され、そ
の後これを酸化することにより半導体層と絶縁層からな
る微細構造を複数形成することが可能となる。
According to a third aspect of the present invention, in the method for manufacturing an electron-emitting device according to the second aspect, the fine structure of the semiconductor layer is formed on a nano-scale by using a simple apparatus, and then the oxide is oxidized. This makes it possible to form a plurality of microstructures including a semiconductor layer and an insulating layer.

【0068】請求項4に記載の発明は、請求項1〜3の
何れかの一に記載の電子放出素子の製造方法において、
半導体層の半導体材料は基板の凹凸の中に入り込む形で
電子放出方向に整列しているため、電子放出面(基板と
反対側)内の電子放出特性を均一にすることができる。
[0068] The invention described in claim 4 is the method of manufacturing an electron-emitting device according to any one of claims 1 to 3,
Since the semiconductor material of the semiconductor layer is aligned in the electron emission direction so as to enter the unevenness of the substrate, the electron emission characteristics in the electron emission surface (the side opposite to the substrate) can be made uniform.

【0069】請求項5に記載の発明は、請求項4に記載
の電子放出素子の製造方法において、基板の製造を非常
に簡単な装置で行うことが可能となる。
According to a fifth aspect of the present invention, in the method of manufacturing an electron-emitting device according to the fourth aspect, it is possible to manufacture a substrate with a very simple apparatus.

【0070】請求項6に記載の発明は、半導体層、絶縁
体層を微粒子吹き付け法で形成することが可能となるた
め、CVD法、スパッタ法等のプロセスで形成した場合と
比較して、成膜速度が早く、かつ、様々な材料の基板を
用いることができ、電子放出素子の製造コストの低減が
可能となる。
[0070] The invention according to claim 6, the semiconductor layer, since the insulating layer can be formed of a fine particle spray method, as compared with the case of forming by the CVD method, the process such as sputtering, deposition The film speed is high and substrates of various materials can be used, so that the manufacturing cost of the electron-emitting device can be reduced.

【0071】請求項7に記載の発明は、請求項6に記載
の電子放出素子において、シリコンを材料として、半導
体層、絶縁体層を微粒子吹き付け法で形成することが可
能となるため、CVD法、スパッタ法等のプロセスで形成
した場合と比較して、成膜速度が早く、かつ、様々な材
料の基板を用いることができ、電子放出素子の製造コス
トの低減が可能となる。
[0071] The invention described in claim 7 is the electron-emitting device according to claim 6, the silicon as the material, the semiconductor layer, it becomes possible to an insulator layer formed of a fine particle spray method, CVD method As compared with the case where the film is formed by a process such as a sputtering method, the film formation speed is faster and substrates of various materials can be used, so that the manufacturing cost of the electron-emitting device can be reduced.

【0072】請求項8に記載の発明は、請求項6又は7
に記載の電子放出素子において、半導体層の半導体材料
は基板の凹凸の中に入り込む形で電子放出方向に整列し
ているため、電子放出面(基板と反対側)内の電子放出
特性を均一にすることができる。
[0072] The invention according to claim 8, claim 6 or 7
In the electron-emitting device described in the above, the semiconductor material of the semiconductor layer is aligned in the electron-emitting direction in a manner of entering into the unevenness of the substrate, so that the electron-emitting characteristics on the electron-emitting surface (the side opposite to the substrate) are made uniform. can do.

【0073】請求項9に記載の発明は、請求項8に記載
の電子放出素子において、基板の製造を非常に簡単な装
置で行うことが可能となる。
According to the ninth aspect of the present invention, in the electron-emitting device according to the eighth aspect, the substrate can be manufactured with a very simple apparatus.

【0074】請求項10に記載の発明は、請求項6〜9
の何れかの一に記載の発明と同様の作用、効果を奏する
ことができる。
The invention according to claim 10 is the invention according to claims 6 to 9
The same operation and effect as the invention described in any one of the above aspects can be obtained.

【0075】請求項11に記載の発明は、請求項10に
記載の発明と同様の作用、効果を奏する。
[0075] The invention of claim 11 is an invention similar to the effect of claim 10, an effect.

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明の一実施の形態である電子放出素子の
製造方法を説明する説明図である。
FIG. 1 is an explanatory diagram illustrating a method for manufacturing an electron-emitting device according to an embodiment of the present invention.

【図2】前記電子放出素子の動作を説明する説明図であ
る。
FIG. 2 is an explanatory diagram for explaining the operation of the electron emission device.

【図3】同説明図である。FIG. 3 is an explanatory diagram of the same.

【図4】同説明図である。FIG. 4 is an explanatory diagram of the same.

【図5】前記電子放出素子の構造を説明する拡大縦断面
図である。
FIG. 5 is an enlarged vertical sectional view illustrating the structure of the electron-emitting device.

【図6】同拡大縦断面図である。FIG. 6 is an enlarged vertical sectional view of the same.

【図7】同拡大縦断面図である。FIG. 7 is an enlarged vertical sectional view of the same.

【図8】前記電子放出素子の動作を説明する説明図であ
る。
FIG. 8 is an explanatory diagram illustrating an operation of the electron-emitting device.

【図9】同説明図である。FIG. 9 is an explanatory diagram of the same.

【図10】この発明の実施例を説明する説明図である。FIG. 10 is an explanatory diagram illustrating an embodiment of the present invention.

【図11】同説明図である。FIG. 11 is an explanatory diagram of the same.

【図12】同説明図である。FIG. 12 is an explanatory diagram of the same.

【図13】同説明図である。FIG. 13 is an explanatory diagram of the same.

【図14】同説明図である。FIG. 14 is an explanatory diagram of the same.

【図15】同説明図である。FIG. 15 is an explanatory diagram of the same.

【図16】同説明図である。FIG. 16 is an explanatory view of the same.

【符号の説明】[Explanation of symbols]

A 電子放出素子 7 基板 11 絶縁体層 12 電極 13 半導体層 A Electron-emitting device 7 Substrate 11 Insulator layer 12 Electrode 13 Semiconductor layer

───────────────────────────────────────────────────── フロントページの続き (72)発明者 庄子 浩義 東京都大田区中馬込1丁目3番6号 株式 会社リコー内 Fターム(参考) 2H200 FA01 FA07 HA14 HB14 HB43 HB45 HB48 MA01  ────────────────────────────────────────────────── ─── Continuing from the front page (72) Inventor Hiroyoshi Shoko 1-3-6 Nakamagome, Ota-ku, Tokyo F-term in Ricoh Co., Ltd. (Reference) 2H200 FA01 FA07 HA14 HB14 HB43 HB45 HB48 MA01

Claims (11)

【特許請求の範囲】[Claims] 【請求項1】 基板上に半導体層、絶縁体層及び電極が
順次積層されてなり、電圧を印加することにより電子を
放出する電子放出素子を製造する電子放出素子製造方法
において、 粒状の半導体材料を微粒子吹き付け法により前記基板上
に形成することで当該基板上に前記半導体材料からなる
前記半導体層と前記半導体材料が酸化又は窒化した前記
絶縁体層とを順次形成する第1の工程と、 この第1の工程後、前記絶縁体層上に電極を形成する第
2の工程と、を含んでなることを特徴とする電子放出素
子の製造方法。
1. A method for manufacturing an electron-emitting device in which a semiconductor layer, an insulator layer, and an electrode are sequentially laminated on a substrate, and the electron-emitting device emits electrons by applying a voltage, the method comprising the steps of: Forming a semiconductor layer made of the semiconductor material and the insulator layer formed by oxidizing or nitriding the semiconductor material on the substrate by forming the semiconductor layer on the substrate by a fine particle spraying method. After the first step, a second step of forming an electrode on the insulator layer.
【請求項2】 前記第1の工程は、前記微粒子吹き付け
法により前記半導体層と前記絶縁体層が積層された微細
構造を複数形成することを特徴とする請求項1に記載の
電子放出素子の製造方法。
2. The electron emission device according to claim 1, wherein in the first step, a plurality of fine structures in which the semiconductor layer and the insulator layer are stacked are formed by the fine particle spraying method. Production method.
【請求項3】 前記第1の工程は、前記微細構造を陽極
化成により形成することを特徴とする請求項2に記載の
電子放出素子の製造方法。
3. The method according to claim 2, wherein in the first step, the fine structure is formed by anodization.
【請求項4】 前記第1の工程は、前記基板として表面
に微細な凹凸が形成され、この凹凸が絶縁性でかつ前記
電子放出を行うときの電子放出方向に対して略平行方向
に配向しているものを用いることを特徴とする請求項1
〜3の何れかの一に記載の電子放出素子の製造方法。
4. In the first step, fine irregularities are formed on the surface of the substrate, and the irregularities are insulative and oriented in a direction substantially parallel to an electron emission direction when performing the electron emission. 2. The method according to claim 1, wherein
4. The method for manufacturing an electron-emitting device according to any one of items 1 to 3,
【請求項5】 前記第1の工程は、前記基板としてアル
ミニウム製で陽極酸化したものを用いることを特徴とす
る請求項4に記載の電子放出素子の製造方法。
5. The method according to claim 4, wherein in the first step, an anodized aluminum substrate is used as the substrate.
【請求項6】 基板上に半導体層、絶縁体層及び電極が
順次積層されてなり、電圧を印加することにより電子を
放出する電子放出素子において、 前記絶縁体層は前記半導体層を形成する半導体材料と同
じ半導体材料の酸化物、窒化物又は窒化酸化物で形成さ
れていることを特徴とする電子放出素子。
6. A semiconductor layer on a substrate, the insulating layer and the electrode is being sequentially laminated, in the electron emitting device which emits electrons by applying a voltage, the semiconductor said insulator layer for forming the semiconductor layer An electron-emitting device formed using an oxide, nitride, or nitrided oxide of the same semiconductor material as the material.
【請求項7】 前記半導体層はシリコンで形成され、前
記絶縁体層はシリコン酸化物、シリコン窒化物又はシリ
コン窒化酸化物で形成されていることを特徴とする請求
項6に記載の電子放出素子。
7. The electron-emitting device according to claim 6, wherein the semiconductor layer is formed of silicon, and the insulator layer is formed of silicon oxide, silicon nitride, or silicon nitride oxide. .
【請求項8】 前記基板は、前記半導体層側の表面に微
細な凹凸が形成され、この凹凸が絶縁性でかつ前記電子
放出を行うときの電子放出方向に対して略平行方向に配
向していることを特徴とする請求項6又は7に記載の電
子放出素子。
8. The substrate has fine irregularities formed on a surface on the semiconductor layer side, and the irregularities are insulative and oriented in a direction substantially parallel to an electron emission direction when performing the electron emission. The electron-emitting device according to claim 6, wherein:
【請求項9】 前記基板は、アルミニウム製で前記半導
体層側の表面が酸化していることを特徴とする請求項8
に記載の電子放出素子。
9. The semiconductor device according to claim 8, wherein the substrate is made of aluminum and the surface on the semiconductor layer side is oxidized.
3. The electron-emitting device according to item 1.
【請求項10】 請求項6〜9の何れかの一に記載の電
子放出素子を備えていることを特徴とする帯電装置。
10. A charging device comprising the electron-emitting device according to claim 6. Description:
【請求項11】 請求項10に記載の帯電装置を感光体
の帯電用に備えていることを特徴とする電子写真方式の
画像形成装置。
11. An electrophotographic image forming apparatus comprising the charging device according to claim 10 for charging a photosensitive member.
JP2001080179A 2001-03-21 2001-03-21 Manufacturing method of electron emission element, electron emission element, charging device and image forming device Pending JP2002279892A (en)

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