JP2002258242A - Liquid crystal display and image display application device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display using a thin-film transistor free from any flicker in screen due to the drift of a common signal when display starting (i.e., writing initiation). SOLUTION: In the liquid crystal display, when writing is started, a scan side driving means provides a write inhibit signal to keep all thin-film transistors from writing until the level of the common signal output from a common side driving means is stabilized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device which eliminates screen disturbance at the start of display (start of writing),
The present invention relates to an image display application device equipped with a liquid crystal display device.

[0002]

2. Description of the Related Art At present, a liquid crystal display device is widely used as a display for a personal computer, a monitor, a portable terminal or the like due to its improved display characteristics and thin and light weight. Among them, an active matrix type twist nematic (T
N) Liquid crystal display devices (TFT / LCD) have become the mainstream of liquid crystal display devices because of their excellent display characteristics and low cost. In small displays such as portable terminals, simple matrix type super twist nematic liquid crystal display devices (STN / LCD) are widely used due to their advantages of power saving and low cost. In recent years, small displays have also been required to have high image quality. , TFT / LC with excellent display quality
D is starting to be used.

Here, a driving method of a TFT / LCD will be described with reference to FIGS. 4 and 5, taking a common electrode inversion driving as an example. FIG. 4 is a configuration diagram of a conventional liquid crystal display device, which includes a display panel and various driving means. In the liquid crystal panel, assuming that the number of the scanning electrodes is j, the scanning electrodes 101 of the Y1 line,..., The scanning electrodes 102 of the Yj line are formed on the first substrate. Assuming that the number of signal electrodes is i, the signal electrode 111 on the X1 line,... The signal electrode 11 on the Xi line
2 is also formed on the first substrate. Also, the common electrode 1
61 is formed on the second substrate. A thin-film transistor (hereinafter simply referred to as a TFT) is provided as a switching element at the intersection of the scanning electrode and the signal electrode formed in a lattice shape.
Is provided on the first substrate. This TFT has a gate (G) as a first control input terminal, a source (S) as a second control input terminal, and a drain (D) as a control output terminal.

If a pixel at the intersection of the Xm line (1 ≦ m ≦ i) and the Yn line (1 ≦ n ≦ j) is called Pmn, the pixel P11 is a TFT 120, a liquid crystal cell 121, and a storage capacitor 1
22. The pixel P1j has a TFT 130, a liquid crystal cell 131, and a storage capacitor 132. The pixel Pi1 has a TFT 140, a liquid crystal cell 141, and a storage capacitor 142. The pixel Pij has a TFT 150, a liquid crystal cell 151,
It has a storage capacity 152.

For example, in the pixel P11, the drain (D) of the TFT 120 is connected to the pixel electrode and one end of the storage capacitor 122, and supplies a data signal to one surface of the liquid crystal cell 121 via the pixel electrode. The other surface of the liquid crystal cell 121 contacts the common electrode 161, and the other end of the storage capacitor 122 connects to the common electrode 16.
1 Such a connection relationship corresponds to the pixel P1
The same applies to j, pixel Pi1, and pixel Pij.

The scanning side driving means 100 includes a scanning electrode 101.
.. A circuit which sequentially outputs gate signals as scanning signals via 102 and applies an ON voltage (selection signal) or an OFF voltage (non-selection signal) to the gates (G) of all TFTs located on the same Y line. is there. The signal side driving means 110 outputs a data signal through the signal electrodes 111... 112,
This is a circuit that supplies a data signal to the sources (S) of all TFTs located on the selected Y line. The common side driving unit 160 is a circuit that outputs a common signal to the common electrode 161.

FIG. 5A shows a horizontal synchronizing signal 200.
The number of pulses corresponding to the number j of scan electrodes is 1H per frame.
It is output periodically. FIG. 5B shows the signal side driving unit 110.
And a data signal voltage waveform 210 output from the data signal, and the polarity is inverted to the H level side or the L level side about the data signal reference potential 211 in a 1H cycle. Here, a voltage waveform is shown in a case where the same luminance display (black display) is performed on the entire surface of the liquid crystal panel which becomes white (normally white) when no voltage is applied. FIG.
(C) is a common signal voltage waveform 220 output from the common side driving means 160 and has a polarity on the H level side or the L level side opposite to the polarity of the data signal voltage around the common signal reference potential 221. It is inverted every 1H.

FIG. 5D shows a vertical synchronizing signal 230.
It is output in one frame cycle. FIG. 5E shows the pixel Pm1.
Is a voltage waveform 300 applied to the liquid crystal cell, and shows a voltage when black display is performed on the entire liquid crystal panel for several frames. FIG. 5F shows a luminance waveform 310 of the pixel Pm1.

From the signal side driving means 110, a data signal voltage waveform 210 as shown in FIG. 5B is synchronized with the horizontal synchronizing signal 200 via signal electrodes 111 of X1 line to signal electrodes 112 of Xi line. Is output. The polarity of the data signal voltage waveform 210 is inverted at a 1H cycle with respect to the data signal reference voltage 211, and the polarity is inverted for each frame in synchronization with the vertical synchronization signal 230 to prevent DC application. Such a data signal is applied to each scanning line by a TFT.
140.. 140 and the TFTs 130.

On the other hand, in synchronization with these timings, the scanning side driving means 100 outputs the scanning electrodes 101 of the Y1 line.
Through the scanning electrodes 102 on the Y.
.. 140, the scanning signals are sequentially output to the gate sides of the TFTs 130. First, the first scanning electrode 101
140 are turned on, the voltage supply from the source side is applied to the liquid crystal cells 121... 141 and the storage capacitor 12 of each pixel via the pixel electrode on the drain side.
.. 142. When the last scanning line electrode 102 is selected, the TFTs 130... 150 are turned on, and the voltage supply from the source side is applied to the liquid crystal cells 131. .. 152 is performed.

At this time, the liquid crystal cells 121 and 14 of each pixel
1, 131, 151 and storage capacitors 122, 142, 13
The common signal voltage waveform 220 shown in FIG.
Is supplied. The voltage of the common signal voltage waveform 220 changes symmetrically with respect to the common signal reference voltage 221 in synchronization with the horizontal synchronization signal 200, and has a polarity every frame in synchronization with the vertical synchronization signal 230 to prevent DC application. Is inverted. By repeating the above operation, a voltage is applied to the liquid crystal cell of each pixel, and an image is displayed by a data signal. Also, the write inhibit signal 501 (O
EV) is a signal for forcibly turning off all TFTs, and is input to the scanning side driving unit 100. Conventionally, the write inhibit signal 501 has been disabled (display enabled) from the start of writing one frame of pixel signal.

[0012]

In the conventional driving method of the TFT / LCD, when the common driving means 160 including an equivalent circuit as shown in FIG. 2 is used, the common signal is controlled by the capacitor 20, the resistor 21, and the resistor 22. An irregular operation occurs for a certain period of time, so that the screen is disturbed at the start of display. Therefore, a method of starting display (writing) of the liquid crystal display device so as not to cause any screen disturbance is required.

SUMMARY OF THE INVENTION The present invention has been made in view of such conventional problems, and has been made in consideration of the above-described problems. It is intended to realize the device.

[0014]

According to a first aspect of the present invention, there are provided a plurality of scanning electrodes and a plurality of signal electrodes arranged in a matrix corresponding to each pixel position, and arranged at each pixel position. A plurality of thin film transistors having first and second control input terminals respectively connected to the scanning electrodes and the signal electrodes; and pixel electrodes disposed at respective pixel positions and connected to control output terminals of the respective thin film transistors. And outputting a scan signal to a first control input terminal of the thin film transistor via the storage electrode, a liquid crystal cell sandwiched between the pixel electrode and a common electrode facing the pixel electrode, and the scan electrode. Scanning-side driving means, signal-side driving means for outputting a data signal to a second control input terminal of the thin film transistor via the signal electrode, and outputting a common signal corresponding to the data signal to the common electrode In the liquid crystal display device comprising that the common side drive means, wherein the scanning-side drive means, the common signal at the time of start writing, characterized in that all thin film transistors write-protected until stabilized.

According to a second aspect of the present invention, there are provided a plurality of scanning electrodes and a plurality of signal electrodes arranged in a matrix corresponding to each pixel position, and a plurality of scanning electrodes and a plurality of signal electrodes arranged at each pixel position. A plurality of thin film transistors each having first and second control input terminals connected to each signal electrode, a pixel electrode and a storage capacitor disposed at each pixel position and connected to a control output terminal of each thin film transistor, A liquid crystal cell sandwiched between a pixel electrode and a common electrode facing the pixel electrode;
Scanning-side driving means for outputting a scanning signal to a control input end of
Signal-side driving means for outputting a data signal to a second control input terminal of the thin-film transistor via the signal electrode; and common-side driving means for outputting a common signal corresponding to the data signal to the common electrode. In the liquid crystal display device described above, the scanning-side driving means is provided with a write start timing control unit for setting all the thin film transistors in a write-inhibited state until the common signal is stabilized at the start of writing.

According to a third aspect of the present invention, in the liquid crystal display device according to the second aspect, the writing start timing control section includes:
At the start of writing, an off signal is applied to the first control input terminals of all the thin film transistors until the level of the common signal output from the common side driving means is stabilized.

According to a third aspect of the present invention, there is provided a liquid crystal display device according to any one of the first to third aspects.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A liquid crystal display device according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a configuration diagram of the liquid crystal display device of the present embodiment, and the same portions as those in FIG. This liquid crystal display device has the same signal-side drive unit 110 and common-side drive unit 160 as in the conventional example, but a scan start timing control unit 502 is newly provided in the scan-side drive unit 100A.

The writing start timing control unit 502 controls the writing inhibition signal 501 at the start of display (start of writing).
Is displayed, an off signal is applied to the first control input terminals of all the TFTs until the level of the common signal output from the common side driving means 160 is stabilized.

The operation of the liquid crystal display device having such a configuration will be described. In the following, normally white (N
A description will be given using a W) mode liquid crystal as an example. The NW mode is a liquid crystal whose optical characteristics are adjusted so as to be white when no voltage is applied. In the case of normally black (NB), it becomes black when no voltage is applied. A write inhibit signal 501 indicated by a dotted line in FIG. 3C forcibly turns off all TFTs at H level and forcibly turns off all TFTs at L level. Given.

FIG. 2 shows an equivalent circuit 10 of a part included in the common side driving means 110. When the amplitude of the input common signal 11 is Vpp and the center voltage Vc, the output common signal 12 is a signal having the amplitude Vpp and the center voltage Vsc. The center voltage Vsc is a value obtained by dividing the voltage VDD by the resistors 21 and 22. As shown in FIG.
, The waveform of the output common signal 14 immediately after the write start command is in an unsteady state for a certain period as shown in FIG. Here, the behavior of the output common signal 14 will be described.

As shown in FIG. 3A, when a write start instruction is received and a common signal is input, the input common signal 1
3 is at the H level as indicated by the solid line, the output common signal 14 changes from Vsc to Vp as indicated by the solid line in FIG.
After swinging to the H level side by the amount of p, the pulse gradually approaches the HSC and the L level centering on the VSC for each pulse. The time constant up to the steady operation at this time is determined by the capacitor 20, the resistor 21, and the resistor 22. FIG.
As shown in (2), when the input common signal 13 is initially at the L level as indicated by the dotted line, the output common signal 14 also approaches the steady state operation from the state of swinging from Vsc to Vpp by the L level as indicated by the dotted line. To go. If writing of the pixel signal (data signal) to the liquid crystal cell is started at the timing when the write prohibition signal 501 becomes displayable during the unsteady operation, a voltage different from the desired writing voltage is written to the liquid crystal cell. The display screen is disturbed.

In the case of the conventional driving method, as shown in FIG. 3C, each TFT is turned on at the same time as the write start command, and writing to the liquid crystal cell is performed at the same time as the write start command. Occasionally the screen was disturbed. However, in the driving method of the present invention, the write start timing control unit 502 changes the output of the write start timing signal 15 to the L level after the write inhibit signal 501 changes to the L level and the output common signal 14 enters the steady operation. By changing to the level (display possible), all the TFTs are turned on, that is, each TFT is controlled by the scanning signal of the scanning side driving unit 100A. Here, ON / OFF of the TFT is performed by controlling the gate voltage. If the writing to the liquid crystal cell is performed after the output common signal 14 has reached the steady operation, the disturbance of the screen at the start of display is eliminated.

The above-mentioned liquid crystal display device can be mounted on various image display application devices. Image display applied devices include an image monitor, a personal computer, a mobile terminal, and a television receiver.

[0025]

According to the present invention, it is possible to start writing without disturbing the screen without changing the drive circuit configuration of the conventional TFT type liquid crystal display device.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is an equivalent circuit diagram of a part of a common side driving unit in the liquid crystal display device according to the embodiment of the present invention.

FIG. 3 is a voltage waveform diagram of each part showing an operation at the time of power-on in the liquid crystal display device according to the present embodiment.

FIG. 4 is a configuration diagram of a conventional liquid crystal display device.

FIG. 5 is a timing chart showing a counter electrode inversion driving method of an active matrix type liquid crystal display device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 10 Equivalent circuit of part of common-side driving unit 11 Input common signal 12 Output common signal 13 Input common signal waveform 14 Output common signal waveform 15 Write inhibit signal waveform 20 Capacitor 21, 22 Resistance 100, 100A Scanning driving unit 101 Y1 line Scan electrode 102 Yj line scan electrode 110 signal side drive means 111 X1 line signal electrode 112 Xj line signal electrode 120 thin film transistor 121 pixel P11 liquid crystal cell 122 pixel P11 storage capacity 130 pixel P11 thin film transistor 131 pixel P1j thin film transistor 131 pixel Liquid crystal cell of P1j 132 Storage capacitance of pixel P1j 140 Thin film transistor of pixel Pi1 141 Liquid crystal cell of pixel Pi1 142 Storage capacitance of pixel Pi1 150 Thin film transistor of pixel Pij 151 Liquid crystal cell of pixel Pij 1 2 Storage capacitance of pixel Pij 160 Common side driving means 161 Common electrode 200 Horizontal synchronization signal 210 Data signal voltage waveform 211 Data signal reference potential 220 Common signal voltage waveform 221 Common signal reference potential 230 Vertical synchronization signal 300 Pm1 Pixel voltage waveform 310 Pm1 Pixel luminance waveform 501 Write inhibit signal for all thin film transistors 502 Write start timing control unit

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2H093 NA16 NA33 NC34 ND60 5C006 AC22 AF67 AF68 AF71 BB16 BC06 EC05 EC13 FA04 FA16 5C080 AA10 BB05 DD12 DD30 JJ02 JJ03 JJ04 KK02 KK07

Claims (4)

[Claims] A plurality of scanning electrodes and a plurality of signal electrodes arranged in a matrix corresponding to each pixel position; and a first and a plurality of scanning electrodes and a plurality of signal electrodes disposed at each pixel position. A plurality of thin film transistors each having a second control input terminal connected thereto; a pixel electrode and a storage capacitor disposed at each pixel position and connected to a control output terminal of each of the thin film transistors; A liquid crystal cell sandwiched between opposing common electrodes, a scan-side driving unit that outputs a scan signal to a first control input terminal of the thin film transistor via the scan electrode, and the scan-side drive unit via the signal electrode. A liquid crystal comprising: signal-side driving means for outputting a data signal to a second control input terminal of the thin film transistor; and common-side driving means for outputting a common signal corresponding to the data signal to the common electrode. In the display device, the scanning-side driving unit may set all the thin film transistors in a write-inhibited state until the common signal is stabilized at the start of writing. 2. A plurality of scanning electrodes and a plurality of signal electrodes which are arranged in a matrix corresponding to each pixel position, and are arranged at each pixel position, and a first and a second electrode are provided at each scanning electrode and each signal electrode. A plurality of thin film transistors each having a second control input terminal connected thereto; a pixel electrode and a storage capacitor disposed at each pixel position and connected to a control output terminal of each of the thin film transistors; A liquid crystal cell sandwiched between opposing common electrodes, a scan-side driving unit that outputs a scan signal to a first control input terminal of the thin film transistor via the scan electrode, and the scan-side drive unit via the signal electrode. A liquid crystal comprising: signal-side driving means for outputting a data signal to a second control input terminal of the thin film transistor; and common-side driving means for outputting a common signal corresponding to the data signal to the common electrode. In the display device, a liquid crystal display device characterized in that the scanning-side driving means is provided with a write start timing control unit that sets all thin film transistors to a write-inhibited state until the common signal is stabilized at the start of writing. . 3. The write start timing control unit, at the start of write, until the level of a common signal output from the common side drive unit is stabilized, is connected to the first control input terminal of all thin film transistors. 3. The liquid crystal display device according to claim 2, wherein an off signal is given. 4. An image display application device comprising the liquid crystal display device according to claim 1.