JP2002222712A - Lc composite device - Google Patents

Lc composite device

Info

Publication number
JP2002222712A
JP2002222712A JP2001018459A JP2001018459A JP2002222712A JP 2002222712 A JP2002222712 A JP 2002222712A JP 2001018459 A JP2001018459 A JP 2001018459A JP 2001018459 A JP2001018459 A JP 2001018459A JP 2002222712 A JP2002222712 A JP 2002222712A
Authority
JP
Japan
Prior art keywords
capacitor
inductor
magnetic film
planar
ferrite magnetic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001018459A
Other languages
Japanese (ja)
Inventor
Yasutaka Fukuda
泰隆 福田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JFE Steel Corp
Original Assignee
Kawasaki Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kawasaki Steel Corp filed Critical Kawasaki Steel Corp
Priority to JP2001018459A priority Critical patent/JP2002222712A/en
Publication of JP2002222712A publication Critical patent/JP2002222712A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide an LC composite device which is equipped with an inductor and a capacitor smaller and thinner than usual and capable of carrying a current of hundreds of mA or above. SOLUTION: Dielectric layers and electrode layers are alternately laminated into a capacitor, and an inductor is laminated on the one side of the capacitor for the formation of an LC composite device. A plane inductor is used as the above inductor, and the plane inductor is composed of a first ferrite magnetic film coming into contact with the capacitor, a plane coil provided on the surface of the first ferrite magnetic film, and a second ferrite magnetic film formed on the plane coil and equipped with an external electrode formed on the side of the second ferrite magnetic film and electrically connected to the terminal of the plane coil and the capacitor.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、コンデンサ部にイ
ンダクタ部が積層されたLC複合素子に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LC composite device in which a capacitor portion and an inductor portion are stacked.

【0002】[0002]

【従来の技術】近年は、携帯機器やノートパソコンのよ
うな電池で駆動する小型電子機器の利用が盛んになっ
た。そして、これらの電子機器は、以前よりさらに小型
化・軽量化が要望されるばかりでなくり、最近は、マル
チメディアへの対応、すなわち、通信機能や表示機能の
充実、あるいは画像データを含んだ大量情報の高速処理
等の高機能化が求められている。これに伴い、電池から
の単一電圧を、CPU、LCDモジュール、通信用パワ
ーアンプなどの様々な搭載デハイスが必要とする複数の
電圧レベルに変換できる電源の需要が増加してきた。そ
こで、電子機器の小型・軽量化と高機能化とを両立させ
るために、電源に搭載するトランス、インダクタ等の磁
気素子及びコンデンサの小型・薄型化が進められてい
る。
2. Description of the Related Art In recent years, the use of battery-driven small electronic devices such as portable devices and notebook personal computers has become popular. These electronic devices are not only required to be smaller and lighter than before, and recently, have been adapted to multimedia, that is, enhanced communication functions and display functions, or including image data. There is a demand for advanced functions such as high-speed processing of large amounts of information. Accordingly, there has been an increasing demand for a power supply capable of converting a single voltage from a battery to a plurality of voltage levels required by various mounting heights such as a CPU, an LCD module, and a communication power amplifier. Therefore, in order to achieve both the reduction in size and weight of electronic devices and the enhancement of their functions, reductions in the size and thickness of magnetic elements such as transformers and inductors mounted on power supplies and capacitors have been promoted.

【0003】まず、磁気素子の現況は、以下の通りであ
る。コイルを巻いたトランスやインダクタは、従来より
焼結フェライトコアに搭載されてきたが、あまり薄くで
きず電源の薄型化を阻害してきた。そこで、Si基板上
に、金属磁性膜層/絶縁層/平面コイル層/絶縁層/金
属磁性膜層で構成された電源、つまり平面インダクタ
(例えば、日本応用磁気学会誌20(1996)92
2、特開平4−363006号公報)が提案された。し
かしながら、該平面インダクタは、製造コスト及び特性
の面で問題があった。
First, the current state of the magnetic element is as follows. Transformers and inductors wound with coils have conventionally been mounted on sintered ferrite cores, but they have not been able to be made very thin, which has hindered the thinning of power supplies. Therefore, a power supply composed of a metal magnetic film layer / insulating layer / planar coil layer / insulating layer / metal magnetic film layer on a Si substrate, that is, a planar inductor (for example, Journal of the Japan Society of Applied Magnetics 20 (1996) 92)
2, JP-A-4-363006) has been proposed. However, the planar inductor has problems in manufacturing cost and characteristics.

【0004】すなわち、該平面インダクタは、6〜7μ
mの金属磁性膜をスパッタ法等で成膜したり、金属磁性
膜と平面コイルの間に絶縁層を形成する必要があるの
で、磁気素子自体のコストアップが避けられなかった。
特性上でも、該平面インダクタは、MHz帯域の高周波
で駆動される場合、電気的に導体である金属磁性膜内部
で渦電流が発生したり、上下金属磁性層がわずかな非磁
性空間を介して対峙しているので、垂直交番磁束が平面
コイルに鎖交して渦電流が発生し、鉄損失が増大する。
このうち、金属磁性膜内部での渦電流発生に対しては、
金属磁性膜と同一の平面に高抵抗領域を形成して渦電流
を細分化すること(特開平6−7705号公報参照)
で、垂直交番磁束が平面コイルに鎖交しての渦電流発生
に対しては、平面コイル導体を複数に分割した導体ライ
ンにすること(特開平9−134820公報参照)で、
特性の改善対策をとっている。しかしながら、これらの
対策ではまだ十分とはいえない。そのため、特開平11
−26239公報に開示されているように、金属磁性膜
の代わりに、印刷法やシート法で形成したフェライト磁
性膜を用いた平面型磁気素子が提案されている。この平
面型磁気素子は、フェライト粉にバインダを混ぜた磁性
ペーストをSi基板上に印刷、焼成することで高抵抗の
フェライト磁性膜を形成し、この膜上にコイルパターン
をメッキ法等で形成した後、さらにその上にフェライト
磁性膜を構成して磁気素子とするものである。
That is, the planar inductor has a size of 6 to 7 μm.
Since it is necessary to form a metallic magnetic film having a thickness of m by a sputtering method or to form an insulating layer between the metallic magnetic film and the planar coil, an increase in the cost of the magnetic element itself was inevitable.
In terms of characteristics, when the planar inductor is driven at a high frequency in the MHz band, an eddy current is generated inside the metal magnetic film which is electrically conductive, or the upper and lower metal magnetic layers are formed through a slight nonmagnetic space. Since they face each other, the vertical alternating magnetic flux interlinks with the plane coil to generate an eddy current, and iron loss increases.
Among them, the generation of eddy current inside the metal magnetic film is
Forming a high-resistance region on the same plane as the metal magnetic film to subdivide the eddy current (see JP-A-6-7705)
In order to prevent eddy current from being generated when the vertical alternating magnetic flux interlinks the plane coil, the plane coil conductor is divided into a plurality of conductor lines (see Japanese Patent Application Laid-Open No. Hei 9-134820).
We are taking measures to improve the characteristics. However, these measures are not yet sufficient. Therefore, Japanese Patent Application Laid-Open
As disclosed in -26239, a planar magnetic element using a ferrite magnetic film formed by a printing method or a sheet method instead of a metal magnetic film has been proposed. In this planar magnetic element, a high-resistance ferrite magnetic film was formed by printing and firing a magnetic paste obtained by mixing a binder with ferrite powder on a Si substrate, and a coil pattern was formed on the film by plating or the like. Thereafter, a ferrite magnetic film is further formed thereon to form a magnetic element.

【0005】次に、コンデンサの現況について述べる
と、信号系のノイズフィルタに用いるコンデンサとして
は、図5に示すように、誘電体層1と内部電極層2とを
ドクターブレード法や印刷法を用いて、交互に積層した
所謂「積層セラミックスコンデンサ」6が多用されてい
る。しかしながら、この積層セラミックスコンデンサ6
は、一般に容量が小さいという問題がある。容量を大き
くしようとすると、積層数を増加しなければならないの
で厚くなり、電源の薄型化は達成できない。ちなみに、
この積層セラミックスコンデンサ6をインダクタと組合
せた電源を図4(a)及び(b)に示すが、平面磁気素
子のインダクタ4や接続部5を含めた全体で、高さが
1.8mm、底面積が31mm2程度にもなってしま
う。
Next, the current state of the capacitor will be described. As shown in FIG. 5, as a capacitor used for a signal noise filter, a dielectric layer 1 and an internal electrode layer 2 are formed by a doctor blade method or a printing method. Thus, a so-called “multilayer ceramic capacitor” 6 that is alternately stacked is frequently used. However, this multilayer ceramic capacitor 6
Has a problem that the capacity is generally small. In order to increase the capacity, the number of stacked layers must be increased, so that the thickness is increased, and the power supply cannot be made thinner. By the way,
FIGS. 4 (a) and 4 (b) show a power supply obtained by combining the multilayer ceramic capacitor 6 with an inductor. The total power including the inductor 4 and the connection portion 5 of the planar magnetic element is 1.8 mm in height and has a bottom area. Is about 31 mm 2 .

【0006】また、最近は、このコンデンサを磁気素子
であるチップ・インダクタと積層して複合化したLC複
合素子も実用に供されている。ところが、このLC複合
素子は、チップ・インダクタ7が図6に示すように、A
gペーストを印刷、焼成して3次元的に形成したコイル
8を有する構造であるため、コイル抵抗が高く、数10
mA以下の電流を流す信号系ノイズフィルタにしか利用
できない。従って、スイッチング電源のような数百mA
以上の電流が流れる所謂「パワー系」のLC複合素子は
実現していないのが現状である。
Recently, an LC composite device obtained by laminating this capacitor with a chip inductor, which is a magnetic device, to form a composite has been put to practical use. However, in this LC composite device, as shown in FIG.
Since the structure has the coil 8 formed three-dimensionally by printing and firing g paste, the coil resistance is high, and
It can be used only for a signal noise filter that passes a current of mA or less. Therefore, several hundred mA such as a switching power supply
At present, a so-called “power-type” LC composite element in which the above current flows is not realized.

【0007】[0007]

【発明が解決しようとする課題】本発明は、かかる事情
に鑑み、インダクタ及びコンデンサが従来より小さく、
且つ薄いばかりでなく、数百mA以上の電流を流すこと
の可能なLC複合素子を提供することを目的としてい
る。
SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and the inductor and the capacitor are smaller than before.
It is another object of the present invention to provide an LC composite device which is not only thin but can flow a current of several hundred mA or more.

【0008】[0008]

【課題を解決するための手段】発明者は、上記目的を達
成するため鋭意研究し、その成果を本発明に具現化し
た。
Means for Solving the Problems The inventor has conducted intensive studies to achieve the above object and has embodied the results in the present invention.

【0009】すなわち、本発明は、誘電体層と電極層と
を交互に積層したコンデンサ部と、該コンデンサ部の片
面側にさらにインダクタ部を積層したLC複合素子にお
いて、前記インダクタ部を平面インダクタとすると共
に、該平面インダクタを、前記コンデンサ部に接触する
第1のフェライト磁性膜と、該磁性膜の面上に設けた平
面コイルと、該平面コイルの上に設けた第2のフェライ
ト磁性膜とで形成してなり、前記第2のフェライト磁性
膜の側面に、前記平面コイルの端子と前記コンデンサ部
とが導通する外部電極を有することを特徴とするLC複
合素子である。
That is, the present invention relates to a capacitor part in which dielectric layers and electrode layers are alternately laminated, and an LC composite device in which an inductor part is further laminated on one side of the capacitor part, wherein the inductor part is a planar inductor. A planar ferrite magnetic film contacting the capacitor portion, a planar coil provided on a surface of the magnetic film, and a second ferrite magnetic film provided on the planar coil. And an external electrode on the side surface of the second ferrite magnetic film, the terminal being connected to the terminal of the planar coil and the capacitor section.

【0010】本発明によれば、コンデンサ及びインダク
タを共に平面的なものにして積層するようにしたので、
従来に比べて小型で且つ薄く、信号系及びパワー系のい
ずれの電源にも利用できるLC複合素子が提供できるよ
うになる。
According to the present invention, both the capacitor and the inductor are planarized and laminated.
It is possible to provide an LC composite device which is smaller and thinner than the conventional one and can be used for both a signal system and a power system.

【0011】[0011]

【発明の実施の形態】以下、図面を参照して、本発明の
実施の形態を説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0012】まず、発明者は、磁気素子(インダクタ)
を3次元的なコイルを用いる構造から、平面的なものに
変更し、図1の(a),(b)及び(c)に示すような
LC複合素子を考えた。ここで、(a)は上面から見た
図、(b)は(a)を対角線17で切断して側面を眺め
た図、(c)は(a)の上面図から外部電極3及び後述
の第2のフェライト磁性膜11を取り除いた図である。
First, the inventor has proposed a magnetic element (inductor)
Was changed from a structure using a three-dimensional coil to a planar one, and an LC composite device as shown in FIGS. 1A, 1B and 1C was considered. Here, (a) is a view from the top, (b) is a view of (a) cut by a diagonal line 17 and a side view is shown, and (c) is a view from the top view of (a) with the external electrode 3 and a later-described view. FIG. 3 is a view in which a second ferrite magnetic film 11 has been removed.

【0013】従って、このLC複合素子は、積層セラミ
ックスコンデンサと平面磁気素子(インダクタ)とを重
ねて構成するものである。具体的には、誘電体層1と内
部電極層2とを交互に積層したコンデンサ部6の片面側
に、さらに平面インダクタ部4を積層し、その平面イン
ダクタ部4を、前記コンデンサ部6に接触する第1のフ
ェライト磁性膜9と、該磁性膜9の面上に設けた平面コ
イル10と、該平面コイル10の上に設けた第2のフェ
ライト磁性膜11とで形成してなり、該第2のフェライ
ト磁性膜11の側面に前記平面コイル10の端子と前記
コンデンサ部とが導通する外部電極3とで形成したもの
である。この場合、該積層セラミックスコンデンサ6と
平面磁気素子(インダクタ)4とは、積層セラミックス
コンデンサ6側面の一方の外部電極と磁気素子側面の一
方の端子とで電気的につながっている。このような構造
にすると、図4(a)及び(b)に示したスイッチング
電源に比べて、平面コンデンサ6自体及び平面コンデン
サ6と平面磁気素子4とをつなぐ接続部(配線)の面積
分を無くし、一層全体面積の小型化が達成できる。ただ
し、コンデンサ6と磁気素子4を重ねることで全体は厚
くなるが、本発明では、その厚みの増加は、以下の理由
から最小限に抑えることができるのである。
Therefore, this LC composite element is constructed by stacking a multilayer ceramic capacitor and a planar magnetic element (inductor). Specifically, a planar inductor portion 4 is further laminated on one side of the capacitor portion 6 in which the dielectric layers 1 and the internal electrode layers 2 are alternately laminated, and the planar inductor portion 4 is brought into contact with the capacitor portion 6. A first ferrite magnetic film 9 to be formed, a planar coil 10 provided on the surface of the magnetic film 9, and a second ferrite magnetic film 11 provided on the planar coil 10. 2 is formed on the side surface of the ferrite magnetic film 11 by the external electrode 3 through which the terminals of the planar coil 10 and the capacitor section are conducted. In this case, the multilayer ceramic capacitor 6 and the planar magnetic element (inductor) 4 are electrically connected by one external electrode on the side of the multilayer ceramic capacitor 6 and one terminal on the side of the magnetic element. With such a structure, as compared with the switching power supply shown in FIGS. 4A and 4B, the area of the planar capacitor 6 itself and the connection portion (wiring) connecting the planar capacitor 6 and the planar magnetic element 4 is reduced. Thus, the entire area can be further reduced in size. However, the overall thickness is increased by overlapping the capacitor 6 and the magnetic element 4, but in the present invention, the increase in the thickness can be minimized for the following reasons.

【0014】つまり、積層セラミックスコンデンサ6の
静電容量Cは、一般に次式で表される。
That is, the capacitance C of the multilayer ceramic capacitor 6 is generally expressed by the following equation.

【0015】C=ε0εr(nA/d) ここで、ε0は真空の誘電率、εrは比誘電率、nは積層
数、Aは電極面積及びdは誘電体の厚みである。
C = ε 0 ε r (nA / d) where ε 0 is the dielectric constant of vacuum, ε r is the relative dielectric constant, n is the number of layers, A is the electrode area, and d is the thickness of the dielectric. .

【0016】一方、平面磁気素子4の面積は5mm×5
mm程度であり、2mm×2mm程度の一般的な積層セ
ラミックスコンデンサ6に比べると大きな面積である。
したがって、平面磁気素子4と複合する積層セラミック
スコンデンサ6の面積は少なくとも平面磁気素子4と同
寸法にまで広げることが許され、上式におけるAが大き
くなって大容量化を達成でき、大きな電流を流すことが
可能になる。逆に、静電容量Cを同じにすると、積層数
nを小さくでき、薄型化が達成できることになる。つま
り、本発明に係る構造で平面磁気素子とコンデンサとを
重ねることで、従来以上の薄型化が可能となる。このと
き、Si基板12があった方がハンドリング等は楽であ
るが、薄型化が強く要求される場合には、これを薄く削
ったり、あるいは取り除いた構造でも良い。
On the other hand, the area of the planar magnetic element 4 is 5 mm × 5.
mm, which is larger than a general laminated ceramic capacitor 6 of about 2 mm × 2 mm.
Therefore, the area of the multilayer ceramic capacitor 6 combined with the plane magnetic element 4 can be increased to at least the same dimension as the plane magnetic element 4, and A in the above equation can be increased to achieve a large capacity, and a large current can be obtained. It becomes possible to shed. Conversely, if the capacitances C are the same, the number n of stacked layers can be reduced, and a reduction in thickness can be achieved. That is, by stacking the planar magnetic element and the capacitor in the structure according to the present invention, it is possible to make the device thinner than before. At this time, handling and the like are easier if the Si substrate 12 is provided. However, when a thinner structure is strongly required, a structure in which the Si substrate 12 is thinly cut or removed may be used.

【0017】平面磁気素子4に用いるフェライトとして
は、絶縁体であるNiZn系フェライト、その中でも焼
成温度が低いNiCuZn系フェライトが好適である。
一方、コンデンサ6に用いる誘電体1としては、SrT
iO3やBaTiO3を主成分とするセラミックスが好適
であるが、通常の積層セラミックス・コンデンサに用い
られる材料ならばいずれも使用することができる。コン
デンサの内部電極2は、Ag、Pd、Ni、Cu、及び
それらの合金が好適である。
As the ferrite used for the planar magnetic element 4, NiZn-based ferrite, which is an insulator, among which NiCuZn-based ferrite having a low firing temperature is preferable.
On the other hand, the dielectric 1 used for the capacitor 6 is SrT
Ceramics containing iO 3 or BaTiO 3 as a main component are suitable, but any material used for ordinary multilayer ceramic capacitors can be used. The internal electrode 2 of the capacitor is preferably made of Ag, Pd, Ni, Cu, or an alloy thereof.

【0018】以下、実施例において、図面を参照し、本
発明に係るLC複合素子の製造方法を説明する。
Hereinafter, a method for manufacturing an LC composite device according to the present invention will be described with reference to the drawings in the embodiments.

【0019】[0019]

【実施例】(実施例1)Si基板12上に、SrTiO
3を主成分とした誘電体粉末を含んだペーストとAg/
Pd=80/20組成の合金粉末を含んだペーストを交
互に120層重ねてスクリーン印刷する。これによっ
て、コンデンサ部6が完成する。積層数及び層厚は、製
造しようとしている該コンデンサ部6の静電容量Cの大
きさによるが、通常は数100層で、焼き上がりの各層
の厚みは2〜5μm程度になるように調整される。
(Embodiment 1) On a Si substrate 12, SrTiO
Paste containing dielectric powder containing 3 as a main component and Ag /
Screen printing is performed by alternately stacking 120 layers of pastes containing alloy powders having a composition of Pd = 80/20. Thus, the capacitor section 6 is completed. The number of layers and the layer thickness depend on the magnitude of the capacitance C of the capacitor section 6 to be manufactured, but are usually adjusted to several hundred layers, and the thickness of each of the fired layers is about 2 to 5 μm. You.

【0020】次に、上記コンデンサ部6に積層するイン
ダクタ部4の形成であるが、該コンデンサ部6の片面側
に、引き続きFe23/ZnO/CuO/NiO=49
/23/12/16(mol%)組成のフェライト磁粉
を含んだペーストを、スクリーン印刷法にて下部フェラ
イト(第1のフェライト磁性膜9)として成膜し、大気
中にて950℃でコンデンサ部6と一緒に焼成した。焼
成後の第1のフェライト磁性膜9の厚みは、40μmで
ある。この第1のフェライト磁性膜9上にポリイミド樹
脂をスピンコート法により塗布した後、熱硬化させた。
熱硬化後のポリイミド樹脂13の厚みは3μmである。
さらに、この樹脂13上に、めっき下地14としてCu
0.5μmを無電解めっき法で成膜した。ここまでの状
況を図2(a)に示す。この上にフォトレジストを塗布
した後、フォトエッチングによりライン幅/ライン間隔
=100/30(μm)、厚み100μm、14ターン
のスパイラルコイルのレジストフレーム15を形成した
(図2(b)参照)。そして、電気めっきにより、レジ
ストフレーム15内に70μmの厚みでCu16を析出
させた後(図2(c)参照)、レジスト剥離、化学エッ
チングでコイル間のめっき下地14を取り除いて平面コ
イル10とした。この状態を図2(d)に示す。
Next, the formation of the inductor portion 4 to be laminated on the capacitor portion 6 will be described. On one side of the capacitor portion 6, Fe 2 O 3 / ZnO / CuO / NiO = 49
A paste containing ferrite magnetic powder having a composition of / 23/12/16 (mol%) was formed as a lower ferrite (first ferrite magnetic film 9) by screen printing, and the capacitor portion was heated at 950 ° C. in the air. Fired together with 6. The thickness of the first ferrite magnetic film 9 after firing is 40 μm. A polyimide resin was applied onto the first ferrite magnetic film 9 by spin coating, and then thermally cured.
The thickness of the polyimide resin 13 after thermosetting is 3 μm.
Further, on the resin 13, Cu
0.5 μm was formed by electroless plating. The situation so far is shown in FIG. After applying a photoresist thereon, a resist frame 15 of a 14-turn spiral coil having a line width / line interval = 100/30 (μm) and a thickness of 100 μm was formed by photoetching (see FIG. 2B). After depositing Cu 16 with a thickness of 70 μm in the resist frame 15 by electroplating (see FIG. 2C), the plating underlayer 14 between the coils was removed by resist peeling and chemical etching to obtain the planar coil 10. . This state is shown in FIG.

【0021】この平面コイル10の上に、Fe23/Z
nO/CuO/NiO=49/23/12/16(mo
l%)組成のフェライト磁粉を含んだエポキシ樹脂ペー
ストを、スクリーン印刷法にて上部フェライト(第2の
フェライト磁性膜11)として成膜し、150℃で熱硬
化した(図2(e)参照)。これによって、コンデンサ
6とインダクタ4との積層は終了した。なお、熱硬化後
のコイル上面からの第2のフェライト磁性膜11の厚み
は、100μmである。
On this planar coil 10, Fe 2 O 3 / Z
nO / CuO / NiO = 49/23/12/16 (mo
An epoxy resin paste containing a ferrite magnetic powder having a composition of 1%) was formed as an upper ferrite (second ferrite magnetic film 11) by a screen printing method and thermally cured at 150 ° C. (see FIG. 2E). . Thus, the lamination of the capacitor 6 and the inductor 4 has been completed. Note that the thickness of the second ferrite magnetic film 11 from the upper surface of the coil after thermosetting is 100 μm.

【0022】最後に、コンデンサ部6とインダクタ部4
との間を外部電極3で電気的に結んで、LC複合素子が
完成した(図2(f)参照)。また、得られたLC複合
素子の容量は、インダクタ(磁気素子)が1.5μH、
コンデンサが20μFであり、サイズは、図3(a)及
び(b)に示すが、厚み0.8mm及び底面積25mm
2である。これは、既に図4(a)及び(b)に示した
磁気素子及びコンデンサを個別に単体でSi基板12上
に配した従来のスイッチング電源に比べ、著しく小型
で、且つ薄くなっている。本発明のLC複合素子を5V
から3Vへ降圧するDC−DCコンバータ(出力電流5
00mA)に試用したところ、発熱もほとんどなく、コ
ンバータの温度が上昇せず、正常に動作することが確認
できた。 (実施例2)実施例1と同様にして、コンデンサ部6の
誘電体層1と内部電極層2の積層数が10で平面コイル
のターン数が5であるLC複合素子を製造した。一方、
コンデンサ及びインダクタの製法は、いずれも印刷法で
同じだが、インダクタのコイルを三次元とした従来の複
合素子を製造した(比較例1)。この本発明(実施例
2)及び比較例1で得たLC複合素子の特性を一括して
表1に示す。
Finally, the capacitor section 6 and the inductor section 4
Are electrically connected with the external electrodes 3 to complete the LC composite device (see FIG. 2F). The capacitance of the obtained LC composite device is 1.5 μH for the inductor (magnetic device),
The capacitor is 20 μF and the size is shown in FIGS. 3 (a) and (b).
2 This is significantly smaller and thinner than the conventional switching power supply in which the magnetic element and the capacitor shown in FIGS. 4A and 4B are individually arranged on the Si substrate 12 individually. 5 V of the LC composite device of the present invention
DC-DC converter (output current 5
When the converter was tested at 00 mA), it was confirmed that there was almost no heat generation, the converter temperature did not rise, and the converter operated normally. (Example 2) In the same manner as in Example 1, an LC composite device in which the number of layers of the dielectric layer 1 and the internal electrode layer 2 of the capacitor section 6 was 10 and the number of turns of the planar coil was 5 was manufactured. on the other hand,
The manufacturing method of the capacitor and the inductor was the same as the printing method, but a conventional composite element having a three-dimensional inductor coil was manufactured (Comparative Example 1). Table 1 summarizes the characteristics of the LC composite devices obtained in the present invention (Example 2) and Comparative Example 1.

【0023】表1より、両者の特性は、いずれもほぼ等
しく、本発明に係るLC複合素子もノイズフィルタとし
て利用できることが明らかである。また、両者の厚みに
ついては、本発明に係るものが格段に薄いことが明らか
である。
From Table 1, it is clear that the characteristics of both are almost equal, and that the LC composite device according to the present invention can be used as a noise filter. Further, regarding the thickness of both, it is clear that the one according to the present invention is much thinner.

【0024】[0024]

【表1】 [Table 1]

【0025】[0025]

【発明の効果】以上述べたように、本発明により、イン
ダクタ及びコンデンサが従来より小さく、且つ薄いばか
りでなく、数百mA以上の電流を流すことも可能なLC
複合素子を実現させた。
As described above, according to the present invention, an inductor and a capacitor which are not only smaller and thinner than conventional ones, but are capable of flowing a current of several hundred mA or more.
A composite device was realized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係るLC複合素子を示す図であり、
(a)は上面から見た図、(b)は(a)を対角線17
で切断して側面を眺めた図、(c)は(a)の上面図か
ら外部電極3及び第2のフェライト磁性膜11を取り除
いた図である。
FIG. 1 is a view showing an LC composite device according to the present invention;
(A) is a view from the top, (b) is (a) is a diagonal line 17
FIG. 3C is a view in which the external electrode 3 and the second ferrite magnetic film 11 are removed from the top view of FIG.

【図2】本発明に係るLC複合素子の製造過程を説明す
る断面図であり、(a)は、熱硬化後のポリイミド樹脂
の上に、めっき下地を無電解めっき法で成膜した状況
を、(b)は、フォトレジストを塗布してレジストフレ
ームを形成した状況、(c)は,レジストフレーム内に
70μmの厚みでCuを析出させた状況を、(d)は、
レジスト剥離、めっき下地を取り除いて平面コイル10
とした状況を、(e)は、スクリーン印刷法にて上部フ
ェライト(第2のフェライト磁性膜)を成膜し、熱硬化
した状況を、(f)は、コンデンサ部とインダクタ部と
の間を外部電極で電気的に結んで、LC複合素子が完成
した状況を示す。
FIGS. 2A and 2B are cross-sectional views illustrating a manufacturing process of an LC composite device according to the present invention. FIG. 2A shows a state where a plating base is formed on a polyimide resin after thermosetting by an electroless plating method. , (B) shows a situation in which a photoresist was applied to form a resist frame, (c) shows a situation in which Cu was deposited with a thickness of 70 μm in the resist frame, and (d) shows a situation in which Cu was deposited in the resist frame.
Strip resist, remove plating base
(E) shows a state in which an upper ferrite (second ferrite magnetic film) is formed by a screen printing method and is thermally hardened, and (f) shows a state in which the space between the capacitor portion and the inductor portion is formed. This shows a state in which an LC composite device is completed by being electrically connected by external electrodes.

【図3】本発明に係るLC複合素子の外観を示す図であ
り、(a)は平面、(b)は側面である。
3A and 3B are views showing the appearance of an LC composite device according to the present invention, wherein FIG. 3A is a plan view and FIG. 3B is a side view.

【図4】コンデンサとインダクタンスを平面的に配した
スイチング電源を示す図であり、(a)は平面、(b)
は側面である。
4A and 4B are diagrams showing a switching power supply in which a capacitor and an inductance are arranged in a plane, wherein FIG.
Is the side.

【図5】積層セラミックスコンデンサを示す斜視図であ
る。
FIG. 5 is a perspective view showing a multilayer ceramic capacitor.

【図6】3次元コイルを内部に形成したチップインダク
タを示す斜視図である。
FIG. 6 is a perspective view showing a chip inductor having a three-dimensional coil formed therein.

【符号の説明】[Explanation of symbols]

1 誘電体(誘電体層) 2 内部電極(内部電極層) 3 外部電極 4 平面磁気素子(インダクタ) 5 接続部 6 積層セラミックスコンデンサ(コンデンサ) 7 チップインダクタ 8 3次元コイル 9 第1のフェライト磁性膜 10 平面コイル 11 第2のフェライト磁性膜 12 Si基板 13 ポリイミド樹脂 14 メッキ下地 15 レジストフレーム 16 Cu 17 対角線 18 平面コイルの端子 19 LC複合素子 DESCRIPTION OF SYMBOLS 1 Dielectric (dielectric layer) 2 Internal electrode (internal electrode layer) 3 External electrode 4 Planar magnetic element (inductor) 5 Connection part 6 Multilayer ceramic capacitor (capacitor) 7 Chip inductor 8 Three-dimensional coil 9 First ferrite magnetic film Reference Signs List 10 plane coil 11 second ferrite magnetic film 12 Si substrate 13 polyimide resin 14 plating base 15 resist frame 16 Cu 17 diagonal line 18 terminal of plane coil 19 LC composite element

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 誘電体層と電極層とを交互に積層したコ
ンデンサ部と、該コンデンサ部の片面側にさらにインダ
クタ部を積層したLC複合素子において、 前記インダクタ部を平面インダクタとすると共に、該平
面インダクタを、前記コンデンサ部に接触する第1のフ
ェライト磁性膜と、該磁性膜の面上に設けた平面コイル
と、該平面コイルの上に設けた第2のフェライト磁性膜
とで形成してなり、前記第2のフェライト磁性膜の側面
に、前記平面コイルの端子と前記コンデンサ部とが導通
する外部電極を有することを特徴とするLC複合素子。
1. A capacitor part in which dielectric layers and electrode layers are alternately laminated, and an LC composite device in which an inductor part is further laminated on one side of the capacitor part, wherein the inductor part is a planar inductor. A planar inductor is formed by a first ferrite magnetic film contacting the capacitor portion, a planar coil provided on a surface of the magnetic film, and a second ferrite magnetic film provided on the planar coil. An LC composite device comprising, on a side surface of the second ferrite magnetic film, an external electrode through which a terminal of the planar coil and the capacitor section are connected.
JP2001018459A 2001-01-26 2001-01-26 Lc composite device Pending JP2002222712A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001018459A JP2002222712A (en) 2001-01-26 2001-01-26 Lc composite device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001018459A JP2002222712A (en) 2001-01-26 2001-01-26 Lc composite device

Publications (1)

Publication Number Publication Date
JP2002222712A true JP2002222712A (en) 2002-08-09

Family

ID=18884483

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP2002222712A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100455931B1 (en) * 2003-07-23 2004-11-06 (주)매트론 Transformer and structure and manufacture method thereof
WO2010012661A1 (en) * 2008-07-28 2010-02-04 Epcos Ag Multilayer component
WO2011098489A1 (en) * 2010-02-10 2011-08-18 Epcos Ag Ceramic multilayer component
US8717120B2 (en) 2008-04-16 2014-05-06 Epcos Ag Multi-layered component
CN104113195A (en) * 2013-04-19 2014-10-22 三星电机株式会社 Composite electronic component, board having the same mounted thereon and power stabilizing unit including the same
KR20140125709A (en) * 2013-04-19 2014-10-29 삼성전기주식회사 Composite electronic component, board having the same mounted thereon and power smoothing unit comprising the same
JP2014212684A (en) * 2013-04-19 2014-11-13 サムソン エレクトロ−メカニックス カンパニーリミテッド. Composite electronic component, packaging substrate thereof, and power supply stabilization unit including the same
CN104578753A (en) * 2013-10-18 2015-04-29 三星电机株式会社 Composite electronic component and board for mounting the same
CN104811029A (en) * 2014-01-27 2015-07-29 三星电机株式会社 Composite electronic assembly and board provided with composite electronic assembly

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06333740A (en) * 1993-05-21 1994-12-02 Semiconductor Energy Lab Co Ltd Composite integrated circuit component
JPH0869919A (en) * 1994-08-30 1996-03-12 T I F:Kk Inductor element
JP2000182892A (en) * 1998-12-21 2000-06-30 Maruwa Kck:Kk Composite electronic component and manufacture thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06333740A (en) * 1993-05-21 1994-12-02 Semiconductor Energy Lab Co Ltd Composite integrated circuit component
JPH0869919A (en) * 1994-08-30 1996-03-12 T I F:Kk Inductor element
JP2000182892A (en) * 1998-12-21 2000-06-30 Maruwa Kck:Kk Composite electronic component and manufacture thereof

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100455931B1 (en) * 2003-07-23 2004-11-06 (주)매트론 Transformer and structure and manufacture method thereof
US8717120B2 (en) 2008-04-16 2014-05-06 Epcos Ag Multi-layered component
WO2010012661A1 (en) * 2008-07-28 2010-02-04 Epcos Ag Multilayer component
JP2011529278A (en) * 2008-07-28 2011-12-01 エプコス アクチエンゲゼルシャフト Multi-layer component
US9236844B2 (en) 2010-02-10 2016-01-12 Epcos Ag Ceramic multilayer component
CN102754171A (en) * 2010-02-10 2012-10-24 埃普科斯股份有限公司 Ceramic multilayer component
WO2011098489A1 (en) * 2010-02-10 2011-08-18 Epcos Ag Ceramic multilayer component
CN104113195A (en) * 2013-04-19 2014-10-22 三星电机株式会社 Composite electronic component, board having the same mounted thereon and power stabilizing unit including the same
KR20140125709A (en) * 2013-04-19 2014-10-29 삼성전기주식회사 Composite electronic component, board having the same mounted thereon and power smoothing unit comprising the same
JP2014212688A (en) * 2013-04-19 2014-11-13 サムソン エレクトロ−メカニックス カンパニーリミテッド. Composite electronic component, packaging substrate thereof, and power supply stabilization unit including the same
JP2014212684A (en) * 2013-04-19 2014-11-13 サムソン エレクトロ−メカニックス カンパニーリミテッド. Composite electronic component, packaging substrate thereof, and power supply stabilization unit including the same
US9425760B2 (en) 2013-04-19 2016-08-23 Samsung Electro-Mechanics Co., Ltd. Composite electronic component, board having the same mounted thereon, and power smoothing unit comprising the same
KR101659135B1 (en) 2013-04-19 2016-09-22 삼성전기주식회사 Composite electronic component, board having the same mounted thereon and power smoothing unit comprising the same
CN104578753A (en) * 2013-10-18 2015-04-29 三星电机株式会社 Composite electronic component and board for mounting the same
CN104578753B (en) * 2013-10-18 2018-11-02 三星电机株式会社 Combined electronical assembly and the plate for being equipped with combined electronical assembly thereon
CN104811029A (en) * 2014-01-27 2015-07-29 三星电机株式会社 Composite electronic assembly and board provided with composite electronic assembly

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