JP2002221738A - Board comprising display region, liquid crystal apparatus and projecting display unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress a leakage current of a pixel switching TFT influenced by a reflected light to a polarizing plate, etc., and stabilize a characteristic of the pixel switching TFT in a liquid crystal apparatus and a projecting display apparatus using it. SOLUTION: In a board 300 for the liquid crystal apparatus 100, the first light shielding film 7 is provided at least under a channel region 1c of the pixel switching TFT, extends along a scanning line 2, and is connected to a constant potential wire 8 for supplying a constant potential outside a pixel region, and the potential of the first light shielding film 7 is fixed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal device, a projection display device, and a method for manufacturing a liquid crystal device.
More specifically, the present invention relates to a light shielding structure in a liquid crystal device using a thin film transistor (hereinafter, referred to as a TFT) as a pixel switching element.

[0002]

2. Description of the Related Art Conventionally, as a liquid crystal device of an active matrix drive system, pixel electrodes are formed in a matrix on a glass substrate, and an amorphous silicon film or a polysilicon film is used as a semiconductor layer corresponding to each pixel electrode. A pixel switching TFT is formed, and each pixel electrode is provided with a TFT.
A configuration in which a liquid crystal is driven by applying a voltage through the device has been put to practical use. Polysilicon TFT for pixel switching
In a liquid crystal device using a TFT, a TFT for a driving circuit constituting a peripheral driving circuit such as a shift register circuit for driving and controlling a screen display portion can be formed in almost the same process as a TFT for pixel switching. Has attracted attention as being suitable for high integration.

In an active matrix driving type liquid crystal device, a light-shielding film formed of a chromium film or an aluminum film called a black matrix (or black stripe) is formed on a counter substrate for the purpose of achieving high definition display. Is formed. Further, this light-shielding film is formed so as to overlap the pixel switching TFT, and light incident from the counter substrate reaches the channel region and the junction region of the pixel switching TFT, and a leakage current flows to the pixel switching TFT. The structure does not flow.

[0004]

However, the leakage current caused by light is not only the incident light from the counter substrate side, but also the leakage current.
Light reflected by a polarizing plate or the like disposed on the back side of the liquid crystal device substrate may flow due to irradiation of the channel region of the pixel switching TFT.

As a method for preventing such a leakage current due to reflected light (return light), Japanese Patent Publication No. 3-52611 proposes an invention in which a light-shielding film is also provided below a channel region of a pixel switching TFT. ing. However, in the invention disclosed therein, since the potential of the light-shielding film is not fixed, there is a problem that the TFT characteristics fluctuate or deteriorate due to a parasitic capacitance between the semiconductor layer of the TFT and the light-shielding film.

[0006] On the other hand, with the increase in the number of pixels and the miniaturization of electronic equipment having a built-in liquid crystal device, it is desired that the peripheral drive circuit be further highly integrated. In particular, in a liquid crystal device in which a peripheral drive circuit is built in the same substrate, a multilayer wiring technology of forming a metal film of aluminum or the like in multiple layers via an insulating film and wiring is used as a technology for achieving high integration of the circuit. However, the number of steps in the manufacturing process increases with the multilayer wiring configuration,
There is a problem that the manufacturing cost increases.

Further, as the operating frequency of an active matrix driving type liquid crystal device increases, the quality of a semiconductor film is improved by employing SOI technology, recrystallization technology by laser annealing, or the like in order to improve TFT characteristics. Attempts have been made to improve the characteristics of the TFT by such a method, but there are problems that the characteristics vary greatly and the manufacturing process becomes complicated.

Accordingly, an object of the present invention is to provide a liquid crystal device and a projection type display device using the same, which suppress a leak current of a pixel switching TFT due to the influence of light reflected by a polarizing plate or the like, and provide a pixel switching TFT. It is an object of the present invention to provide a technique capable of stabilizing the characteristics of the above.

Another object of the present invention is to provide a liquid crystal device,
It is an object of the present invention to provide a technique capable of achieving high integration of a driving circuit provided around a display area without increasing the number of steps in a manufacturing process.

Further, another object of the present invention is to provide a liquid crystal device without increasing the number of steps in a manufacturing process.
It is an object of the present invention to provide a technique capable of improving the T characteristic.

[0011]

In order to solve the above-mentioned problems, the present invention provides a display area in which pixels are arranged in a matrix by a plurality of data lines and a plurality of scanning lines, and a display area on the outer peripheral side of the display area. A liquid crystal device substrate comprising: a peripheral driving circuit connected to at least one of the data line and the scanning line; and a plurality of thin film transistors connected to the data line and the scanning line; and a substrate for the liquid crystal device and a counter substrate. And the liquid crystal device substrate, wherein the liquid crystal device substrate has at least a conductive first layer that overlaps with at least a channel region of the thin film transistor below the channel region via an interlayer insulating film. Having a light shielding film,
It is characterized in that a constant voltage is applied to the first light-shielding film.

In the liquid crystal device according to the present invention, the first light-shielding film is formed so as to overlap the thin film transistor connected to the data line and the scanning line, that is, the channel region of the pixel switching TFT. Even if there is reflected light from the back side of the
It does not reach the FT channel area. Therefore, no leak current is generated in the pixel switching TFT due to reflected light from the back surface of the liquid crystal device substrate. In addition, since the potential of the first light-shielding film is fixed to a constant-voltage power supply or the like on the low potential side of the scanning line driving circuit, the parasitic capacitance between the semiconductor layer of the TFT and the first light-shielding film is reduced. Affected TF
The T characteristic does not fluctuate or deteriorate.

In the present invention, in order to apply a constant voltage to the first light-shielding film, a channel light-shielding portion overlapping the channel region and a constant voltage are applied to the channel light-shielding portion. And a wiring portion extending from the channel light-shielding portion.

In this case, the wiring portion of the first light-shielding film is formed, for example, from each of the channel light-shielding portions along the signal line of at least one of the scanning line and the data line outside the display region. And is connected to a constant potential wiring formed between the layers different from the first light shielding film outside the display area through at least a contact hole of the interlayer insulating film.

[0015] The wiring portion of the first light-shielding film extends from each of the channel light-shielding portions to the outside of the display area along the signal line of the scanning line and the data line. Outside the display area, a constant potential wiring formed between layers different from the first light shielding film may be connected via at least a contact hole of the interlayer insulating film.

In the present invention, each of the wiring portions of the first light-shielding film is connected to the constant potential wiring outside the display region via a contact hole of the interlayer insulating film.

The wiring portion of the first light-shielding film is fixed to the first light-shielding film as long as one end is connected to the constant potential wiring through the contact hole of the interlayer insulating film. Voltage can be applied.

On the other hand, when both ends of the wiring portion of the first light-shielding film are connected to the constant potential wiring via the contact holes of the interlayer insulating film, the first light-shielding film is formed. Even if there is a break in the middle of the wiring portion of the film, a constant potential is supplied from the constant potential wiring to the wiring portion of the first light shielding film. Therefore, since the redundant wiring is formed in the wiring portion of the first light shielding film, the reliability is high.

In the present invention, the wiring portion of the first light-shielding film may extend from each of the channel light-shielding portions to the outside of the display area along at least one of the scanning line and the data line. It is preferable that an extended branch line and a trunk line connected to each of the branch lines outside the display area are provided, and the trunk line be connected to the constant potential wiring via a contact hole in the interlayer insulating film. . With this configuration, the connection between the first light-shielding film and the constant potential wiring does not need to be made for each branch line, and the connection may be made between the main line and the constant potential wiring. For this reason, the trunk line may be routed to an arbitrary position where the wiring does not pass, and connected to the constant potential wiring there. Further, when wet etching is performed at the time of forming a contact hole at a connection portion between the first light-shielding film and the constant potential wiring, cracks are likely to occur in an interlayer insulating film or the like due to seepage of an etching solution. Now, route the trunk line to any position,
There is an advantage that a place where the crack may occur can be limited to a safe position. Furthermore, since the connection between the first light-shielding film and the constant potential wiring is made between the main line and the constant potential wiring, the place where the crack may occur is minimized, so that the reliability is reduced. Also in this case, which has the advantage of being high, by connecting one end of the branch line to the trunk line, a constant voltage can be applied to the first light shielding film.

On the other hand, if both ends of the branch line are connected to the trunk line, even if there is a break in the middle of the branch line, the wiring portion of the first light-shielding film is fixed from the trunk line. An electric potential is supplied. Therefore, since the redundant wiring is formed in the wiring portion of the first light shielding film, the reliability is high.

In the present invention, the first light-shielding film is connected to a capacitance wiring which forms a storage capacitance by overlapping with a drain region of the pixel switching TFT via at least a contact hole of the interlayer insulating film. Is preferred. Further, it is preferable that the first light-shielding film overlaps a drain region of the pixel switching TFT via the interlayer insulating film to form a storage capacitor. With such a configuration, since it is not necessary to lead each capacitance wiring to the scanning line driving circuit and apply a constant potential, layout can be easily performed when a large-scale circuit is introduced into the scanning line driving circuit.

In the present invention, the constant potential wiring is a power supply line for supplying power on the low potential side to the peripheral driving circuit, and a counter electrode from the liquid crystal device substrate to a counter electrode of the counter substrate via a vertical conductive material. It is connected to a power supply line for supplying a potential or a power supply line for supplying a ground potential to the peripheral drive circuit.

In the present invention, it is preferable that at least one of the liquid crystal device substrate and the counter substrate has a light shielding film for parting a display screen surrounding the display area.

In the present invention, the substrate for a liquid crystal device comprises:
It is preferable that a second light-shielding film covering the channel region be provided above the channel region of the pixel switching TFT. In this case, as the second light shielding film,
For example, data lines can be used. In addition, by forming a second light-shielding film so as to cover not only the channel region but also at least a first light-shielding film formed below the channel region via an interlayer insulating film, incident light can be reduced by the second light-shielding film. It is preferable not to irradiate the channel region of the pixel switching TFT that is reflected by the surface of the light-shielding film. With such a configuration, it is possible to reduce the leak current of the TFT due to light.

In the present invention, the peripheral driving circuit includes P
A TFT for a P-channel drive circuit and a TFT for an N-channel drive circuit;
It is preferable that it is formed by also using the manufacturing process of T. In such a configuration, since the number of layers of the multilayer wiring is limited, it is preferable that the conductive film formed simultaneously with the first light-shielding film is effectively used as a wiring layer in the peripheral driving circuit. .

In the present invention, the wiring layer made of a conductive film formed simultaneously with the first light-shielding film is formed of the T for the driving circuit.
The gate electrode of the FT is connected at least through the contact hole of the interlayer insulating film, and has an area equal to or less than the area of the gate electrode of the TFT for the drive circuit, and It is preferable that the layer overlaps the lower side of the channel region via the interlayer insulating film.

In the present invention, the wiring layer made of a conductive film formed simultaneously with the first light-shielding film may be formed of the T for the driving circuit.
It is preferable to connect to the source electrode of the FT via at least the contact hole of the interlayer insulating film, and to overlap the channel region of the driving circuit TFT on the lower layer side of the channel region. .

In the present invention, the first light-shielding film is opaque and conductive, for example, a metal film such as tungsten, titanium, chromium, tantalum, molybdenum, or a metal alloy film such as a metal silicide containing these metals. It is preferable to be composed of a film or the like. By using a metal film or a metal alloy film having high light-shielding properties and having conductivity, it functions as a light-shielding layer for light reflected from the back surface of the liquid crystal device substrate.

In the present invention, it is preferable that a third light-shielding film is formed on the counter substrate corresponding to the pixels. In this case, it is preferable that the third light shielding film is formed so as to cover at least the first light shielding film.

In the present invention, it is preferable that microlenses are formed in a matrix on the counter substrate in correspondence with the pixels. With this configuration, since light can be collected in a predetermined region on the liquid crystal device substrate by the microlens, high-quality display can be performed even if the black matrix is omitted from the counter substrate. Further, in the liquid crystal device according to the present invention, even if the light condensed by the microlens is reflected on the back surface of the substrate for the liquid crystal device, the channel region of the pixel switching TFT is not irradiated. Absent.

The liquid crystal device according to the present invention is preferably used as a light valve of a projection display device which receives strong light irradiation, since a leak current caused by light from the TFT is suppressed. In such a projection display device, light from a light source is modulated by the liquid crystal device according to the present invention, and the modulated light is enlarged and projected by projection optical means.

[0032]

Embodiments of the present invention will be described with reference to the accompanying drawings.

(Basic Configuration of Liquid Crystal Device) FIGS. 1 and 2
1 is a plan view of a liquid crystal device to which the present invention is applied, and FIG.

As shown in these figures, the liquid crystal device 100
A rectangular display area 61 (screen display area) in which pixels to be described later are formed in a matrix, a data line driving circuit 103 (peripheral driving circuit) formed in an area outside the display area 61, and a display area 61 A liquid crystal device substrate 300 including a pair of scanning line driving circuits 104 (peripheral driving circuits) formed on both sides, and an opposing substrate 31 arranged opposite to the liquid crystal device substrate 300 are schematically configured. On the liquid crystal device substrate 300, a pixel electrode 14 made of an ITO film (Indium Tin Oxide) is formed for each pixel 105 described later. An opposing electrode 32 is formed on substantially the entire surface of the opposing substrate 31, and a black matrix 6 is formed corresponding to each pixel 105. Counter substrate 3
Reference numeral 1 denotes a counter electrode 32 formed of a transparent conductive film such as an ITO film on a transparent substrate such as glass, neoceram, or quartz.
Are formed. Further, the opposing substrate 31 is provided with a light-shielding film 60 for parting around (a light-shielding film for parting the display screen) along the outer edge of the display area 61 so that light does not leak when the liquid crystal device 100 is assembled as a module. Is formed.

The opposing substrate 31 and the liquid crystal device substrate 300 are formed by sealing the gap-containing sealing material 2 formed along the outer peripheral edge of the peripheral parting light-shielding film 60 outside the display area 61.
The liquid crystal 108 is sealed in a region inside the sealing material 200 with a predetermined cell gap. The sealant 200 seals on a data line described later between the display region 61 and the data line driving circuit 103, and seals on a scanning line described later between the display region 61 and the scanning line driving circuit 104. Perform sealing. Seal material 200
Are partially interrupted, and the liquid crystal injection port 241 is formed by the interrupted portion. Therefore, the liquid crystal device 10
At 0, after the opposing substrate 31 and the liquid crystal device substrate 300 are bonded to each other, the inside region of the sealing material 200 is depressurized, the liquid crystal 108 is injected under reduced pressure from the liquid crystal injection port 241, and the liquid crystal 108 is sealed. The liquid crystal injection port 241 is closed by the sealant 242.

As the sealing material 200, an epoxy resin or various ultraviolet curable resins are used, and a gap material made of glass fiber, glass beads or the like is blended therein. As the liquid crystal 108, a well-known TN (Twis
For example, a ted nematic liquid crystal is used. When a polymer-dispersed liquid crystal in which fine particles are dispersed in a polymer is used as the liquid crystal 108, an alignment film and a polarizing plate are not required, so that light use efficiency is increased and a bright active matrix liquid crystal device 100 is used. Can be provided. Further, as for the pixel electrode 14, if a non-transmissive and high-reflectivity metal film such as an aluminum film is used instead of the ITO film,
00 can be configured as a reflective liquid crystal device. In the case of the reflection type liquid crystal device 100, SH (Super Homeo) in which liquid crystal molecules are almost vertically aligned in a state where no voltage is applied.
(tropic) type liquid crystal or the like can be used. Needless to say, other liquid crystals may be used. In this embodiment, the opposing substrate 31 is the liquid crystal device substrate 3.
Since it is smaller than 00, the liquid crystal device substrate 300 is bonded with the peripheral drive circuit protruding from the outer peripheral edge of the counter substrate 31. Therefore, since the scanning line driving circuit 104 and the data line driving circuit 103 are located outside the counter substrate 31 and do not face the counter substrate 31, the alignment film such as polyimide or the liquid crystal is deteriorated by the DC component. Can be prevented. The sealant 200 is formed along the outer peripheral edge of the substrate when viewed from the counter substrate 31, but is formed inside when viewed from the liquid crystal device substrate 300. A large number of mounting terminals 107 are formed on a portion of the liquid crystal device substrate 300 outside the opposing substrate 31, and wire bonding or ACF (Anisotropic Conductic) is performed.
The flexible printed wiring board is connected by a method such as active film bonding.

(Basic Configuration of Liquid Crystal Device Substrate and Display Area) FIG. 3 is a block diagram of a liquid crystal device substrate 300 with a built-in drive circuit used in the liquid crystal device 100 of the present embodiment. In FIG. 3, a first light-shielding film on the liquid crystal device substrate 300 side, which will be described later, is not illustrated so that the basic components of the liquid crystal device substrate 300 can be easily understood.

As can be seen from FIG. 3, the liquid crystal device substrate 3
In the display area 61 of 00, a plurality of pixels 105 are formed in a matrix on the substrate 10 by a plurality of scanning lines 2 and a plurality of data lines 3. FIGS. 4A and 4B show a detailed block diagram and configuration diagram of each pixel 105. FIG. As shown in FIGS. 4A and 4B, the pixel 105
Is formed with a pixel switching TFT 102 connected to the scanning line 2 and the data line 3. This TFT10
2 and the counter electrode 32 of the counter substrate 31
A liquid crystal cell CE is formed with the liquid crystal 108 interposed therebetween. For the liquid crystal cell CE, a storage capacitor CAP is formed using the capacitor wiring 18 formed simultaneously with the scanning line 2. That is, in the present embodiment, T for pixel switching is used.
In the semiconductor layer 1 constituting the FT 102, the drain region is extended, this extended region is used as the first electrode of the storage capacitor CAP, and the capacitance wiring 18 formed simultaneously with the scanning line 2 is used as the second electrode. The storage capacitor CAP is formed by using the gate insulating film formed between the electrode and the electrode as a dielectric film.

Here, the region where the capacitance wiring 18 is formed is
This is an area where the liquid crystal disclination occurs under the influence of a horizontal electric field or the like and causes deterioration of the screen display quality. In this area, the black matrix 6 (see FIG. 2) of the counter substrate 31 is overlapped. And was shading. However,
In the present embodiment, by arranging the capacitor wiring 18 in such a region that is to be a dead space, generation of flicker and crosstalk can be prevented without wasting an area through which light can pass in the pixel 105. I have. Therefore,
In the liquid crystal device 100 of this embodiment, high-quality display can be performed.

In this embodiment, for example, the same aluminum film as the data line 3 for supplying a constant potential power supply VSSY on the low potential side of the scanning line drive circuit 104 for supplying a constant potential to the first light shielding film 7 is used. The capacitance wiring 18 formed of the same polysilicon film or the like as the scanning line 2 may be electrically connected in the contact hole 5 using the constant potential wiring 8 formed by the above method. The contact hole 5 can be formed in the same step as the contact hole for connecting the data line 3 and the high concentration source region 1a. With such a configuration, the first light-shielding film 7 and the constant potential wiring 8 for supplying a constant potential to the capacitor wiring 18 can be shared, so that there is no need to provide a dedicated wiring for each of them, and an effective layout can be achieved with a small area. . Further, since a constant potential wiring for supplying a counter electrode potential to the power supply of the peripheral driving circuit and the counter substrate is used instead, the dedicated mounting terminal 107 and the leading wiring 28 are not required.
Therefore, the number of mounting terminals can be reduced and the space can be effectively used.

Although not shown, the storage capacitance CAP
It is also possible to configure the method by extending a drain region of a semiconductor film constituting the TFT 102 for pixel switching, and overlapping the drain region with the preceding scanning line 2 via a gate insulating film. In the liquid crystal device substrate 300, the constant power supply VDD is provided on the side portion on the side of the data line drive circuit 103.
X, VSSX, VDDY, VSSY, modulated image signal VI
D1 to VID6, various signals (start signal DY of scan line shift register circuit 231, clock signal CLY, its inverted clock signal CLYB, start signal DX of data line shift register circuit 221, clock signal CLX, and its inverted clock signal CLXB) A large number of mounting terminals 107 to which information is input are configured. Mounting terminal 107
Is made of a metal film such as an aluminum film, a metal silicide film, or a conductive film such as an ITO film. From these mounting terminals 107, a plurality of signal wirings 28 for driving the scanning line driving circuit 104 and the data line driving circuit 103 are routed from the sealing material 200 to the outside of the substrate. These signal wirings 28 are made of a low-resistance metal film or a metal silicide film such as an aluminum film formed at the same time as the data lines 3. A hole may be opened and a polysilicon film formed of the same material in the same step as the scanning line may be electrically connected by a contact hole. In addition, the counter electrode potential LCCOM externally input from the mounting terminal 107 is used for the liquid crystal device substrate 300.
To supply the liquid crystal device substrate 3
In 00, a vertical conduction terminal 106 is formed. When the liquid crystal device substrate 300 and the opposing substrate 31 are bonded to each other by interposing an upper / lower conducting material having a predetermined diameter to the upper / lower conducting terminals 106, the opposing substrate 3 is placed from the liquid crystal device substrate 300 side.
The counter electrode potential LCCOM can be applied to one counter electrode 32.

On the liquid crystal device substrate 300, the data line drive circuit 103 side outputs data line shift register circuit 221, data line buffer circuit 222, and data line shift register circuit 221 via data line buffer circuit 222. Data sampling circuit 1 including an analog switch composed of a TFT that operates based on a detected signal
01 and each of the modulated image signals VID1 to VID1
Six image signal lines 225 corresponding to VID6 are configured.

The data line shift register circuit 221 of the data line drive circuit 103 may be composed of, for example, a plurality of lines to which a common start signal DX is input for each line. In this manner, when the data line shift register circuit 221 is composed of multiple lines, the transfer frequency of the clock signal CLX and its inverted clock signal CLXB can be reduced, so that the circuit load can be reduced. The data line shift register circuit 221 is supplied with a start signal DX from the outside via the mounting terminal 107, and a flip-flop (not shown) of each stage supplies a clock signal CL.
X and its inverted clock signal CLXB are supplied.
Therefore, in the data line shift register circuit 221, after the start signal DX is input, the clock signals CLX,
In synchronization with the rising edge of the inverted clock signal CLXB, the shift signal (data sampling circuit 10
Sampling signals X1, X2, X3...) For driving one analog switch are generated and output. When a sampling signal with a phase shift is output from the data line shift register circuit 221 to the data sampling circuit 101 via the data line buffer circuit 222, each analog switch operates sequentially based on the sampling signal. As a result, the modulated image signals VID1 to VID6 supplied via the image signal line 225 are:
At a predetermined timing, the data is captured by a predetermined data line 3 and held in each pixel 105 selected by a scanning signal supplied via the scanning line 2. In this example, the data line 3
Has been described in which a plurality of data lines 3 such as three, six or twelve are simultaneously selected by one sampling signal, while a modulated image input from the outside is used. A similar image display can be obtained by changing the timing of the signal. The number of phase expansions of the modulated image signal supplied to the data line 3 is not limited to six, but may be five or less if the writing characteristics of the analog switch constituting the data sampling circuit 101 are good. If the frequency is high, it may be increased to seven or more phases. At this time, needless to say, the image signal lines 225 are required at least for the number of phase expansions of the modulated image signal. Further, the data line driving circuit 103 is connected to the display area 61.
, The data lines 3 may be driven alternately by the two data line drive circuits 103 in a comb-tooth shape. With such a configuration, the drive frequency of the shift register can be halved, and the circuit load can be reduced.

Similarly, the scanning line driving circuit 104 generates a shift signal (scanning signal) based on the start signal DY, the clock signal CLY, and its inverted clock signal CLYB, and outputs the same. And a scanning line buffer circuit 232. In this embodiment, the scanning line driving circuit 10 is provided on both sides of the display area 61.
4, the scanning line 2 is driven from both sides, so that the driving load of the scanning line 2 can be reduced. When the time constant of the scanning line 2 can be ignored, the scanning line driving circuit 104 may be configured on only one side of the display area 61.

In the liquid crystal device substrate 300, the display area 61
In the area opposite to the side on which the data line driving circuit 103 is formed and overlapping with the light-shielding film 60 for peripheral parting (the area shaded upward in FIG. 3), the data line 3 A circuit 109 is also formed. The auxiliary circuit 109 includes a switching circuit 171 using a TFT.
And two signal wirings 172 electrically connected to the data line 3 via the switching circuit 171.
And a signal wiring 173 for controlling the switching circuit 171
And In the auxiliary circuit 109, the signal wiring 173
When the switching circuit 171 is operated based on the control signal NRG supplied to the data line 3 and the data line 3
You can control the connection status with the Therefore, the auxiliary circuit 109 is driven by the control signal NRG during one horizontal blanking period of the image signal, and a constant level potential is applied to the data line 3 by the signal NRS.
1. With the precharge function applied in advance as NRS2, the load of writing the actual modulated image signals VID1 to VID6 to the data line 3 via the data sampling circuit 101 can be reduced. Note that, as the auxiliary circuit 109, an inspection circuit for detecting a point defect or a line defect can be configured, or the above-described precharge function and the inspection circuit can be combined.

FIG. 5 is a sectional view taken along the line AA ′ of FIG.

The pixel switching TFT 102 is shown in FIG.
As can be seen from FIG. 5B and FIG. 5, a scanning line 2 (gate electrode), a channel region 1c in which a channel is formed by an electric field from the scanning line 2, and a channel region 1c formed between the scanning line 2 and the channel region 1c. The gate insulating film 12 and the contact hole 5 of the second interlayer insulating film 13 in the data line 3 (source electrode).
The second interlayer insulating film 13 and the third interlayer insulating film 1 are connected to the high-concentration source region 1a electrically connected through
5 and a high-concentration drain region 1b electrically connected via a contact hole 4 formed in the contact hole 4. Further, the pixel switching TFT 102 includes a channel region 1c and a source region 1 implanted with high-concentration impurity ions.
The low-concentration source / drain regions 1d and 1e in which low-concentration impurity ions are implanted are formed in each of the junction with a and the channel region 1c and the junction with the drain region 1b in which high-concentration impurity ions are implanted. LDD (Light
ly Doped Drain) structure.

In this embodiment, the TFT 102 is formed by using the lower part of the data line 3 and at least the gate electrode of the scanning line 2, that is, the pixel switching TFT 10 is used.
The two channel regions 1c and the low-concentration source / drain regions 1d and 1e are covered by the data lines 3. As a result, the incident light from the counter substrate 31 side is transmitted to the channel region 1c of the pixel switching TFT 102 and the low-density source / source.
Since there is no irradiation to the drain regions 1d and 1e,
The leakage current of the TFT due to light can be reduced. The basic configuration of the embodiment and the modified example described below is the same as the above-described configuration.

[Embodiment 1] FIG. 6 is an enlarged plan view showing the periphery of two pixels formed at the extreme end of a display area in a liquid crystal device substrate used in a liquid crystal device of this embodiment. is there. FIG. 7 is an explanatory diagram showing a wiring portion (wiring) of a first light shielding film formed on the liquid crystal device substrate of the present embodiment, and a connection structure between the wiring and a constant potential wiring. FIG. 8A,
6B is a cross-sectional view of the connection portion between the wiring of the first light-shielding film and the constant potential wiring in FIG. It is an enlarged plan view of a part.

As shown in FIG. 5, the liquid crystal device 10 of the present embodiment
0, the liquid crystal device substrate 300 has a pixel switching T
A first interlayer insulating film 11 is formed below the FT 102, and a light-shielding structure described below is configured by using an interlayer between the interlayer insulating film 11 and the substrate 10.

In this embodiment, a pixel switching TFT 102 is provided between the first interlayer insulating film 11 and the substrate 10.
Channel region 1c, low-concentration source / drain region 1
d, 1e and lightly doped source / drain regions 1d, 1e
Made of a metal film such as tungsten, titanium, chromium, tantalum, molybdenum, or a metal alloy film such as a metal silicide containing these metals, so as to overlap at least with the junction between the high-concentration source / drain regions 1a and 1b. Thus, a light-shielding film 7 having conductivity is formed. In this embodiment, since there is a portion where the first light-shielding film 7 is not formed below the high-concentration drain region 1b of the pixel switching TFT 102, the formation area of the TFT 102 depends on the presence or absence of the first light-shielding film 7. Step occurs. Such a step may make the characteristics of the TFT 102 unstable. Therefore, in this embodiment, the position of the step is shifted from the junction between the high-concentration drain region 1b and the low-concentration drain region 1e to the side of the high-concentration drain region 1b by 1 μm or more, so that the step affects the characteristics of the TFT 102. Is kept to a minimum.

As can be seen from FIG. 6, the first light shielding film 7
Is extended along the scanning line 2 from the channel light-shielding portion below the scanning line 2 to apply a constant voltage to the channel light-shielding portion overlapping the channel region 1c and the like on the lower layer side and applying a constant voltage to the channel light-shielding portion. In the present embodiment, when a mask is aligned in a photolithography step of a manufacturing process, a position between the scanning line 2 and the wiring of the first light shielding film 7 due to a mask alignment shift. Even if the light is shifted, the first light-shielding film 7 is prevented so that the incident light (light transmitted through the liquid crystal 108) is not blocked by the wiring of the first light-shielding film 7 or the surface of the light-shielding film 7 is not directly irradiated with light. Are set to dimensions slightly smaller than the width of the scanning line 2. Note that FIG. 6 shows the positional relationship between the black matrix 6 formed on the counter substrate 31 and each pixel 105. point The display is performed in the area inside the black matrix 6 indicated by the line.

As shown in FIGS. 6 and 7, the wiring of the first light-shielding film 7 is drawn out to the outside of the display area 61 along each scanning line 2 and is formed under the light-shielding film 60 for parting around. It extends to the side. This light-shielding film 60 for parting around
On the lower layer side, a constant potential wiring 8 for supplying a low potential side constant voltage power supply VSSY to the scanning line driving circuit 104 is arranged along the side of the display area 61. One end of the wiring of the first light shielding film 7 is connected. Therefore, the first light-shielding film 7 is
4, the first light-shielding film is fixed at the potential of the constant-potential wiring 8 and is not in a floating state.

The wiring portion of the first light shielding film 7 and the constant potential wiring 8
In connection with the present embodiment, in this embodiment, FIG.
As shown in (1), the wiring of the first light-shielding film 7 is between the first interlayer insulating film 11 and the substrate 10. Further, since the constant potential wiring 8 is a conductive film formed simultaneously with the data line 3, it is disposed between the second interlayer insulating film 13 and the third interlayer insulating film 15. Therefore, in the present embodiment, FIGS.
As shown in (A) and (B), the end of the wiring of the first light-shielding film 7 has a constant potential through a contact hole 9 formed in the first interlayer insulating film 11 and the second interlayer insulating film 13. It is connected to the wiring 8.

Such a connection structure includes forming a contact hole 9 for connecting the wiring of the first light-shielding film 7 and the constant potential wiring 8, and forming a source electrode (data line 3) in the source region of the pixel switching TFT 102. ) Is formed simultaneously with the formation of the contact hole 5 (see FIG. 5), and the contact hole 9 is opened in one etching step. However, in order to simultaneously perform the opening of the contact hole 5 and the opening of the contact hole 9, the high concentration source region 1a of the pixel switching TFT 102 is required.
Preferably, the first interlayer insulating film 11 is sufficiently thinner than the second interlayer insulating film 13 so that the polysilicon film in the contact hole 5 is not etched.

As described above, in the liquid crystal device 100 of the present embodiment, at least the channel region 1c, the low-concentration source / drain regions 1d, 1d of the pixel switching TFT 102 are provided.
e, and a first light-shielding film 7 that overlaps with a junction between the low-concentration source / drain regions 1d and 1e and the high-concentration source / drain regions 1a and 1b via a first interlayer insulating film 11 on the lower layer side. Since the (channel light shielding portion) is formed, even if there is reflected light from the back surface side of the liquid crystal device substrate 300, this light does not reach the channel region 1c of the pixel switching TFT 102 and the like. Therefore, in the liquid crystal device 100 of the present embodiment, the TFT 102 has the substrate 30 for the liquid crystal device.
No leak current occurs due to the reflected light from the back side of the zero. In addition, the first light shielding film 7 is provided with the scanning line driving circuit 10.
4, the semiconductor layer 1 of the TFT 102 and the first light-shielding film 7
The TFT characteristics do not fluctuate or deteriorate due to the influence of the parasitic capacitance between them.

The surface of the first light-shielding film 7 is subjected to an anti-reflection treatment so that incident light (light transmitted through the liquid crystal 108) is reflected on the surface of the first light-shielding film 7 and the pixel switching TFT 102 It is preferable to prevent irradiation to the surface.

In this embodiment, as described with reference to FIG. 4B, the pixel switching TFT 102 is formed using the lower portion of the data line 3, and includes the channel region 1c, the lightly doped source / drain. The regions 1d and 1e, and the low concentration source / drain regions 1d and 1e and the high concentration source / drain
At least the data line 3 covers the junction with the drain regions 1a and 1b. Therefore, the data line 3 is
It functions as a second light-shielding film for the pixel switching TFT 102, and includes a channel region 1c, low-concentration source / drain regions 1d and 1e, and low-concentration source / drain regions 1d and 1e and high-concentration source / drain regions 1a and 1b. The bonding portion includes at least the first light shielding film 7 and the data line 3
(Second light-shielding film). Further, the black matrix 6 described with reference to FIG. 2 includes the data line 3 (second light-shielding film).
, A channel region 1c, low-concentration source / drain regions 1d and 1e, and low-concentration source / drain regions 1d and 1e and a high-concentration source / drain region 1.
a and 1b and the first light-shielding film 7 disposed below them. Therefore, the black matrix 6 functions as a third light-shielding film for the pixel switching TFT 102, and exhibits a redundant function for the data line 3 as the second light-shielding film. Therefore, in the liquid crystal device substrate 300 of the present embodiment, no leak current is generated in the TFT 102 due to incident light from the counter substrate 31 side.

In this embodiment, the pixel switching T
Although the case where the FT 102 has the LDD structure has been described as an example, the present invention may be applied to an offset structure in which impurity ions are not introduced into regions corresponding to the low-concentration source / drain regions 1d and 1e. Such an LDD structure or offset structure TFT has the advantages that the withstand voltage is improved and the leakage current at the time of off is reduced. The present invention may of course be applied to a self-aligned TFT in which source / drain regions are formed by implanting high-concentration impurity ions using the gate electrode (a part of the scanning line 2) as a mask.

The following modified examples of the connection portion between the first light-shielding film and the constant potential wiring have the same configuration as that of the first embodiment. A connection portion with a potential wiring will be described, and other configurations will be omitted.

(First Modification of Connection Portion Between First Light-Shielding Film and Constant-Potential Wiring) As shown in FIGS. 9A and 9B, the first interlayer insulating film 11 is located between the substrate 10 and the substrate 10. First light shielding film 7
Is connected to the constant potential wiring 8 between the second interlayer insulating film 13 and the third interlayer insulating film 15 by making holes in the first interlayer insulating film 11 and the second interlayer insulating film 13, respectively. The contact holes 17 and 9 may be used. When such a connection structure is employed, the step of forming contact holes 17 in first interlayer insulating film 11 and the step of forming contact holes 9 in second interlayer insulating film 13 are performed separately. . Therefore, even when the first interlayer insulating film 11 is thicker than the gate insulating film 12 by several thousand angstroms, the contact hole 5 (see FIG. 5) with respect to the high concentration source region 1a of the pixel switching TFT 102.
The contact hole 9 or the contact hole 17 having substantially the same depth is formed at the same time when the
Therefore, the high-concentration source region 1a of the TFT 102 is not etched during the opening.

(Modification 2 of connection portion between first light-shielding film and constant potential wiring) As shown in FIGS. 10A and 10B, the first
The connection between the wiring portion of the first light shielding film 7 between the interlayer insulating film 11 and the substrate 10 and the constant potential wiring 8 between the second interlayer insulating film 13 and the third interlayer insulating film 15 A contact hole 17 formed in the first interlayer insulating film 11, a relay electrode 16 connected to the wiring of the first light-shielding film 7 through the contact hole 17, and a second electrode formed in a position corresponding to the relay electrode 16. The contact hole 9 of the interlayer insulating film 13 may be used. In this case, the relay electrode 16 is formed simultaneously with the scanning line 2 and the capacitance wiring 18.

(Modification 3 of Connection Portion Between First Light-Shielding Film and Constant Potential Wiring) As shown in FIGS. 11A and 11B, the first
The wiring of the first light-shielding film 7 between the interlayer insulating film 11 and the substrate 10, the second interlayer insulating film 13 and the third interlayer insulating film 15
Is connected to a constant potential wiring 8 located between the layers by a contact hole 17 formed in the first interlayer insulating film 11 and a wide relay electrode connected to the wiring portion of the first light shielding film 7 through the contact hole 17. The contact hole 9 formed in the second interlayer insulating film 13 at a position shifted from the contact hole 17 in the region corresponding to the relay electrode 16 may be used. Also in this case, the relay electrode 16 is formed simultaneously with the scanning line 2 and the capacitance wiring 18.

[First Modification of First Embodiment] In the embodiment shown in FIG. 7, one end of the wiring of the first light shielding film 7 is connected to the constant potential wiring 8. As shown in FIG. 12, both ends of the wiring of the first light shielding film 7 are connected to each scanning line 2.
May be drawn out to the outside of the display area 61, and each of these two ends may be connected to the constant potential wiring 8. Also in this case, since the first light-shielding film 7 and the constant potential wiring 8 are formed between different layers, FIGS.
The wiring of the first light-shielding film 7 and the constant potential wiring 8 are connected to each other by a connection structure using a contact hole 9 or the like shown in FIG. Other configurations are the same as those described with reference to FIG.

Also in this embodiment, the pixel switching TFT 1
The first light-shielding film 7 is provided on the lower layer side, such as the channel region 1c of the O.02.
Therefore, even if there is reflected light from the back surface side of the liquid crystal device substrate 300, this light does not reach the channel region 1c of the pixel switching TFT 102 or the like. Therefore, in the liquid crystal device 100 of this embodiment, T
No leak current is generated in the FT 102 due to light reflected from the back surface of the liquid crystal device substrate 300. Moreover, since the first light shielding film 7 is connected to the constant potential wiring 8 for supplying the low potential side constant voltage power supply VSSY of the scanning line driving circuit 104, the first light shielding film 7 is connected to the constant potential wiring 8 Is fixed at a potential of Therefore, the TFT 102 is affected by the parasitic capacitance between the semiconductor layer 1 of the TFT 102 and the first light shielding film 7.
FT characteristics do not fluctuate or deteriorate.

Furthermore, in this embodiment, since the wiring of the first light-shielding film 7 is connected to the constant-potential wiring 8 at each of both ends, even if there is a disconnection in the middle of the wiring, the first wiring is not removed. Light shielding film 7
Is supplied with a constant potential. Therefore, the first light shielding film 7
Since a redundant wiring for the wiring is formed, the reliability is high.

[Modification 2 of Embodiment 1] In the embodiment shown in FIG. 12, a constant potential is applied to only one end of each of the two constant potential wirings 8. As shown in FIG. 13, it is more preferable that a constant potential is applied to both of the two constant potential wirings 8 from both ends thereof. With this configuration, the first
This means that the redundant wiring is also configured for the constant potential wiring 8 for applying a constant potential to the light shielding film 7. Other configurations are the same as those of the first embodiment and the first modification thereof, and a description thereof will be omitted.

[Modification 3 of Embodiment 1] In this embodiment, since the basic configuration is the same as that of Embodiment 1 and Modifications 1 and 2, the description of the common parts will be omitted. In this example, as shown in FIG. 14, the wiring portions of the first light-shielding film 7 are formed in a grid along both the scanning lines 2 and the data lines 3. Therefore, the resistance of the first light shielding film 7 is further reduced, and the redundancy is enhanced. The first light-shielding film 7 overlaps with the black matrix 6 (see FIG. 2) of the counter substrate 31. For this reason, the first light-shielding film 7 has a redundant function for the black matrix 6 of the counter substrate 31 and allows the black matrix 6 to be omitted from the counter substrate 31.

Also in the case of such a configuration, of the wiring portion of the first light-shielding film 7, both ends of a portion extending along the scanning line 2 are extended to outside the display area 61, 8, FIG. 9, and FIG.
The wiring portion of the first light-shielding film 7 and the constant potential wiring 8 may be connected by a connection structure using the contact hole 9 shown in FIG. 10 or FIG.

In the first embodiment shown in FIGS. 7, 12, 13, and 14, a connection structure using contact holes 9 and the like (shown in FIGS. 8, 9, 10, or 11). The wiring portion of the first light shielding film 7 connected to the constant potential wiring 8 is formed independently below each scanning line 2. The wiring portions of these first light-shielding films 7 are extended, and the wiring portions extended from all the first light-shielding films 7 under the region overlapping with the peripheral parting light-shielding film 60 are subjected to the first light-shielding operation. If the connection is made electrically by a conductive film made of a metal film formed of the same film as the film 7 in the same process or a metal alloy film such as a metal silicide containing these metals, when the wiring is disconnected, In addition to performing redundant functions,
This is advantageous because the resistance of the light shielding film 7 can be reduced.

[Embodiment 2] FIG. 15 is an enlarged plan view showing the periphery of two pixels formed at the extreme end of the display area in the liquid crystal device substrate used in the liquid crystal device of this embodiment. is there. FIG. 16 is an explanatory diagram showing a wiring portion of a first light-shielding film formed on the liquid crystal device substrate of the present embodiment, and a connection structure between the wiring portion and a constant potential wiring. The basic configuration of the liquid crystal device substrate 300 of the present embodiment is as described with reference to FIGS.
The following description will focus on the light-shielding structure configured as 0 and the connection structure between the light-shielding film and the constant potential wiring that configures the light-shielding structure. The liquid crystal device substrate of the liquid crystal device according to the present embodiment has the same basic configuration as the liquid crystal device substrate of the liquid crystal device according to Embodiment 1, and thus, portions having common functions are denoted by the same reference numerals. Therefore, detailed description thereof will be omitted.

Also in this embodiment, as described with reference to FIG. 5, the channel structure 1c of the pixel switching TFT 102 and the low-density layer are provided between the first interlayer insulating film 11 and the substrate 10 as described with reference to FIG. Source / drain regions 1d, 1e,
And a metal film of tungsten, titanium, chromium, tantalum, molybdenum, or a metal containing these metals so as to at least overlap the junction between the low-concentration source / drain regions 1d and 1e and the high-concentration source / drain regions 1a and 1b. An opaque and conductive light-shielding film 7 made of a metal alloy film such as a silicide is formed.

The first light-shielding film 7 is formed as shown in FIGS.
As shown in the figure, a channel light-shielding portion overlapping the channel region 1c and the like on the lower layer side and a lower layer side of the scanning line 2 from the channel light-shielding portion along the scanning line 2 in order to apply a constant voltage to the channel light-shielding portion. And an extended wiring portion.

In the present embodiment, the wiring portions of the first light-shielding film 7 include branch lines extending from the display area 61 further outward from the peripheral parting light-shielding film 60 along each scanning line 2 and one side of each of these branch lines. And one trunk line connecting the ends of the two. This trunk line is located at a position overlapping the peripheral parting light shielding film 60 located between the display area 61 and the scanning line driving circuit 104. Here, one end of the trunk line (wiring portion) of the first light-shielding film 7 overlaps with the constant potential wiring 8 that supplies the low potential side constant voltage power supply VSSY to the scanning line driving circuit 104, and this overlap. In the portion, the first light shielding film 7
Is connected to the constant potential wiring 8.
Therefore, the first light-shielding film 7 is connected to the constant-potential wiring 8 for supplying the low-potential-side constant-voltage power supply VSSY of the scanning line driving circuit 104, and therefore, the first light-shielding film 7 is connected to the constant-potential wiring 8
And is not in a floating state.

As can be seen from FIG. 5, the wiring (main line) of the first light shielding film 7 is also formed by the first interlayer insulating film 11 and the substrate 10.
And the constant potential wiring 8 is located between the second interlayer insulating film 13 and the third interlayer insulating film 15. The connection is made by a connection structure using the contact hole 9 shown in FIG. 8, FIG. 9, FIG. 10, or FIG. Other configurations are substantially the same as those of the first embodiment, and thus description thereof will be omitted.

In the liquid crystal device 100 configured as described above,
As in the first embodiment, the pixel switching TFT 102
The first light-shielding film 7 so as to overlap the channel region
Is formed, even if there is reflected light from the back side of the liquid crystal device substrate 300, this light does not reach at least the channel region 1c of the pixel switching TFT 102 or the like. Therefore, the pixel switching TFT 102 includes:
No leak current occurs due to light reflected from the back surface of the liquid crystal device substrate 300. Further, since the first light shielding film 7 is connected to the constant potential wiring 8 for supplying the constant voltage power supply VSSY on the low potential side of the scanning line driving circuit 104, the first light shielding film 7 is connected to the constant potential wiring 8 Is fixed at a potential of Therefore, the same effects as in the first embodiment are obtained, such that the TFT characteristics are not changed or deteriorated due to the influence of the parasitic capacitance between the semiconductor layer 1 of the TFT 102 and the first light shielding film 7. .

Further, in this embodiment, the wiring of the first light-shielding film 7 has branch lines extending along the scanning lines 2 and trunk lines connected at the ends of these branch lines. The wiring of the light shielding film 7 is connected to the constant potential wiring 8 via this trunk line. Therefore, the connection between the first light-shielding film 7 and the constant potential wiring 8 does not need to be performed for each branch line, but may be performed between the main line and the constant potential wiring 8. For this reason, the main line is routed to an arbitrary position where no wiring passes, and the first light shielding film 7 is there.
And the constant potential wiring 8 can be connected. Also, the first
If wet etching is performed when forming the contact hole 9 for connecting the light shielding film 7 and the constant potential wiring 8 to each other, cracks are likely to occur in the interlayer insulating film and the like due to seepage of the etching solution. Thus, there is an advantage that the trunk can be routed to an arbitrary position and the place where the above-mentioned crack may occur can be limited to a safe position.
Further, since the connection between the first light-shielding film 7 and the constant potential wiring 8 is made between the main line and the constant potential wiring 8, the place where the above-mentioned crack may occur is kept at one place. There is also the advantage of high reliability.

This embodiment may be applied to a configuration in which dry etching is performed when forming a contact hole 9 for connecting the first light shielding film 7 and the constant potential wiring 8.

[Modification 1 of Embodiment 2] In the embodiment shown in FIG. 16, the wiring of the first light-shielding film 7 has a configuration in which one end of the branch line is connected to the main line. As shown in FIG. 17, both ends of the branch line may be drawn out to the outside of the display area 61 along each scanning line 2, and both ends may be connected to the main line. Also in this case, since the first light shielding film 7 and the constant potential wiring 8 are formed in different layers,
The first light-shielding film 7 is formed by a connection structure using the contact hole 9 shown in FIG. 8, FIG. 9, FIG.
And the constant potential wiring 8 are connected at two places.
The other configuration is the same as that described with reference to FIG.

Even in such a configuration, since at least the lower layer side of the channel region 1c of the pixel switching TFT 102 is covered with the first light-shielding film 7, the reflected light from the back surface side of the liquid crystal device substrate 300 is obtained. However, this light does not reach at least the channel region 1c of the pixel switching TFT 102 or the like. Therefore, in the liquid crystal device 100 of the present embodiment, the TFT 102 includes the substrate 300 for the liquid crystal device.
No leakage current due to the reflected light from the back surface side is generated. Moreover, the first light-shielding film 7 is
The first light-shielding film 7 is fixed to the potential of the constant potential wiring 8 because the first light shielding film 7 is connected to the constant potential wiring 8 for supplying the constant voltage power supply VSSY on the low potential side. Therefore, the TFT 102
The TFT characteristics do not fluctuate or deteriorate under the influence of the parasitic capacitance between the semiconductor layer 1 and the first light shielding film 7.

Further, in this embodiment, only two trunk lines are connected to the constant potential wiring 8, and it is not necessary to connect the first light-shielding film 7 and the constant potential wiring 8 for each branch line. Therefore, the trunk line may be routed to an arbitrary position such as a position adjacent to the scanning line driving circuit 104 where no wiring passes, and the first light-shielding film 7 and the constant potential wiring 8 may be connected at two locations. For example, the same effects as in the second embodiment can be obtained.

Further, in the wiring of the first light shielding film 7,
Since each of the branch lines is connected to two trunk lines at both ends thereof, a constant potential is supplied from the trunk line even if there is a break in the middle of each branch line. Therefore, since the redundant wiring for each branch line is formed in the wiring portion of the first light shielding film 7, the reliability is high.

[Modification 2 of Embodiment 2] In the embodiment shown in FIG. 17, the constant potential wiring 8 is connected to only one end of each of the two trunk lines.
As shown in FIG. 18, in each of the two trunk lines,
It is further preferable that the constant potential wiring 8 is connected to both ends thereof. With this configuration, a redundant wiring is also configured for the main line that applies a constant potential to each branch line in the first light shielding film 7. Other configurations are
Since the second embodiment is the same as the second embodiment and the improved example 2, the description thereof is omitted. [Third Modification of Second Embodiment] In this embodiment, the basic configuration is the same as that of the second embodiment and the first and second modifications thereof, and a description of common parts will be omitted. In the present example, as shown in FIG. 19, in the wiring portion of the first light-shielding film 7, branch lines are formed in a grid along both the scanning lines 2 and the data lines 3. Therefore, the resistance of the first light shielding film 7 is further reduced, and the redundancy is enhanced. The first light-shielding film 7 overlaps with the black matrix 6 of the counter substrate 31 (see FIGS. 2 and 15). For this reason, the first light-shielding film 7 has a redundant function for the black matrix 6 of the counter substrate 31 and allows the black matrix 6 to be omitted from the counter substrate 31.

Also in this case, of the branch lines of the wiring portion of the first light shielding film 7, both ends of the portion extending along the scanning line 2 are extended to the outside of the display area 61. The ends on both sides of the branch line may be connected with each trunk line in a region overlapping the light-shielding film 60 for parting around. Further, in the second embodiment, the constant potential wiring is replaced with a light shielding film 6 for parting around.
It goes without saying that wiring may be performed up to 0 and connected to the first light shielding film 7 in the corner region of the peripheral parting light shielding film 60. Further, in Embodiments 1 and 2,
The number of mounting terminals electrically connected to an external IC for supplying a constant potential signal (for example, VSSY) to the constant potential line 8 may be one, or two or more are provided and short-circuited to each other in the liquid crystal device substrate. In this manner, the wiring resistance may be reduced or a redundant structure may be adopted.

[Embodiment 3] FIG. 20 is an enlarged plan view showing the periphery of two pixels formed at the extreme end of the display area in the liquid crystal device substrate used in the liquid crystal device of this embodiment. is there. FIG. 21 is a sectional view taken along line JJ ′ of FIG. The basic configuration of the liquid crystal device substrate 300 of this embodiment is as described with reference to FIGS.
Here, the connection structure between the light-shielding film constituting the light-shielding structure of the liquid crystal device substrate 300 and the capacitance wiring 18 will be mainly described. Further, the liquid crystal device substrate of the liquid crystal device of the present embodiment has the same basic configuration as the liquid crystal device substrate of the liquid crystal device according to Embodiments 1 and 2, and thus, portions having common functions are denoted by the same reference numerals. And detailed description thereof will be omitted.

Also in this embodiment, as shown in FIG. 20, the first light-shielding film 7 scans from the channel light-shielding portion overlapping the channel region 1c and the like, and from the channel light-shielding portion to apply a constant voltage to the channel light-shielding portion. And a wiring extending along the line 2. Each of the wiring portions of the first light-shielding film 7 is connected to a branch line extending from the display area 61 along the scanning line 2 to a position overlapping the light-shielding film 60 for parting around, and ends of these branch lines are connected to each other. It consists of a main line. The trunk line of the first light-shielding film 7 overlaps with the constant-potential wiring 8 for supplying the low-potential-side constant-voltage power supply VSSY of the scanning line driving circuit 104. Wiring part (main line) and constant potential wiring 8
Is connected via the contact hole 9 shown in FIG. 8, FIG. 9, FIG. 10, or FIG.

In each pixel 105, a capacitance wiring 18 is formed in parallel with the scanning line 2, and a first light shielding film 7 is formed so as to overlap with the scanning line 2 and the capacitance wiring 18. Therefore, in the present embodiment, the capacitance wiring 18 does not extend to the scanning line driving circuit 104, and the capacitance wiring 18 is connected to the contact hole 12
It is connected to the main line of the first light shielding film 7 via f.

Even in such a configuration, since the first light-shielding film 7 is supplied with the low-potential-side constant-voltage power supply VSSY of the scanning line drive circuit 104 via the constant-potential wiring 8, the capacitance wiring The constant voltage power supply VSSY is also supplied to 18 via the main line of the first light shielding film 7. Therefore, the scanning line driving circuit 104 does not need to supply a constant potential for each capacitance wiring 18, and accordingly, the scanning line driving circuit 10
In No. 4, the wiring density and the number of contact holes decrease. Therefore, there is an advantage that a large-scale circuit can be introduced into the scanning line driving circuit 104. Further, there is an advantage that it is not necessary to provide a mounting terminal and a dedicated wiring for supplying a constant potential to the capacitor wiring from the outside.

In FIG. 21, when connecting the main line of the first light-shielding film 7 to the constant potential wiring 8, as described with reference to FIG. Second
FIG. 2 shows a mode using a contact hole 9 formed in an interlayer insulating film 13. However, in connecting the main line of the first light-shielding film 7 and the constant potential wiring 8, FIGS.
1 may be used.

[Embodiment 4] FIG. 22 is an enlarged plan view showing the periphery of two pixels formed at the extreme end of the display area in a liquid crystal device substrate used in the liquid crystal device of this embodiment. is there. FIG. 23 is a sectional view taken along the line KK 'of FIG. The basic configuration of the liquid crystal device substrate 300 of this embodiment is as described with reference to FIGS.
Here, a description will be given mainly of a configuration for using a light shielding film constituting a light shielding structure of the liquid crystal device substrate 300 as a capacitor wiring. In addition, the liquid crystal device substrate of the liquid crystal device of the present embodiment has the same basic configuration as the liquid crystal device substrate of the liquid crystal device according to the third modification of the second embodiment. The reference numerals are used and the detailed description thereof is omitted. Also in the present embodiment, as shown in FIG.
Is composed of a channel light-shielding portion overlapping the channel region 1c and the like, and a wiring portion formed in a lattice shape along the scanning line 2 and the data line 3 from the channel light-shielding portion to apply a constant voltage to the channel light-shielding portion. Have been. First
The wiring portion of the light-shielding film 7 is composed of branch lines extending from the display region 61 to the region overlapping the peripheral parting light-shielding film 60 along each scanning line 2 and a trunk line to which the ends of these branch lines are connected. ing. The trunk line of the first light-shielding film 7 overlaps with the constant potential wiring 8 for supplying a constant potential such as the counter electrode potential LCCOM.
The wiring portion (stem line) of the light shielding film 7 and the constant potential wiring 8 are connected via the contact hole 9 shown in FIG. 8, FIG. 9, FIG. 10, or FIG.

Here, the first light shielding film 7 is formed as shown in FIG.
In this embodiment, since the capacitor wiring 18 is configured to substantially overlap with the capacitance wiring 18 described with reference to FIG.
23B, the capacitance wiring 18 described with reference to FIG. 23B is not formed. Instead, as shown in FIG. 23, the first light-shielding film 7 is provided with the high-concentration drain of the TFT 102 via the first interlayer insulating film 11. The storage capacitor CA is used by utilizing the overlap with the area 1b.
Construct P. That is, since the first light-shielding film 7 is supplied with the low-potential-side constant-voltage power supply VSSY of the scanning line drive circuit 104 via the constant-potential wiring 8, the first light-shielding film 7 is Region (high concentration region 1b)
A storage capacitor CAP having the first interlayer insulating film 11 as a dielectric film is formed between them.

[Example 1 of Manufacturing Method of Liquid Crystal Device Substrate 300] In the manufacturing method of the liquid crystal device 100, the manufacturing process of the liquid crystal device substrate 300 will be described with reference to FIGS. These drawings are process cross-sectional views illustrating a method for manufacturing a liquid crystal device substrate of the present embodiment.
A cross section corresponding to the line AA 'in FIG. 4B (cross section of the pixel TFT portion) is shown on the left side, and a cross section B-
A cross section at a position corresponding to the line B ′ (a cross section of a connection portion between the first light shielding film 7 and the constant potential wiring 8) is shown. Here, an example in which the connection portion between the first light-shielding film 7 and the constant potential wiring 8 is configured as shown in FIG. 9 will be described.

First, as shown in FIG. 24A, tungsten, titanium, chromium, tantalum, molybdenum, or the like is formed on the entire surface of a glass substrate, for example, a transparent insulating substrate 10 made of, for example, alkali-free glass or quartz by sputtering or the like. Opaque and conductive light-shielding film 7 made of a metal film or a metal alloy film such as a metal silicide containing these metals.
0 from about 500 angstroms to about 3000 angstroms, preferably from about 1000 angstroms to about 2 angstroms.
After being formed to a thickness of 000 angstroms, the first light-shielding film 7 is formed by using photolithography technology as shown in FIG. The first light-shielding film 7 includes at least a channel region 1c, low-concentration source / drain regions 1d and 1e, and low-concentration source / drain regions 1d and 1e and a high-concentration source / drain of a pixel switching TFT 102 to be formed later. Region 1a,
1b is formed so as to cover the junction with the back surface of the insulating substrate 10 (see FIG. 5). In the first light-shielding film 7 thus formed, a portion formed corresponding to the channel region of the pixel switching TFT 102 is a channel light-shielding portion, and a portion formed to be connected to the constant potential wiring 8 is formed. This is the wiring part.

Next, as shown in FIG. 24 (C), the surface of the first light
The first interlayer insulating film 11 having a thickness of 000 angstroms, preferably about 8000 angstroms is formed. The first interlayer insulating film 11 insulates the first light-shielding film 7 from the semiconductor layer 1 to be formed later. For example, a silicon oxide film using a normal pressure CVD method, a low pressure CVD method, Or an insulating film such as a silicon nitride film.
By forming the first interlayer insulating film 11 over the entire surface of the insulating substrate 10, an effect as a base film can be obtained. That is, the pixel switching TFT 1 may be damaged due to roughening of the surface of the insulating substrate 10 during polishing or contamination due to insufficient cleaning.
02 can be prevented from deteriorating.

Next, as shown in FIG. 24 (D), a thickness of about 500 Å to about 2000 Å, preferably about 1 Å is formed on the entire surface of the first interlayer insulating film 11.
A polysilicon film 1a of 000 angstroms is formed. As a method, the substrate 10 is heated at about 450 ° C. to about 550 ° C.
C., preferably about 500 ° C., while heating the monosilane gas or disilane gas at about 400 cc / min.
Supply at a flow rate of about 600 cc / min, pressure about 20 Pa
At about 40 Pa, an amorphous silicon film is formed. Thereafter, in a nitrogen atmosphere, about 600 ° C. to about 700 ° C.
Annealing is performed at a temperature of about 1 hour to about 10 hours, preferably about 4 hours to about 6 hours, and solid phase growth is performed to form a polysilicon film. The polysilicon film 1a may be formed directly by a low-pressure CVD method or the like, or may be made amorphous by implanting silicon ions into the polysilicon film deposited by the low-pressure CVD method or the like, and recrystallized by annealing or the like. Thus, a polysilicon film may be formed.

Next, using photolithography technology,
Patterning is performed as shown in FIG. 24 (E), and an island-shaped semiconductor layer 1 (active layer) is formed in the pixel switching TFT portion 102.
To form On the other hand, the polysilicon layer 1a is completely removed at the connection portion with the constant potential wiring 8.

Next, as shown in FIG. 24 (F), the semiconductor layer 1 is thermally oxidized at a temperature of about 900 ° C. to about 1300 ° C., so that the thickness of the semiconductor layer 1 is about 500 Å to about 500 Å. A gate insulating film 12 made of a 1500 angstrom silicon oxide film is formed. By this step, the thickness of the semiconductor layer 1 finally becomes about 300 Å to about 1500 Å, preferably about 35 Å.
The thickness of the gate insulating film 12 is about 200 Å to about 1500 Å, and the thickness is about 0 Å to about 450 Å. In addition, 8
When using a large substrate of about inch, to prevent the substrate from warping due to heat, the thermal oxidation time is shortened to make the thermal oxide film thin, and a high-temperature silicon oxide film (H
A TO film or a silicon nitride film may be deposited by a CVD method or the like to form a multilayer gate insulating film structure of two or more layers.

Next, as shown in FIG. 25A, a polysilicon film 20 for forming the scanning line 2 (gate electrode) is formed.
After forming 1 on the entire surface of the substrate 10, phosphorus is thermally diffused to make the polysilicon film 201 conductive. Alternatively, a doped silicon film in which phosphorus is introduced at the same time as the formation of the polysilicon film 201 may be used.

Next, the polysilicon film 201 is patterned by photolithography as shown in FIG. 25B, and a gate electrode (a part of the scanning line 2) is formed on the pixel switching TFT 102 side. I do. On the other hand, at the connection portion with the constant potential wiring 8, the polysilicon film 20 is formed.
1 is completely removed. The material of the scanning line 2 (gate electrode) may be a metal film, a metal silicide film, or the like, or a multi-layered gate electrode formed by combining a metal film, a metal silicide film, and a polysilicon film. In particular,
Since the metal film or the metal silicide film has a light-shielding property, it is possible to substitute the scanning line 2 as a light-shielding film for the black matrix by wiring the scanning line 2 as a light-shielding film, and the black matrix 6 on the counter substrate 31 can be omitted. Thus, it is possible to prevent a decrease in the pixel aperture ratio due to misalignment between the opposing substrate 31 and the liquid crystal device substrate 300.

Next, as shown in FIG. 25 (C), the pixel switching TFT 102 and the N-channel TFT of the peripheral driver circuit have a gate electrode of about 0.1 × 10 ¹³ / cm ^A low concentration impurity ion (such as phosphorus) 19 is implanted at a dose of ² to about 10 × 10 ¹³ / cm ² , and a low concentration self-aligned with the gate electrode is formed on the pixel switching TFT 102 side. Source / drain regions 1d and 1e are formed. Here, since the portion is located below the gate electrode, the portion where the impurity ions 100 are not introduced is the channel region 1 as it is in the semiconductor layer 1.
c. When the ion implantation is performed in this manner, impurity ions are also introduced into the polysilicon layer formed as the gate electrode, so that the polysilicon layer becomes more conductive.

Next, as shown in FIG. 25D, a resist mask 21 wider than the gate electrode is formed on the side of the pixel switching TFT 102 and the N-channel TFT of the peripheral driver circuit to form a high-density resist. Impurity ions (such as phosphorus) 20 of about 0.1 × 10 ¹⁵ / cm ² to about 10 × 10 ¹⁵
/ Cm ² at a high dose in the source region 1
a and the drain region 1b are formed.

Instead of these impurity introduction steps, high-concentration impurity ions (such as phosphorus) are implanted without forming low-concentration impurity ions and with a resist mask wider than the gate electrode being formed. May be formed. It is needless to say that the source and drain regions having a self-aligned structure may be formed by implanting high-concentration impurity ions (such as phosphorus) using the gate electrode as a mask.

Although not shown, in order to form a P-channel TFT portion of the peripheral driving circuit, the pixel switching TFT portion and the N-channel TFT portion are covered and protected with resist, and the gate electrode is used as a mask. 0.1
By implanting impurity ions such as boron at a dose of about × 10 ¹⁵ / cm ² to about 10 × 10 ¹⁵ / cm ² , P-channel source / drain regions are formed in a self-aligned manner. Note that, as in the case of forming the pixel TFT portion and the N-channel TFT portion of the peripheral driver circuit, the gate electrode is used as a mask and about 0.1 × 10 ¹³ / cm ² to about 10 × 10 ¹³ / cm 2
^A low concentration source / drain region is formed in the polysilicon film by introducing low concentration impurity ions (boron, etc.) at a dose of ^{2 and then} a mask wider than the gate electrode is formed to form a high concentration impurity. About 0.1 × 1 ion (boron, etc.)
The source region and the drain region having the LDD structure may be formed by implantation at a dose of 0 ¹⁵ / cm ² to about 10 × 10 ¹⁵ / cm ² . Also, without implanting low-concentration impurity ions, high-concentration impurity ions (boron or the like) are implanted in a state where a mask wider than the gate electrode is formed, thereby forming a source region and a drain region having an offset structure. Is also good. By these ion implantation steps, CMO
This makes it possible to make the peripheral drive circuit built in the same substrate.

Next, as shown in FIG. 25E, a thickness of about 500 ° C. is applied to the surface side of the gate electrode by a normal pressure CVD method, a low pressure CVD method or the like under a temperature condition of, for example, about 800 ° C.
A second interlayer insulating film 1 made of an NSG film (silicate glass film containing neither boron nor phosphorus) of 0 angstrom to about 15000 angstrom, a silicon nitride film or the like.
Form 3 Then, annealing at, for example, about 1000 ° C. is performed to activate the impurity ions introduced into the source / drain regions.

Next, a contact hole 9 is formed in a region corresponding to the wiring portion of the first light-shielding film 7 at a connection portion with the constant potential wiring 8. In this case, forming the anisotropic contact hole 9 by dry etching such as reactive ion etching or reactive ion beam etching is advantageous for high definition since the opening diameter can be formed almost as the size of the mask. is there. When the dry etching and the wet etching are combined to form the contact hole 9 in a tapered shape, there is an effect of preventing disconnection at the time of wiring connection.

Next, as shown in FIG. 26A, a pixel switching TFT is formed by using a photolithography technique.
On the side of the 102 portion, a contact hole 5 is formed in a portion of the second interlayer insulating film 13 corresponding to the source region 1a. Further, in a connection portion with the constant potential wiring 8, a contact hole 17 connected to the contact hole 9 is formed in the second interlayer insulating film 13.

Next, as shown in FIG. 26B, an aluminum film 301 for forming the data line 3 (source electrode) is formed on the surface side of the interlayer insulating film 13 by a sputtering method or the like. In addition to a metal film such as aluminum, a metal silicide film or a metal alloy film may be used.

Next, as shown in FIG. 26C, the aluminum film 301 is patterned by using the photolithography technique, and a source electrode is formed as a part of the data line 3 in the pixel switching TFT 102 portion. On the other hand, the constant potential wiring 8 is formed at a connection portion with the constant potential wiring 8.

Next, as shown in FIG. 26 (D), the surface of the source electrode and the constant potential wiring 8 is coated with, for example, 400
A third layer including at least two layers of a BPSG film (a silicate glass film containing boron or phosphorus) having a thickness of about 500 Å to about 15,000 Å under a temperature condition of about 100 ° C. and an NSG film having a thickness of about 100 Å to about 3000 Å. An interlayer insulating film 15 is formed.
Also, by applying an organic film or the like by spin coating,
A flattening film having no step may be formed.

Next, as shown in FIG. 26E, on the pixel switching TFT 102 side, the second and third interlayer insulating films 13 and 15 are formed by using a photolithography technique and a dry etching method. Then, a contact hole 4 is formed in a portion corresponding to the high concentration drain region 1b. Also in this case, forming anisotropic contact holes by dry etching such as reactive ion etching and reactive ion beam etching is advantageous for higher definition. If dry etching and wet etching are combined and the contact hole 4 is formed in a tapered shape, it is effective in preventing disconnection at the time of wiring connection.
As shown in FIG. 27A, an ITO having a thickness of about 400 Å to about 2000 Å for forming a drain electrode is formed on the surface side of the third interlayer insulating film 15.
After the film 140 is formed by a sputtering method or the like, FIG.
As shown in the figure, using photolithography technology
O film 140 is patterned to provide pixel switching TF
The pixel electrode 14 is formed in the portion T102. Further, the ITO film 140 is completely removed at the connection portion with the constant potential wiring 8. Note that an alignment film such as polyimide is formed on the surface of the pixel electrode 14 and rubbed. The pixel electrode 14 is not limited to the ITO film, and it is also possible to use a transparent electrode material made of a metal oxide having a high melting point such as a SnOx film or a ZnOx film. The step coverage in is also practical. When a reflective liquid crystal device is formed, a film having high reflectivity such as aluminum is formed as the pixel electrode 14.

In the steps shown in FIGS. 25 (E) and 26 (A), the contact holes 9 and 17 are not separately formed at the connection with the constant potential wiring 8 but the contact holes 5 are formed. When the contact holes 9 are formed at the same time, a connection portion between the constant potential wiring 8 and the first light shielding film 7 can be configured as shown in FIG.

[Example 2 of Manufacturing Method of Liquid Crystal Device Substrate 300] In the manufacturing method of the liquid crystal device 100, another manufacturing process of the liquid crystal device substrate 300 will be described with reference to FIGS. These drawings are also process cross-sectional views showing a method of manufacturing a substrate for a liquid crystal device, and in each of the drawings, the left side thereof has a cross-section (pixel) at a position corresponding to line AA ′ in FIG. 6 shows the cross section of the TFT section)
(A cross section of a connection portion between the first light shielding film 7 and the constant potential wiring 8) at a position corresponding to the line BB 'of FIG. Here, an example in which a connection portion between the first light-shielding film 7 and the constant potential wiring 8 is configured as shown in FIG. 10 or 11 will be described. In this manufacturing method, the manufacturing method described above and the steps shown in FIG.
Since the steps shown in FIG. 24 are common, steps after the step shown in FIG.

In this embodiment, as shown in FIG.
A thickness of about 500 is formed on the surface of the semiconductor layer 1 by a thermal oxidation method or the like.
After a gate insulating film 12 made of a silicon oxide film having a thickness of about Å to about 1500 Å is formed, as shown in FIG. To form Next, after a polysilicon film 201 for forming a gate electrode and the like is formed on the entire surface of the substrate 10, phosphorus is thermally diffused to make the polysilicon film 201 conductive. Alternatively, a doped silicon film in which phosphorus is introduced at the same time as the formation of the polysilicon film 201 may be used.

Next, the polysilicon film 201 is patterned by photolithography as shown in FIG. 28B, and a gate electrode (scanning line 2) is formed on the pixel TFT portion side.
Part). On the other hand, a relay electrode 16 is formed at a connection portion with the constant potential wiring 8.

Next, as shown in FIG. 28C, low concentration impurity ions (phosphorus or the like) 19 are formed on the pixel switching TFT 102 portion and the N-channel TFT portion side of the peripheral driving circuit by using the gate electrode as a mask. And the low-concentration source / drain region 1 is self-aligned with the gate electrode on the pixel switching TFT 102 side.
d, 1e are formed. Here, since the portion is located immediately below the gate electrode, a portion where the impurity ions 100 are not introduced becomes the channel region 1c as it is in the semiconductor layer 1. When the ion implantation is performed in this manner, the polysilicon formed as the gate electrode and the relay electrode 1 are formed.
Impurity ions are also introduced into the polysilicon film formed as 6, so that they become more conductive.

Next, as shown in FIG. 28D, a resist mask 21 wider than the gate electrode is formed on the side of the pixel switching TFT 102 and the N-channel TFT of the peripheral driving circuit to form a high-density resist. Is implanted to form a source region 1a and a drain region 1b with high concentration.

Next, as shown in FIG. 28 (E), a thickness of about 5000 Å to about 15,000 Å is formed on the surface side of the gate electrode and the relay electrode 16 by a CVD method or the like under a temperature condition of, for example, about 800 ° C. NS
A second interlayer insulating film 13 made of a G film (a silicate glass film containing neither boron nor phosphorus) is formed.

Next, as shown in FIG. 29A, the second side is formed on the pixel TFT portion side by using the photolithography technique.
A contact hole 5 is formed in a portion of the interlayer insulating film 13 corresponding to the source region 1a. In addition, the constant potential wiring 8
In the connection portion with the contact hole 9, a contact hole 9 is formed in the second interlayer insulating film 13 at a position corresponding to the relay electrode 16.

Next, as shown in FIG. 29B, an aluminum film 301 for forming the data line 3 (source electrode) is formed on the surface of the second interlayer insulating film 13 by a sputtering method or the like. In addition to a metal film such as aluminum, a metal silicide film or a metal alloy film may be used.

Next, as shown in FIG. 29C, the aluminum film 301 is patterned by using the photolithography technique, and a source electrode is formed as a part of the data line 3 in the pixel switching TFT 102 portion. On the other hand, the constant potential wiring 8 is formed at a connection portion with the constant potential wiring 8.

Next, as shown in FIG. 29 (D), a thickness of about 500 Å to about 15000 is formed on the surface side of the source electrode and the constant potential wiring 8 under a temperature condition of, for example, about 400 ° C. by a CVD method or the like. Angstrom BP
SG film (silicate glass film containing boron and phosphorus),
Third interlayer insulating film 1 including at least two layers of an NSG film of about 100 Å to about 3000 Å
5 is formed.

Next, as shown in FIG.
On the side of the FT section, the second and third interlayer insulating films 1 are formed by using a photolithography technique and a dry etching method.
A contact hole 4 is formed in a portion corresponding to the drain region 1b among the regions 3 and 15.

Next, as shown in FIG. 30A, an ITO film 140 having a thickness of about 400 angstroms to about 2000 angstroms for forming a drain electrode is sputtered on the surface of the third interlayer insulating film 15. After being formed by a method or the like, as shown in FIG. 30B, the ITO film 140 is patterned by using the photolithography technique, and the pixel electrode 14 is formed in the pixel TFT portion. Further, the ITO film 140 is completely removed at the connection portion with the constant potential wiring 8.

In the steps shown in FIGS. 28B and 29A, if the position where the relay electrode 16 is formed by patterning and the position where the contact hole 17 is formed are changed, the constant potential wiring 8 and the first The connection structure with the light-shielding film 7 can be configured in any of the forms of FIGS.

[Configuration of Peripheral Driving Circuit] In the present invention, the first
Since the first light-shielding film 7 is formed between the interlayer insulating film 11 and the substrate 10, one more wiring layer is formed in the peripheral driving circuit (the scanning line driving circuit 104 and the data line driving circuit 103) using the multilayer wiring. It means that we increased the number of layers. Therefore, an example in which a conductive film formed simultaneously with the first light-shielding film 7 is used as a wiring in a peripheral driving circuit will be described below.

(Configuration Example 1 of Peripheral Driving Circuit) FIG. 31 shows a configuration of a peripheral driving circuit (scanning line driving circuit 104 and data line driving circuit 103) of an active matrix type liquid crystal device 100 suitable for applying the present invention. FIG. 2 is an equivalent circuit diagram illustrating an example of an equivalent circuit of a shift register circuit according to the first embodiment. The circuit for latching the transfer signal may be formed by a transmission gate circuit, a clocked inverter circuit, or the like.

FIG. 32 shows an example of a layout plan view when the S portion of the shift register circuit in FIG. 31 is integrated and formed on the liquid crystal device substrate 300. FIG.
FIG. 2A shows a conventional pattern layout.
(B) is a pattern layout to which the present invention is applied.
33 (A) and FIG. 33 (B) correspond to FIG.
FIG. 32 is a cross-sectional view taken along the line CC ′ in FIG.
It is sectional drawing of the DD 'part in (B).

In FIGS. 32 (A) and 33 (A), 5
Reference numerals 0, 51, and 46 denote P-channel TFTs for a P-type region, an N-type region, and a driving circuit, respectively. In the conventional example shown in these figures, in order to pass a wiring through a connection portion N4 between the shift register circuit of the present stage and the shift register circuit of the next stage, a clock signal line CL for controlling a transmission gate circuit (the same as the scanning line) is used. On the second interlayer insulating film 13 formed on the surface of the process (formed of the same layer), a wiring 40 made of a metal film such as aluminum between the same layers formed in the same process as the data line 3 is used. As a result, in the conventional example,
Source / drain electrodes 41 and 42 of the transmission gate circuit are formed in the same layer as the wiring 40. Therefore, the distance L1 between the transmission gate circuits is determined by the dimensional accuracy of the wiring 40 and the source / drain electrodes 41 and 42 of the transmission gate circuit during the photolithography step and the etching step. The fineness cannot be further increased by the amount of the wiring 40, which hinders high integration.

However, in the present embodiment, as described in each of the above embodiments, since the first light-shielding film 7 is formed between the substrate 10 and the first interlayer insulating film 11, the first
The light-shielding film 7 of FIG.
(B), as shown in FIG. 33B, miniaturization is realized by using the first light-shielding film 7 as a wiring material of a peripheral driving circuit. That is, as shown in FIGS. 32 (B) and 33 (B), the first interlayer insulating film 11 and the substrate 10 are used as a wiring material of a connection portion N4 between the shift register circuit of this stage and the shift register circuit of the next stage. First light-shielding film 7 formed between
By using, there is no wiring between the same layer as the source and drain electrodes 41 and 42 of the transmission gate circuit. Therefore, the distance L2 between the transmission gate circuits need only consider the distance between the source / drain electrodes 41 and 42 of the adjacent transmission gate circuits. Therefore, in this embodiment, the distance L2 between the transmission gate circuits can always be smaller than the distance L1 between the conventional transmission gate circuits.

(Structural Example 2 of Peripheral Driving Circuit) In this example, the characteristics of the TFTs for the peripheral driving circuit (scanning line driving circuit and data line driving circuit) can be improved by the same number of steps as in the prior art. explain. FIG. 34 shows an example of an equivalent circuit used in the peripheral driving circuit, wherein (A), (B),
(C) shows a clocked inverter circuit, a transmission gate circuit, and an inverter circuit, respectively.

In FIG. 34, each of the equivalent circuits is
C composed of P-channel TFT and N-channel TFT
It is composed of a MOS type TFT, and can be formed by also using a step of forming a pixel switching TFT. CL indicates a clock signal, CLB indicates an inverted signal of the clock signal, VDD indicates a constant voltage power supply on the high potential side of the peripheral drive circuit, and VSS indicates a constant voltage power supply on the low potential side of the peripheral drive circuit. Reference numerals 46 and 47 denote a P-channel TFT for the driving circuit and an N-channel TFT for the driving circuit, respectively. The signal input from IN side is OUT
Output to the side. Needless to say, the CL signal and the CLB signal are interchanged in the circuit configuration as shown in FIG. FIG. 35A shows FIG.
FIG. 35 (B) is a plan view showing a layout of the inverter circuit on the liquid crystal device substrate in FIG. 35 (B);
3 shows a cross-sectional view taken along line EE ′ of FIG.

In this embodiment, as described in each of the above embodiments, the first film is provided between the substrate 10 and the first interlayer insulating film 11.
Is formed, the first light-shielding film 7
In the peripheral drive circuit portion. That is, FIG.
As shown in (A) and (B), a P-channel TFT 46 and an N-channel TFT constituting the inverter circuit are used.
The first light-shielding film 7 is connected to each of the source electrodes 44 via the contact holes 5 in the first interlayer insulating film 11. This first light-shielding film 7 is a P-channel TFT 4
The channel regions 52 and 53 below the gate electrode 43 of the 6 and N-channel TFTs 47 are formed so as to completely cover the channel regions 52 and 53 via the first interlayer insulating film 11. Therefore, the voltage is applied from the source electrode 48 of the P-channel type TFT 46 (the constant voltage power supply VDD on the high potential side of the peripheral drive circuit) and the source electrode 49 of the N-channel type TFT 47 (the constant voltage power supply VSS on the low potential side of the peripheral drive circuit). At a given voltage, the first light-shielding film 7 functions as a pseudo second gate electrode. Therefore, in the N-channel type TFT 47, the channel region 5
In 3, the potential of the portion of the depletion layer in contact with the gate insulating film 12 rises more than before, and the potential energy for electrons decreases. As a result, electrons gather at a portion of the depletion layer that is in contact with the gate insulating film 12 and an inversion layer is easily formed, so that the resistance of the semiconductor layer is reduced and the TFT characteristics are improved. In the channel region 52 of the P-channel TFT 46, a phenomenon occurs in which the electrons are replaced with holes.

In FIG. 35B, the P-channel TFT 46 and the N-channel TFT 47 of the peripheral drive circuit are represented by a gate self-aligned structure. However, as described in the above manufacturing process, the withstand voltage of the TFT is improved. In order to improve the reliability, the P-channel type TF of the peripheral drive circuit is used.
The T46 and the N-channel TFT 47 may be formed with an LDD structure or an offset gate structure.

(Configuration Example 3 of Peripheral Drive Circuit)
36A is a plan view of a layout of the inverter circuit of FIG. 34C on the liquid crystal device substrate 300, and FIG.
FIG. 36B is a cross-sectional view taken along line FF ′ of FIG. FIG. 36 (C) is a cross-sectional view of FIG.
The cross section between G 'is shown.

In this embodiment, as described in each of the above embodiments, the first film is provided between the substrate 10 and the first interlayer insulating film 11.
Is formed, the first light-shielding film 7
In the peripheral drive circuit portion. That is, FIG.
As shown in (A), (B), and (C), a P-channel TFT 46 and an N-channel TFT
The first light-shielding film 7 formed so as to overlap each gate electrode 43 of the FT 47 is connected to the gate electrode 43. Also,
The first light-shielding film 7 is the same as or narrower in width than the gate electrode 43, and the upper and lower portions of the channel regions 52 and 53 are interposed via the gate insulating film 12 and the first interlayer insulating film 11.
A TFT having a double gate structure is formed so as to be sandwiched between the first light shielding films 7. The wiring 44 on the input side of the inverter circuit is formed in the same layer as the data line 3, is connected to the gate electrode 43 via the contact hole 5 in the first interlayer insulating film 11, and is connected to the first interlayer insulating film. Eleven contact holes 5 are connected to the first light-shielding film 7. The opening of the contact hole 5 is performed by the same process. Therefore, in the TFT having the double gate structure, the first light-shielding film 7 functions as the second gate electrode, so that the TFT characteristics can be further improved by the back channel effect.

(TFT Characteristics) Configuration Example 2 of Peripheral Drive Circuit
The characteristics of the N-channel TFT having the structure described in FIG.
Shown in In FIG. 37, a triangular mark and a solid line (a) connecting the triangular mark represent a conventional N which has no other layer below the channel region.
A channel type TFT, a circle mark and a solid line (b) connecting the same are an N-channel TFT having the structure described in the configuration example 2 of the peripheral driving circuit, a square mark and a solid line (c) connecting the same are the configuration of the peripheral driving circuit. The TFT characteristics of the N-channel TFT having the structure described in Example 3 are shown. The TFT size is the same for all three levels (channel length 5 μm, channel width 20 μm) and is measured by applying a voltage of 15 V between the source and the drain. The thickness of the first light-shielding film 7 is 1000 Å and the thickness of the first interlayer insulating film 11 is
Is set to 1000 angstroms, the semiconductor layer 1 is set to 500 angstroms, and the gate insulating film 12 is set to 900 angstroms. As a result of the measurement, when 15 V is applied to the gate electrode of the TFT, the N-channel TFT having the structure described in the configuration example 2 of the peripheral driver circuit (the characteristic shown by the circle mark and the solid line (b) connecting it) is It was confirmed that about 1.5 times of the ON current was obtained from the TFT (characteristic indicated by the triangular mark and the solid line (a) connecting the same). When 15 V is applied to the gate electrode of the TFT, the N-channel TFT having the structure described in the configuration example 3 of the peripheral driving circuit is used.
(Character indicated by square mark and solid line (b) connecting it)
Indicates that an on-state current of at least 3.0 times that of a conventional TFT (characteristic indicated by a triangular mark and a solid line (a) connecting the same) can be obtained. Therefore, by using the N-channel TFT having the structure described in the configuration examples 2 and 3 of the peripheral driving circuit, the peripheral driving circuit can be speeded up and miniaturized with an increase in the number of display pixels. Therefore, a liquid crystal device capable of realizing high-quality image display can be provided.

[Application Example to Projection Type Liquid Crystal Device] FIG.
FIG. 4 is an explanatory diagram of an optical system used in a prism color synthesis type projector using three active matrix type liquid crystal devices as an example of a projection type display device in which the liquid crystal device 100 according to each of the embodiments is applied as a light valve. .

In FIG. 38, 370 is a light source such as a halogen lamp, 371 is a parabolic mirror, 372 is a heat ray cut filter, 373, 375 and 376 are dichroic mirrors for blue reflection, green reflection and red reflection, respectively.
4, 377 are reflection mirrors; 378, 379, and 380 are blue, green, and red modulation light valves made of the active matrix type liquid crystal device; and 383 is a dichroic prism.

In this projector, the light source 37
The white light emitted from 0 is condensed by the parabolic mirror 371, passes through the heat ray cut filter 372, blocks the heat rays in the infrared light region, and allows only the visible light to enter the dichroic mirror system. First, the blue light (wavelength of approximately 500 nm or less) is reflected by the blue reflecting dichroic mirror 373, and the other light (yellow light) is transmitted.
The reflected blue light changes its direction by the reflection mirror 374 and enters the blue modulation light valve 378. On the other hand, the light transmitted through the blue reflecting dichroic mirror 373 is incident on the green reflecting dichroic mirror 375, where green light (having a wavelength of approximately 500 to 600 nm) is reflected, and other red light (having a wavelength of approximately 600 nm or more) is reflected. To Penetrate. The green light reflected by the green modulation light valve 375 is
The light enters the green modulation light valve 379. The red light transmitted through the dichroic mirror 375 changes its direction by the reflection mirrors 376 and 377, and enters the red modulation light valve 380.

Light valves 378, 379, 38 for each color
Numeral 0 is driven by blue, green, and red primary color signals supplied from the image signal processing circuit, and light incident on each light valve is modulated and synthesized by the dichroic prism 383. The dichroic prism 383 is configured such that the red reflecting surface 381 and the blue reflecting surface 382 are orthogonal to each other. And the dichroic prism 38
The color image synthesized in 3 is enlarged and projected on a screen by the projection lens 384. Further, since reflected light (return light) from the back surface of the liquid crystal device substrate can be almost ignored, there is no need to attach a polarizing plate or a film subjected to an anti-reflection treatment to the emission side surface of the liquid crystal device as in the related art. Cost reduction can be realized.

In the liquid crystal device 100 to which the present invention is applied, since the leak current in the pixel switching TFT 102 for controlling the pixel electrode 14 can be suppressed even when intense light is irradiated, high quality image display such as high contrast can be achieved. Obtainable. In addition, a projector that performs color synthesis using a mirror instead of the dichroic prism 383, and a counter substrate of the liquid crystal device 100 to which the present invention is applied, R (red) and G
It is also effective to use a liquid crystal device 100 having a (green) and B (blue) color filter layer formed thereon and a color liquid crystal device 100 capable of enlarging and projecting a color screen.

By the way, as shown in FIG. 38, when the dichroic prism 383 is used for color synthesis, the present invention has a particular advantage. For example, the light reflected by the dichroic mirror 374 passes through the light valve 378 and is synthesized by the dichroic prism 383. In this case, the light incident on the light valve 378 is 9
The light is modulated by 0 degrees and is incident on the projection lens 384. However, light incident on the light valve 378 may leak slightly and be incident on the opposite light valve 380. Accordingly, taking the light valve 380 as an example, the light reflected by the dichroic mirror 377 is not only incident from the incident direction side as shown by the arrow A, but also a part of the light transmitted through the light valve 378. There is a possibility that the light will pass through the dichroic prism 382 and enter the light valve 380. When the light reflected by the dichroic mirror 377 passes through the light valve 380 and enters the dichroic prism 383,
There is a possibility that the light is slightly reflected (specularly reflected) by the dichroic prism 383 and re-enters the light valve 380. As described above, the light valve 380 has a large incidence of light from the incident side and a large incidence from the opposite direction. However, even in such a case, the present invention provides, as described in the above embodiments, The data line 2 (second light-shielding film) and the counter substrate 31 are provided so that light does not enter the pixel switching TFT 102 from the incident side or the opposite side of the incident side.
Since the black matrix 6 (third light-shielding film) and the first light-shielding film 7 are formed, light from the incident side is not reflected on the data line 2 (second light-shielding film) and the black on the opposing substrate 31. The light is blocked by the matrix 6 (third light-blocking film), and light from the opposite side is blocked by the first light-blocking film 7. Therefore, no leak current occurs in the pixel switching TFT 102.

[Modification of Liquid Crystal Device] In the liquid crystal device 100 according to any of the above-described embodiments, as shown in FIG. After bonding without leaving an interval, the incident light can be focused on the pixel electrode 14 of the liquid crystal device substrate 300 by covering it with the thin glass 35. Therefore, the contrast and brightness can be significantly improved. In addition, since the incident light is condensed, it is possible to prevent light from entering the channel region 1c of the pixel switching TFT 102 from an oblique direction. When the micro lens 33 is used, the black matrix 6 on the counter substrate 31 side can be omitted. According to the liquid crystal device of the present invention, since at least the first light shielding film 7 is provided below the channel region 1c of the pixel switching TFT 102, reflected light (return light) from the back surface of the liquid crystal device substrate 300 is used.
Since the channel region 1c is not irradiated, it is possible to suppress a leak current caused by light. Therefore, there is no problem even if the light is condensed by using the micro lens 33.

In any of the above-described embodiments, the first light-shielding film 7 is connected to the low-potential-side constant-voltage power supply VSSY of the scanning line drive circuit 104, but is connected to the high-potential-side constant-voltage power supply VDD.
It may be connected to Y. Needless to say, the first light-shielding film 7 may be connected to the low-potential-side constant-voltage power supply VSSX of the data line drive circuit 103 or to the high-potential-side constant-voltage power supply VDDX. Further, the liquid crystal device substrate 30
The first light-shielding film 7 is connected from 0 to the power supply line for supplying the counter electrode potential LCCOM to the counter electrode 32 of the counter substrate 31 via the vertical conductive material 31 and the power supply line for supplying the ground potential to each of the drive circuits 103 and 104. May be.

Further, in Embodiments 1 and 2, the first
The wiring portion of the light shielding film 7 is extended along the scanning line 2,
It may extend outside the display area 61 along the data line 3.

[0146]

As described above, in the liquid crystal device according to the present invention, the first light-shielding film is formed on the lower layer so as to overlap the channel region of the pixel switching TFT. Even if there is reflected light from the back side of the substrate, this light does not reach the channel region of the pixel switching TFT. Therefore, no leak current is generated in the TFT due to the reflected light from the back side of the liquid crystal device substrate. In addition, since the first light-shielding film is connected to a constant-potential wiring for supplying a constant-voltage power supply on the low-potential side of the scanning line driving circuit, a parasitic element is provided between the TFT semiconductor layer and the first light-shielding film. The TFT characteristics do not fluctuate or deteriorate due to the influence of the capacitance.

[Brief description of the drawings]

FIG. 1 is a plan view of a liquid crystal device to which the present invention is applied.

FIG. 2 is a cross-sectional view taken along line HH ′ of FIG.

FIG. 3 is a block diagram of a liquid crystal device substrate of a liquid crystal device to which the present invention is applied.

FIGS. 4A and 4B are an equivalent circuit diagram and a plan view, respectively, showing extracted pixels arranged in a matrix on a liquid crystal device substrate.

FIG. 5 is a sectional view taken along line AA ′ of FIG. 4 (B).

FIG. 6 is an enlarged plan view showing the periphery of two pixels formed at the extreme end of the display area in the liquid crystal device substrate used in the liquid crystal device according to Embodiment 1 of the present invention.

7 is an explanatory diagram showing a wiring portion of a first light-shielding film formed on the liquid crystal device substrate shown in FIG. 6, and a connection structure between the wiring portion and a constant potential wiring.

8 (A) and (B) are respectively the first in FIG.
The connection between the wiring portion of the light-shielding film and the constant potential wiring is denoted by B-
FIG. 3 is a cross-sectional view taken along the line B ′ and an enlarged plan view of a connection portion between a wiring portion of the light shielding film and a constant potential wiring.

9A and 9B show a first modification of the connection between the wiring portion of the first light shielding film and the constant potential wiring, respectively, in FIGS.
FIG. 4 is a cross-sectional view corresponding to a section taken along line -B ′, and an enlarged plan view of a connection portion between a wiring portion of a light shielding film and a constant potential wiring.

FIGS. 10A and 10B respectively show a modification 2 of a connection portion between a wiring portion of a first light-shielding film and a constant potential wiring cut along a line BB ′ in FIG. 6; FIG. 9 is a corresponding cross-sectional view and an enlarged plan view of a connection portion between a wiring portion of a light-shielding film and a constant potential wiring.

FIGS. 11A and 11B respectively show a modification 3 of a connection portion between a wiring portion of a first light-shielding film and a constant potential wiring cut along a line BB ′ in FIG. 6; FIG. 9 is a corresponding cross-sectional view and an enlarged plan view of a connection portion between a wiring portion of a light-shielding film and a constant potential wiring.

FIG. 12 shows a wiring portion of a first light-shielding film formed on a liquid crystal device substrate used in a liquid crystal device according to Modification 1 of Embodiment 1 of the present invention, and a connection between the wiring portion and a constant potential wiring. It is explanatory drawing which shows a structure.

FIG. 13 shows a wiring portion of a first light-shielding film formed on a liquid crystal device substrate used in a liquid crystal device according to Modification 2 of Embodiment 1 of the present invention, and a connection between the wiring portion and a constant potential wiring. It is explanatory drawing which shows a structure.

FIG. 14 illustrates a wiring portion of a first light-shielding film formed on a liquid crystal device substrate used in a liquid crystal device according to a third modification of the first embodiment of the present invention, and a connection between the wiring portion and a constant potential wiring. It is explanatory drawing which shows a structure.

FIG. 15 is an enlarged plan view showing the periphery of two pixels formed at the extreme end of a display area in a liquid crystal device substrate used in a liquid crystal device according to Embodiment 2 of the present invention.

16 is an explanatory diagram showing a wiring portion of a first light shielding film formed on the liquid crystal device substrate shown in FIG. 15, and a connection structure between the wiring portion and a constant potential wiring.

FIG. 17 shows a wiring portion of a first light-shielding film formed on a liquid crystal device substrate used in a liquid crystal device according to Modification 1 of Embodiment 2 of the present invention, and a connection between the wiring portion and a constant potential wiring. It is explanatory drawing which shows a structure.

FIG. 18 illustrates a wiring portion of a first light-shielding film formed on a liquid crystal device substrate used in a liquid crystal device according to Modification 2 of Embodiment 2 of the present invention, and connection between the wiring portion and a constant potential wiring. It is explanatory drawing which shows a structure.

FIG. 19 illustrates a wiring portion of a first light-shielding film formed on a liquid crystal device substrate used in a liquid crystal device according to a third modification of the second embodiment of the present invention, and a connection between the wiring portion and a constant potential wiring. It is explanatory drawing which shows a structure.

FIG. 20 is an enlarged plan view showing the periphery of two pixels formed at the extreme end of a display area in a liquid crystal device substrate used in a liquid crystal device according to Embodiment 3 of the present invention.

FIG. 21 is a sectional view taken along line JJ ′ of FIG. 20;

FIG. 22 is an enlarged plan view showing the periphery of two pixels formed at the extreme end of a display area in a liquid crystal device substrate used in a liquid crystal device according to Embodiment 4 of the present invention.

FIG. 23 is a sectional view taken along line KK ′ of FIG. 22;

FIG. 24 is a process sectional view illustrating the method for manufacturing the liquid crystal device substrate of the liquid crystal device to which the present invention is applied.

25 is a process cross-sectional view of each process performed after the process shown in FIG. 24 in the method of manufacturing the liquid crystal device substrate of the liquid crystal device to which the present invention is applied;

26 is a process cross-sectional view of each process performed after the process shown in FIG. 25 in the method for manufacturing a liquid crystal device substrate of a liquid crystal device to which the present invention is applied;

27 is a process cross-sectional view of each process performed after the process shown in FIG. 26 in the method for manufacturing a liquid crystal device substrate of a liquid crystal device to which the present invention is applied;

FIG. 28 is a process cross-sectional view of each process performed after the process illustrated in FIG. 24 in another method of manufacturing a liquid crystal device substrate of a liquid crystal device to which the present invention is applied;

29 is a process cross-sectional view of each process performed after the process shown in FIG. 28 in the method of manufacturing the liquid crystal device substrate of the liquid crystal device to which the present invention is applied;

30 is a process cross-sectional view of each process performed after the process shown in FIG. 29 in the method for manufacturing a liquid crystal device substrate of a liquid crystal device to which the present invention has been applied;

FIG. 31 is an equivalent circuit diagram illustrating an example of a shift register circuit included in a peripheral driver circuit of a liquid crystal device according to the present invention.

FIG. 32A is a plan view showing an example of a layout of a shift register circuit forming a peripheral driver circuit of a liquid crystal device suitable for applying the present invention, and FIG. FIG. 3 is a plan view showing a layout of a shift register circuit forming a drive circuit.

FIG. 33A is a cross-sectional view showing an example of a layout of a shift register circuit forming a peripheral driver circuit of a liquid crystal device suitable for applying the present invention, and FIG. FIG. 3 is a cross-sectional view illustrating a layout of a shift register circuit forming a driving circuit.

FIG. 34 is an equivalent circuit diagram showing (A) a clocked inverter, (B) an inverter, and (C) a transmission gate which constitute a preferred peripheral driving circuit of a liquid crystal device to which the present invention is applied.

FIG. 35 is a layout example of an inverter circuit forming a suitable peripheral driving circuit of a liquid crystal device to which the present invention is applied;
FIG. 3A is a plan view, and FIG. 3B is a cross-sectional view along EE ′.

FIG. 36 is a layout example of an inverter circuit which forms a suitable peripheral driving circuit of a liquid crystal device by applying the present invention;
(A) plan view, (b) sectional view along FF ', (c)
It is sectional drawing along GG '.

FIG. 37 is a current-voltage characteristic diagram of a conventional N-channel TFT and an N-channel TFT to which the present invention is applied.

FIG. 38 is a schematic configuration diagram of a projector as an example of a projection display apparatus in which a liquid crystal device using the liquid crystal device substrate according to the invention is applied as a light valve.

FIG. 39 is a cross-sectional view showing a configuration example in which a microlens is provided on a counter substrate side in a liquid crystal device using the liquid crystal device substrate according to the present invention.

[Explanation of symbols]

Reference Signs List 1 semiconductor layer 1a high-concentration source region 1b high-concentration drain region 1c channel region 1d low-concentration source region 1e low-concentration drain region 2 scanning line 3 data line (second light-shielding film) 4 contact hole between data line and semiconductor layer 5 pixel Contact hole between electrode (drain electrode) and semiconductor layer 6 Black matrix 7 First light shielding film 8 Constant potential wiring 9 Contact hole between constant potential wiring and first light shielding film 10 Substrate 11 First interlayer insulating film 12 Gate insulating film Reference Signs List 13 Second interlayer insulating film 14 Pixel electrode 15 Third interlayer insulating film 16 Relay electrode (conductive film) 17 Contact hole between conductive film and first light-shielding film 18 Capacitance wiring 19 Low-concentration phosphorus ions 20 High-concentration phosphorus ions 21 Resist 31 Opposite Substrate 32 Counter electrode 33 Micro lens 34 Adhesive 35 Thin glass 40 Wiring 4 1, 42 Source or drain electrode of TFT 43 Gate electrode 44 Gate signal input wiring of inverter circuit 45 Drain electrode of inverter circuit (signal output wiring) 46 P-channel TFT 47 N-channel TFT 48 Positive charge wiring of peripheral drive circuit ( VDD) 49 Negative charge wiring (VSS) of peripheral drive circuit 50 P-type region 51 N-type region 52 P-type channel region 53 N-type channel region 60 Light-shielding film for parting-off 100 Liquid crystal device 101 Data sampling circuit 102 Pixel TFT 103 Data line Driving circuit 104 Scanning line driving circuit 105 Pixel 106 Vertical conduction terminal 107 Mounting terminal 108 Liquid crystal 109 Auxiliary circuit 171 Switching circuit 172, 173 Signal wiring 200 Sealing material 201 Polysilicon film 300 Liquid crystal device substrate 301 Aluminum 370 Lamp 371 Parabolic mirror 372 Heat ray cut filter 373, 375, 376 Dichroic mirror 374, 377 Reflecting mirror 378 Light valve (blue) 379 Light valve (green) 380 Light valve (red) 381 Red reflecting surface 382 Blue reflecting surface 383 Dichroic Prism 384 Projection lens

[Procedure amendment]

[Submission Date] December 6, 2001 (2001.12.
6)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Name of invention

[Correction method] Change

[Correction contents]

Patent application title: Substrate with display area, liquid crystal device, and projection display device

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] Claims

[Correction method] Change

[Correction contents]

[Claims]

[Procedure amendment 3]

[Document name to be amended] Statement

[Correction target item name] 0001

[Correction method] Change

[Correction contents]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate having a display area, a liquid crystal device, and a projection display device. More specifically, the present invention relates to a peripheral circuit structure in a substrate in which a display region uses a thin film transistor (hereinafter, referred to as a TFT) as a pixel switching element.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0008

[Correction method] Change

[Correction contents]

Accordingly, an object of the present invention is to provide a substrate having a display area, a liquid crystal device, and a projection type display device using the same, in which a leak current of a pixel switching TFT due to the influence of light reflected by a polarizing plate or the like is reduced. It is an object of the present invention to provide a technique capable of suppressing and stabilizing characteristics of a pixel switching TFT.

[Procedure amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0011

[Correction method] Change

[Correction contents]

[0011]

In order to solve the above-mentioned problems, a substrate having a display area according to the present invention comprises a display area composed of a plurality of data lines and a plurality of scanning lines in a matrix, A peripheral circuit connected to at least one of a data line and a scanning line on an outer peripheral side of the semiconductor device, a plurality of thin film transistors connected to the data line and the scanning line, and a signal line of at least one of the scanning line and the data line , And a plurality of first conductive light-shielding films that shield the channel region of the thin film transistor, and the peripheral circuit includes a conductive film made of the first conductive light-shielding film.

[Procedure amendment 6]

[Document name to be amended] Statement

[Correction target item name] 0012

[Correction method] Change

[Correction contents]

In a substrate having a display area according to the present invention,
The plurality of conductive first light-shielding films that shield the channel region of the thin film transistor can reduce the occurrence of leakage current of the thin film transistor. Further, since the conductive first light-shielding film forms a peripheral circuit, the number of steps in the manufacturing process does not increase.

[Procedure amendment 7]

[Document name to be amended] Statement

[Correction target item name] 0013

[Correction method] Change

[Correction contents]

In the present invention, the peripheral circuit is a multi-stage shift register circuit, and a connection wiring between the main-stage shift register circuit and the next-stage shift register circuit is a conductive film made of the conductive first light-shielding film. It is good.

[Procedure amendment 8]

[Document name to be amended] Statement

[Correction target item name] 0014

[Correction method] Change

[Correction contents]

Further, in the shift register circuit, a plurality of transistors are formed adjacent to each other, and a conductive film made of the conductive first light-shielding film is formed below the semiconductor layer of the transistor and between the transistors. May be.

[Procedure amendment 9]

[Document name to be amended] Statement

[Correction target item name] 0015

[Correction method] Change

[Correction contents]

Further, the shift register circuit includes a plurality of transmission gate circuits, and the conductive film formed of the conductive first light-shielding film is lower than a semiconductor layer forming the transmission gate circuit. May be formed.

[Procedure amendment 10]

[Document name to be amended] Statement

[Correction target item name] 0016

[Correction method] Change

[Correction contents]

In the present invention, it is preferable that the peripheral circuit includes a transistor, and a conductive film including the conductive first light-shielding film covering at least a channel region is disposed below the transistor.

[Procedure amendment 11]

[Document name to be amended] Statement

[Correction target item name] 0017

[Correction method] Change

[Correction contents]

The conductive film made of the conductive first light-shielding film is:
It is preferable to form a gate electrode of the transistor.

[Procedure amendment 12]

[Document name to be amended] Statement

[Correction target item name] 0018

[Correction method] Change

[Correction contents]

It is preferable that the conductive film made of the conductive first light-shielding film is connected to a source electrode of the transistor.

[Procedure amendment 13]

[Document name to be amended] Statement

[Correction target item name] 0019

[Correction method] Change

[Correction contents]

Further, the transistor is a complementary transistor, and the conductive film made of the conductive first light-shielding film is disposed under a channel region of each transistor, and is made of the conductive first light-shielding film. Is preferably connected to the source electrode of each transistor.

[Procedure amendment 14]

[Document name to be amended] Statement

[Correction target item name] 0020

[Correction method] Change

[Correction contents]

In the present invention, the peripheral circuit includes a transistor, a conductive film including the conductive first light-shielding film is disposed below the transistor and overlaps a gate electrode, and the conductive film includes the conductive first light-shielding film. Is preferably electrically connected to the gate electrode.

[Procedure amendment 15]

[Document name to be amended] Statement

[Correction target item name] 0021

[Correction method] Change

[Correction contents]

The peripheral circuit may be an inverter circuit.

[Procedure amendment 16]

[Document name to be amended] Statement

[Correction target item name] 0022

[Correction method] Change

[Correction contents]

In this case, the input side wiring of the inverter circuit is preferably a conductive film formed simultaneously with the data line.

[Procedure amendment 17]

[Document name to be amended] Statement

[Correction target item name] 0023

[Correction method] Change

[Correction contents]

In the present invention, the conductive first light-shielding film is preferably formed below a channel region of the thin-film transistor.

[Procedure amendment 18]

[Document name to be amended] Statement

[Correction target item name] 0024

[Correction method] Change

[Correction contents]

In the present invention, the peripheral driving circuit includes a P
A thin film transistor for a channel-type driver circuit and a thin film transistor for an N-channel driver circuit, wherein the thin film transistors for the P-channel and N-channel driver circuits are formed by also using the manufacturing process of the thin film transistor. good.

[Procedure amendment 19]

[Document name to be amended] Statement

[Correction target item name] 0025

[Correction method] Change

[Correction contents]

In the present invention, the peripheral drive circuit may include a wiring layer formed of a conductive film formed simultaneously with the first light-shielding film.

[Procedure amendment 20]

[Document name to be amended] Statement

[Correction target item name] 0026

[Correction method] Change

[Correction contents]

In the present invention, the wiring layer made of a conductive film formed at the same time as the first light-shielding film is connected to the gate electrode of the thin film transistor for the drive circuit via at least the contact hole of the interlayer insulating film. Connected to and overlap with the channel region of the thin film transistor for the drive circuit with an area equal to or less than the area of the gate electrode of the thin film transistor for the drive circuit via the interlayer insulating film below the channel region. Is preferred.

[Procedure amendment 21]

[Document name to be amended] Statement

[Correction target item name] 0027

[Correction method] Change

[Correction contents]

In the present invention, the wiring layer made of a conductive film formed simultaneously with the first light-shielding film is connected to a source electrode of the thin film transistor for the driving circuit via at least a contact hole of the interlayer insulating film. It is preferable that the thin film transistor be connected to and overlap with a channel region of the thin film transistor for the driver circuit via the interlayer insulating film below the channel region.

[Procedure amendment 22]

[Document name to be amended] Statement

[Correction target item name] 0028

[Correction method] Change

[Correction contents]

Further, the present invention may constitute a liquid crystal device including a substrate having the above-described display area, a counter substrate, and a liquid crystal sandwiched between the substrate and the counter substrate. .

[Procedure amendment 23]

[Document name to be amended] Statement

[Correction target item name] 0029

[Correction method] Change

[Correction contents]

According to the present invention, there is provided a projection display apparatus including the above liquid crystal device, wherein light from a light source is modulated by the liquid crystal device, and the modulated light is preferably enlarged and projected by projection optical means.

[Procedure amendment 24]

[Document name to be amended] Statement

[Correction target item name] 0030

[Correction method] Deleted

[Procedure amendment 25]

[Document name to be amended] Statement

[Correction target item name] 0031

[Correction method] Deleted

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09F 9/30 338 G09F 9/30 338 349 349C 9/35 9/35 H01L 29/786 H01L 29/78 619B 612B F-term (reference) 2H091 FA05 FA29 FA34Y FA35 GA13 LA12 LA17 MA07 2H092 GA50 GA59 JA25 JA34 JA37 JA41 JA46 JB22 JB31 JB51 JB56 JB61 KA04 KB04 MA05 MA08 MA27 NA01 NA22 PA01 PA06 PA07 PA08 PA09 PA13 RA05 A09 BA13 A05 A09 DA14 DA15 DB01 DB03 DB04 EA04 EA07 ED01 ED14 ED15 5F110 AA06 AA16 AA28 BB02 BB04 CC02 DD02 DD03 DD13 DD14 DD17 DD22 DD30 EE02 EE05 EE09 EE10 EE14 FF02 FF03 FF09 FF23 FF29 GG02 GG13 GG23 GG23 GG23 GG23 GG13 GG13 GG13 GG13 GG13 GG13 GG13 GG13 GG13 GG02 HM14 HM15 HM19 NN03 NN04 NN22 NN23 NN24 NN27 NN35 NN36 NN41 NN44 NN46 NN54 NN55 NN58 NN73 NN 78 PP01 PP10 PP13 PP33 QQ04 QQ11 QQ19 5G435 AA00 AA14 BB12 BB17 DD04 EE33 EE37 FF05 FF13

Claims (28)

[Claims] 1. A display region in which pixels are arranged in a matrix by a plurality of data lines and a plurality of scanning lines, and a periphery connected to at least one of the data lines and the scanning lines on an outer peripheral side of the display region. A liquid crystal device substrate including a driving circuit and a plurality of thin film transistors connected to the data lines and the scanning lines; and a liquid crystal device sandwiching liquid crystal between the liquid crystal device substrate and a counter substrate. A conductive first light-shielding film that overlaps with at least a channel region of the thin film transistor formed on the substrate on the lower side of the channel region via an interlayer insulating film, and the first light-shielding film Wherein a constant voltage is applied to the liquid crystal device. 2. The first light-shielding film according to claim 1, wherein the first light-shielding film has a channel light-shielding portion overlapping the channel region, and a wiring extending from the channel light-shielding portion to apply a constant voltage to the channel light-shielding portion. A liquid crystal device comprising: 3. The display region according to claim 2, wherein a wiring portion of the first light-shielding film extends from at least one of the channel light-shielding portions along at least one signal line of the scanning line and the data line. Each of them extends to the outside, and is connected to a constant potential wiring formed in a layer different from the first light shielding film through at least a contact hole of the interlayer insulating film outside the display region. A liquid crystal device characterized by the above-mentioned. 4. The display area according to claim 2, wherein a wiring portion of the first light-shielding film extends from each of the channel light-shielding portions along both signal lines of the scanning line and the data line to the outside of the display region. And connected to a constant potential wiring formed in a layer different from the first light-shielding film outside the display area via at least a contact hole of the interlayer insulating film. A liquid crystal device characterized by the above-mentioned. 5. The wiring according to claim 3, wherein each of the wiring portions of the first light shielding film is connected to the constant potential wiring outside the display region via a contact hole of the interlayer insulating film. An active matrix type liquid crystal device characterized by the following. 6. The wiring portion of the first light-shielding film according to claim 5, wherein one end of the wiring portion of the first light-shielding film is connected to the constant potential wiring via a contact hole of the interlayer insulating film. Liquid crystal device. 7. The wiring portion of the first light-shielding film according to claim 5, wherein both ends of the wiring portion of the first light-shielding film are connected to the constant potential wiring through contact holes of the interlayer insulating film. Liquid crystal device. 8. The display device according to claim 3, wherein the wiring portion of the first light-shielding film is arranged along at least one of the scanning line and the data line from each of the channel light-shielding portions. A branch line extending to the outside of the display region; and a trunk line connected to each of the branch lines outside the display region. The trunk line is connected to the constant potential wiring through a contact hole in the interlayer insulating film. A liquid crystal device, comprising: 9. The liquid crystal device according to claim 8, wherein one end of the branch line is connected to the trunk line. 10. The liquid crystal device according to claim 8, wherein both ends of the branch line are connected to the trunk line. 11. The interlayer insulating film according to claim 2, wherein the first light-shielding film is in contact with at least the interlayer insulating film with respect to a capacitance wiring overlapping a drain region of the thin film transistor to form a storage capacitor. A liquid crystal device which is connected via a hole. 12. The storage capacitor according to claim 2, wherein the first light-shielding film overlaps a drain region of the thin-film transistor via the interlayer insulating film to form a storage capacitor. Liquid crystal device. 13. The liquid crystal device according to claim 2, wherein the constant potential wiring is connected to a power supply line that supplies a low potential power to the drive circuit. 14. The constant-potential wiring according to claim 2, wherein the constant potential wiring is connected to a power supply line for supplying a counter electrode potential from the liquid crystal device substrate to a counter electrode of the counter substrate via a vertical conductive material. An active matrix type liquid crystal device characterized in that: 15. The liquid crystal device according to claim 2, wherein the constant potential wiring is a power supply line that supplies a ground potential to the peripheral driving circuit. 16. The liquid crystal device substrate according to claim 1, wherein at least one of the liquid crystal device substrate and the counter substrate includes a light shielding film for separating a display screen surrounding the display area. A liquid crystal device characterized by the above-mentioned. 17. The liquid crystal device substrate according to claim 1, wherein the liquid crystal device substrate includes a second light-shielding film covering the channel region on the channel region of the thin film transistor. Liquid crystal devices. 18. The liquid crystal device according to claim 17, wherein the second light-shielding film is the data line. 19. The peripheral driving circuit according to claim 1, wherein the peripheral driving circuit includes a thin film transistor for a P-channel driving circuit and a thin film transistor for an N-channel driving circuit,
The liquid crystal device, wherein the thin film transistors for the P-channel and N-channel driver circuits are formed also in the manufacturing process of the thin film transistor. 20. The liquid crystal device according to claim 19, wherein the peripheral driving circuit includes a wiring layer made of a conductive film formed simultaneously with the first light shielding film. 21. The wiring layer according to claim 19, wherein the wiring layer made of a conductive film formed simultaneously with the first light-shielding film has at least a contact hole of the interlayer insulating film with respect to a gate electrode of the thin film transistor for the driving circuit. And the channel region of the thin film transistor for the drive circuit with an area equal to or less than the area of the gate electrode of the thin film transistor for the drive circuit, via the interlayer insulating film on the lower layer side of the channel region. A liquid crystal device characterized by being overlapped. 22. The wiring layer according to claim 19, wherein the wiring layer made of a conductive film formed simultaneously with the first light-shielding film has at least a contact hole of the interlayer insulating film with respect to a source electrode of the thin film transistor for the driving circuit. A liquid crystal device which is connected to the thin film transistor for the drive circuit and overlaps with the channel region of the thin film transistor for the drive circuit via the interlayer insulating film below the channel region. 23. The first light-shielding film according to claim 1, wherein the first light-shielding film is made of a metal film such as tungsten, titanium, chromium, tantalum, or molybdenum, or a metal alloy film such as a metal silicide. A liquid crystal device characterized by being performed. 24. The liquid crystal device according to claim 1, wherein a third light-shielding film is formed on the counter substrate corresponding to the pixels. 25. The liquid crystal device according to claim 24, wherein the third light shielding film is formed so as to cover at least the first light shielding film. 26. The liquid crystal device according to claim 1, wherein micro lenses are formed in a matrix on the counter substrate corresponding to each of the pixels. 27. A projection type display device comprising the liquid crystal device according to claim 1, wherein light from a light source is modulated by the liquid crystal device, and the modulated light is enlarged by projection optical means. A projection display device, which performs projection. 28. The method of manufacturing a liquid crystal device according to claim 1, wherein a contact hole for connecting the first light-shielding film and a wiring for supplying a constant voltage thereto is formed. Forming a contact hole for connecting the data line and the source region of the thin film transistor at the same time.