JP2002217366A - Semiconductor integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device in which miniaturization is enabled by conducting easily a common signal in device division segments of minimum unit, when a plurality of the device division segments of minimum unit are gathered and used. SOLUTION: In the state before division that two device division segments 1a, 1b of minimum unit are arranged adjacently, the respective segments 1a, 1b have individually at least one electrode pad S which can input and output an electric signal. Above an element forming surface, at least a pair of electrode pads S1, S2 between the segments 1a and 1b are mutually connected through wiring 5 of conductor, across the segments 1a, 1b. Electrodes 7 for outer connection are installed on the wiring 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to an electronic apparatus,
The present invention relates to a built-in semiconductor integrated circuit device, and more particularly, to conduction of a common signal for miniaturization when a plurality of minimum unit device divided bodies are used collectively.

[0002]

2. Description of the Related Art Conventionally, a semiconductor integrated circuit device including a semiconductor integrated circuit chip (hereinafter referred to as an “IC chip”) has been developed from the viewpoints of the function of the IC chip, the purpose of use, and the mounting on a printed circuit board. A great external shape has been devised.

In recent years, in particular, in the field of small portable equipment, since it is necessary to mount electronic components mounted therein at high density, a further miniaturized semiconductor integrated circuit device is required. Therefore, for example, a semiconductor integrated circuit device having the same or substantially the same size as an IC chip has been devised. Such miniaturized semiconductor integrated circuit devices are:
It is called CSP (Chip Size Package, Chip Scale Package).

That is, conventionally, TSOP (Thin Small Ou)
In semiconductor integrated circuit devices such as
It has been manufactured by manufacturing a plurality of C chips in a state of being arranged side by side on a semiconductor wafer, storing the separated chips in a separately manufactured package, and integrating them. Therefore, the size of the semiconductor integrated circuit device is determined by the size of the package, and it has been difficult to reduce the size of the semiconductor integrated circuit device as a whole even if the IC chip is reduced in size.

However, recently, a wafer level CSP for forming a package in a semiconductor wafer state has been developed. As a result, a large number of small IC chips are manufactured adjacent to the semiconductor wafer, and then packaged by laminating an insulating layer over the entire surface above the element forming surface of the semiconductor wafer, and then packaged. By dividing each IC chip into individual pieces, a semiconductor integrated circuit device having the same or substantially the same size as the IC chip can be formed.

By the way, as the external connection terminals of the miniaturized semiconductor integrated circuit device, solder balls arranged in a matrix are generally used. For example, as shown in FIGS. 10A and 10B, a semiconductor integrated circuit device 101 disclosed in Japanese Unexamined Patent Application Publication No.
The IC chip 102 has the same size as the IC chip 102 and has a plurality of first electrode pads 103 formed on the surface thereof.
03 so that at least a part of the IC chip 1 is exposed.
, And a plurality of wirings arranged to electrically connect the first electrode pads 103 to the corresponding second electrode pads 106. 105, a second insulating layer 107 laminated on the IC chip 102 by exposing at least a part of each second electrode pad 106, and a second electrode pad 10
6 and a plurality of external connection terminals 108 provided thereon. Each of the external connection terminals 108 is formed of a solder ball.

[0007]

In the above-mentioned conventional semiconductor integrated circuit device, each of the first electrode pads 103...
10 for connecting between the external connection terminals 108.
5 are IC chips 10 called photolithography
It is manufactured using the same basic principle as the technique for forming two microcircuits. Specifically, a step of sputtering a metal underlying the wiring, a step of applying a photoresist, a step of exposing the photoresist, a step of developing the photoresist to open a wiring formation portion, a plating step, and removing the photoresist It is formed through a process and a process of etching a metal of a wiring base that has not been plated. Therefore, the wirings 105 are generally called rewirings.

However, the wirings 105... Obtained in these series of steps are formed in the element forming surface of each of the device divided units of the smallest unit finally divided by dicing. Are not wired across the divided devices.

Therefore, the semiconductor integrated circuit device 101, which is the smallest unit divided into individual pieces, is mounted on a printed board (not shown) via the external connection terminals 108 consisting of solder balls. Since electric signals are transmitted between the integrated circuit devices 101 and 101 and with other electronic components via wiring formed on the printed circuit board, the area occupied by the wiring for the existence of the wiring on the printed circuit board must be present. Become.

As a result, for example, if a memory capacity twice as large as the largest memory currently manufactured is required,
An external connection terminal 10 for connecting two semiconductor integrated circuit devices 101 to a printed circuit board and performing the same electrical operation
8. 108 are connected to each other by wiring on a printed board (not shown).

In this case, the printed board needs an area for wiring. Further, the semiconductor integrated circuit device 101
It is difficult to connect the semiconductor integrated circuit device 101 and the semiconductor integrated circuit device 101 to a printed circuit board, and a minimum distance is required for the connection. Therefore, it is not suitable for miniaturization. In addition, if the manufacture of a semiconductor integrated circuit device having twice the memory capacity is started from the design stage, a semiconductor integrated circuit device with a minimum area of one chip can be manufactured. This requires a period of time such as the production of a new mask in the process, and cannot be dealt with immediately.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional problems, and has as its object to collect and use a plurality of minimum unit device divisions. It is an object of the present invention to provide a semiconductor integrated circuit device which can easily conduct a common signal in the above and downsize the device.

[0013]

In order to solve the above-mentioned problems, a semiconductor integrated circuit device according to the present invention has a structure in which a plurality of minimum unit device divisions are arranged adjacent to each other before each division. The unit device division unit has at least one electrode pad capable of inputting and outputting an electric signal, and at least a pair of electrode pads between each minimum unit device division unit are straddled between the minimum unit device division units. Thus, the semiconductor device is characterized by being connected by a conductor wiring above the element forming surface, and having an external connection terminal provided on the wiring.

According to the above-mentioned invention, the semiconductor integrated circuit device has a plurality of minimum unit device divisions arranged adjacent to each other, for example, on a semiconductor wafer.
One semiconductor integrated circuit device is formed for each minimum unit device division.

In this case, in the present invention, at least a pair of electrode pads between the minimum unit device divisions are connected to the conductor wiring above the element formation surface across the minimum unit device divisions. Therefore, when the device is divided into the minimum unit device divisions, the wiring of the conductor connecting the pair of electrode pads is disconnected, and there is no electrical connection between the two. Are one independent semiconductor integrated circuit device.

By the way, for example, when a semiconductor integrated circuit device having twice the memory capacity is required, conventionally, two minimum unit device divisions must be connected to a printed circuit board. And the printed circuit board
Wiring for conducting common signals of the minimum number of device divided units is required. In addition, since the two minimum unit divided units cannot be arranged in contact with each other, it has been an obstacle to miniaturization.

However, according to the present invention, when a plurality of minimum unit device divisions are collected and used, a plurality of minimum unit device divisions are arranged adjacent to each other before splitting. Since at least a pair of electrode pads between the device divisions of each minimum unit are connected by conductor wiring above the element formation surface across the device divisions of each minimum unit, A plurality of common signals can be extracted from external connection terminals on the wiring.

Therefore, by using a plurality of minimum unit divisions without dividing them, it is possible to reduce the size of a plurality of semiconductor integrated circuit devices as compared with individually connecting them on a printed circuit board. In other words, although the area is slightly larger than that of a new single semiconductor integrated circuit device, the structure and manufacturing process up to the formation of the electrode pads are the same as those of the conventional semiconductor integrated circuit. Therefore, it can be used as a semiconductor integrated circuit device having a plurality of functions while reducing the size more easily than developing a new single semiconductor integrated circuit device.

As a result, when a plurality of the minimum unit device divisions are collected and used, a semiconductor integrated circuit device capable of easily conducting common signals in the minimum unit device divisions and achieving miniaturization is provided. Can be provided.

According to another aspect of the present invention, there is provided a semiconductor integrated circuit device in which, when a plurality of minimum unit device divisions are arranged adjacent to each other, before the division, a plurality of minimum unit device divisions are arranged. The body has at least one electrode pad capable of inputting / outputting an electric signal, and at least a pair of electrode pads between each of the minimum unit device divided bodies are arranged across the minimum unit device divided body. It is characterized in that it is connected by a conductor wiring above the formation surface, and an external connection terminal is provided on the electrode pad.

According to the above-mentioned invention, at least a pair of electrode pads between the device divisions of each minimum unit are connected to the wiring of the conductor above the element formation surface across the device divisions of the minimum unit. And an external connection terminal is provided on the electrode pad.

For this reason, since the external connection terminals are provided on the electrode pads, damage to the elements of the semiconductor integrated circuit can be reduced when connecting to a printed circuit board or the like.

Further, the semiconductor integrated circuit device of the present invention is characterized in that, in the above-described semiconductor integrated circuit device, external connection terminals are provided for all the electrode pads.

That is, a plurality of device divided units of each minimum unit are collected and used as one semiconductor integrated circuit device, or divided into each device divided unit of each minimum unit to form each semiconductor integrated circuit device. It is necessary to determine at least before forming the wiring.

However, in the present invention, since the external connection terminals are provided for all the electrode pads, even if the external connection terminals are formed and then divided, the signals from the electrode pads are not connected to the external connection terminals. Can be taken out from the terminal.

As a result, after forming the external connection terminals, it is possible to determine whether to divide the external connection terminals or to collectively use a plurality of minimum unit divided units. Therefore,
Since it is possible to determine which one to use at the final stage of the manufacturing process, it is possible to immediately manufacture a product that meets the user's request at any time.

Further, according to the semiconductor integrated circuit device of the present invention, in the semiconductor integrated circuit device described above, a select electrode pad relating to a select terminal for identifying each of the minimum unit device divisions is a device of each minimum unit. The electrode pads for selection are provided for each divided body, and the electrode pads for selection are not connected to the electrode pads of the device divided body of the other smallest unit, while the electrode pads having the same function other than the select terminal are electrically conductive. It is characterized by being connected by wiring.

That is, the device divided body of each minimum unit includes:
Since at least a select terminal for identifying each minimum unit device division is necessary, in the present invention, a select electrode pad related to the select terminal is provided for each minimum unit device division, The electrode pads for use are not connected to the electrode pads of the other device splitting units of the minimum unit.

As a result, it is possible to form a select terminal for identifying the device divided unit of each minimum unit so as to satisfy its function. In addition, since other electrode pads having the same function are connected by conductor wiring, they can be divided and used, while it is also possible to collect and use the device divided units of each minimum unit. .

[0030]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS.

The semiconductor integrated circuit device 1 according to the present embodiment
As shown in FIGS. 1 (a) and 1 (b), a minimum unit of a semiconductor integrated circuit 2a
b, the first insulating layer 4 laminated on the semiconductor integrated circuits 2a and 2b so as to expose at least a part of each of the electrode pads S... Formed on the insulating layer 4 and the second insulating layer 6 formed by exposing a portion for forming an external connection electrode 7 as an external connection terminal. Layer 6
Are formed on the exposed portions of the external connection electrodes 7.

That is, the semiconductor integrated circuit device 1 has:
Semiconductor integrated circuits 2a and 2 having elements and wiring not shown
b is packaged by the first insulating layer 4 formed thereon, and the semiconductor integrated circuits 2a and 2b
Signals from elements and wiring provided in the semiconductor device are transmitted from each electrode pad S formed on the semiconductor integrated circuits 2a and 2b to the wiring 5
.. And the external connection electrodes 7.

Here, the semiconductor integrated circuit device 1 described above
It can be divided into two at the central cutting line 8 at the center position, and when divided, each is divided into the smallest unit device divided body 1a and the device divided body 1b.
Therefore, in the present embodiment, until the cutting is performed at the central cutting line 8, two of the minimum unit device divided body 1a and the device divided body 1b are gathered to form one semiconductor integrated circuit device 1
Is formed. In other words, the center cutting line 8 originally represents a cutting position when individualized into the smallest unit device divided bodies 1a and 1b, but in the present embodiment, the center cutting line 8 does not cut at the center cutting line 8. This is a mode in the case of using as one semiconductor integrated circuit device 1. Therefore, it is basically possible to judge whether or not to cut and use at the center cutting line 8 at any time in this state.

Each of the semiconductor integrated circuits 2a and 2b as the semiconductor integrated circuit chips (IC chips) in the above-mentioned device divided bodies 1a and 1b has an electrode pad S1 as an electrode pad S, as shown in FIG. To S10, and except for the electrode pads S3 and S3, are connected by the same numbers to each other by the wires 5 across the central cutting line 8 of the semiconductor integrated circuits 2a and 2b. The electrode pads S3 and S3 are independent electrodes in each of the divided devices 1a and 1b, and are used to instruct which of the divided devices 1a and 1b should drive the semiconductor integrated circuits 2a and 2b. It functions as a select terminal.

The first insulating layer 4 has a thickness of, for example, about 0.6 μm.
An oxide film such as SiO _{2 having a} thickness of m
m or an organic film such as polyimide, or a film obtained by laminating them. The second insulating layer 6 is
For example, a photosensitive insulating material of about 10 μm is used,
A pattern is formed by a so-called photolithography technique.

The external connection electrodes 7 are formed by solder balls, that is, solder balls are laid in a spherical shape. In the present embodiment, each of the external connection electrodes 7.
Are arranged in a matrix in the middle of the wirings 5.

In the semiconductor integrated circuit device 1, the external connection electrodes 7 are provided in the middle of the wirings 5 as described above. However, the present invention is not limited to this.
(A) and (b), the semiconductor integrated circuit device 10 in which the external connection electrodes 17 are provided directly above the electrode pads S can be provided. By forming in this manner, the external connection electrodes 7 of the semiconductor integrated circuit device 1 are located above the element forming surfaces of the semiconductor integrated circuits 2a and 2b, while the external connection electrodes 7 are located outside the semiconductor integrated circuit device 10. Since the connection electrodes 17 are located on the electrode pads S, when the semiconductor integrated circuit device 10 is connected to a printed board or the like (not shown), damage to the elements during the connection can be reduced.

Although the external connection electrodes 7 of the semiconductor integrated circuit device 1 are spherical, the present invention is not limited to this. The external connection electrodes 17 of a rectangular flat plate shape as in the semiconductor integrated circuit device 10 are used. It can be. However, these shapes are not limiting for each type.

As described above, the spherical external connection electrodes 7 in the semiconductor integrated circuit device 1 are formed by mounting a metallic body such as a spherical solder on a portion where the second insulating layer 6 is removed, that is, on a so-called land portion. , Melting or solidifying, or by printing, melting or solidifying a solder paste. For example, the external connection electrodes 17 in the form of a rectangular flat plate in the semiconductor integrated circuit device 10 can also be formed by a technique such as electroless plating.

In the above semiconductor integrated circuit devices 1 and 10,
The number of external connection terminals per semiconductor integrated circuit device can be reduced as compared with the conventional CSP. In addition, two minimum unit device divisions 1a and 1b
Are connected, it is possible to reduce the size of the printed circuit board on which the semiconductor integrated circuit device 1 is mounted, and to further reduce the size and weight of the electronic device. Further, the semiconductor integrated circuit device 1 of the present embodiment
As described later, the device 10 can be manufactured consistently in the state of the semiconductor wafer 20 and can easily obtain a form in which the two minimum unit device divided bodies 1a and 1b are connected only by changing the dicing position.

Next, a method of manufacturing the semiconductor integrated circuit device 1 and the semiconductor integrated circuit device 10 having the above configuration will be described with reference to FIGS. The semiconductor integrated circuit device 1 and the semiconductor integrated circuit device 10 are assumed to be, for example, a memory IC. In addition, the number of terminals is reduced for convenience of the drawing.

First, the above semiconductor integrated circuit devices 1 and 10
Is formed in the state of a semiconductor wafer. That is, as shown in FIG. 3, the individual semiconductor integrated circuit device 1 or the semiconductor integrated circuit device 10,
Or each device divided body 1a, 1b or each device divided body 10
a · 10b.

FIG. 4 (a) shows the semiconductor wafer 20.
As shown in (b), the semiconductor integrated circuits 2a and 2b are arranged adjacently, and the same ones are alternately arranged vertically and horizontally in FIG. Note that the semiconductor integrated circuit 2a and the semiconductor integrated circuit 2b may be completely the same, and in that case, the same is arranged over the entire surface of the semiconductor wafer 20.

Next, the subsequent manufacturing steps will be described separately for the semiconductor integrated circuit device 1 and the semiconductor integrated circuit device 10.

First, in the manufacture of the semiconductor integrated circuit device 1, as shown in FIGS. 4A and 4B, each semiconductor integrated circuit 2a on a semiconductor wafer 20 on which elements (not shown) are formed.
A polyimide is applied to the entire surface of the 2b by a spin coater to form the first insulating layer 4, and is etched by photolithography so that the electrode pads S are exposed after thermosetting. Specifically, as shown in FIG.
The polyimide is etched so as to overhang the electrode pads S... So as to expose the center of each electrode pad S.

Next, as shown in FIGS. 5A and 5B,
Wirings 5 are formed on the first insulating layer 4. When the wirings 5 are formed, first, TiW and C are formed on the entire surface of the semiconductor wafer 20 on which the first insulating layer 4 is formed.
After u is sequentially sputtered, a photoresist is coated, the portions to be the wirings 5 are exposed and developed by photolithography, and the openings are plated with Cu. Next, the photoresist is removed from the portions other than the plated portions, and the wirings 5 are obtained by etching until the previously formed sputtered film of TiW and Cu disappears in the portions other than the wirings 5. At this time, the plated Cu is also slightly etched, but remains thicker as the wirings 5 because it is thicker than the thicknesses of TiW and Cu.

Next, as shown in FIG. 6A, the second insulating layer 6 is coated on the entire surface, and further, the photolithography described above for removing the portions where the external connection electrodes 7 are formed is removed. The technology of is used. Here, if the material of the external connection electrodes 7 is solder, the solder and Cu
Interdiffusion occurs and the bonding strength decreases, so that N
It is preferable to perform plating of i or Au.

Next, as shown in FIG. 6 (b), the external connection electrodes 7 are mounted on the portions where the second insulating layer 6 is removed, so that a continuous body of the semiconductor integrated circuit devices 1 is completed. Then, by dicing this from the semiconductor wafer 20, the semiconductor integrated circuit device 1 shown in FIG. 1 is obtained. Here, in the semiconductor integrated circuit device 1, the external connection electrodes 7.
Mounts a solder ball on a round portion from which a part of the second insulating layer 6 is removed, and heats and cools the wiring 5 by reflow.
... and joined.

Next, the manufacturing process of the semiconductor integrated circuit device 10 will be described.

In the manufacturing process of the semiconductor integrated circuit device 10, the state shown in FIGS. 4A and 4B is followed by the steps of FIGS.
As shown in FIGS. 8A and 8B, the manufacturing process is basically the same as that of the semiconductor integrated circuit device 1 except that the external connection electrodes 17 are formed on the second electrode pads S. Is different. Then, in the semiconductor integrated circuit device 10,
The external connection electrodes 17 are printed with solder paste and joined to the wirings 5 by reflow of hot melting and cooling. As a result, a continuous product of the semiconductor integrated circuit devices 10 is completed, and the semiconductor integrated circuit device 10 is completed by dicing the semiconductor integrated circuit device 10 as shown in FIGS. 2A and 2B.

It should be noted that the semiconductor integrated circuit devices 1 and 10 of the present embodiment described above have the minimum unit device divisions 1a and 1b.
Alternatively, each of the two device divisions 10a and 10b is one semiconductor integrated circuit device, but is not necessarily limited to this, and the device divisions 1a, 1b, 1c... 10b, 10c, etc.
The same can be applied to the case where one or more semiconductor integrated circuit devices are connected to each other.

The present invention is not limited to the above embodiment, and various modifications can be made within the scope of the present invention. For example, in the above embodiment, FIG.
In the semiconductor integrated circuit device 10 shown in (b), the electrode pads S6 to S10 in the device division body 10a and the device division body 1
The external connection electrodes 17 are not formed on the electrode pads S1, S2, S4, and S5 at 0b, but are not particularly limited thereto. As shown in FIGS. 9A and 9B, External connection electrodes 17 are placed on all electrode pads S.
Are formed, the semiconductor integrated circuit device 30 can be formed.

That is, the aforementioned semiconductor integrated circuit device 1
In the step 10, the device split 1a and the device split 1b, or the combination of the device split 10a and the device split 10b is manufactured as one semiconductor integrated circuit device, or the device split 1a and the device split Before forming the wiring 5, it is determined whether each of the body 1 b or each of the device divided body 10 a and the device divided body 10 b is manufactured as one semiconductor integrated circuit device, and the external connection electrode 7 or the external connection is determined. It is preferable to form the electrodes 17 for use.

However, in the semiconductor integrated circuit device 30 shown in FIGS. 9A and 9B, since the external connection electrodes 17 are formed on all the electrode pads S, the external connection electrodes 17 are formed. Can be determined at the time of dicing after forming. That is, since it is possible to determine which one to use in the final step of the manufacturing process, the product can be delivered immediately in response to a user's request. In other words, it can respond to market trends. In the case where the two devices 30a and 30b are used as one semiconductor integrated circuit device 30, the external connection electrodes 17 electrically connected to a printed circuit board (not shown) The external connection electrodes 17 located on the periphery may be connected.

As described above, in the semiconductor integrated circuit devices 1, 10 and 30 of the present embodiment, a plurality of the minimum unit device divisions 1 a and 1 b, the device divisions 10 a and 10 b and the device division The bodies 30a and 30b are arranged adjacent to each other, and basically, the device divided bodies 1a, 1b, 10a, 10b, and 30a of the minimum unit of the minimum unit.
One semiconductor integrated circuit device for each 30b 1.10.30
Is formed.

In this case, in the present embodiment, at least a pair of, for example, the electrode pads S1 and S1 between the device divided bodies 1a and 1b, the device divided bodies 10a and 10b, and the device divided bodies 30a and 30b is the smallest unit. Since it is connected between the minimum unit device divided bodies 1a and 1b, the device divided bodies 10a and 10b, and the device divided bodies 30a and 30b, and above the element forming surface by the conductor wirings 5, the devices are connected. Split body 1a
When divided into 1b, 10a, 10b, 30a, and 30b, the conductor wiring 5 that connects the pair of electrode pads S1 and S1 is disconnected, and there is no electrical connection between them. 1a ・ 1b ・ 10a ・ 10
b, 30a, and 30b are one independent semiconductor integrated circuit device.

Incidentally, for example, when a semiconductor integrated circuit device having twice the memory capacity is required, conventionally, as shown in FIGS. Semiconductor integrated circuit device 101 which is a device division body
Must be connected to a printed circuit board (not shown). For this purpose, wiring for conducting a common signal of the semiconductor integrated circuit device 101, which is the two minimum unit device divisions, is required on the printed circuit board. Since the two minimum units of the semiconductor integrated circuit devices 101 cannot be arranged so as to be in contact with each other, this has been an obstacle to miniaturization.

However, in the present embodiment, the device division bodies 1a and 1b of the minimum unit of two minimum units and the device division body 10
a and 10b and the device divided bodies 30a and 30b
In a case where two pieces are used in a state of being divided beforehand, the two minimum unit device divided bodies 1a and 1b, the device divided bodies 10a and 10b, and the device divided bodies 30a and 30b are arranged adjacent to each other. At least one pair of electrode pads S1 and S1 between the device split bodies 1a and 1b of the minimum unit, the device split bodies 10a and 10b, and the device split bodies 30a and 30b are each a device split body 1a and 1b of the minimum unit. 10a ・ 1
0b and the device divided bodies 30a, 30b, and are connected by conductor wirings 5 above the element forming surface, so that signals from the electrode pads S1, S1, which are two common signals, are transmitted. It can be taken out from the external connection electrodes 7 and 17 on the wirings 5.

Therefore, by using the two minimum unit divided units 1a and 1b, the divided units 10a and 10b, and the divided units 30a and 30b without dividing them, the two divided units 1a and 1b are used. , Device split body 10
The size can be reduced as compared to individually connecting the a.b and the device divided bodies 30a and 30b on a printed circuit board.
That is, although the area is slightly larger than that of a new single semiconductor integrated circuit device, the structure and the manufacturing process up to the formation of the electrode pads S are the same as those of the conventional semiconductor integrated circuit 101, and the design changes are made to the wirings 5. Can be performed after the application, so that it can be used as the semiconductor integrated circuit devices 1, 10 and 30 having two functions while reducing the size more easily than developing a new single semiconductor integrated circuit device. .

As a result, when each of the two minimum unit device divisions 1a and 1b, the device divisions 10a and 10b, and the device divisions 30a and 30b is used collectively, the minimum unit device division 1a is used. .1b, device divided body 10a.1
0b and a semiconductor integrated circuit device 1 capable of easily conducting common signals in the device division bodies 30a and 30b to achieve miniaturization.
・ 10 ・ 30 can be provided.

Further, in the semiconductor integrated circuit devices 10 and 30 of the present embodiment, the device division bodies 10a and 10
b and at least a pair of electrode pads S1, S1 between the device divided bodies 30a, 30b are the smallest unit of the device divided body 1
0a and 10b and the device divided bodies 30a and 30b, are connected by conductor wiring 5 above the element forming surface, and are provided on the electrode pads S with external connection electrodes 7 and 17.
Is provided.

For this reason, since the external connection electrodes 7 and 17 are provided on the electrode pads S, damage to the elements of the semiconductor integrated circuits 2a and 2b is reduced when they are connected to a printed board (not shown). be able to.

In the semiconductor integrated circuit device 30 of the present embodiment, external connection electrodes 17 are provided for all the electrode pads S.

That is, for example, the two minimum unit device divisions 30a and 30b are collected and used as one semiconductor integrated circuit device 30, or divided into each minimum unit device division 30a and 30b. It is necessary to determine at least before forming the wirings 5 whether to use the semiconductor integrated circuit devices.

However, in the present embodiment, since the external connection electrodes 17 are provided for all the electrode pads S, even if the external connection electrodes 17 are formed and then divided, the electrode connection S is also provided. Signals from the pads S can be extracted from the external connection electrodes 17.

Therefore, after the external connection electrodes 17 are formed, it is possible to determine whether to divide or to use the two minimum unit device divided bodies 30a and 30b collectively. It is possible to determine which one to use at the stage of the final process, so that it is possible to immediately manufacture a product that meets the user's request at any time.

In the semiconductor integrated circuit devices 1, 10 and 30 of the present embodiment, each of the minimum unit device divisions 1 a and 1
b, 10a, 10b, 30a, 30b have at least the minimum unit of 1a, 1b, 10a, 10b, 30a, 3
Since a select terminal for identifying 0b is necessary, the device division bodies 1a, 1b, 10a, 10
The electrode pad S3 as a select electrode pad related to the select terminal for identifying b, 30a, 30b is a device divided body 1a, 1b, 10a, 10b.
The electrode pad S3 is provided for each of the device division bodies 1a, 1b, and 10a of another minimum unit.
It is not connected to the electrode pads S3 of 10b, 30a, and 30b. Further, the electrode pads S1, S2, S4 to S10 which have the same function other than the select terminal are connected to each other by conductor wirings 5,.

Therefore, each of the minimum unit device divided bodies 1a
Select terminals for identifying 1b, 10a, 10b, 30a, and 30b can be formed so as to satisfy the function by the electrode pad S3. In addition, since the other electrode pads S1, S2, S4 to S10 having the same function are connected to each other by the conductor wirings 5,...・ 1b ・ 1
It is also possible to collect and use 0a, 10b, 30a, and 30b.

[0069]

As described above, according to the semiconductor integrated circuit device of the present invention, in a state before the division in which a plurality of minimum unit device divisions are arranged adjacent to each other, each of the minimum unit device divisions is electrically operated. At least one pair of electrode pads each having at least one electrode pad capable of inputting / outputting a signal, and at least a pair of electrode pads between the device division units of each minimum unit straddle the device division units of the minimum unit. It is connected by a conductor wiring on the upper side, and an external connection terminal is provided on the wiring.

Therefore, when a plurality of minimum unit device divisions are collected and used, in a state before division where a plurality of minimum unit device divisions are arranged adjacent to each other, the At least a pair of electrode pads between the minimum unit device divisions are connected by conductor wiring above the element formation surface across the minimum unit device divisions. The common signal can be extracted from the external connection terminal on this wiring.

Therefore, by using the plurality of minimum unit divisions without dividing them, it is possible to make the plurality of semiconductor integrated circuit devices smaller than connecting them individually on a printed circuit board.

As a result, when a plurality of minimum unit device divisions are collected and used, a semiconductor integrated circuit device capable of easily conducting a common signal in each minimum unit device division and achieving miniaturization is realized. This has the effect that it can be provided.

As described above, in the semiconductor integrated circuit device according to the present invention, in the state before the division in which a plurality of minimum unit device divisions are arranged adjacent to each other, each of the minimum unit device divisions is electrically operated. At least one pair of electrode pads each having at least one electrode pad capable of inputting / outputting a signal, and at least a pair of electrode pads between the device division units of each minimum unit straddle the device division units of the minimum unit. It is connected by a conductor wiring on the upper side, and an external connection terminal is provided on the electrode pad.

Therefore, since the external connection terminals are provided on the electrode pads, when connected to a printed board or the like, there is an effect that damage to the elements of the semiconductor integrated circuit can be reduced.

Further, in the semiconductor integrated circuit device according to the present invention, in the above-described semiconductor integrated circuit device, external connection terminals are provided for all the electrode pads.

Therefore, after forming the external connection terminal, it is possible to determine whether to divide the external connection terminal or to collectively use a plurality of minimum unit divided units. Therefore,
Since it is possible to determine which one to use at the final stage of the manufacturing process, it is possible to immediately produce a product that meets the user's request at any time.

Further, in the semiconductor integrated circuit device according to the present invention, in the semiconductor integrated circuit device described above, a select electrode pad related to a select terminal for identifying each of the minimum unit device divisions is a device of each minimum unit. The electrode pads for selection are provided for each divided body, and the electrode pads for selection are not connected to the electrode pads of the device divided body of the other smallest unit, while the electrode pads having the same function other than the select terminal are electrically conductive. They are connected by wiring.

Therefore, it is possible to form a select terminal for identifying the device divided unit of each minimum unit so as to satisfy its function. In addition, since other electrode pads having the same function are connected by conductor wiring, they can be divided and used, while it is also possible to collect and use the device divided units of each minimum unit. This has the effect.

[Brief description of the drawings]

1A is a plan view showing a configuration of an embodiment of a semiconductor integrated circuit device according to the present invention, and FIG. 1B is a cross-sectional view taken along line AA of FIG.

FIG. 2A is a plan view showing a configuration of a semiconductor integrated circuit device in which an external connection electrode is formed on an electrode pad;
(B) is a sectional view taken along line BB of (a).

FIG. 3 is a perspective view showing a semiconductor wafer for manufacturing the semiconductor integrated circuit device.

FIG. 4A is a plan view illustrating a manufacturing process of a semiconductor integrated circuit device in which an external connection electrode is formed on a wiring, and illustrates a state where a first insulating layer is formed on a semiconductor wafer. And (b) is a cross-sectional view taken along line CC of (a).

FIG. 5A is a plan view showing a state in which a wiring is formed, showing a manufacturing step subsequent to FIG. 4;
FIG. 2 is a sectional view taken along line DD of FIG.

6A is a cross-sectional view showing a state after the second insulating layer is formed, showing a manufacturing step subsequent to FIG. 5, and FIG. 6B is a sectional view showing a state in which an external connection electrode is further formed. It is sectional drawing which shows a state.

FIG. 7A shows a manufacturing process of a semiconductor integrated circuit device in which an external connection electrode is formed on an electrode pad, and shows a state where a first insulating layer and a wiring are formed on a semiconductor wafer. It is a top view, (b) is an EE line sectional view of (a).

FIG. 8A is a cross-sectional view showing a state after the second insulating layer is formed, showing a manufacturing step subsequent to FIG. 7, and FIG. 8B is a sectional view showing a state in which an external connection electrode is further formed. It is sectional drawing which shows a state.

FIG. 9A is a plan view showing a configuration of still another embodiment of the semiconductor integrated circuit device according to the present invention,
(B) is a sectional view taken along line FF of (a).

10A is a plan view showing a configuration of a conventional semiconductor integrated circuit device, and FIG. 10B is a cross-sectional view taken along line XX of FIG.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 semiconductor integrated circuit device 1a device divided body 1b device divided body 2a semiconductor integrated circuit 2b semiconductor integrated circuit 4 first insulating layer 5 wiring 6 second insulating layer 7 external connection electrode (external connection terminal) 8 central cutting line Reference Signs List 10 semiconductor integrated circuit device 10a device divided body 10b device divided body 17 external connection electrode (external connection terminal) 20 semiconductor wafer 30 semiconductor integrated circuit device 30a device divided body 30b device divided body S electrode pad S1 electrode pad (at least one pair of electrodes) Electrode pad) S3 electrode pad (selection electrode pad)

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Katsunobu Mori 22-22, Nagaikecho, Abeno-ku, Osaka-shi, Osaka Prefecture F-term (reference) 5F033 HH11 HH23 PP15 PP26 QQ08 QQ09 QQ10 QQ27 RR22 SS22 UU04 VV07 XX00 5F038 BE01 BE07 CA10 CA13 EZ20 5F064 AA11 DD42 EE53

Claims (4)

[Claims] In a state before a plurality of minimum unit device divisions are arranged adjacent to each other, each minimum unit device division has at least one electrode pad capable of inputting and outputting an electric signal. And, at least a pair of electrode pads between the device divisions of each minimum unit are connected by conductor wiring above the element formation surface across the device divisions of each minimum unit, A semiconductor integrated circuit device, wherein an external connection terminal is provided on the wiring. 2. In a state before a plurality of minimum unit device divisions are arranged adjacent to each other, each minimum unit device division has at least one electrode pad capable of inputting and outputting an electric signal. And, at least a pair of electrode pads between the device divisions of each minimum unit are connected by conductor wiring above the element formation surface across the device divisions of each minimum unit, A semiconductor integrated circuit device, wherein an external connection terminal is provided on the electrode pad. 3. The semiconductor integrated circuit device according to claim 1, wherein external connection terminals are provided for all electrode pads. 4. A selection electrode pad related to a select terminal for identifying each minimum unit device division is provided for each minimum unit device division, and said selection electrode pad is connected to another minimum unit. The electrode pads of the device division body are not connected to each other, and the electrode pads having the same function other than the select terminal are connected by conductor wiring. 4. The semiconductor integrated circuit device according to 3.