JP2002217113A - Method for manufacturing nitride semiconductor layer, method for manufacturing nitride semiconductor substrate, and base for manufacturing nitride semiconductor substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method, which prevents cracks in a nitride semiconductor film from occurring by controlling the thermal expansion coefficient difference between a nitride semiconductor and a substrate of a material different from the nitride semiconductor, and to provide a method, which manufactures a nitride semiconductor substrate without cracks. SOLUTION: A breakable layer is arranged on a mother substrate, and a nitride semiconductor layer is formed on the breakable layer. A thin silicon substrate grows on a main surface of a sapphire substrate, for the nitride semiconductor layer to grow thick. Then, the silicon substrate is removed by etching, to obtain the nitride semiconductor substrate as the nitride semiconductor layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a nitride semiconductor layer and a method for manufacturing a nitride semiconductor substrate used for manufacturing a semiconductor device having a nitride compound semiconductor layer.

[0002]

2. Description of the Related Art Nitride semiconductors such as GaN, InN, and AlN are used as materials for blue and green LEDs, blue semiconductor lasers, and high-speed transistors capable of operating at high temperatures.
It is suitable. Conventionally, a sapphire substrate or the like has been widely used as a substrate for growing a nitride semiconductor. However, in the growth using a substrate made of a material different from the nitride semiconductor layer such as sapphire, the difference in thermal expansion coefficient between the nitride semiconductor and the dissimilar material substrate causes the substrate to be warped, cracks to be generated, and the resulting crystallinity. Was worse.

In order to solve the above-mentioned problems, attempts have been made to manufacture a nitride semiconductor substrate and then manufacture a device using a nitride semiconductor thereon. The method for manufacturing a nitride semiconductor in this case is a method of growing a nitride semiconductor layer thickly on a base material substrate and removing the base material substrate. For example, Japanese Patent Application Laid-Open No.
By processing a base material substrate such as sapphire,
The strain based on the difference in thermal expansion coefficient when N is grown is released to the substrate side, GaN is grown in a thick film, the base material substrate is removed, and G is removed.
A method for obtaining an aN substrate is shown. Also, Japanese Patent Application Laid-Open
Japanese Patent Application Laid-Open No. 114600 discloses a method in which GaN having a thermal expansion coefficient relatively close to that of GaN is used as a base material substrate, GaN is grown in a thick film, and GaAs is removed by etching or the like.

[0004]

However, in the conventional method for manufacturing a nitride semiconductor substrate, a large amount of nitride semiconductors are produced at a low cost because a base material substrate is consumed every time one nitride semiconductor substrate is obtained. It was difficult to provide. In addition, in processes such as sapphire removal and GaAs etching, it takes a considerable amount of time to process and remove a very thick base material substrate, and requires a considerable amount of a polishing material and an etching solution. Since a large amount of waste liquid generated from them is required to be treated, there has been a very large problem in terms of cost.

SUMMARY OF THE INVENTION In view of the above circumstances, the present invention provides a means for growing a thick nitride semiconductor layer without cracks in a relatively simple process at a low cost, and a nitride capable of reusing a base material substrate. An object of the present invention is to provide a method for manufacturing a semiconductor substrate. Another object of the present invention is to provide a method for manufacturing a nitride semiconductor substrate with a relatively simple process and at low cost.

[0006]

Means for Solving the Problems In order to solve the above problems, a method for manufacturing a nitride semiconductor layer, a method for manufacturing a nitride semiconductor substrate, and a substrate for manufacturing a nitride semiconductor substrate according to the present invention have the following structures. It becomes.

The method of manufacturing a nitride semiconductor layer according to the present invention comprises the steps of providing a semiconductor layer on a base material substrate and providing a nitride semiconductor layer on the semiconductor layer to cause defects in the semiconductor layer. Have

[0008] With this configuration, since the strain due to the difference in thermal expansion coefficient is reduced in the semiconductor layer, a thick nitride semiconductor layer can be grown without cracks.

In the method for manufacturing a nitride semiconductor layer according to the present invention, a step of providing a semiconductor layer on a base material substrate and forming a nitride semiconductor layer on the semiconductor layer on a part of a main surface of the base material substrate are provided. And a process.

With this configuration, strain can be more concentrated on the semiconductor layer.

In the method for manufacturing a nitride semiconductor layer according to the present invention, the step of providing the semiconductor layer may be such that the step of providing the semiconductor layer has a higher thermal expansion coefficient than any of the thermal expansion coefficient of the base material substrate and the nitride semiconductor layer. By including the step of forming a semiconductor layer having a small coefficient, a structure in which stress is concentrated on the semiconductor layer can be realized and easy destruction can be imparted.

In the method of manufacturing a nitride semiconductor layer according to the present invention, in such a configuration, stress can be concentrated on the silicon layer because the base material substrate is a sapphire substrate and the semiconductor layer is a silicon layer.

In the method for manufacturing a nitride semiconductor layer according to the present invention, the silicon layer has a thickness of 0.01 μm or more and 1 μm or less, so that the crystallinity of the silicon layer can be maintained and the silicon layer can be formed at the same time. Cracks can be easily generated.

According to the method for manufacturing a nitride semiconductor layer of the present invention, a step of providing a semiconductor layer on a base material substrate, a step of providing a first nitride semiconductor layer on the semiconductor layer, A step of removing a part of the first nitride semiconductor layer until the base material substrate is exposed; and a step of growing a second nitride semiconductor layer on the first nitride semiconductor layer.

According to this structure, the second nitride semiconductor layer having a desired composition and characteristics can be grown almost without cracks.

The method for manufacturing a nitride semiconductor substrate according to the present invention comprises:
Providing a semiconductor layer on the base material substrate, providing a nitride semiconductor layer on the semiconductor layer to cause defects in the semiconductor layer, and separating the base material substrate and the nitride semiconductor layer; It has.

According to this structure, a thick nitride semiconductor layer can be grown on the base material substrate with almost no cracks, and a nitride semiconductor layer having almost no cracks by separation can be obtained.

The method for manufacturing a nitride semiconductor substrate according to the present invention comprises:
Providing a semiconductor layer on the base material substrate, providing a nitride semiconductor layer on the semiconductor layer on a part of the main surface of the base material substrate, separating the base material substrate and the nitride semiconductor layer And a process.

With this configuration, stress can be concentrated on the semiconductor layer, cracks in the nitride semiconductor layer can be prevented, and a substrate with almost no cracks can be obtained.

The method for manufacturing a nitride semiconductor substrate according to the present invention comprises:
In this configuration, the step of providing a semiconductor layer includes the step of forming a semiconductor layer having a smaller coefficient of thermal expansion than any of the coefficient of thermal expansion of the base material substrate and the coefficient of thermal expansion of the nitride semiconductor layer. Stress concentrates on the layers,
Easy breakage can be imparted.

The method for manufacturing a nitride semiconductor substrate according to the present invention comprises:
With such a configuration, the base material substrate is a sapphire substrate,
Since the semiconductor layer is a silicon layer, stress can be concentrated on the silicon layer, and a nitride semiconductor substrate with almost no crack can be obtained.

The method for manufacturing a nitride semiconductor substrate according to the present invention comprises:
Providing a semiconductor layer on a base material substrate, providing a first nitride semiconductor layer on the semiconductor layer, and forming a part of the semiconductor layer and the first nitride semiconductor layer on the base material substrate. Removing until exposed, a step of growing a second nitride semiconductor layer on the first nitride semiconductor layer, and a step of separating the base material substrate and the second nitride semiconductor layer It has.

According to this structure, the second nitride semiconductor layer having a desired composition and characteristics can be grown almost without cracks, and a nitride semiconductor substrate having almost no cracks can be obtained.

The substrate for manufacturing a nitride semiconductor substrate according to the present invention comprises:
A semiconductor layer that is thinner and has more defects than the base material substrate is provided on the base material substrate.

With this configuration, when a nitride semiconductor is grown, cracks can be concentrated in the semiconductor layer, and cracks in the nitride semiconductor can be suppressed.

The substrate for manufacturing a nitride semiconductor substrate according to the present invention comprises:
With this configuration, the semiconductor layer is a layer having a smaller coefficient of thermal expansion than any of the coefficient of thermal expansion of the base material substrate and the coefficient of thermal expansion of the nitride semiconductor layer. The generation of cracks in the product semiconductor can be suppressed.

The substrate for manufacturing a nitride semiconductor substrate according to the present invention comprises:
With such a configuration, the base material substrate is a sapphire substrate,
Since the semiconductor layer is a silicon substrate, stress can be concentrated on the silicon layer, and generation of cracks in the nitride semiconductor can be suppressed.

The substrate for manufacturing a nitride semiconductor substrate according to the present invention comprises:
With such a configuration, the semiconductor layer covering a part of the main surface of the base material substrate is formed on the base material substrate, and the nitride semiconductor layer is formed on the semiconductor layer. And the occurrence of cracks in the nitride semiconductor can be further suppressed.

[0029]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 shows a nitride semiconductor substrate manufacturing base according to Embodiment 1 of the present invention. The sapphire substrate 1 has a diameter of 2 inches and a thickness of 400 μm, and has a plane orientation equivalent to (0001). On a sapphire substrate 1, a silicon layer 2 grown by a thermal chemical vapor deposition (hereinafter abbreviated as thermal CVD) apparatus is formed.
The plane orientation of the silicon layer 2 is a plane equivalent to (111).

Hereinafter, with reference to FIG. 2, a description will be given of a method of manufacturing the base material substrate, the nitride semiconductor layer, and the nitride semiconductor substrate shown in FIG.

The sapphire substrate 1 has a diameter of 2 inches and a thickness of 400 μm, and has a plane orientation equivalent to (0001) (FIG. 2A). A silicon layer 2 was grown on a sapphire substrate 1 by a thermal CVD apparatus. In this embodiment mode, a 0.1 μm thick crystal is grown at a substrate temperature of 1000 ° C. by using a thermal CVD method using silane gas. The plane orientation of the silicon layer 2 was a plane equivalent to (111) (FIG. 2B). Through the above steps, the nitride semiconductor substrate manufacturing base shown in FIG. 1 is completed.

Subsequently, the Al _0.1 Ga _0.9 N layer 3 was
m thickness metalorganic vapor phase epitaxy (hereinafter abbreviated as MOVPE)
Grown on equipment. The method for growing the Al _0.1 Ga _0.9 N layer 3 is not particularly limited, but ammonia is used as a group V raw material, and trimethylgallium and trimethylaluminum are used as II.
The substrate was grown at a substrate temperature of 1000 ° C. by MOVPE using a group I raw material (FIG. 2C). Al grown by the above process
The main surface of the _0.1 Ga _0.9 N layer 3 was a (0001) group III surface.

After the growth, in a step of lowering the substrate temperature to room temperature,
Stress due to the difference in thermal expansion coefficient between sapphire, silicon, and nitride semiconductor is generated in each layer.

In this embodiment, with the temperature lowered to room temperature,
Defects and sometimes cracks occurred in the silicon layer 2, and almost no cracks occurred in the sapphire substrate 1 and the Al _0.1 Ga _0.9 N layer 3 (FIG. 2D). In FIG. 2, only (d) is not hatched. By the above,
An Al _0.1 Ga _0.9 N layer 3 having almost no cracks was obtained.

Next, the sapphire substrate 1 and Al _0.1 Ga _0.9
A step of separating the N layer 3 was performed. Separation of the sapphire substrate 1 and the Al _0.1 Ga _0.9 N layer 3 was performed using a mixed solution of hydrofluoric acid and nitric acid.

Sapphire and GaN are composed of hydrofluoric acid and nitric acid.
Dissolves in the mixed solution of
The silicon layer 2 has disappeared. 2 inch diameter and 10 micron thickness
Al_0.1Ga_0.9An N substrate 3a was obtained (FIG. 2).
(E)). Thus, crack-free Al_0.1Ga_0.9
The N substrate 3a was obtained. Made by the above process
Al _0.1Ga_0.9The N substrate 3a is in contact with the silicon layer 2
The main surface (rear surface) on the other side is a (0001) V-group surface,
The opposite main surface (surface) was a (0001) group III surface.

FIG. 3 shows the stress distribution of each layer when the temperature is lowered by 1000 ° C. from the growth temperature in the present configuration. FIG. 3 shows that stress is concentrated on the silicon layer 2 which is the thinnest and has the smallest thermal expansion coefficient among the layers. With this configuration, the silicon layer 2 was provided with easy destructibility, and almost no cracks occurred in the Al _0.1 Ga _0.9 N layer 3 and the sapphire substrate 1.

In particular, since the coefficient of thermal expansion of the silicon layer 2 is smaller than the coefficient of thermal expansion of the sapphire substrate 1 and the coefficient of thermal expansion of the Al _0.1 Ga _0.9 N layer 3, stress concentrates on the silicon layer 2 and 2 can be easily cracked.

The method for forming the silicon layer 2 is CVD.
In addition, sputtering, laser ablation, bonding and etching, a combination thereof, and the like can be used, and there is no particular limitation.

It should be noted that the silicon layer 2 is provided with easy destructibility.
In other words, cracks are generated in the silicon layer 2 and destroyed.
The silicon layer 2 is sapphire substrate
1 to Al_0.1Ga_0.9Thinner than any of the N layers 3
Is good. The specific value of the silicon layer 2 is 0.01
It is sufficient if it is not less than μm and not more than 1 μm. Because
If the thickness of the silicon layer 2 is smaller than 0.01 μm,
Sapphire substrate 1 and Al _0.1Ga_0.9Between N layer 3
The silicon layer 2 is formed like a strained quantum well and cracks occur.
At the same time it becomes difficult to produce, the silicon layer by etching
2 removes, etchant goes around silicon layer 2
Is difficult to see and etching is difficult
And the thickness of the silicon layer 2 is larger than 1 μm.
In the case where the sapphire substrate 1 and the silicon layer 2
The crystallinity of the silicon layer 2 is deteriorated due to the child mismatch.
This is because a problem arises.

[0042] In the present embodiment has grown Al _0.1 Ga _0.9 N layer 3 on the silicon layer 2, Al _0.1 Ga
_0.9 instead of the N layer 3, other nitride semiconductor layer which nitrogen as the main component of the group V, for example, _{B x Al y Ga 1-xyz} In z N (0
≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ z ≦ 1), Al y Ga 1-yz
_{In z N 1-r As r} (0 ≦ y ≦ 1,0 ≦ z ≦ 1,0 ≦ r ≦
1) or _{Al y Ga 1-yz In z} N 1-r P r (0 ≦ y ≦
Needless to say, a layer composed of 1, 0 ≦ z ≦ 1, 0 ≦ r ≦ 1) or a laminated structure of these nitride semiconductor layers may be formed.

The growth of the silicon layer 2 and Al _0.1 Ga
_Although the growth of the _0.9 N layer 3 was performed in another growth furnace, the growth can be performed in the same furnace by sharing the raw material supply.

The surface of the Al _0.1 Ga _0.9 N substrate 3a,
Since both back surfaces are mirror surfaces, it is possible to form devices on either side.

The Al formed in this embodiment is
_{The 0.1} Ga _0.9 N substrate 3 a is very thin, 10 μm, and is easily broken depending on how to handle it.
Prior to separation of the Al _0.1 Ga _0.9 N layer, 3, Al _0.1
The sapphire substrate 1 and the Al _0.1 Ga _0.9 N layer 3 are bonded to the Ga _0.9 N layer 3 with an adhesive or the like that does not dissolve in a mixed solution of hydrofluoric acid and nitric acid.
May be provided.

(Embodiment 2) FIG. 4 shows a substrate for manufacturing a nitride semiconductor substrate according to Embodiment 2 of the present invention. FIG.
(A) is sectional drawing. The sapphire substrate 11 has a diameter of 2
Inch, thickness 400μm, plane orientation (0001)
Is equivalent to Thermal CVD on sapphire substrate 11
A silicon layer 12 having a thickness of 1 μm is formed by a method, and the silicon layer 12 is patterned. FIG. 4B is an enlarged view of the pattern when the silicon layer 12 is viewed from the upper main surface.

Hereinafter, a method for manufacturing the nitride semiconductor manufacturing substrate, a method for manufacturing the nitride semiconductor layer, and a method for manufacturing the nitride semiconductor substrate shown in FIG. 4 will be described with reference to FIG.

The sapphire substrate 11 has a diameter of 2 inches and a thickness of 400 μm, and has a plane orientation equivalent to (0001) (FIG. 5A). A silicon layer 12 was grown on a sapphire substrate 11 by a thermal CVD apparatus. Silicon layer 1
Although the method of forming No. 2 is not particularly limited, a 1-μm-thick crystal was grown at a substrate temperature of 1000 ° C. using a thermal CVD method using silane gas. The plane orientation of the silicon layer 12 was a plane equivalent to (111) (FIG. 5B).

Next, patterning of the silicon layer 12 was performed (FIG. 5C). Although the pattern is not particularly limited, a pattern shown in FIG. 5D was formed to form silicon dots (hereinafter, referred to as silicon dots 12a) for the purpose of uniformly applying stress in the plane. Increasing the pitch between the silicon dots reduces the contact area between GaN and sapphire and increases the concentration of stress on silicon. However, a problem arises in that the subsequent growth of GaN does not result in a continuous film with a desired film thickness. Therefore, preferably the silicon layer 1
2 and not more than 20 times the thickness of the subsequently stacked GaN layer 13. Although the smaller the size of the silicon dot, the smaller the contact area is, it is preferable. However, since patterning with a normal aligner or the like becomes difficult, the silicon dot is set to 5 μm in this embodiment. Preferable pitches and pattern widths are substantially the same for patterns such as stripes other than the dot pattern. Although the patterning method and the like are not particularly limited, a photoresist (not shown) having a desired shape is formed on the silicon layer 12 by photolithography, and the silicon layer 12 is formed by an acid containing hydrofluoric acid and nitric acid. Was etched (not shown). Through the above steps, the nitride semiconductor substrate manufacturing base shown in FIG. 4 is completed.

Subsequently, a GaN layer 1 having a thickness of 100 μm
3 was grown by a hydride vapor phase epitaxy (hereinafter abbreviated as HVPE) apparatus. The HVPE method was used in which GaCl formed by reacting Ga and HCl at 800 ° C. was used as a group III raw material.
The growth pressure is 1 atmosphere and the growth temperature is 1000 ° C.

At high temperatures, GaN hardly grows in contact with sapphire or silicon, and the growth rate is reduced.
Since the upper surface of the silicon layer 12 has a larger solid angle than the exposed surface of the sapphire substrate 11, nucleation of GaN is relatively likely to occur (FIG. 6A). Once the GaN nucleus 13a is formed on the silicon layer 12, the raw material has migrated because it is difficult to adhere on sapphire, but the raw material that has reached the GaN nucleus 13a is crystallized,
The GaN nucleus 13a increases at an accelerated rate (FIG. 6).
(B)). Finally, the GaN layer 13 is grown as a continuous film with little contact with sapphire (FIG. 6).
(C)). The main surface of the GaN layer 13 grown in the above steps was the (0001) Ga plane.

At room temperature, defects and sometimes cracks occurred in the silicon layer 12, and no cracks occurred in the sapphire substrate 11 and the GaN layer 13. Further, since the sapphire substrate 11 has a thickness of 400 μm and the GaN layer 13 has a thickness of 100 μm, both of them are warped, and some silicon is completely separated by cracks (FIG. 6). (D)). In FIG. 6D, hatching is omitted in order to clearly show a state such as a crack. Through the above steps, nitride semiconductor layer 13 having almost no cracks is formed.

Next, the sapphire substrate 11 and the GaN layer 1
3 was completely separated. Sapphire substrate 1
1 and the GaN layer 13 were separated using a mixed solution of hydrofluoric acid and nitric acid.

Since sapphire and GaN are not dissolved in a mixed solution of hydrofluoric acid and nitric acid but only silicon is dissolved, the silicon layer 12 disappears and has a diameter of 2 inches and a thickness of 100 inches.
A micron GaN substrate 13b was obtained (FIG. 7). 100 μm like the GaN substrate 13b in the present embodiment.
With this thickness, a GaN substrate having a diameter of 2 inches can be obtained which is self-supporting even in the film formation, etching and heating steps in device fabrication. In addition, a preferable thickness of the substrate for forming a device is 2 μm or more and 30 μm or more, more preferably 60 μm.
m or more.

When the silicon layer 12 is not a continuous film as in this embodiment, the thickness of the silicon layer 12 and the sapphire substrate 11 Is important, and the value obtained by multiplying the film thickness of the silicon layer 12 by the coverage should be smaller than the thickness of the GaN layer 13 or the thickness of the sapphire substrate 11.

Even if the silicon layer 12 is removed by etching and the sapphire substrate 11 and the GaN layer 13 are not separated, almost no cracks occur in the GaN layer 13. A semiconductor device can be formed.

In the present embodiment, the raw materials consumed for manufacturing the GaN substrate 13b include a small amount of silane gas for growing the silicon layer 12 by 1 μm crystal and a small amount of hydrofluoric acid for etching the 1 μm silicon layer. Since only nitric acid is used, the amount of raw materials used can be significantly reduced as compared with the case where the entire substrate is polished or etched. That is, the sapphire substrate 11 can be reused.

The shape of the silicon dot 12a viewed from above is not limited to the circle shown in the above embodiment, but may be a square (FIG. 8 (a)) or a rectangle (FIG. 8 (a)) as shown in FIG. b)), regular hexagons (FIG. 8C), stripes (FIG. 8D), and the like.

The sectional shape of the silicon dot 12a is not limited to the rectangle shown in the above embodiment, but may be a trapezoid (FIG. 9A) or a triangle (FIG. 9A) as shown in FIG.
(B)) and the like.

(Embodiment 3) FIG. 10 shows a nitride semiconductor substrate manufacturing base according to Embodiment 3 of the present invention. FIG. 10A is a cross-sectional view. The sapphire substrate 21 has a diameter of 4 inches, a thickness of 500 μm, and a plane orientation of (000).
This is a plane equivalent to 1). Heat C on the sapphire substrate 21
The silicon layer 22 formed by the VD method is formed to have a thickness of 0.1 μm. On the silicon layer 22, an AlN buffer layer 31 formed by the MOVPE method is formed to have a thickness of 0.2 μm.
The GaN buffer layer 32 formed by the method has a thickness of 2 μm. Silicon layer 22, AlN buffer layer 31, GaN
The buffer layer 32 is patterned. FIG.
(B) is an enlarged view of the pattern when the GaN buffer layer 32 is viewed from the upper main surface.

Hereinafter, a method for manufacturing the nitride semiconductor manufacturing substrate, a method for manufacturing the nitride semiconductor layer, and a method for manufacturing the nitride semiconductor substrate shown in FIG. 10 will be described with reference to FIG.

The sapphire substrate 21 has a diameter of 4 inches and a thickness of 500 μm, and has a plane orientation equivalent to (0001) (FIG. 11A). The silicon layer 22 was grown on the sapphire substrate 21 by a thermal chemical vapor deposition (hereinafter abbreviated as thermal CVD) apparatus. The method for forming the silicon layer 22 is not particularly limited.
The substrate was grown at a substrate temperature of 1000 ° C. to a thickness of 0.1 μm using a VD method. The plane orientation of the silicon layer 22 is (1
11) (FIG. 11B).

Subsequently, a nitride semiconductor layer was grown. Using MOVPE method, GaN is in contact with the silicon layer
The AlN layer is easier to adhere than the AlN layer.
At 00 ° C., an AlN buffer layer 31 was grown at 0.2 μm, and subsequently a GaN buffer layer 32 was grown at 2 μm (FIG. 1).
1 (c)). GaN buffer layer 3 grown by the above steps
The main surface of No. 2 was a (0001) Ga plane. Hereinafter, the sapphire substrate 21 on which any layer is formed is simply referred to as a substrate.

The substrate is taken out of the MOVPE furnace, and then
The AlN buffer layer 31, the GaN buffer layer 32, and the silicon layer 22 were patterned. (FIG. 12 (a))
Although the pattern is not particularly limited, the pattern shown in FIG. 12B was formed for the purpose of uniformly applying stress in the plane. Although the patterning method is not particularly limited, a photoresist having a desired shape is formed on the GaN buffer layer 32 by photolithography, and etching is performed by reactive ion etching using BCl ₃ as an etching gas. . The pressure was 3 Pa, and the high frequency power for generating plasma was 200 W. Since BCl ₃ can etch GaN, AlN, and silicon at almost the same rate, etching was performed for a time to etch up to silicon. Since sapphire has an extremely low etching rate of about 1/10 that of GaN, sapphire is hardly etched. The preferred pattern shape is almost the same as the situation described in the second embodiment.

Through the above steps, the substrate for manufacturing a nitride semiconductor substrate shown in FIG. 10 is completed.

Subsequently, a GaN layer 2 having a thickness of 500 μm was formed.
3 was grown by a hydride vapor phase epitaxy (hereinafter abbreviated as HVPE) apparatus. The growth conditions and the like are the same as in the second embodiment. Since the GaN buffer layer 32 already exists, the GaN layer 23 grows around the nucleus (FIG. 13A). Subsequently, the growth was performed to 500 μm (FIG. 13B).
The main surface of the GaN layer 23 grown in the above process is (000
1) It was a Ga face.

At room temperature, cracks occur in the silicon layer 22 and the sapphire substrate 21 and the GaN layer 23
Had almost no cracks. Further, since the sapphire substrate 21 has a thickness of 500 μm and the GaN layer 23 has a thickness of 500 μm, both of them are warped, and a part of the silicon layer 22 is completely separated by cracks ( FIG. 13 (c)).

Next, the sapphire substrate 21 and the GaN layer 23
Was completely separated. Sapphire substrate 21
And GaN layer 23 were separated using a mixed solution of hydrofluoric acid and nitric acid. Sapphire and GaN were not dissolved in a mixed solution of hydrofluoric acid and nitric acid, only silicon was dissolved, and silicon layer 22 disappeared. A GaN substrate 23a having a diameter of 4 inches and a thickness of about 500 μm was obtained (FIG. 13D).

Since the AlN buffer layer 31 is adhered to the GaN substrate 23a, the AlN buffer layer 31 is removed by polishing or the like.
The N buffer layer 31 may be removed.

Even if a step of polishing the AlN buffer layer 31 is added, the time required for polishing and the material cost can be reduced because the AlN buffer layer 31 in this case is very thin. Further, as in the second embodiment, the raw material consumed for manufacturing the GaN substrate 23a is such that the silicon layer 22 has a thickness of 0.1 μm.
a few silane gases for growth and 0.1μ thickness
Since only a small amount of hydrofluoric acid and nitric acid for etching the m-type silicon layer 22 was used, the amount of raw materials used could be significantly reduced as compared with the case where the entire substrate was polished or etched.

In the third embodiment, since the GaN buffer layer 32 of a certain size already exists at the initial stage of HVPE growth, the raw material is
2 and there is no decrease in the growth rate as in the initial stage of growth of the second embodiment. Therefore, if the film thickness is the same, the growth time can be shorter than in the second embodiment.

In the third embodiment, the sapphire substrate 21 does not suffer any damage or the deposition of contaminants during the substrate manufacturing process.
Can be reused to produce a GaN substrate. Therefore, it is possible to remarkably reduce the raw material cost for manufacturing the nitride semiconductor substrate.

In addition to the sapphire substrate, the silicon layer and the nitride semiconductor layer described in the first to third embodiments, for example, combinations shown in Table 1 below can be used.

[0074]

[Table 1]

[0075]

As described above, according to the method for manufacturing a nitride semiconductor layer of the present invention, it is possible to obtain a nitride semiconductor of good crystal quality with reduced warpage, cracks and distortion, and In order to obtain a substrate, a method of manufacturing a thick film and a nitride semiconductor device having good characteristics with reduced distortion can be manufactured.

Further, according to the method of manufacturing a nitride semiconductor substrate of the present invention, it is possible to provide a substrate made of a good crystalline nitride semiconductor with reduced warpage and distortion at low cost.

[Brief description of the drawings]

FIG. 1 is a sectional view of a substrate for manufacturing a nitride semiconductor substrate according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a method for manufacturing a nitride semiconductor layer and a nitride semiconductor substrate according to the first embodiment of the present invention.

FIG. 3 is a diagram illustrating a relationship between strains of respective layers according to the first embodiment of the present invention.

FIG. 4 is a sectional view of a substrate for manufacturing a nitride semiconductor substrate according to a second embodiment of the present invention.

FIG. 5 is a sectional view illustrating a method for manufacturing a nitride semiconductor layer and a nitride semiconductor substrate according to a second embodiment of the present invention.

FIG. 6 is a sectional view illustrating a method for manufacturing a nitride semiconductor layer and a nitride semiconductor substrate according to the second embodiment of the present invention.

FIG. 7 is a sectional view of a nitride semiconductor substrate obtained by the manufacturing method according to the second embodiment of the present invention.

FIG. 8 is a diagram illustrating an example of a silicon dot according to the second embodiment of the present invention.

FIG. 9 is a sectional view illustrating an example of a silicon dot according to the second embodiment of the present invention.

FIG. 10 is a sectional view of a substrate for manufacturing a nitride semiconductor substrate according to a third embodiment of the present invention.

FIG. 11 is a sectional view illustrating a method for manufacturing a nitride semiconductor layer and a nitride semiconductor substrate according to the third embodiment of the present invention.

FIG. 12 is a cross-sectional view illustrating a method for manufacturing a nitride semiconductor layer and a nitride semiconductor substrate according to the third embodiment of the present invention.

FIG. 13 is a sectional view illustrating a method for manufacturing a nitride semiconductor layer and a nitride semiconductor substrate according to the third embodiment of the present invention.

[Explanation of symbols]

1, 11, 21 sapphire substrate 2,12,22 silicon layer 3 Al _0.1 Ga _0.9 N layer 3a Al _0.1 Ga _0.9 N substrate 12a silicon dots 13, 23 GaN layer 13a GaN nuclei 13b, 23a GaN substrate 31 AlN buffer layer 32 GaN Buffer layer

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F041 AA40 CA33 CA34 CA35 CA40 CA46 CA64 CA65 CA74 CA77 5F045 AA03 AA04 AB02 AB09 AB14 AB17 AB19 AC01 AC08 AC12 AD14 AF09 AF13 BB08 BB13 DA51 DA53 DA69 HA13 HA14

Claims (20)

[Claims] Providing a semiconductor layer on a base material substrate;
Providing a nitride semiconductor layer on the semiconductor layer to cause defects in the semiconductor layer. Providing a semiconductor layer on a base material substrate;
Forming a nitride semiconductor layer on the semiconductor layer on a part of a main surface of the base material substrate. 3. The method for manufacturing a nitride semiconductor layer according to claim 2, wherein the step of providing the semiconductor layer makes the semiconductor layer circular, polygonal, or striped when viewed from the top surface of the base material substrate. 4. The method for manufacturing a nitride semiconductor layer according to claim 2, wherein the step of providing the semiconductor layer has a rectangular, trapezoidal, or triangular shape when viewed from a cross section of the base material substrate. 5. The method according to claim 1, wherein the step of providing the semiconductor layer includes the step of forming a semiconductor layer having a smaller coefficient of thermal expansion than any of the coefficient of thermal expansion of the base material substrate and the coefficient of thermal expansion of the nitride semiconductor layer. The method for producing a nitride semiconductor layer according to claim 1 or 2. 6. The base material substrate is a sapphire substrate,
The method according to claim 5, wherein the semiconductor layer is a silicon layer. 7. The method according to claim 6, wherein the thickness of the silicon layer is 0.01 μm or more and 1 μm or less. 8. The method according to claim 1, wherein the defect is a crack. 9. A step of providing a semiconductor layer on a base material substrate;
Providing a first nitride semiconductor layer on the semiconductor layer; removing a part of the semiconductor layer and the first nitride semiconductor layer until the base material substrate is exposed; Growing a second nitride semiconductor layer on the nitride semiconductor layer. 10. A step of providing a semiconductor layer on a base material substrate, a step of providing a nitride semiconductor layer on the semiconductor layer to cause a defect in the semiconductor layer, a step of providing the base material substrate and the nitride semiconductor layer Separating a nitride semiconductor substrate. 11. The crack according to claim 10, wherein the defect is a crack.
The method for producing a nitride semiconductor layer according to the above. 12. A step of providing a semiconductor layer on a base material substrate, a step of providing a nitride semiconductor layer on the semiconductor layer on a part of a main surface of the base material substrate, and providing the base material substrate and the nitride Separating a semiconductor layer. 13. The step of providing the semiconductor layer includes the step of forming a semiconductor layer having a smaller coefficient of thermal expansion than any of the coefficient of thermal expansion of the base material substrate and the coefficient of thermal expansion of the nitride semiconductor layer. 13. The method for manufacturing a nitride semiconductor substrate according to 10 or 12. 14. The method according to claim 10, wherein the base material substrate is a sapphire substrate, and the semiconductor layer is a silicon layer. 15. A step of providing a semiconductor layer on a base material substrate, a step of providing a first nitride semiconductor layer on the semiconductor layer, and forming a part of the semiconductor layer and part of the first nitride semiconductor layer. Removing the base material substrate until it is exposed, growing a second nitride semiconductor layer on the first nitride semiconductor layer, and removing the base material substrate and the second nitride semiconductor layer. And a method of manufacturing a nitride semiconductor substrate. 16. A substrate for manufacturing a nitride semiconductor substrate, comprising a base material substrate provided with a semiconductor layer thinner and more defective than the base material substrate. 17. The nitride semiconductor substrate according to claim 16, wherein the semiconductor layer is a layer having a smaller coefficient of thermal expansion than any of the coefficient of thermal expansion of the base material substrate and the coefficient of thermal expansion of the nitride semiconductor layer. Substrates for manufacturing. 18. The substrate according to claim 16, wherein the base material substrate is a sapphire substrate, and the semiconductor layer is a silicon substrate. 19. The nitride semiconductor according to claim 16, wherein a semiconductor layer covering a part of the main surface of the base material substrate is formed on the base material substrate, and a nitride semiconductor layer is formed on the semiconductor layer. Substrate for substrate production. 20. The crack according to claim 16, wherein the defect is a crack.
A substrate for producing a nitride semiconductor substrate according to the above.