JP2002209094A - Image forming apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image forming apparatus that can maintain brightness of an image even when image data are of pseude halftone by providing a dot addition means that maintains brightness of the image in the case of converting image data with low resolution into data with apparently high resolution. SOLUTION: The image forming apparatus is provided with the dot addition means (S6, S14) that increases the number of dots of an image per unit area, and forms the image by dots. The apparatus is provided with an identification means (S2) that identifies whether the image data are binary data or pseudo halftone image data. When the identification means (S2) discriminates that the image data are of pseudo halftone, the dot addition means (S6) maintains the brightness of the image.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an image forming apparatus such as a facsimile machine, a copying machine, and a printer.

[0002]

2. Description of the Related Art The resolution of an image is important for achieving high image quality in a facsimile machine, a copying machine, and the like. For example,
In a laser printer or the like, the resolution of an image is realized not by the dot size but by the interval between dots. When a printer has high resolution and prints low-resolution image data, as shown in FIGS. 5A and 5B, a low-resolution (for example, 200 dpi (dots per inch)
)), The pixels (dots) of the image data are overlapped, converted to an apparently high resolution (for example, 400 dpi), and printed.

[0003]

However, when the image data is binary data such as characters, even if pixels (dots) are overlapped, jaggies (jaggies) are rather eliminated, and a smooth image can be obtained. Although this does not cause much problem, if the image data is data subjected to pseudo halftone processing (dither, error diffusion) and printing is performed by overlapping pixels, a black image is formed. . This is because the resolution is realized by the interval between dots as described above.
This is because the image shown in (c) becomes as shown in FIG. 5D, and the black dots added in duplicate fill the white portions between the dots.

The present invention has been made in view of the above circumstances, and in the first invention, when low-resolution image data is apparently converted to high-resolution and printed, the brightness of the image is maintained. It is an object of the present invention to provide an image forming apparatus which can maintain the brightness of an image even when the image data is pseudo halftone data, by providing the dot adding means.

According to the second aspect of the invention, by providing an input unit for inputting whether the image data is binary data or pseudo halftone data from the outside, the image data is binary data or pseudo halftone data. It is an object of the present invention to provide an image forming apparatus for identifying data. A third object of the present invention is to provide an image forming apparatus for identifying, from acquired image data, whether the image data is binary data or pseudo halftone data.

[0006]

According to a first aspect of the present invention, there is provided an image forming apparatus including dot adding means for increasing the number of dots per unit area of an image. Whether it is binary data
An identification means for identifying whether the data is pseudo halftone data,
When the image data is identified as pseudo halftone data by the identification means, the dot addition means is adapted to maintain the brightness of the image.

In this image forming apparatus, an image is formed by dots, and the dot adding means increases the number of dots per unit area of the image. The identification means identifies whether the image data is binary data or pseudo halftone data. If the identification means identifies that the image data is pseudo halftone data, the dot addition means outputs The brightness of the image is maintained by increasing the number of dots. This realizes an image forming apparatus capable of maintaining the brightness of an image even when the image data is pseudo halftone data when the low-resolution image data is apparently converted to a high resolution and printed. I can do it.

According to a second aspect of the present invention, in the image forming apparatus, the identification unit includes an input unit for inputting whether the image data is binary data or pseudo halftone data from the outside, and the input unit inputs the image data. The image data is 2 based on the obtained signal.
It is characterized by identifying whether it is value data or pseudo halftone data.

In this image forming apparatus, the input means inputs from the outside whether the image data is binary data or pseudo halftone data, and the identification means outputs the image based on the signal input from the input section. It identifies whether the data is binary data or pseudo halftone data. Thus, an image forming apparatus capable of identifying whether image data is binary data or pseudo halftone data, and maintaining the brightness of an image when the image data is identified as pseudo halftone data. Can be realized.

An image forming apparatus according to a third aspect of the invention is characterized in that the identification means identifies whether the image data is binary data or pseudo halftone data from the acquired image data.

In this image forming apparatus, the identification means identifies whether the image data is binary data or pseudo halftone data from the acquired image data, so that the image data is pseudo halftone data. At any time, an image forming apparatus capable of maintaining the brightness of an image can be realized.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings showing an embodiment. FIG. 1 is a block diagram showing a main configuration of a facsimile apparatus which is an embodiment of an image forming apparatus according to the present invention. This facsimile apparatus includes a main control unit 1, a reading unit 2, a recording unit 3, a display unit 4, an operation unit 5, a ROM 6, a RAM 7, an image memory 8, a resolution conversion unit 9, a modem 10, an NCU (Network Control Unit) 1.
1 are connected to each other via a bus 12.

The main control unit 1 is specifically constituted by a CPU. The main control unit 1 controls each of the above-described hardware units of the facsimile apparatus via a bus 12 and has a ROM 6.
Performs various software functions according to the computer program stored in the. The reading unit 2 is, for example, C
An original is read by a scanner using a CD, and binary or pseudo halftone dot image data is output. Recorder 3
Is a laser printer which prints out image data received by facsimile communication or image data of a document read by the reading unit 2 as a hard copy.

The display unit 4 is a display device such as a liquid crystal display device or a CRT display, and displays the operation state of the facsimile machine, and displays image data of a document read or transmitted for transmission. Operation unit 5
Is a character key, a numeric keypad, a speed dial key, a one-touch dial key, an input key (input unit) for inputting a distinction between binary data of image data / pseudo halftone data, and various kinds of keys required for operating the facsimile apparatus. Function keys and the like. It should be noted that, if the display unit 4 is a touch panel type, some or all of the various keys of the operation unit 5 can be substituted.

The ROM 6 stores various software programs necessary for the operation of the facsimile machine in advance. The RAM 7 is configured by an SRAM, a flash memory, or the like, and stores temporary data generated when executing software. The image memory 8 is composed of a DRAM or the like, and stores image data to be transmitted or received image data. The resolution conversion unit 9 is a dot addition unit. When printing image data read from the image memory 8, the resolution conversion unit 9 apparently converts the resolution by adding the number of dots per unit area to the image data. Then, the converted image data is provided to the recording unit 3. Image memory control unit 13
Controls writing / reading of the image memory 8 based on the control from the main control unit 1.

The modem 10 comprises a facsimile modem capable of performing facsimile communication. Also, the modem 10
Are directly connected to the NCU 11 similarly connected to the bus 12. The NCU 11 is hardware for performing operations of connecting and disconnecting the analog line L with the public telephone line network, and connects the modem 10 to the public telephone line network as needed.

FIG. 2 is a block diagram showing an example of a configuration of a main part of the resolution converter 9. Each time one line of image data is processed, the resolution conversion unit 9 counts one pulse given from the main control unit 1 via the bus 12, and counts 0 when an even number is counted and 1 when an odd number is counted. , An inverter 20 for inverting the output of the line counter 14, a 0 when the image data is pseudo halftone data, a 1 when the image data is binary data, and a bus 12 respectively. , A register 19 provided from the main control unit 1 and continuously outputting a given data value, and an OR circuit 15 provided to the input terminals of the outputs of the inverter 20 and the register 19, respectively.

The resolution conversion unit 9 receives parallel image data addressed to 8 bits from the image memory 8 via the bus 12 and applied to one input terminal addressed to 1 bit. Eight AND circuits 16 whose outputs are respectively provided to the other input terminals, eight latch circuits 17 which are provided with respective outputs of the eight AND circuits 16, and an output of the register 19 are respectively provided to one input terminal , And eight AND circuits 18 each receiving the output of the latch circuit 17 at the other input terminal. The output of the eight latch circuits 17 and the output of the eight AND circuits 18 are provided. Are alternately arranged to output 16-bit parallel image data.

The operation of the facsimile apparatus having such a configuration will be described below with reference to the flowchart of FIG. (Processing of pseudo halftone data) The main control unit 1
When printing low-resolution image data of 0 dpi, the signal input from the operation unit 5 for identifying binary data / pseudo halftone data of image data indicates pseudo halftone data (S2). After giving 0 to the register 19 (S3), one pulse is given to the line counter 14, and a read command is given to the image memory control unit 13, so that 8-bit (dot) parallel image data from the image memory 8 is read. Read and give one bit to each AND circuit 16 (S
4).

At this time, since the output of the inverter 20 is 0 and the output of the register 19 is 0, the output of the OR circuit 15 is 0, and each output of the AND circuit 16 is 0 regardless of the value of the image data. Becomes Accordingly, each output of the latch circuit 17 is also 0, and each output of the AND circuit 18 is also 0. From the resolution conversion section 9, all bits (dots) are 0,
For example, 16-bit parallel image data having an apparently high resolution of 400 dpi is output (S6). Here, when the bit (dot) is 0, it is a white dot, and when the bit (dot) is 1, it is a black dot.

Next, if the processing of the image data for one line has not been completed (S8), the main control unit 1 gives a read command to the image memory control unit 13 and sends the next 8 bits from the image memory 8. The (dot) parallel image data is read out and given to each AND circuit 16 by 1 bit (S4).

At this time, the output of the inverter 20 is 0,
Since the output of the register 19 is 0, the output of the OR circuit 15 is 0, and each output of the AND circuit 16 is also 0 regardless of the value of the image data. Accordingly, each output of the latch circuit 17 is also 0, and each output of the AND circuit 18 is also 0. From the resolution conversion section 9, all bits (dots) are 0, and the resolution is apparently 400 dpi, for example. 1
6-bit parallel image data is output (S
6). The main control unit 1 repeats the above operation until the processing of the image data for one line is completed (S8). From the resolution conversion unit 9, all the bits (dots) of one line are 0, and The image data which is a dot is output.

Next, when the processing of the image data for one line is completed (S8), the main control unit 1 determines whether the processing of the image data in the image memory 8 is completed (S10).
If not completed, one pulse is given to the line counter 14 (S22), and a read command is given to the image memory control unit 13. At this time, 8 bits (from the image memory 8) of the same address as the previous one line ( The parallel image data of (dot) is read out and given to each AND circuit 16 by 1 bit (S4). The image memory control unit 13 controls the image memory 8 so as to read out one line of image data twice.

At this time, since the output of the inverter 20 is 1 and the output of the register 19 is 0, the output of the OR circuit 15 becomes 1 and each output of the AND circuit 16 becomes the value of the image data. Therefore, each output of the latch circuit 17 also becomes the value of the image data, each output of the AND circuit 18 becomes 0, and from the resolution conversion section 9, each value of the image data and 0 are alternately arranged in the main scanning direction. For example, 16-bit parallel image data having an apparently high resolution of, for example, 400 dpi is output (S6).

Next, if the processing of the image data for one line has not been completed (S8), the main control unit 1 gives a read command to the image memory control unit 13 and sends the next eight bits from the image memory 8. The (dot) parallel image data is read out and given to each AND circuit 16 by 1 bit (S4).

At this time, the output of the inverter 20 is 1,
Since the output of the register 19 is 0, the output of the OR circuit 15 is 1, and each output of the AND circuit 16 is the value of the image data. Therefore, each output of the latch circuit 17 also becomes the value of the image data, and each output of the AND circuit 18 becomes 0,
The resolution converter 9 outputs 16-bit parallel image data having an apparently high resolution of, for example, 400 dpi, in which each value of image data and 0 are alternately arranged in the main scanning direction (S6).

The main controller 1 repeats the above operation until the processing of the image data for one line is completed (S8), and the resolution converter 9 outputs each value of the image data and 0 in the main scanning direction. One line of image data alternately arranged is output. Next, when the processing of the image data for one line is completed (S8), the main controller 1 determines whether the processing of the image data in the image memory 8 is completed (S10), and processes the image data. The above operation is repeated until is completed (S10).

As a result, for example, image data as shown in FIG. 4A is converted into image data as shown in FIG. 4B, and the resolution conversion unit 9 outputs all white dots. For example, image data having an apparently high resolution of 400 dpi, which is composed of a certain line and a line in which each dot and white dot of the image data are alternately arranged in the main scanning direction, is output and given to the recording unit 3. Printed.

(Processing of Binary Data) In the main control unit 1, a signal input from the operation unit 5 for identifying binary data / pseudo halftone data of image data indicates binary data. At this time (S2), 1 is given to the register 19 (S1
1) After that, one pulse is given to the line counter 14 (S2).
0), giving a read command to the image memory control unit 13,
8-bit (dot) parallel image data is read from the image memory 8 and given to each AND circuit 16 by 1 bit (S12).

At this time, since the output of the inverter 20 is 0 and the output of the register 19 is 1, the output of the OR circuit 15 becomes 1 and each output of the AND circuit 16 becomes the value of image data. Therefore, each output of the latch circuit 17 also becomes the value of the image data, each output of the AND circuit 18 also becomes the value of the image data, and the values of each image data are shifted from the resolution conversion unit 9 in the main scanning direction and overlap. For example, 16-bit parallel image data having an apparently high resolution of 400 dpi is output (S14).

Next, if the processing of the image data for one line has not been completed (S16), the main control unit 1 gives a read command to the image memory control unit 13 so that the next 8 bits (Dot) parallel image data is read out and given to each AND circuit 16 by 1 bit (S1).
2).

At this time, the output of the inverter 20 is 0,
Since the output of the register 19 is 1, the output of the OR circuit 15 becomes the value of the image data, and each output of the AND circuit 16 also becomes the value of the image data. Therefore, each output of the latch circuit 17 also becomes the value of the image data, each output of the AND circuit 18 also becomes the value of the image data, and the values of each image data are shifted from the resolution conversion unit 9 in the main scanning direction and overlap. For example, 40
16-bit parallel image data having an apparently high resolution of 0 dpi is output (S14). Main control unit 1
Is repeated until the processing of one line of image data is completed (S16), and the resolution converter 9 outputs one line of image data in which each image data is shifted and overlapped in the main scanning direction. Is done.

Next, when the processing of the image data for one line is completed (S16), the main controller 1 determines whether or not the processing of the image data in the image memory 8 is completed (S1).
8) If not completed, one pulse is given to the line counter 14 and a read command is given to the image memory control unit 13. At this time, 8 bits (from the image memory 8) of the same address as the previous one line ( The dot (dot) parallel image data is read out and given to each AND circuit 16 for one bit (S12). The image memory control unit 13 controls the image memory 8 so as to read out one line of image data twice.

At this time, since the output of the inverter 20 is 1 and the output of the register 19 is 1, the output of the OR circuit 15 becomes 1 and each output of the AND circuit 16 becomes the value of the image data. Therefore, each output of the latch circuit 17 also becomes the value of the image data, and each output of the AND circuit 18 also becomes the value of the image data. From the resolution conversion section 9, each image data is shifted in the main scanning direction and overlaps, for example, 400 dpi. The 16-bit parallel image data having an apparently high resolution is output (S14).

Next, if the processing of the image data for one line has not been completed (S16), the main control unit 1 gives a read command to the image memory control unit 13 and sends the next 8 bits from the image memory 8. (Dot) parallel image data is read out and given to each AND circuit 16 by 1 bit (S1).
2).

At this time, the output of the inverter 20 is 1,
Since the output of the register 19 is 1, the output of the OR circuit 15 becomes 1, and each output of the AND circuit 16 becomes the value of the image data. Therefore, each output of the latch circuit 17 also becomes the value of the image data, and each output of the AND circuit 18 also becomes the value of the image data. From the resolution conversion section 9, each image data is shifted in the main scanning direction and overlaps, for example, 400 dpi. The 16-bit parallel image data having an apparently high resolution is output (S14).

The main controller 1 repeats the above operation until the processing of one line of image data is completed (S16), and from the resolution converter 9, each image data is shifted and overlapped in the main scanning direction. The image data for the line is output. Next, when the processing of the image data for one line is completed (S16), the main controller 1 determines whether the processing of the image data in the image memory 8 is completed (S18), and processes the image data. The above operation is repeated until is completed (S18).

As a result, for example, image data as shown in FIG. 5C is converted into image data as shown in FIG. 5D. Image data having an apparently high resolution of, for example, 400 dpi, which is superimposed in the main scanning direction and the sub-scanning direction, is output, provided to the recording unit 3, and printed.

In the above-described embodiment, whether the image data is binary data or pseudo halftone data is input by the input means, but the header information received together with the image data by facsimile transmission is input. Includes information indicating whether the image data is binary data or pseudo halftone data, the header information can be followed. Furthermore, it may be determined whether the image data is binary data or pseudo halftone data based on the characteristics of the acquired image data (for example, the number of black and white transition points in the image data). In addition, from both the input by the input means and the characteristics of the acquired image data,
It may be determined whether the data is pseudo halftone data. In this case, it is possible to more accurately determine whether the data is pseudo halftone data.

[0040]

According to the image forming apparatus of the first invention,
In the case where low-resolution image data is apparently converted to high-resolution and printed, an image forming apparatus capable of maintaining the brightness of an image even when the image data is pseudo halftone data can be realized. .

According to the image forming apparatus of the second invention, it is determined whether the image data is binary data or pseudo halftone data. An image forming apparatus capable of maintaining brightness can be realized.

According to the image forming apparatus of the third aspect, it is possible to realize an image forming apparatus capable of maintaining the brightness of an image even when the image data is pseudo halftone data.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a main part of a facsimile apparatus that is an embodiment of an image forming apparatus according to the present invention.

FIG. 2 is a block diagram illustrating a configuration example of a main part of a resolution conversion unit.

FIG. 3 is a flowchart showing an operation of the facsimile apparatus which is an embodiment of the image forming apparatus according to the present invention.

FIG. 4 is an explanatory diagram for explaining an operation of the image forming apparatus according to the present invention.

FIG. 5 is an explanatory diagram for explaining an operation of the image forming apparatus.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Main control part (identification means) 2 Reading part 3 Recording part 5 Operation part (input part) 8 Image memory 9 Resolution conversion part (dot addition means) 12 Bus 13 Image memory control part 14 Line counter 15 OR circuit 16, 18 AND circuit 17 Latch circuit 19 Register

Claims (3)

[Claims] 1. An image forming apparatus comprising a dot adding means for increasing the number of dots per unit area of an image, wherein the image data is binary data or pseudo halftone data. Image forming means for identifying the image data, and when the image data is identified as pseudo halftone data, the dot adding means is adapted to maintain the brightness of the image. apparatus. 2. The image processing apparatus according to claim 1, wherein the identification unit includes an input unit that externally inputs whether the image data is binary data or pseudo halftone data, and the image data is input based on a signal input from the input unit. 2. The image forming apparatus according to claim 1, wherein the image forming apparatus is configured to identify whether the data is binary data or pseudo halftone data. 3. The image forming apparatus according to claim 1, wherein the identification unit identifies whether the image data is binary data or pseudo halftone data from the acquired image data.