JP2002204396A - Pixel correction apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the number of registers with an effective usage of the registers storing position data of defective pixels of a solid imaging element. SOLUTION: In a pixel correction apparatus, a storage means 5 to store position data of defective pixels of a CCD, a counter 20 to count scanning positions of the CCD and a register group 3 to temporally store the position data of the storage means 5 are equipped, when the outputs from the group 3 match the outputs from the counter 20, scanned outputs from the CCD are corrected to detect a register having position data whose defective pixels have already completed the corrections, so that defective position data of the register whose corrections have completed is successively renewed to position data of the defective pixel to be corrected next in order.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a correction device for a defective pixel included in an image sensor, and more particularly to a device for holding position data of a defective pixel.

[0002]

2. Description of the Related Art A conventional device for correcting a defective pixel included in a solid-state image pickup device includes a counter for counting the scanning position of the solid-state image pickup device and position data of the defective pixel as disclosed in Japanese Patent Application Laid-Open No. 63-86972. A register for temporarily storing the contents from the storage means, comparing the output of the register with the value of the counter, and correcting the scan output of the solid-state imaging device when they match, each time a defective pixel is corrected, Pixel correction has been performed in which the position data of the defective pixel is read from the storage means, and the defective pixel is corrected while being set in the temporary storage register.

[0003]

As described above, in the pixel correction device for a solid-state image pickup device, each time a defective pixel is corrected, the position data of the defective pixel is read out from the EEPROM which is the storage means, and is stored in a register for temporarily storing the data. Since the setting, it takes a predetermined time until the setting, when trying to correct a plurality of defective pixels during the horizontal scanning period of the solid-state imaging device,
It is necessary to limit the horizontal scanning time to a predetermined value or less, which poses a problem in a system in which imaging is to be performed within the predetermined time, and also limits the number of defective pixels that can be corrected during the horizontal scanning period. Defective pixels of the solid-state imaging device are generated due to the manufacturing process, cosmic ray irradiation, etc., and it is highly possible that a plurality of defective pixels are generated during the horizontal scanning period of the solid-state imaging device. The problem of not being able to do it occurs.

On the other hand, in order to solve this problem, as is well known, the number of registers for temporarily storing position data of defective pixels is increased by a number corresponding to a predetermined maximum number of defective pixels to be corrected for one screen. Obviously, it is sufficient to provide them.
However, in this method, when the number of pixels of the solid-state imaging device increases, the number of defective pixels to be corrected inevitably increases, and the circuit scale of the register that temporarily stores the position data of the corresponding defective pixel increases. There was a problem of becoming.

[0005]

In order to solve the above-mentioned problems, a pixel correction apparatus according to the present invention comprises a storage unit for storing position data of a defective pixel included in an image sensor as horizontal and vertical scanning positions; A counter for counting the scanning position of the image sensor, a register for temporarily storing the position data of the storage means, and a comparison between the position data of the defective pixel output from this register and the count value output from the counter, In a pixel correction device that corrects a scan output of an image sensor, a register detection unit that detects a register having position data of a defective pixel for which correction of the defective pixel has been completed,
The position data of the defective pixel in the register whose correction has been completed is sequentially updated to the position data of the defective pixel to be corrected next.

According to the present invention, it is possible to provide an optimal pixel correction device for an image pickup device in which the size of a register group for temporarily storing position data of a defective pixel is suppressed.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A pixel correcting apparatus according to the present invention comprises a storage means for storing position data of a defective pixel included in an image sensor as horizontal and vertical scanning positions, a counter for counting the scanning position of the image sensor, and a counter. A register for temporarily storing position data of the storage means, a pixel correction device for comparing position data of a defective pixel output from the register with a count value output from the counter, and correcting a scan output of the image sensor when they match. A register detecting means for detecting a register having the position data of the defective pixel for which the correction of the defective pixel has been completed, wherein the position data of the defective pixel of the register for which the correction has been completed is replaced with the position data of the defective pixel to be corrected next. It is characterized in that it is sequentially updated, the register configuration can be realized with a small-scale circuit configuration, and an image sensor having a different number of pixels In which it can be coped with the same circuit configuration in accordance systems.

In the pixel correction device according to the above-mentioned invention, the register is a register capable of reading and writing the stored position data of the defective pixel in a FIFO format and circulating. By effectively utilizing the register for temporarily storing the position data, the circuit scale can be further reduced. Further, a storage unit for storing position data of a defective pixel included in the image sensor, a counter for counting the scanning position of the image sensor, a register group for temporarily storing the position data of the storage unit, and the register group are configured. Compare the position data of the defective pixel output from each register with the count value from the counter,
In a pixel correction device including a comparator that outputs a match signal when the values match, and a pixel correction unit that corrects the scan output of the image sensor according to the match signal of the comparator, the number of registers forming the register group is The entire area of the image sensor is divided into a predetermined number of areas, and the number of defective pixels to be corrected is set to be larger than the number of defective pixels in the divided area and smaller than the number of defective pixels of the entire area of the image sensor. A register detecting means in the group of registers whose correction has been completed, and sequentially updates the position data of the defective pixel of the register whose correction has been completed to the position data of the next defective pixel to be corrected based on the output of the detecting means. The circuit configuration of the register for temporarily storing the position data of the defective pixel can be reduced in size, and the image sensor having a different number of pixels can be used. In which it can be coped with the same circuit configuration in a system that.

In the above-described pixel correction apparatus, the register group is further divided into two groups, and position data of defective pixels is set according to the scanning timing of the divided scanning area to be sequentially corrected. The position data of the defective pixel in the next scanning area is set in the second register group during the correction in the step (a), and the position of the defective pixel in the next scanning area is set in the first register group during the correction in the second register group. By setting the data, the time required to set the position data of the defective pixel in the register can be shortened.

Further, by setting the number of registers in the first register group larger than the number of registers in the second register group, the size and speed of the register configuration can be further reduced. A storage unit for storing position data of defective pixels included in the image sensor; a counter for counting the scanning position of the image sensor; a register group for temporarily storing the position data of the storage unit; A comparator that compares the position data output of the defective pixel with the count value output from the counter and outputs a coincidence signal when they match, and a unit that corrects the scan output of the image sensor according to the output of the comparator. In the pixel correction device, the number of registers constituting the register group is obtained by dividing the entire area of the image sensor into a predetermined number of areas,
The number of defective pixels to be corrected in the divided area is set to be larger than the number of defective pixels in the entire area of the image sensor, and a predetermined number is set for each of the divided areas of the image sensor according to scanning of the image sensor. A timing signal generating means for generating a timing signal; and, before scanning of the divided area is started in synchronization with the timing signal, the position data of the defective pixel to be corrected included in the divided area is corrected. It is characterized in that it is set in a register group,
The register configuration can be realized with a small-scale circuit configuration, and the same circuit configuration can cope with a system using imaging elements having different numbers of pixels. The pixel correction device according to the above aspect of the invention further includes at least two or more register groups, wherein a timing signal from the timing signal generation unit is generated in synchronization with scanning of the divided area, and the timing signal is generated by the timing signal. The register group is selectively switched, and the number of registers is reduced by correcting the defective pixel included in the scan output of the solid-state imaging device according to the position data of the defective pixel set in the register group, thereby reducing the circuit scale. You can do it.

(Embodiment 1) First, an embodiment corresponding to the invention described in claims 1 and 2 of the present invention will be described with reference to FIG. 1 and FIG.

In FIG. 1, reference numeral 1 denotes a defective pixel correcting means for correcting a defective pixel by means of interpolation or the like, reference numeral 20 denotes a counter for counting horizontal and vertical scanning positions, and reference numeral 2 denotes a count value of the counter 20 and the defective pixel. A matching circuit which is a comparator for comparing the position data of the defective pixel stored in the register group 3 which is a register for temporarily storing the position data of the defective pixel; The storage means 6 for storing the position data is a correction state detecting means for holding the correction state so that the position data setting means 4 can detect the corrected register.

[0013] Prior to scanning of the solid-state imaging device,
The defective pixel position data setting means 4 reads the defective pixel position data from the defective pixel position data storage means 5 in accordance with the scanning order, starting from the defective pixel position data to be corrected first. Is set up to the storage capacity limit of the register group 3 for temporarily storing the position data. That is, the setting up to the register storing the position data of the defective pixel for which the correction has been completed is performed. If the number of defective pixels to be corrected on the entire screen is smaller than the set number of defective pixel position data that can be set in the temporarily stored register group 3, the processing by the defective pixel position data setting means 4 is performed only once. In the setting process.

In the above embodiment, when the scanning of the solid-state imaging device (hereinafter referred to as CCD) is started, the count value of the counter 20 for counting the scanning position and the defect set in the register group 3 for temporarily storing the defective pixel are set. The pixel position data is read out in the order of scanning and compared by the matching circuit 2. If they match, a matching signal is output from the matching circuit 2 to the defective pixel correction means 1 to correct the defective pixel and detect the correction state. It is also output to means 6. That is, the correction state detecting means 6 detects whether or not the correction of one defective pixel has been completed and the coincidence signal has been output, so that the position data setting means 4 can detect the register in which the correction of the defective pixel has been completed. The correction state is held by the correction state detecting means 6. By this correction processing, the CCD data including the defective pixel input to the defective pixel correction means 1 is output as the corrected CCD data of the defective pixel.

Next, when the number of defective pixels to be corrected in the entire screen is larger than the set number of position data of defective pixels in the temporarily stored register group 3, it is necessary to correct the remaining defective pixels. In this case, the defective pixel position data setting means 4
At a predetermined timing, the correction state detecting means 6 detects a register in which the correction of the register group 3 for temporarily storing the position data of the defective pixel is completed, and replaces the position data of the defective pixel to be corrected next with the position data of the defective pixel. Is read from the storage means 5 and reset to the register of the register group 3 for temporarily storing the defective pixel whose correction has been completed. By repeating this process until scanning of one screen is completed, it is possible to correct defective pixels included in one screen and to be corrected.

Here, at the above-mentioned predetermined timing,
There are mainly two methods. One is to update the position data of the defective pixel during the blanking period using the blanking period of the horizontal scanning period. The other is to update the position data of the defective pixel by using a timing signal synchronized with the start of scanning for every predetermined number of lines in the vertical direction of the CCD. The selection is made in the system design according to the data update speed to the register and the number of defective pixels.

Next, the register group 3 for temporarily storing the position data of the defective pixel is configured so that the registers constituting the register group 3 circulate the setting of the position data of the defective pixel in a predetermined order. An example in which the register group 3 is composed of four registers is shown.

In FIG. 2, a register group 3 for temporarily storing position data of a defective pixel includes registers 30, 31, 3
2, 33. The outputs of the four registers 30 to 33 are selected by the selection circuit 7 according to the count value of the 2-bit counter 8 and input to the coincidence circuit 2. Then, a 2-bit counter 8 that counts the number of times the matching circuit 2 outputs a matching signal.
Are input to the selection circuit 7, and the selection circuits 7 sequentially determine the registers 30 to 33 constituting the register group 3 according to the count value of the 2-bit counter 8, and output them to the coincidence circuit 2. That is, the output initial value of the 2-bit counter 8 is set to zero, and the register 30 is set to be selected. When the scanning of the CCD is started and the position data of the defective pixel initially set in the register 30 matches the count value of the counter 20 for counting the scanning position of the CCD, a matching signal is sent from the matching circuit 2 to the correcting means 1. The output is corrected and output to the 2-bit counter 8 to count the number of times of output of the coincidence signal. At this time, the count value of the counter 8 changes from 0 to 1, and the register 31 is selected. Thereafter, each time the coincidence signal is output, the count value of the counter 8 is updated, and the register 32 and 33 are sequentially selected. That is, a first-in first-out cyclic register configuration in which the registers 30, 31, 32, and 33 are output in this order and the next update data is set in the last register 33.

It is well known that the configuration of the selection circuit 7 can be realized by a simple logic circuit. Counter 8
Is 3 and the last register 33 is selected. When the next coincidence signal is output, the count value of the counter 8 having a 2-bit configuration becomes zero, and the register 30 is selected again. After the correction of the position data of the defective pixel initially set in the register 30,
By controlling the position data of the defective pixel set in the register 30 to be updated to the position data of the next defective pixel to be corrected, the register constituting the register group 3 for temporarily storing the position data of the defective pixel Can be effectively used, and the register group 3 having the minimum necessary number of registers is used to prepare a number of register groups corresponding to a predetermined maximum number of defective pixels to be corrected in one screen. And correction of defective pixels is possible.

In this embodiment, to simplify the description,
Although the two-bit counter 8 has been described as an example, it is apparent that the operation is the same even when the number of bits of the counter is increased.

The configuration of the selection circuit 7 for selecting the position data of the defective pixel from the register group 3 based on the count value of the 2-bit counter 8 corresponds to the position data setting means 4 in FIG.

Next, an operation of detecting a register having the corrected position data and sequentially updating the defective pixel position data of the corrected register to the next defective pixel position data to be corrected will be described. In order to simulate the operation, the entire area of the CCD is divided into four areas, and the number of defective pixels is eight and the maximum number of corrections is three. The position data of the four defective pixels is set, the three defective pixels are corrected, and immediately after the correction, the position data of the three defective pixels in the register after the first correction is updated, and the remaining data in the first setting is updated. A total of three defective pixels, one out of the three updated ones, are corrected in the second correction operation. Immediately thereafter, the defect position data of the register that has been corrected for the second time is updated (only eight out of three defective pixel position data are updated because eight defective pixels are assumed). The third two defective pixels are corrected, and the correction is completed for all eight pixels by the three correction operations. By using the corrected registers in a cyclic manner, the number of registers can be significantly reduced.

As described above, the correction operation is completed by three correction operations.
The CCD is divided into four areas, and is read from the position data setting means 4 into the temporary recording register group 3 in synchronization with the start of scanning of the four divided areas.

As another register configuration, for example, when the number of registers constituting a register group is 64, the 64 registers are divided into 48 and 16 registers. Defective pixel position data is sequentially set in 48 registers starting from the first divided area 1 of the CCD to be corrected.
Is also set in this register. Then, the pixels of the defective pixel position data indicated in the 48 registers are corrected,
When the correction is completed, the process proceeds to the correction of the defective pixel position data indicated in the 16 registers. The 16 registers are used to correct the next defective pixel position data in the 48 registers during the correction of the defective pixel. Perform an update. When the correction of the defective pixel position data indicated by the 16 registers is completed, the process proceeds to the correction of the defective pixel position data indicated by the 48 registers. During the correction, the next defective pixel is stored in the 16 registers. Update the position data.

As described above, the register group is divided into two registers to be used for the register during the correction of the defective pixel and the register for updating the position data of the defective pixel. Update the data. Of course, in addition to dividing the register group into 48 and 16 registers,
A division method such as 6 and 8 or 60 and 4 can be adaptively selected as long as the access time of the register at the time of correction and update matches the system of the imaging apparatus. When the number of defective pixels is 64, the setting of the defective pixel position data is completed once if the number of defective pixels is less than 64. In this case, the configuration is such that all the 64 registers do not have a cyclic form, but circulate in the divided 48 and 16 register groups.

The CCD area is divided in the vertical line direction. For example, in the case of 2 million pixels, the vertical line is equivalent to 1200 lines, divided into 5 divided into 240 lines, or divided into 4 into 330 lines. Is divided into The scanning time is equivalent to 33 mSec. Therefore, 3
Setting and updating of defective pixel position data are performed according to a timing signal corresponding to every 3 mSec.

According to the configuration of such a pixel correction device,
The circuit scale can be kept to the minimum necessary,
It is possible to flexibly cope with a correction process of a defective pixel which increases or decreases according to the number of pixels of the CCD. (Embodiment 2) Next, an embodiment corresponding to the invention described in claims 3 to 7 of the present invention will be described with reference to FIGS. 1 and 2 are denoted by the same reference numerals as those in FIGS. 1 and 2, detailed description thereof will be omitted, and different portions will be mainly described.

FIG. 3 is a functional block diagram of the pixel correction device according to the second embodiment, and FIG. 4 is a block diagram showing one configuration example of a register group for temporarily storing defective pixel position data.

In FIG. 3, it is assumed that the entire area of the CCD is divided into a plurality of areas and defective pixels are corrected. Prior to the scanning of the CCD, the defective pixel position data setting means 4 stores the defective pixel position data starting from the first divided area 1 to be corrected.
, And is set in one register group 3a (or 3b) constituting the register group 3 for temporarily storing defective pixel position data. The number of divided areas is the number of CCD pixels
For a 1 million pixel CCD to a 4 million pixel CCD, 6
Are divided into about 14 blocks.

If the number of defective pixels to be corrected in the entire screen is smaller than the number of defective pixel position data set in the temporary storage register group 3, the process of setting the defective pixel position data is terminated by the first setting process. Will be. CCD
Is started, when the scanning position signal counted by the counter 20 matches the read position data of the defective pixel set in the temporary storage register group 3 of the defective pixel, the matching circuit 2 Correction means 1 for signal is defective pixel
And the defective pixel is corrected. As a result of this correction processing, the solid-state imaging device data including the defective pixel input to the defective pixel correction unit 1 is converted into the CC with the corrected defective pixel.
It is output as D data.

Next, when the number of defective pixels to be corrected in the entire screen is larger than the number of defective pixel position data set in the temporary storage register group 3, the setting is not completed by one set of defective pixel position data. It is necessary to correct defective pixels in the area. In this case, the defective pixel position data of each area is output from the defective pixel position data storage means 5 to the position data setting means 4 for each of the divided areas of the CCD as described above. The timing signal generating means 9 outputs a timing signal for outputting the defective pixel position data of each divided region from the storage means 5 for storing the defective pixel position data to the position data setting means 4.

The position data setting means 4 for the defective pixel uses the CC
The entire area of D is divided into predetermined areas, and scanning of the divided areas is performed according to an output from a timing signal generation unit 9 that generates a predetermined timing signal that can determine which area is to be scanned. The position data of the defective pixel to be corrected in the sequentially divided area is stored in the defective pixel position data storage unit 5.
From the temporary storage register group 3 via the position data setting means 4. This process is repeated until scanning of one screen is completed, thereby correcting all defective pixels included in one screen to be corrected. Naturally, there is a possibility that a defective pixel may exist during a period in which the timing signal is output by the timing signal generating means 9. Therefore, when the timing signal is output and the defect position data is set in the register, as will be described later. Are provided, and defective pixel position data is updated from the corrected register position in the register group. As described above, the register that is performing the correction process and the register that is being updated are provided so that the correction operation can be performed even while the timing signal is being output. That is,
The defective pixel position data can be updated while the position data of the defective pixel is being updated (during register setting).

The temporary storage register group 3 for defective pixel position data is divided into a predetermined number of registers to constitute a plurality of register groups. FIG. 4 shows an example of two register group configurations for the sake of simplicity. In FIG. 4, a register group 3 for temporarily storing position data of a defective pixel includes register groups 3a and 3b. The input of the defective pixel position data to each register group is performed by the changeover switch 10, and the output is performed by the changeover switch 11.
Via the respective changeover switches 1
The registers 0 and 11 are configured to select different register groups according to the control signal from the inverter 12.
That is, during the setting of the defective pixel position data in one register group, the output of the defective pixel position data set in advance in the other register group is selected and the correction process is performed. In other words, during the correction of the defective pixel by the register group in which the defective pixel position data to be corrected is set, it is possible to set the next defective pixel position data to be corrected in the other register group.

Next, the defective pixel correction processing will be described. Prior to the scanning of the CCD, the defective pixel position data included in the area 1 to be corrected first is read out from the defective pixel position data storage means 5 in the order of scanning by the defective pixel position data setting means 4 and the defective pixel is read. A register group 3b for setting the register group 3a constituting the register group 3 for temporarily storing the position data, reading the defective pixel position data to be corrected in the next area 2 from the storage means 5, and temporarily storing the defective pixel position data. Set to.

Changeover switch 11 before scanning is started
Selects the register group 3a, and the changeover switch 10 selects the register group 3b according to the control signal. When the scanning of the CCD is started, the count value from the counter 20 for counting the scanning position is compared with the position data set in the register group 3a for temporarily storing the defective pixel position data. When they match, a matching signal is input from the matching circuit 2 to the defective pixel correcting means 1 to correct the defective pixel. By this correction processing, the scanning signal of the CCD including the defective pixel input to the defective pixel correction means 1 is changed to the CCD having the corrected defective pixel.
Is output as a scanning signal.

The defective pixel position data setting means 4 sets the CC
The entire area of D is divided into a predetermined area, and a timing signal generating means 9 generates a predetermined timing signal which can determine which area the scanning is divided into. Depending on the output signal, area 2
Immediately before the scanning is started, the changeover switch 11 controls the changeover switch 11 to select the register group 3b and the changeover switch 10 to select the register group 3a. This process is sequentially performed on all divided areas of the CCD, and is repeated until scanning of one screen is completed, whereby all the defective pixels to be corrected included in one screen can be corrected.

According to the configuration of such a pixel correction device,
The circuit scale can be kept to the minimum necessary,
It is possible to flexibly cope with a correction process of a defective pixel which increases or decreases according to the number of pixels of the solid-state imaging device.

[0038]

As described above, according to the pixel correction apparatus of the present invention, it is highly possible that a plurality of solid-state imaging elements are generated during a horizontal scanning period, which is an adverse effect in a system in which imaging is to be performed within a predetermined time. Correction of a defective pixel which is
Even if the number of pixels of the image sensor increases, the circuit size can be minimized without increasing the number of registers for temporarily storing position data of defective pixels, and furthermore, the number of defective pixels that increases or decreases according to the total number of pixels of the image sensor The correction can be performed only by increasing the number of repetitions with the same configuration, and an optimal pixel correction device can be provided in a system corresponding to a plurality of solid-state imaging devices having different numbers of pixels.

[Brief description of the drawings]

FIG. 1 is a functional block diagram of a pixel correction device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing one configuration example of a register group for temporarily storing position data of a defective pixel in the pixel correction device.

FIG. 3 is a functional block diagram of a pixel correction device according to a second embodiment of the present invention.

FIG. 4 is a block diagram showing one configuration example of a register group for temporarily storing position data of a defective pixel in the pixel correction device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Defective pixel correction means 2 Matching circuit 3, 3a, 3b Position data temporary storage register group of defective pixels 4 Position data setting means 5 Position data storage means 6 Correction state detection means 7 Selection circuit 8, 20 counter 9 Timing signal generation means 10 , 11 Changeover switch 30, 31, 32, 33 Register

Claims (7)

[Claims] 1. A storage means for storing position data of a defective pixel included in an image sensor as horizontal and vertical scanning positions, a counter for counting the scanning position of the image sensor, and a predetermined number of defective pixels in the storage means. A register for temporarily storing position data, and comparing the position data of the defective pixel output from the register with the count value output from the counter,
A pixel correction device that corrects a scan output of an image sensor when coincidence is provided, comprising register detection means for detecting a register having position data for which correction of a defective pixel has been completed, and detecting position data of a defective pixel of the register for which correction has been completed. A pixel correction device for sequentially updating the position data of a defective pixel to be corrected next. 2. The pixel correction apparatus according to claim 1, wherein the register is a register capable of reading and writing the stored position data of the defective pixel in a FIFO format and circulating. 3. A storage unit for storing position data of a defective pixel included in a solid-state imaging device, a counter for counting a scanning position of the solid-state imaging device, a register group for temporarily storing the position data of the storage unit, Comparing the position data of the defective pixel output from each register constituting the register group with the count value from the counter, and outputting a coincidence signal when they match, a comparator of the solid-state imaging device according to the coincidence signal of the comparator In a pixel correction device having a pixel correction unit for correcting a scanning output, the number of registers constituting the register group is determined by dividing an entire region of the solid-state imaging device into a predetermined number of regions, and correcting the divided regions. The number of defective pixels is set to be larger than the number of defective pixels to be set and smaller than the number of defective pixels in the entire region of the solid-state imaging device, and the registration is completed while the solid-state imaging device is scanning. Register detecting means in the star group, wherein the position data of the defective pixel of the register which has been corrected based on the output of the detecting means is sequentially updated to the position data of the defective pixel to be corrected next. Pixel correction device. 4. A method of correcting a defective pixel indicated by a first register group, comprising two register groups, wherein position data of a defective pixel is set according to the scanning timing of a divided scanning area to be sequentially corrected. In the second register group, the position data of the defective pixel in the next scanning area is set, and during the correction of the defective pixel indicated by the second register group, the position of the defective pixel in the next scanning area is stored in the first register group. 4. The pixel correction device according to claim 1, wherein data is set. 5. The number of registers of the first register group is:
The pixel correction device according to claim 4, wherein the number of registers is set to be larger than the number of registers in the second register group. 6. A storage unit for storing position data of a defective pixel included in an image sensor, a counter for counting a scanning position of the image sensor, a register group for temporarily storing position data of the storage unit, and the register group. The comparator compares the position data output of the defective pixel from each register and the count output from the counter, and outputs a coincidence signal when they match, and corrects the scanning output of the image sensor according to the output of the comparator. In a pixel correction device having means,
At least one of the register groups has a plurality of register groups, and the number of registers constituting the register group is such that the entire area of the image sensor is divided into predetermined areas, and More than the number of defective pixels to be corrected,
Timing signal generating means for setting the number of defective pixels to be smaller than the number of defective pixels in the entire area of the image sensor and generating a predetermined timing signal for each of the divided areas of the image sensor according to scanning of the image sensor; Setting the position data of a defective pixel to be corrected included in the divided area in the register group before scanning of the divided area is started in synchronization with the pixel group correction. apparatus. 7. A semiconductor device comprising two or more register groups, wherein a timing signal from the timing signal generation means is generated in synchronization with the start of scanning of the divided area, and the timing signal is generated in synchronization with the timing signal. 7. The pixel correction according to claim 6, wherein a register group is selectively switched to correct a defective pixel included in a scan output of the solid-state imaging device according to position data of the defective pixel set in the register group. apparatus.